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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Heiner Kallweit , Russell King , Linus Walleij , linux-kernel@vger.kernel.org Subject: [PATCH net 1/6] net: dsa: vsc73xx: fix port MAC configuration in full duplex mode Date: Fri, 2 Aug 2024 10:03:58 +0200 Message-Id: <20240802080403.739509-2-paweldembicki@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240802080403.739509-1-paweldembicki@gmail.com> References: <20240802080403.739509-1-paweldembicki@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org According to the datasheet description ("Port Mode Procedure" in 5.6.2), the VSC73XX_MAC_CFG_WEXC_DIS bit is configured only for half duplex mode. The WEXC_DIS bit is responsible for MAC behavior after an excessive collision. Let's set it as described in the datasheet. Signed-off-by: Pawel Dembicki Reviewed-by: Linus Walleij Reviewed-by: Florian Fainelli --- This patch came from net-next series[0]. Changes since net-next: - rebased to netdev/main only [0] https://patchwork.kernel.org/project/netdevbpf/patch/20240729210615.279952-6-paweldembicki@gmail.com/ --- drivers/net/dsa/vitesse-vsc73xx-core.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/vitesse-vsc73xx-core.c b/drivers/net/dsa/vitesse-vsc73xx-core.c index d9d3e30fd47a..f548ed4cb23f 100644 --- a/drivers/net/dsa/vitesse-vsc73xx-core.c +++ b/drivers/net/dsa/vitesse-vsc73xx-core.c @@ -957,6 +957,11 @@ static void vsc73xx_mac_link_up(struct phylink_config *config, if (duplex == DUPLEX_FULL) val |= VSC73XX_MAC_CFG_FDX; + else + /* In datasheet description ("Port Mode Procedure" in 5.6.2) + * this bit is configured only for half duplex. + */ + val |= VSC73XX_MAC_CFG_WEXC_DIS; /* This routine is described in the datasheet (below ARBDISC register * description) @@ -967,7 +972,6 @@ static void vsc73xx_mac_link_up(struct phylink_config *config, get_random_bytes(&seed, 1); val |= seed << VSC73XX_MAC_CFG_SEED_OFFSET; val |= VSC73XX_MAC_CFG_SEED_LOAD; - val |= VSC73XX_MAC_CFG_WEXC_DIS; /* Those bits are responsible for MTU only. Kernel takes care about MTU, * let's enable +8 bytes frame length unconditionally. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Heiner Kallweit , Russell King , Linus Walleij , linux-kernel@vger.kernel.org Subject: [PATCH net 2/6] net: dsa: vsc73xx: pass value in phy_write operation Date: Fri, 2 Aug 2024 10:03:59 +0200 Message-Id: <20240802080403.739509-3-paweldembicki@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240802080403.739509-1-paweldembicki@gmail.com> References: <20240802080403.739509-1-paweldembicki@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org In the 'vsc73xx_phy_write' function, the register value is missing, and the phy write operation always sends zeros. This commit passes the value variable into the proper register. Fixes: 975ae7c69d51 ("net: phy: vitesse: Add support for VSC73xx") Signed-off-by: Pawel Dembicki Reviewed-by: Linus Walleij Reviewed-by: Florian Fainelli --- This patch came from net-next series[0]. Changes since net-next: - rebased to netdev/main only [0] https://patchwork.kernel.org/project/netdevbpf/patch/20240729210615.279952-6-paweldembicki@gmail.com/ --- drivers/net/dsa/vitesse-vsc73xx-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dsa/vitesse-vsc73xx-core.c b/drivers/net/dsa/vitesse-vsc73xx-core.c index f548ed4cb23f..4b300c293dec 100644 --- a/drivers/net/dsa/vitesse-vsc73xx-core.c +++ b/drivers/net/dsa/vitesse-vsc73xx-core.c @@ -574,7 +574,7 @@ static int vsc73xx_phy_write(struct dsa_switch *ds, int phy, int regnum, return 0; } - cmd = (phy << 21) | (regnum << 16); + cmd = (phy << 21) | (regnum << 16) | val; ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, 0, 1, cmd); if (ret) return ret; From patchwork Fri Aug 2 08:04:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Dembicki X-Patchwork-Id: 13751210 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lf1-f45.google.com (mail-lf1-f45.google.com [209.85.167.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 854421C232A; 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Fri, 02 Aug 2024 01:04:27 -0700 (PDT) Received: from WBEC325.dom.lan ([185.188.71.122]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-530bba07e46sm163281e87.32.2024.08.02.01.04.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Aug 2024 01:04:26 -0700 (PDT) From: Pawel Dembicki To: netdev@vger.kernel.org Cc: Pawel Dembicki , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Heiner Kallweit , Russell King , Linus Walleij , linux-kernel@vger.kernel.org Subject: [PATCH net 3/6] net: dsa: vsc73xx: use defined values in phy operations Date: Fri, 2 Aug 2024 10:04:00 +0200 Message-Id: <20240802080403.739509-4-paweldembicki@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240802080403.739509-1-paweldembicki@gmail.com> References: <20240802080403.739509-1-paweldembicki@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org This commit changes magic numbers in phy operations. Some shifted registers was replaced with bitfield macros. No functional changes done. Signed-off-by: Pawel Dembicki Reviewed-by: Linus Walleij Reviewed-by: Florian Fainelli --- This patch came from net-next series[0]. Changes since net-next: - rebased to netdev/main only [0] https://patchwork.kernel.org/project/netdevbpf/patch/20240729210615.279952-6-paweldembicki@gmail.com/ --- drivers/net/dsa/vitesse-vsc73xx-core.c | 45 ++++++++++++++++++++------ 1 file changed, 35 insertions(+), 10 deletions(-) diff --git a/drivers/net/dsa/vitesse-vsc73xx-core.c b/drivers/net/dsa/vitesse-vsc73xx-core.c index 4b300c293dec..b6c46a3da9a5 100644 --- a/drivers/net/dsa/vitesse-vsc73xx-core.c +++ b/drivers/net/dsa/vitesse-vsc73xx-core.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -40,6 +41,10 @@ #define VSC73XX_BLOCK_ARBITER 0x5 /* Only subblock 0 */ #define VSC73XX_BLOCK_SYSTEM 0x7 /* Only subblock 0 */ +/* MII Block subblock */ +#define VSC73XX_BLOCK_MII_INTERNAL 0x0 /* Internal MDIO subblock */ +#define VSC73XX_BLOCK_MII_EXTERNAL 0x1 /* External MDIO subblock */ + #define CPU_PORT 6 /* CPU port */ /* MAC Block registers */ @@ -221,9 +226,22 @@ #define VSC73XX_VLANACCESS_VLAN_TBL_CMD_CLEAR_TABLE 3 /* MII block 3 registers */ -#define VSC73XX_MII_STAT 0x0 -#define VSC73XX_MII_CMD 0x1 -#define VSC73XX_MII_DATA 0x2 +#define VSC73XX_MII_STAT 0x0 +#define VSC73XX_MII_CMD 0x1 +#define VSC73XX_MII_DATA 0x2 + +#define VSC73XX_MII_STAT_BUSY BIT(3) +#define VSC73XX_MII_STAT_READ BIT(2) +#define VSC73XX_MII_STAT_WRITE BIT(1) + +#define VSC73XX_MII_CMD_SCAN BIT(27) +#define VSC73XX_MII_CMD_OPERATION BIT(26) +#define VSC73XX_MII_CMD_PHY_ADDR GENMASK(25, 21) +#define VSC73XX_MII_CMD_PHY_REG GENMASK(20, 16) +#define VSC73XX_MII_CMD_WRITE_DATA GENMASK(15, 0) + +#define VSC73XX_MII_DATA_FAILURE BIT(16) +#define VSC73XX_MII_DATA_READ_DATA GENMASK(15, 0) /* Arbiter block 5 registers */ #define VSC73XX_ARBEMPTY 0x0c @@ -535,20 +553,24 @@ static int vsc73xx_phy_read(struct dsa_switch *ds, int phy, int regnum) int ret; /* Setting bit 26 means "read" */ - cmd = BIT(26) | (phy << 21) | (regnum << 16); - ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, 0, 1, cmd); + cmd = VSC73XX_MII_CMD_OPERATION | + FIELD_PREP(VSC73XX_MII_CMD_PHY_ADDR, phy) | + FIELD_PREP(VSC73XX_MII_CMD_PHY_REG, regnum); + ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL, + VSC73XX_MII_CMD, cmd); if (ret) return ret; msleep(2); - ret = vsc73xx_read(vsc, VSC73XX_BLOCK_MII, 0, 2, &val); + ret = vsc73xx_read(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL, + VSC73XX_MII_DATA, &val); if (ret) return ret; - if (val & BIT(16)) { + if (val & VSC73XX_MII_DATA_FAILURE) { dev_err(vsc->dev, "reading reg %02x from phy%d failed\n", regnum, phy); return -EIO; } - val &= 0xFFFFU; + val &= VSC73XX_MII_DATA_READ_DATA; dev_dbg(vsc->dev, "read reg %02x from phy%d = %04x\n", regnum, phy, val); @@ -574,8 +596,11 @@ static int vsc73xx_phy_write(struct dsa_switch *ds, int phy, int regnum, return 0; } - cmd = (phy << 21) | (regnum << 16) | val; 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Fri, 02 Aug 2024 01:04:28 -0700 (PDT) Received: from WBEC325.dom.lan ([185.188.71.122]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-530bba07e46sm163281e87.32.2024.08.02.01.04.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Aug 2024 01:04:28 -0700 (PDT) From: Pawel Dembicki To: netdev@vger.kernel.org Cc: Pawel Dembicki , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Heiner Kallweit , Russell King , Linus Walleij , linux-kernel@vger.kernel.org Subject: [PATCH net 4/6] net: dsa: vsc73xx: check busy flag in MDIO operations Date: Fri, 2 Aug 2024 10:04:01 +0200 Message-Id: <20240802080403.739509-5-paweldembicki@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240802080403.739509-1-paweldembicki@gmail.com> References: <20240802080403.739509-1-paweldembicki@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The VSC73xx has a busy flag used during MDIO operations. It is raised when MDIO read/write operations are in progress. Without it, PHYs are misconfigured and bus operations do not work as expected. Signed-off-by: Pawel Dembicki Reviewed-by: Linus Walleij Reviewed-by: Florian Fainelli --- This patch came from net-next series[0]. Changes since net-next: - removed mutex - used method poll.h to poll busy value in 'vsc73xx_mdio_busy_check' - use 'vsc73xx_mdio_busy_check' for control if mdio is ready [0] https://patchwork.kernel.org/project/netdevbpf/patch/20240729210615.279952-6-paweldembicki@gmail.com/ --- drivers/net/dsa/vitesse-vsc73xx-core.c | 33 ++++++++++++++++++++++++-- 1 file changed, 31 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/vitesse-vsc73xx-core.c b/drivers/net/dsa/vitesse-vsc73xx-core.c index b6c46a3da9a5..42b4f312c418 100644 --- a/drivers/net/dsa/vitesse-vsc73xx-core.c +++ b/drivers/net/dsa/vitesse-vsc73xx-core.c @@ -317,6 +317,7 @@ #define IS_739X(a) (IS_7395(a) || IS_7398(a)) #define VSC73XX_POLL_SLEEP_US 1000 +#define VSC73XX_MDIO_POLL_SLEEP_US 5 #define VSC73XX_POLL_TIMEOUT_US 10000 struct vsc73xx_counter { @@ -545,6 +546,22 @@ static int vsc73xx_detect(struct vsc73xx *vsc) return 0; } +static int vsc73xx_mdio_busy_check(struct vsc73xx *vsc) +{ + int ret, err; + u32 val; + + ret = read_poll_timeout(vsc73xx_read, err, + err < 0 || !(val & VSC73XX_MII_STAT_BUSY), + VSC73XX_MDIO_POLL_SLEEP_US, + VSC73XX_POLL_TIMEOUT_US, false, vsc, + VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL, + VSC73XX_MII_STAT, &val); + if (ret) + return ret; + return err; +} + static int vsc73xx_phy_read(struct dsa_switch *ds, int phy, int regnum) { struct vsc73xx *vsc = ds->priv; @@ -552,6 +569,10 @@ static int vsc73xx_phy_read(struct dsa_switch *ds, int phy, int regnum) u32 val; int ret; + ret = vsc73xx_mdio_busy_check(vsc); + if (ret) + return ret; + /* Setting bit 26 means "read" */ cmd = VSC73XX_MII_CMD_OPERATION | FIELD_PREP(VSC73XX_MII_CMD_PHY_ADDR, phy) | @@ -560,7 +581,11 @@ static int vsc73xx_phy_read(struct dsa_switch *ds, int phy, int regnum) VSC73XX_MII_CMD, cmd); if (ret) return ret; - msleep(2); + + ret = vsc73xx_mdio_busy_check(vsc); + if (ret) + return ret; + ret = vsc73xx_read(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL, VSC73XX_MII_DATA, &val); if (ret) @@ -583,7 +608,11 @@ static int vsc73xx_phy_write(struct dsa_switch *ds, int phy, int regnum, { struct vsc73xx *vsc = ds->priv; u32 cmd; - int ret; + int ret = 0; + + ret = vsc73xx_mdio_busy_check(vsc); + if (ret) + return ret; /* It was found through tedious experiments that this router * chip really hates to have it's PHYs reset. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Heiner Kallweit , Russell King , Linus Walleij , linux-kernel@vger.kernel.org Subject: [PATCH net 5/6] net: dsa: vsc73xx: allow phy resetting Date: Fri, 2 Aug 2024 10:04:02 +0200 Message-Id: <20240802080403.739509-6-paweldembicki@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240802080403.739509-1-paweldembicki@gmail.com> References: <20240802080403.739509-1-paweldembicki@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Now, phy reset isn't a problem for vsc73xx switches. 'soft_reset' can be done normally. This commit removes the reset blockade in the 'vsc73xx_phy_write' function. Signed-off-by: Pawel Dembicki Reviewed-by: Linus Walleij Reviewed-by: Florian Fainelli --- This patch came from net-next series[0]. Changes since net-next: - rebased to netdev/main only [0] https://patchwork.kernel.org/project/netdevbpf/patch/20240729210615.279952-6-paweldembicki@gmail.com/ --- drivers/net/dsa/vitesse-vsc73xx-core.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/drivers/net/dsa/vitesse-vsc73xx-core.c b/drivers/net/dsa/vitesse-vsc73xx-core.c index 42b4f312c418..5f63c56db905 100644 --- a/drivers/net/dsa/vitesse-vsc73xx-core.c +++ b/drivers/net/dsa/vitesse-vsc73xx-core.c @@ -614,17 +614,6 @@ static int vsc73xx_phy_write(struct dsa_switch *ds, int phy, int regnum, if (ret) return ret; - /* It was found through tedious experiments that this router - * chip really hates to have it's PHYs reset. They - * never recover if that happens: autonegotiation stops - * working after a reset. Just filter out this command. - * (Resetting the whole chip is OK.) - */ - if (regnum == 0 && (val & BIT(15))) { - dev_info(vsc->dev, "reset PHY - disallowed\n"); - return 0; - } - cmd = FIELD_PREP(VSC73XX_MII_CMD_PHY_ADDR, phy) | FIELD_PREP(VSC73XX_MII_CMD_PHY_REG, regnum) | FIELD_PREP(VSC73XX_MII_CMD_WRITE_DATA, val); From patchwork Fri Aug 2 08:04:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Dembicki X-Patchwork-Id: 13751213 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lf1-f43.google.com (mail-lf1-f43.google.com [209.85.167.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DFE991C3F0B; Fri, 2 Aug 2024 08:04:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722585875; cv=none; b=kN1ii1c2F75I2bRyIg1FLfT/xJtr6s3aUKyJo3spBCkP/S2+HzbVYbWRR2McSiZ9lPfUQcH/URqAJ/kfM9Gh1aSA4nYvoOhGEiLZU65CWeBSmRvQm3fJicUvrH+wleOIkFkpboBi8dK4jtaPZmS8fh71/VyPvmbKh0Fd3wsCEGY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722585875; c=relaxed/simple; bh=wJ8CKjo99FdygF4Dyf6T71+jLKBvtf5FYO+XPBN2Cv4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=GguPqw2WCi1ToSnavfJlUVB/QhY5/niq7OP5A8hJLZtRCo3nXQyCk3GPY8uEgCft+qZCrwfwnry2AIOiakgZfgemKVA6FN+4kpaxU2Yevh2uJS0wBe/vyRrXVltWx1GM8JJyWqr5I+PXVGKJhkwQdJ5u1WtTYuAVAFTvHZ6ZBew= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=g6QVwv3D; arc=none smtp.client-ip=209.85.167.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="g6QVwv3D" Received: by mail-lf1-f43.google.com with SMTP id 2adb3069b0e04-52efdf02d13so13006826e87.2; Fri, 02 Aug 2024 01:04:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1722585872; x=1723190672; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uCR2a8QUcsGwPUUS/KFvb11t9ihPQhvH+olYLUnMnJk=; b=g6QVwv3DM2HHi1LwY1NptWNkmIVyJg/m7ZwsiNyFGaXV5DCySkYtBOO9Ze6dAShmMs /gSFrI7pUJZMsjgGM/L2xYhkJCdrFJk6S0CJFznMBIZL3K4Z3Bty8mn6WEh6ivvH/qqO rp2CSaRDiPLTJZwOVrLru3pw0NzKq7E4RagNXmaotYvjNLsluxtZpaNg4R0wIM29VE7j 7dsTW/D1gPjB1YmYme9HXYgRGmc38NuE47bcf6XLMrn6j+PQTPmQ48WqedV7427JPJpV ltumsMVNqjmTiPrnSUzEejGsB4XYFx+TihtqMSIVJG1XWfYqZ+Ro/vGFYqwtubrragL2 RMCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722585872; x=1723190672; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uCR2a8QUcsGwPUUS/KFvb11t9ihPQhvH+olYLUnMnJk=; b=mQpxsdEuhupubcTaK2yJcQDyaUEy3KwEZV9y+cHJjK5E17Rim6r1KYf9Ce8iOaSbyb 58KLlrhruuNcYHeHYiMPVs1KtGVD9bhDo1+gwm2am7QY8cUvwqKWjTK0xccpTHMzBxpo wIVc5SUIAQVE3Q1V7jXP3DSovSQRYAa0jw2zk7dzjcnQ/0DdoTe/41LgOOHIU5Ma9dGq vLkcUdxnstpDHrlqp2ocM3pmcgi/nTBFXGbNHHis5j9mC46WP7NJNvdRMNgzu0DWyqG+ K4Vn3A1tnyxBtGAWDI3JBzY5WnDsva64O4J9QcxU7VM3RjOKWfy4E8ngiSQ6/ROd6twp p5eA== X-Forwarded-Encrypted: i=1; AJvYcCVNHbd1u6VmW93B3v/h+8B+77H8s1XPoRxADeft73snfHyg30Nwyr7edzcedkIV5Nhyr+6mFBuHPJ6FBmoGJQ2vQg91vjn1ff+z/wJr X-Gm-Message-State: AOJu0Yy4WJ8eCKSSDnKO3TZOrFwu9d2GFWvpYNr3azjba07HmHR9wlUK jvAukfuS4J0K4CSaESESHD82C2GiAD34cc1tOo6IIuwAo1H2m6m8jGv9r07L X-Google-Smtp-Source: AGHT+IFItHcRt/6EbjbqS01vh8MV12Glv+W1faYnKk4teDVR+zPHWe8r7SH/K9qlSdh2kEheHIWH7A== X-Received: by 2002:a05:6512:39d2:b0:52c:e091:66e4 with SMTP id 2adb3069b0e04-530bb3b461cmr2379189e87.44.1722585871529; Fri, 02 Aug 2024 01:04:31 -0700 (PDT) Received: from WBEC325.dom.lan ([185.188.71.122]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-530bba07e46sm163281e87.32.2024.08.02.01.04.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Aug 2024 01:04:31 -0700 (PDT) From: Pawel Dembicki To: netdev@vger.kernel.org Cc: Pawel Dembicki , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Heiner Kallweit , Russell King , Linus Walleij , linux-kernel@vger.kernel.org Subject: [PATCH net 6/6] net: phy: vitesse: repair vsc73xx autonegotiation Date: Fri, 2 Aug 2024 10:04:03 +0200 Message-Id: <20240802080403.739509-7-paweldembicki@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240802080403.739509-1-paweldembicki@gmail.com> References: <20240802080403.739509-1-paweldembicki@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org When the vsc73xx mdio bus work properly, the generic autonegotiation configuration works well. Vsc73xx have auto MDI-X disabled by default in forced mode. This commit enables it. Signed-off-by: Pawel Dembicki Reviewed-by: Linus Walleij --- This patch came from net-next series[0]. Changes since net-next: - rebased to netdev/main only [0] https://patchwork.kernel.org/project/netdevbpf/patch/20240729210615.279952-6-paweldembicki@gmail.com/ --- drivers/net/phy/vitesse.c | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c index 897b979ec03c..19b7bf189be5 100644 --- a/drivers/net/phy/vitesse.c +++ b/drivers/net/phy/vitesse.c @@ -60,6 +60,11 @@ /* Vitesse Extended Page Access Register */ #define MII_VSC82X4_EXT_PAGE_ACCESS 0x1f +/* VSC73XX PHY_BYPASS_CTRL register*/ +#define MII_VSC73XX_PHY_BYPASS_CTRL MII_DCOUNTER +#define MII_PBC_FORCED_SPEED_AUTO_MDIX_DIS BIT(7) +#define MII_VSC73XX_PBC_AUTO_NP_EXCHANGE_DIS BIT(1) + /* Vitesse VSC8601 Extended PHY Control Register 1 */ #define MII_VSC8601_EPHY_CTL 0x17 #define MII_VSC8601_EPHY_CTL_RGMII_SKEW (1 << 8) @@ -239,12 +244,20 @@ static int vsc739x_config_init(struct phy_device *phydev) static int vsc73xx_config_aneg(struct phy_device *phydev) { - /* The VSC73xx switches does not like to be instructed to - * do autonegotiation in any way, it prefers that you just go - * with the power-on/reset defaults. Writing some registers will - * just make autonegotiation permanently fail. - */ - return 0; + int ret; + + /* Enable Auto MDI-X in forced 10/100 mode */ + if (phydev->autoneg != AUTONEG_ENABLE && phydev->speed <= SPEED_100) { + ret = genphy_setup_forced(phydev); + + if (ret < 0) /* error */ + return ret; + + return phy_clear_bits(phydev, MII_VSC73XX_PHY_BYPASS_CTRL, + MII_PBC_FORCED_SPEED_AUTO_MDIX_DIS); + } + + return genphy_config_aneg(phydev); } /* This adds a skew for both TX and RX clocks, so the skew should only be