From patchwork Fri Aug 2 21:42:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 13752052 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 962C1C3DA4A for ; Fri, 2 Aug 2024 21:43:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=sNKtZ0KTw5GtPPNBJQf6DmjccyQlawY3aucAOEr0jBk=; b=jq941acvMiqLPUQVHZc8g1wTkB iSRkwuZBi81qFL3xQrwEicTWAESgsT3HNiDTs9omyJ8DYLDL8mdWWuxTbo8RwygoHqEEVqldv/hlA QH/0r8lo1A50KSvlPaEy3IuiFiBU+gDfuRQRG2z2gkUhvhwc5QGnE67NzVKZoRp0WwieaAFG2/lOH QpHgLgI454orsNqrG8Qy57fCN/2Pj+sPTdxwnX4Mo/u11rNyhyAw9LdkHaHG7U2Vr+yHnFDA/BTxm aeVWU//PFVoEYCUhvVZbYnUfwTzhsRIXYNcMSJOZ1src/hiJQj/vX1v5bjuUJBmeJtCiNeR3/3AlT +DzS9neg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sa034-0000000A9Mj-1Lj3; Fri, 02 Aug 2024 21:42:54 +0000 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sa02Y-0000000A9I2-1auh for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2024 21:42:24 +0000 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-1fc491f9b55so70724625ad.3 for ; Fri, 02 Aug 2024 14:42:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1722634941; x=1723239741; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=sNKtZ0KTw5GtPPNBJQf6DmjccyQlawY3aucAOEr0jBk=; b=NrvbrLDGqY2rm0jLoqqizt4k93cLSLIktQg3iQni9tpy1VmxA1ZxmN+jmlvMWb8Oi7 Xr92NALERaiUudxsONLoR2aJS2WJ/nS/WbSIvwc4lw//URqzp7dvSrAkBI7kSZW72QYk /7P1gJYg3EXOiam7l1Oc3wdfvH4Zw10nbjrNsqiWfAsSPWK6UltvQAxdyQidX/ra84cR 5KBcPPq8jJXV8HSuy2XmcaxJ1yMY3xhBRNYiywqsGakBDQYVXCZkGHTBMJfACpIWK7c/ eM1R3iNi+Q6MAfa+0x/tKGlA6CS/Caygyl3SiBscnfp3HZGUFwNRYJCmMIFASg5JtFUH yhuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722634941; x=1723239741; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=sNKtZ0KTw5GtPPNBJQf6DmjccyQlawY3aucAOEr0jBk=; b=iaGYds4Tjq8RN1v75NOtHTh3tXLqo8emgVTBTm+x5or54kpbW9HV76vXCEI6MDK+Li TPoQOVZWWzmSfA7O9WYscAqaWKXD3A1T/Mc1E8oB9aV3NpznHDB2mTeNKs4zAsytg8Q2 JwTvV59mNEwyzJt0LIhtMjeOTzMl9ieJeU2lxdmm5j0YcTFOl0COHKXw5z+cXh0ajxD/ 1OInwAG8gqa9OEE0a1B0b506QklsD6hhLN2pX+Mqmrj1v4h/410d1k6YKtAG3/v/o2xb FT0n+zyw4gBfcZH5ZY8N5j5Euea9XrxuRFSFyvXAKFpStrqWHumfbnNvVAKJqnO7foQ7 ANWw== X-Gm-Message-State: AOJu0YzZuJDmrXQNm1QZd1bWP8KXgSg8dRPNLkoSh7wh/2WDF3bl/j/c rmoRjfQZz1w0+lDtIEuGAf3tfhIP4nlGZfCe4uIaetmaxzsgO0sXVN2FSqr/E20= X-Google-Smtp-Source: AGHT+IFIx2NnsHOvcE8wpLbwKKasLieneIaFU+PXOBrrI4w8dyWPBEXDA0ATCO8qJbdMOFAXHLqk6w== X-Received: by 2002:a17:903:32c2:b0:1fd:6766:6848 with SMTP id d9443c01a7336-1ff57261aa8mr59603225ad.17.1722634941471; Fri, 02 Aug 2024 14:42:21 -0700 (PDT) Received: from localhost ([71.212.170.185]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1ff59058d03sm21910195ad.179.2024.08.02.14.42.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Aug 2024 14:42:21 -0700 (PDT) From: Kevin Hilman To: Nishanth Menon , Tero Kristo , Santosh Shilimkar Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Akashdeep Kaur , Markus Schneider-Pargmann , Vibhore Vardhan , Dhruva Gole Subject: [PATCH v3] firmware: ti_sci: add CPU latency constraint management Date: Fri, 2 Aug 2024 14:42:20 -0700 Message-ID: <20240802214220.3472221-1-khilman@baylibre.com> X-Mailer: git-send-email 2.46.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240802_144222_440729_36857D73 X-CRM114-Status: GOOD ( 16.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org During system-wide suspend, check if any of the CPUs have PM QoS resume latency constraints set. If so, set TI SCI constraint. TI SCI has a single system-wide latency constraint, so use the max of any of the CPU latencies as the system-wide value. Note: DM firmware clears all constraints at resume time, so constraints need to be checked/updated/sent at each system suspend. Co-developed-by: Vibhore Vardhan Signed-off-by: Vibhore Vardhan Signed-off-by: Kevin Hilman Reviewed-by: Dhruva Gole Signed-off-by: Dhruva Gole --- Depends on the TI SCI series where support for the constraints APIs are added: https://lore.kernel.org/r/20240801195422.2296347-1-msp@baylibre.com v2->v3: actually fixed silly compile error v1->v2: fixed silly compile error drivers/firmware/ti_sci.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c index c6544cc12417..097417526ff8 100644 --- a/drivers/firmware/ti_sci.c +++ b/drivers/firmware/ti_sci.c @@ -9,6 +9,7 @@ #define pr_fmt(fmt) "%s: " fmt, __func__ #include +#include #include #include #include @@ -19,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -3640,7 +3642,25 @@ static int ti_sci_prepare_system_suspend(struct ti_sci_info *info) static int ti_sci_suspend(struct device *dev) { struct ti_sci_info *info = dev_get_drvdata(dev); - int ret; + struct device *cpu_dev; + s32 val, cpu_lat = 0; + int i, ret; + + if (info->fw_caps & MSG_FLAG_CAPS_LPM_DM_MANAGED) { + for_each_possible_cpu(i) { + cpu_dev = get_cpu_device(i); + val = dev_pm_qos_read_value(cpu_dev, DEV_PM_QOS_RESUME_LATENCY); + if (val != PM_QOS_RESUME_LATENCY_NO_CONSTRAINT) + cpu_lat = max(cpu_lat, val); + } + if (cpu_lat && (cpu_lat != PM_QOS_RESUME_LATENCY_NO_CONSTRAINT)) { + dev_dbg(cpu_dev, "%s: sending max CPU latency=%u\n", __func__, cpu_lat); + ret = ti_sci_cmd_set_latency_constraint(&info->handle, + cpu_lat, TISCI_MSG_CONSTRAINT_SET); + if (ret) + return ret; + } + } ret = ti_sci_prepare_system_suspend(info); if (ret)