From patchwork Tue Aug 6 00:57:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 13754289 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C7D7C3DA7F for ; Tue, 6 Aug 2024 00:57:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7E7C489453; Tue, 6 Aug 2024 00:57:22 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="irQLfjqO"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id A360B892FD; Tue, 6 Aug 2024 00:57:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1722905841; x=1754441841; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=POqNc8NHwPBA8pTsiW8borXeQDlCY3QK9lz8VzkN1mE=; b=irQLfjqO2pXkQaHRMq7rGAjXbGtapsym+/bYmk0055Q1TDSv5luKDikp KRpmKHCQckwNG2MwSzi9QZfp8qrZkjnmRtVVAe6p5ZJEK2IBQpDfB9mqn ToyND02lXks2W2/41Iuhf1v49XTWkLI9Rx84n9WBS1ZwopJOTsC8cxtRR T+76gXVvTioMXzHK/vJdbquDjnHSK0V7PzqcbwAI/Lwnv5j3deq/bOgCq 9tmeguNRJvENGzI9q0rLiIARTJ50zoxhsW3Tyq4BSZ/1jBXDUtvnnMwTm 5IyxJdnYcFrtayY5DagxS23ODEvhJreQPQd2KkuvnEUs//ZB9G+ZvXdE1 Q==; X-CSE-ConnectionGUID: VV21ylNBRR20K66o3z+4Pw== X-CSE-MsgGUID: Ncyf6cHGStG8svelZZmqMg== X-IronPort-AV: E=McAfee;i="6700,10204,11155"; a="32278645" X-IronPort-AV: E=Sophos;i="6.09,266,1716274800"; d="scan'208";a="32278645" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Aug 2024 17:57:20 -0700 X-CSE-ConnectionGUID: qGcC0YjdRdKgalr1qO75+g== X-CSE-MsgGUID: G2mq3YLIQiSm9GU1AA8i5w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,266,1716274800"; d="scan'208";a="61303323" Received: from relo-linux-5.jf.intel.com ([10.165.21.152]) by orviesa004.jf.intel.com with ESMTP; 05 Aug 2024 17:57:19 -0700 From: John.C.Harrison@Intel.com To: Intel-GFX@Lists.FreeDesktop.Org Cc: DRI-Devel@Lists.FreeDesktop.Org, John Harrison Subject: [PATCH] drm/i915/dg2: Enable Wa_14019159160 for DG2 Date: Mon, 5 Aug 2024 17:57:19 -0700 Message-ID: <20240806005719.215874-1-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.46.0 MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison The context switch hold out workaround also applies to DG2. Signed-off-by: John Harrison Reviewed-by: Andi Shyti --- drivers/gpu/drm/i915/gt/uc/intel_guc.c | 3 ++- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c index 097fc6bd1285e..2a27bc625abe1 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c @@ -296,7 +296,8 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc) /* Wa_16019325821 */ /* Wa_14019159160 */ - if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) + if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) || + IS_DG2(gt->i915)) flags |= GUC_WA_RCS_CCS_SWITCHOUT; /* diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c index 46fabbfc775e0..2378e3c59def9 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c @@ -849,7 +849,8 @@ static void guc_waklv_init(struct intel_guc *guc) remain = guc_ads_waklv_size(guc); /* Wa_14019159160 */ - if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) { + if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) || + IS_DG2(gt->i915)) { guc_waklv_enable_simple(guc, &offset, &remain, GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE); guc_waklv_enable_simple(guc, &offset, &remain,