From patchwork Wed Aug 7 13:04:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Connor Abbott X-Patchwork-Id: 13756237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 00815C52D6F for ; Wed, 7 Aug 2024 13:05:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EC8F910E503; Wed, 7 Aug 2024 13:05:14 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="IRXhn7sN"; dkim-atps=neutral Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7764F10E4FA; Wed, 7 Aug 2024 13:05:13 +0000 (UTC) Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-4281c164408so11899705e9.1; Wed, 07 Aug 2024 06:05:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723035912; x=1723640712; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PSlHR/K166/M5/5IJUHQx8t5BFqXwChBMKqvB1qeIyw=; b=IRXhn7sNn3PJtedCBpVgCAr9sJB7mLqzn3xPddZ41vcBODWI0DL1CGc3fLKWAePTjA nSA+yAtj8f06Hv/yvlIrpGaHrsUSrPMrmRznElr1EZL48x3OFFzKwj0sm89F+qwcRkwg q9SmvNFnKSwEaREUStN2NSNTqTyJEaciTT/y6qqeKw49Vnou12p8zdIRMHlUwHsCi1t5 Nl5I/fuTo6QXGMQwICLYYh2aPs2n/NVtU1G5lKe4XG4g+BZS4zKcwNZUGJCEReedGR9a bJxrBAb9HXIjr6ArFR5HKh+Qx0wetLr9NUfX4wTblkYLpNODSqy8k2tTg3RdWs9PTSQ4 Lvng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723035912; x=1723640712; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PSlHR/K166/M5/5IJUHQx8t5BFqXwChBMKqvB1qeIyw=; b=lcnT+MbBMTCRFjNj0pKSP7sjG3YzmhZJMNLDK02jGviaLpw8KLf14LrqgzB32Cxoyq 2jR5w77TNhNJpmYoy0B+mrvDhljMExNQmnkXKYsTSQ7PYUqPKEkaBVcvqvCmswTHYmVN 7Si2Lqnuw24dnRc5HblOR3+dpCeAY89HEHoF4OXrDXbN7OrC5XMqWUj0UnvCDn596/73 m9YWGsTegqcTHbxfiHByR7keIOzuv1zLT7mMIIU7bAOXh+T69Oeoemg+ynZbdB/8wf3S n8GEJm4wEBYVlEgeRFy2MD9Xt3chRhuLz6Ejut1wqjHfezDgENbAVGehIL1vlmVBsgkg t/tg== X-Forwarded-Encrypted: i=1; AJvYcCUjegfMOvBJNOP96H7M3C4vQZ5StQcJDAVr1wU8WHqTUP4d663GJkZyIDgbZ33skYNkp3GYfYZkdiRbG9k1bZ4LhwppsRDwCXjXeILmw/szOoUmZ8tIZMjNuEMcSqj3AGqK+N5w3mFdPNqFkySowoqp X-Gm-Message-State: AOJu0YybmwGg5Nx6e8k9r9J9Nqf82ny2PFSG0pckMXW5/SGo3xOBKVDJ GYwjBK0w2L2tYSDJrfjgDQTS8IA2rY2MpDmlwINWUXE7cs9xYcsUf71DTVKQ X-Google-Smtp-Source: AGHT+IEoCeZbDVXEjxeFj4utC1j2kkGhVc79qhGSe29Qsd2dnJVlC3Zuna9zae4cPaZ7fon5DuhhpQ== X-Received: by 2002:adf:e644:0:b0:365:980c:d281 with SMTP id ffacd0b85a97d-36bbc1bcce8mr10627262f8f.45.1723035911493; Wed, 07 Aug 2024 06:05:11 -0700 (PDT) Received: from [192.168.0.12] (cpc115152-dals23-2-0-cust532.20-2.cable.virginm.net. [86.12.82.21]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-36bbd05980csm16072849f8f.76.2024.08.07.06.05.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Aug 2024 06:05:11 -0700 (PDT) From: Connor Abbott Date: Wed, 07 Aug 2024 14:04:56 +0100 Subject: [PATCH v3 1/4] drm/msm: Update a6xx register XML MIME-Version: 1.0 Message-Id: <20240807-msm-tiling-config-v3-1-ef1bc26efb4c@gmail.com> References: <20240807-msm-tiling-config-v3-0-ef1bc26efb4c@gmail.com> In-Reply-To: <20240807-msm-tiling-config-v3-0-ef1bc26efb4c@gmail.com> To: Rob Clark , Sean Paul , Konrad Dybcio , Abhinav Kumar , Dmitry Baryshkov , Marijn Suijten Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Connor Abbott X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1723035909; l=75814; i=cwabbott0@gmail.com; s=20240426; h=from:subject:message-id; bh=g87yKteYDNXoajJhT2qvRJsBf575zGjp8Jp8HDpL0hQ=; b=zNKWGA0aKm3E8aa22akVU5cwB6rXMASsUSypk049akK4p3kk1Q+ENyCEEqMrTIbq2bjPK8DNV Vd4clXwzuFDAgykx4kZYK8C32HOC7ppgird12/kBvGhVwp1ryfucsuu X-Developer-Key: i=cwabbott0@gmail.com; a=ed25519; pk=dkpOeRSXLzVgqhy0Idr3nsBr4ranyERLMnoAgR4cHmY= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Update to Mesa commit 36a13d2b3b0 ("freedreno: fix a7xx perfcntr countables"). Signed-off-by: Connor Abbott --- drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 1118 ++++++++++++++++++++++++- 1 file changed, 1097 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx.xml b/drivers/gpu/drm/msm/registers/adreno/a6xx.xml index 2dfe6913ab4f..97608603ea62 100644 --- a/drivers/gpu/drm/msm/registers/adreno/a6xx.xml +++ b/drivers/gpu/drm/msm/registers/adreno/a6xx.xml @@ -1198,6 +1198,1027 @@ to upconvert to 32b float internally? + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -1584,7 +2605,7 @@ to upconvert to 32b float internally? - + + + + + + Disable LRZ feedback writes - + + Allows draws that don't have GRAS_LRZ_CNTL.LRZ_WRITE but have + GRAS_LRZ_CNTL.ENABLE to contribute to LRZ during RENDERING pass. + In sysmem mode GRAS_LRZ_CNTL.LRZ_WRITE is not considered. + + @@ -2270,7 +3306,7 @@ to upconvert to 32b float internally? - 0.0 if GREATER - 1.0 if LESS - + @@ -2284,7 +3320,7 @@ to upconvert to 32b float internally? Disable LRZ based on previous direction and the current one. If DIR_WRITE is not enabled - there is no write to direction buffer. - + @@ -2357,7 +3393,10 @@ to upconvert to 32b float internally? - + + + + @@ -2366,7 +3405,10 @@ to upconvert to 32b float internally? - + + + + @@ -2440,7 +3482,7 @@ to upconvert to 32b float internally? - + @@ -2448,7 +3490,7 @@ to upconvert to 32b float internally? - + @@ -2605,6 +3647,7 @@ to upconvert to 32b float internally? + @@ -2903,11 +3946,21 @@ to upconvert to 32b float internally? + + + + + + + + + + + - - + @@ -2927,7 +3980,10 @@ to upconvert to 32b float internally? - + + + + @@ -4275,7 +5331,7 @@ to upconvert to 32b float internally? badly named or the functionality moved in a6xx. But downstream kernel calls this "a6xx_sp_ps_tp_2d_cluster" --> - + @@ -4286,7 +5342,7 @@ to upconvert to 32b float internally? - + @@ -4329,7 +5385,12 @@ to upconvert to 32b float internally? - + + + + @@ -4351,7 +5412,8 @@ to upconvert to 32b float internally? - + + @@ -4582,15 +5644,15 @@ to upconvert to 32b float internally? - + - + - + @@ -4623,6 +5685,19 @@ to upconvert to 32b float internally? + + + + + + + + + + + + + This register clears pending loads queued up by @@ -4791,7 +5866,7 @@ to upconvert to 32b float internally? - + Texture constant dwords @@ -4831,6 +5906,7 @@ to upconvert to 32b float internally? +