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Old Rev1 which use mobivel PCIe controller was not supported. Although uboot fixup can change compatible string fsl,lx2160a-pcie to fsl,ls2088a-pcie since 2019, it is quite confused and should correctly reflect hardware status in fsl-lx2160a.dtsi. - Rename fsl,lx2160a-pcie to fsl,ls2088a-pcie - Only keep intr interrupt align binding doc - Remove unused property apio-wins, ppio-wins - Rename reg-names - Add IO map range Signed-off-by: Frank Li --- .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 102 +++++++++--------- 1 file changed, 48 insertions(+), 54 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index 927ecf66a7404..386b4fcfa16e6 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -1166,22 +1166,21 @@ sata3: sata@3230000 { }; pcie1: pcie@3400000 { - compatible = "fsl,lx2160a-pcie"; + compatible = "fsl,ls2088a-pcie"; reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */ <0x80 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; - interrupts = , /* AER interrupt */ - , /* PME interrupt */ - ; /* controller interrupt */ - interrupt-names = "aer", "pme", "intr"; + reg-names = "regs", "config"; + interrupts = ; /* controller interrupt */ + interrupt-names = "intr"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <8>; - ppio-wins = <8>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = /* downstream I/O */ + <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000>, + /* non-prefetchable memory */ + <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; msi-parent = <&its 0>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; @@ -1194,22 +1193,21 @@ pcie1: pcie@3400000 { }; pcie2: pcie@3500000 { - compatible = "fsl,lx2160a-pcie"; + compatible = "fsl,ls2088a-pcie"; reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */ <0x88 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; - interrupts = , /* AER interrupt */ - , /* PME interrupt */ - ; /* controller interrupt */ - interrupt-names = "aer", "pme", "intr"; + reg-names = "regs", "config"; + interrupts = ; /* controller interrupt */ + interrupt-names = "intr"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <8>; - ppio-wins = <8>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = /* downstream I/O */ + <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000>, + /* non-prefetchable memory */ + <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; msi-parent = <&its 0>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; @@ -1222,22 +1220,21 @@ pcie2: pcie@3500000 { }; pcie3: pcie@3600000 { - compatible = "fsl,lx2160a-pcie"; + compatible = "fsl,ls2088a-pcie"; reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */ <0x90 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; - interrupts = , /* AER interrupt */ - , /* PME interrupt */ - ; /* controller interrupt */ - interrupt-names = "aer", "pme", "intr"; + reg-names = "regs", "config"; + interrupts = ; /* controller interrupt */ + interrupt-names = "intr"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <256>; - ppio-wins = <24>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = /* downstream I/O */ + <0x81000000 0x0 0x00000000 0x90 0x00010000 0x0 0x00010000>, + /* non-prefetchable memory */ + <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; msi-parent = <&its 0>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; @@ -1250,22 +1247,21 @@ pcie3: pcie@3600000 { }; pcie4: pcie@3700000 { - compatible = "fsl,lx2160a-pcie"; + compatible = "fsl,ls2088a-pcie"; reg = <0x00 0x03700000 0x0 0x00100000>, /* controller registers */ <0x98 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; - interrupts = , /* AER interrupt */ - , /* PME interrupt */ - ; /* controller interrupt */ - interrupt-names = "aer", "pme", "intr"; + reg-names = "regs", "config"; + interrupts = ; /* controller interrupt */ + interrupt-names = "intr"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <8>; - ppio-wins = <8>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = /* downstream I/O */ + <0x81000000 0x0 0x00000000 0x98 0x00010000 0x0 0x00010000>, + /* non-prefetchable memory */ + <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; msi-parent = <&its 0>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; @@ -1278,22 +1274,21 @@ pcie4: pcie@3700000 { }; pcie5: pcie@3800000 { - compatible = "fsl,lx2160a-pcie"; + compatible = "fsl,ls2088a-pcie"; reg = <0x00 0x03800000 0x0 0x00100000>, /* controller registers */ <0xa0 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; - interrupts = , /* AER interrupt */ - , /* PME interrupt */ - ; /* controller interrupt */ - interrupt-names = "aer", "pme", "intr"; + reg-names = "regs", "config"; + interrupts = ; /* controller interrupt */ + interrupt-names = "intr"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <256>; - ppio-wins = <24>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = /* downstream I/O */ + <0x81000000 0x0 0x00000000 0xa0 0x00010000 0x0 0x00010000>, + /* non-prefetchable memory */ + <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; msi-parent = <&its 0>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; @@ -1306,22 +1301,21 @@ pcie5: pcie@3800000 { }; pcie6: pcie@3900000 { - compatible = "fsl,lx2160a-pcie"; + compatible = "fsl,ls2088a-pcie"; reg = <0x00 0x03900000 0x0 0x00100000>, /* controller registers */ <0xa8 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; - interrupts = , /* AER interrupt */ - , /* PME interrupt */ - ; /* controller interrupt */ - interrupt-names = "aer", "pme", "intr"; + reg-names = "regs", "config"; + interrupts = ; /* controller interrupt */ + interrupt-names = "intr"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <8>; - ppio-wins = <8>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = /* downstream I/O */ + <0x81000000 0x0 0x00000000 0xa8 0x00010000 0x0 0x00010000>, + /* non-prefetchable memory */ + <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; msi-parent = <&its 0>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>;