From patchwork Mon Aug 12 13:44:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13760607 Received: from out-182.mta1.migadu.com (out-182.mta1.migadu.com [95.215.58.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF28117C9F9 for ; Mon, 12 Aug 2024 13:44:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470302; cv=none; b=A3nMrirhC9bJ9GzUVrXZWKTEpv0CxmrlKcAdAt31/N4C00Prz5ssbkrc6ni3TcaXyee6MD3KX0XJlPWQ9uMg68wDKqrB5voqMjdW1y2MWdjk22ktxC0+SJdntWhMiDDZOPNaNHHpq6f6GHN2Lzk4Rdeyw2T7QsqtSlfH4GVL3gY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470302; c=relaxed/simple; bh=yauA6eDczoyHsEMvB/ScoIlvpidBjdOd0bYLDrs8kVQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Hmod4m+1kLCKJhe/E3ACS1Iws0UxVNXt4QG0ofE7itcMGuyrDd3QnaGTNrmHQDvUQNF5jr91JpFmaXrzJAnP/e91FjA7SUtzqyoqZjCZDuaOBLocphCAq/w9Lp2thL2+fE8GMxUe/+N0KleXQtTXDBsTqaU9zbHZaIZd7rNZI0g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=kqfN1eoj; arc=none smtp.client-ip=95.215.58.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="kqfN1eoj" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723470297; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0JnWydVRlcUj9MsWlBjRPKAbHtiO4c0GMGL7PGlxT7Y=; b=kqfN1eojpXs34yYaoOgQt7JdO8JfGcn2+PJWFLEVac7i2RBkt5Inza8z+di1ROKMSrj++o u1U5VtGR/AFeJJii3lmlQEUJ1NYhABF+QMs9Ae4vuwQgqzkjq14lg1VTEvUGJ+boDiw/n/ Ag+SxWzZ3Y6t6OpMro4n/Ejmwdvospg= From: Andrew Jones To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Cc: atishp@rivosinc.com, cade.richard@berkeley.edu, jamestiotio@gmail.com Subject: [kvm-unit-tests PATCH v2 1/7] riscv: Fix virt_to_phys again Date: Mon, 12 Aug 2024 15:44:53 +0200 Message-ID: <20240812134451.112498-10-andrew.jones@linux.dev> In-Reply-To: <20240812134451.112498-9-andrew.jones@linux.dev> References: <20240812134451.112498-9-andrew.jones@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT The last fix was a bit hasty since we didn't double check that virt_to_phys() was the right place for the fix, rather than virt_to_pte_phys(), and of course it was the latter... All architectures add on the offset in virt_to_pte_phys() and then simply wrap virt_to_pte_phys() with virt_to_phys(), if they implement virt_to_phys() at all. RISCV shouldn't be different. Fixes: e1dd4ea76894 ("riscv: Fix virt_to_phys") Fixes: 23100d972705 ("riscv: Enable vmalloc") Signed-off-by: Andrew Jones --- lib/riscv/mmu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/riscv/mmu.c b/lib/riscv/mmu.c index 165a7034bc69..2c9c4f376ac9 100644 --- a/lib/riscv/mmu.c +++ b/lib/riscv/mmu.c @@ -179,7 +179,7 @@ phys_addr_t virt_to_pte_phys(pgd_t *pgtable, void *virt) if (!pte_val(*ptep)) return 0; - return __pa(pteval_to_ptep(pte_val(*ptep))); + return __pa(pteval_to_ptep(pte_val(*ptep))) | offset_in_page(virt); } unsigned long virt_to_phys(volatile void *address) @@ -194,7 +194,7 @@ unsigned long virt_to_phys(volatile void *address) paddr = virt_to_pte_phys(pgtable, (void *)address); assert(sizeof(long) == 8 || !(paddr >> 32)); - return (unsigned long)paddr | offset_in_page(address); + return (unsigned long)paddr; } void *phys_to_virt(unsigned long address) From patchwork Mon Aug 12 13:44:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13760608 Received: from out-174.mta1.migadu.com (out-174.mta1.migadu.com [95.215.58.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B2805183CB5 for ; Mon, 12 Aug 2024 13:45:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470304; cv=none; b=GAlovJRYbjlXz494zoFXdwkXfzM2GpxbnJ5qbhh8GXB6wTHD3bLEsYfWUr1607AxWFMwYq+4LYQ2vX5ZYvkAIuVnYWX6WRTB8x3Z1aT1d4tA4c0fr4Ll4BheTWLQrI1ychzuAXmQsfnePRUVWYUGtTE61y/lm2BS9GB0E/OSBGM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470304; c=relaxed/simple; bh=xMMD6lbF1Q8SU34AXHQ+A7gAtY/+5St/83LVg8jlPAs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YZ4+FCX4RvBW50zYUoHBgzS6d52iXW+DpzXwNPFMz8ZpQL2Blv3hkL5jQ95wqE7iaI7WuUqVohaVr9mrdgk8/HmxsedYMqIqUlOv1WdJJmU99n48njMcE8qB9AlsZMtk5qft9yJifwkv2I+Ed3ot2icBFmGxqcNnrXsnV5wCE9U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=CFr4KKRU; arc=none smtp.client-ip=95.215.58.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="CFr4KKRU" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723470299; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3M9iRKgv8aV/QZsAf7pAIKygkuBgiAEBkmW/A2oWcjU=; b=CFr4KKRUymigKA+2Uu9AdwmCHJE18lUGxfIXQoPy7vCVq40k4ttkVneCfMRc1Fg/pKaA9l 6Ix5s8GhsDkZZHlRkB21rqQ9XYmqKy+qVw6Go8IcdxQ5dHDyxCINSQ5hK7XGBxLs5U+Uds SXQCeziSaHbvXEsUht3fjoXKMYhNSvw= From: Andrew Jones To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Cc: atishp@rivosinc.com, cade.richard@berkeley.edu, jamestiotio@gmail.com Subject: [kvm-unit-tests PATCH v2 2/7] riscv: setup: Apply VA_BASE check to rv64 Date: Mon, 12 Aug 2024 15:44:54 +0200 Message-ID: <20240812134451.112498-11-andrew.jones@linux.dev> In-Reply-To: <20240812134451.112498-9-andrew.jones@linux.dev> References: <20240812134451.112498-9-andrew.jones@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT The VA_BASE check in setup() also applies to rv64, as is clear from the later VA_BASE check in mem_allocator_init(), which ensures freemem_start < freemem_end < VA_BASE. Fixes: 6895ce6dc618 ("riscv: Populate memregions and switch to page allocator") Signed-off-by: Andrew Jones --- lib/riscv/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/riscv/setup.c b/lib/riscv/setup.c index e0b5f6f7daf5..2c7792a5b0bd 100644 --- a/lib/riscv/setup.c +++ b/lib/riscv/setup.c @@ -193,7 +193,7 @@ void setup(const void *fdt, phys_addr_t freemem_start) const char *bootargs; int ret; - assert(sizeof(long) == 8 || freemem_start < VA_BASE); + assert(freemem_start < VA_BASE); freemem = __va(freemem_start); freemem_push_fdt(&freemem, fdt); From patchwork Mon Aug 12 13:44:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13760609 Received: from out-180.mta1.migadu.com (out-180.mta1.migadu.com [95.215.58.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B443417C9F9 for ; Mon, 12 Aug 2024 13:45:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470307; cv=none; b=hvgDS5LRQhyT7ttJ7O3BbNPndi81zK17Re7isMclkzCWM4+Le2Xp5jXPjJpU38jtEPb8mNTS1baQsbW5S2NyDeQx1ilk/ESrer8TKROf8ZufPJz+k26ISawafIxMK8Gi6BV/Bt47E5rciROykFd7IcwH0T2UTjC9KUhSQuQiy5k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470307; c=relaxed/simple; bh=hBG+w/LYTgXd9YEzAs4Wyf0d+E9bmdZL/SThjlO3Ofo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tNUyeIbbJ/AyCi0peHvMgJPXkWf523SKCDP3KOd3WJ6HbpL1k5Hje65Y5Ja0eklBbkUdi6q0ODLGrckmgLR3rTMPG8Z+v3nHuhUj+WUF09p0PAHq0XY6SiSsS1QwNylyWFdiL5SvCzpGO8MAxrB6yIdW/J2MOicnf7LYR+nY7yA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=w5xypioI; arc=none smtp.client-ip=95.215.58.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="w5xypioI" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723470302; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DuBDu2KUddhgkqZOSU6QLhFG2U5c0inzQs/uShG3O8A=; b=w5xypioI3FytLjkOanZ9Nl4x3LiXx4OOyGdEcco1jKcsDQ247PQndGSV3HcbpsbeyNUZvG wb/NumGWRxWgzAJEHqNyTP8mS+/e1N9kp+7Ou8a2zzvSFiIf9VerRLy34NWBGvA9WLlFHl 7Cod2CtfzNVli9NZU9P4057LYJLyQ4A= From: Andrew Jones To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Cc: atishp@rivosinc.com, cade.richard@berkeley.edu, jamestiotio@gmail.com Subject: [kvm-unit-tests PATCH v2 3/7] riscv: Support up to 34-bit physical addresses on rv32, sort of Date: Mon, 12 Aug 2024 15:44:55 +0200 Message-ID: <20240812134451.112498-12-andrew.jones@linux.dev> In-Reply-To: <20240812134451.112498-9-andrew.jones@linux.dev> References: <20240812134451.112498-9-andrew.jones@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Change virt_to_phys() and phys_to_virt() to use phys_addr_t instead of unsigned long. This allows 32-bit builds to use physical addresses over 32 bits wide (the spec allows up to 34 bits). But, to keep things simple, we don't expect physical addresses wider than 32 bits in most the library code (and that's ensured by sprinkling around some asserts). IOW, the support is really only for unit tests which want to test with an additional high memory region. Signed-off-by: Andrew Jones --- lib/riscv/asm/io.h | 4 ++-- lib/riscv/mmu.c | 32 ++++++++++++++++++++------------ lib/riscv/smp.c | 7 ++++++- 3 files changed, 28 insertions(+), 15 deletions(-) diff --git a/lib/riscv/asm/io.h b/lib/riscv/asm/io.h index 37a130e533c9..a48a9aa654dd 100644 --- a/lib/riscv/asm/io.h +++ b/lib/riscv/asm/io.h @@ -77,10 +77,10 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) void __iomem *ioremap(phys_addr_t phys_addr, size_t size); #define virt_to_phys virt_to_phys -unsigned long virt_to_phys(volatile void *address); +phys_addr_t virt_to_phys(volatile void *address); #define phys_to_virt phys_to_virt -void *phys_to_virt(unsigned long address); +void *phys_to_virt(phys_addr_t address); #include diff --git a/lib/riscv/mmu.c b/lib/riscv/mmu.c index 2c9c4f376ac9..6ab1f15a99ae 100644 --- a/lib/riscv/mmu.c +++ b/lib/riscv/mmu.c @@ -18,9 +18,16 @@ static int pte_index(uintptr_t vaddr, int level) return (vaddr >> (PGDIR_BITS * level + PAGE_SHIFT)) & PGDIR_MASK; } +static phys_addr_t pteval_to_phys_addr(pteval_t pteval) +{ + return (phys_addr_t)((pteval & PTE_PPN) >> PPN_SHIFT) << PAGE_SHIFT; +} + static pte_t *pteval_to_ptep(pteval_t pteval) { - return (pte_t *)(((pteval & PTE_PPN) >> PPN_SHIFT) << PAGE_SHIFT); + phys_addr_t paddr = pteval_to_phys_addr(pteval); + assert(paddr == __pa(paddr)); + return (pte_t *)__pa(paddr); } static pteval_t ptep_to_pteval(pte_t *ptep) @@ -106,7 +113,7 @@ void __mmu_enable(unsigned long satp) void mmu_enable(unsigned long mode, pgd_t *pgtable) { - unsigned long ppn = (unsigned long)pgtable >> PAGE_SHIFT; + unsigned long ppn = __pa(pgtable) >> PAGE_SHIFT; unsigned long satp = mode | ppn; assert(!(ppn & ~SATP_PPN)); @@ -118,6 +125,9 @@ void *setup_mmu(phys_addr_t top, void *opaque) struct mem_region *r; pgd_t *pgtable; + /* The initial page table uses an identity mapping. */ + assert(top == __pa(top)); + if (!__initial_pgtable) __initial_pgtable = alloc_page(); pgtable = __initial_pgtable; @@ -146,7 +156,8 @@ void __iomem *ioremap(phys_addr_t phys_addr, size_t size) pgd_t *pgtable = current_pgtable(); bool flush = true; - assert(sizeof(long) == 8 || !(phys_addr >> 32)); + /* I/O is always identity mapped. */ + assert(end == __pa(end)); if (!pgtable) { if (!__initial_pgtable) @@ -158,7 +169,7 @@ void __iomem *ioremap(phys_addr_t phys_addr, size_t size) mmu_set_range_ptes(pgtable, start, start, end, __pgprot(_PAGE_READ | _PAGE_WRITE), flush); - return (void __iomem *)(unsigned long)phys_addr; + return (void __iomem *)__pa(phys_addr); } phys_addr_t virt_to_pte_phys(pgd_t *pgtable, void *virt) @@ -179,27 +190,24 @@ phys_addr_t virt_to_pte_phys(pgd_t *pgtable, void *virt) if (!pte_val(*ptep)) return 0; - return __pa(pteval_to_ptep(pte_val(*ptep))) | offset_in_page(virt); + return pteval_to_phys_addr(pte_val(*ptep)) | offset_in_page(virt); } -unsigned long virt_to_phys(volatile void *address) +phys_addr_t virt_to_phys(volatile void *address) { unsigned long satp = csr_read(CSR_SATP); pgd_t *pgtable = (pgd_t *)((satp & SATP_PPN) << PAGE_SHIFT); - phys_addr_t paddr; if ((satp >> SATP_MODE_SHIFT) == 0) return __pa(address); - paddr = virt_to_pte_phys(pgtable, (void *)address); - assert(sizeof(long) == 8 || !(paddr >> 32)); - - return (unsigned long)paddr; + return virt_to_pte_phys(pgtable, (void *)address); } -void *phys_to_virt(unsigned long address) +void *phys_to_virt(phys_addr_t address) { /* @address must have an identity mapping for this to work. */ + assert(address == __pa(address)); assert(virt_to_phys(__va(address)) == address); return __va(address); } diff --git a/lib/riscv/smp.c b/lib/riscv/smp.c index 7e4bb5b76903..4d373e0a29a8 100644 --- a/lib/riscv/smp.c +++ b/lib/riscv/smp.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -36,6 +37,7 @@ secondary_func_t secondary_cinit(struct secondary_data *data) static void __smp_boot_secondary(int cpu, secondary_func_t func) { struct secondary_data *sp = alloc_pages(1) + SZ_8K - 16; + phys_addr_t sp_phys; struct sbiret ret; sp -= sizeof(struct secondary_data); @@ -43,7 +45,10 @@ static void __smp_boot_secondary(int cpu, secondary_func_t func) sp->stvec = csr_read(CSR_STVEC); sp->func = func; - ret = sbi_hart_start(cpus[cpu].hartid, (unsigned long)&secondary_entry, __pa(sp)); + sp_phys = virt_to_phys(sp); + assert(sp_phys == __pa(sp_phys)); + + ret = sbi_hart_start(cpus[cpu].hartid, (unsigned long)&secondary_entry, __pa(sp_phys)); assert(ret.error == SBI_SUCCESS); } From patchwork Mon Aug 12 13:44:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13760610 Received: from out-178.mta1.migadu.com (out-178.mta1.migadu.com [95.215.58.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4BB0183CCD for ; Mon, 12 Aug 2024 13:45:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470310; cv=none; b=KeJjgynwfquJx+WCvoyS0JzUXd0kfLORIkOaBc6JCrcMxZLa8dPYIETJfoCG0kIcaUGJYdORQ620C00V7gkFW0SM30qzHxM8t5LAX3CRrLp5EbBD7Mo4EbfKZsnqczt3v7Ku0JRdvU9zYBm0qHtw4vW7mq0Ad0TXtbxHDZasFXM= ARC-Message-Signature: i=1; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723470306; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=a5FUvyxgqIHirRDjYb8iKhaLQoEREVMWBDImlBAY+uo=; b=T6uuc6YTjf5TpMnzIkOOlhC6iaTCi99ascOo96eZbBxkcU950NvcWFHAbLlWeUqs2Q22ck PIXjYmCzZOcq5YOt6YLgQv1GpV9TBn/gZNSZsPGGovFDnPjsU98PryCh+oTldMUmQlAFA0 xTlSrvja6AjvcD639fpyxByoopoFDVk= From: Andrew Jones To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Cc: atishp@rivosinc.com, cade.richard@berkeley.edu, jamestiotio@gmail.com Subject: [kvm-unit-tests PATCH v2 4/7] riscv: Track memory above 3G Date: Mon, 12 Aug 2024 15:44:56 +0200 Message-ID: <20240812134451.112498-13-andrew.jones@linux.dev> In-Reply-To: <20240812134451.112498-9-andrew.jones@linux.dev> References: <20240812134451.112498-9-andrew.jones@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT We chop the main memory region (which gets identity mapped) off at the 3G boundary because the virtual memory allocator claims the 3G-4G address range. Unit tests may want to be able to access the higher memory, though, so keep track of it by putting it in its own memory region. Since the test framework isn't using that memory region, flag it as unused so unit tests will be confident that they can use the memory for whatever they like. Signed-off-by: Andrew Jones --- lib/memregions.h | 1 + lib/riscv/setup.c | 15 +++++++++++---- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/lib/memregions.h b/lib/memregions.h index 1600530ad7bf..04027f61b84c 100644 --- a/lib/memregions.h +++ b/lib/memregions.h @@ -10,6 +10,7 @@ #define MR_F_CODE BIT(1) #define MR_F_RESERVED BIT(2) #define MR_F_PERSISTENT BIT(3) +#define MR_F_UNUSED BIT(4) #define MR_F_UNKNOWN BIT(31) struct mem_region { diff --git a/lib/riscv/setup.c b/lib/riscv/setup.c index 2c7792a5b0bd..35829309c13d 100644 --- a/lib/riscv/setup.c +++ b/lib/riscv/setup.c @@ -85,8 +85,9 @@ static void cpu_init(void) cpu0_calls_idle = true; } -static void mem_allocator_init(phys_addr_t freemem_start, phys_addr_t freemem_end) +static void mem_allocator_init(struct mem_region *freemem, phys_addr_t freemem_start) { + phys_addr_t freemem_end = freemem->end; phys_addr_t base, top; freemem_start = PAGE_ALIGN(freemem_start); @@ -100,8 +101,14 @@ static void mem_allocator_init(phys_addr_t freemem_start, phys_addr_t freemem_en * * TODO: Allow the VA range to shrink and move. */ - if (freemem_end > VA_BASE) + if (freemem_end > VA_BASE) { + struct mem_region *curr, *rest; freemem_end = VA_BASE; + memregions_split(VA_BASE, &curr, &rest); + assert(curr == freemem); + if (rest) + rest->flags = MR_F_UNUSED; + } assert(freemem_end - freemem_start >= SZ_1M * 16); init_alloc_vpage(__va(VA_TOP)); @@ -135,7 +142,7 @@ static void mem_init(phys_addr_t freemem_start) freemem = memregions_find(freemem_start); assert(freemem && !(freemem->flags & (MR_F_IO | MR_F_CODE))); - mem_allocator_init(freemem_start, freemem->end); + mem_allocator_init(freemem, freemem_start); } static void freemem_push_fdt(void **freemem, const void *fdt) @@ -248,7 +255,7 @@ static efi_status_t efi_mem_init(efi_bootinfo_t *efi_bootinfo) freemem_push_fdt(&freemem, efi_bootinfo->fdt); mmu_disable(); - mem_allocator_init((unsigned long)freemem, freemem_mr->end); + mem_allocator_init(freemem_mr, (unsigned long)freemem); return EFI_SUCCESS; } From patchwork Mon Aug 12 13:44:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13760611 Received: from out-183.mta0.migadu.com (out-183.mta0.migadu.com [91.218.175.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6197217D355 for ; Mon, 12 Aug 2024 13:45:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.183 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470316; cv=none; b=fEn7beKqTorG5YPth3Ns9fZDYRXTOqnZfqraRjixUOX0TXWNMUXwNqQdLWyFPN+M1HmYPJXhe71X6m5veCBsYmOjNDDAx6Tpm5wpRpGbZM3degUr8V2LyD3HBRVZM2CVk+2ORCkysmjCVel13bmLP4WLpfaijtaLYOlm/meCfWc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470316; c=relaxed/simple; bh=pBf+LtRf5wx9RL5a9rheXT1nVhOXFCo71yKipNKfjAg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hHslAPnCmh7snYCZ3QkH9Tc7Hm/pTNQXxR84kATb2B4TGhommlpQLC3bnKXZma56+lPyEFqya2XYtDImOsCqLbN4QHTvKfedE6Y5EGtt/cnQTLga20hd4hivRsUkKayHrN0HKtbR+E0ifkJLZOnU+3RgQQPZbBiRVgPRLACGjZk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=PT5SdbcZ; arc=none smtp.client-ip=91.218.175.183 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="PT5SdbcZ" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723470312; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IQpSYlAP04me5Adzln3w4xVrKO6RUKkPSs6y6rO/R0g=; b=PT5SdbcZMCSsmOx5Rl1wh9Qgo4dvADGGtwSNXlH9FTHRn1M29FOMcjfizJ8HAa+6q39Agc c/CBEvOfqPvXdmwPZxpmd94EncjrlEycxv/8P/4ZeHILvuyU3OEMCTUnUyFUUe1oc47Iri LEBjKKrW9K9TEt44zsUE4YxMVuhemj4= From: Andrew Jones To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Cc: atishp@rivosinc.com, cade.richard@berkeley.edu, jamestiotio@gmail.com Subject: [kvm-unit-tests PATCH v2 5/7] riscv: mmu: Sanity check input physical addresses Date: Mon, 12 Aug 2024 15:44:57 +0200 Message-ID: <20240812134451.112498-14-andrew.jones@linux.dev> In-Reply-To: <20240812134451.112498-9-andrew.jones@linux.dev> References: <20240812134451.112498-9-andrew.jones@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Ensure physical addresses aren't using bits they shouldn't be. Signed-off-by: Andrew Jones --- lib/riscv/asm/mmu.h | 2 ++ lib/riscv/mmu.c | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/lib/riscv/asm/mmu.h b/lib/riscv/asm/mmu.h index bb60f0895e2b..9cd760093666 100644 --- a/lib/riscv/asm/mmu.h +++ b/lib/riscv/asm/mmu.h @@ -6,6 +6,8 @@ #include #include +#define PHYS_MASK ((phys_addr_t)SATP_PPN << PAGE_SHIFT | (PAGE_SIZE - 1)) + static inline pgd_t *current_pgtable(void) { return (pgd_t *)((csr_read(CSR_SATP) & SATP_PPN) << PAGE_SHIFT); diff --git a/lib/riscv/mmu.c b/lib/riscv/mmu.c index 6ab1f15a99ae..24f9f90e51c3 100644 --- a/lib/riscv/mmu.c +++ b/lib/riscv/mmu.c @@ -77,6 +77,8 @@ pteval_t *install_page(pgd_t *pgtable, phys_addr_t phys, void *virt) phys_addr_t paddr = phys & PAGE_MASK; uintptr_t vaddr = (uintptr_t)virt & PAGE_MASK; + assert(phys == (phys & PHYS_MASK)); + return __install_page(pgtable, paddr, vaddr, __pgprot(_PAGE_READ | _PAGE_WRITE), true); } @@ -89,6 +91,8 @@ void mmu_set_range_ptes(pgd_t *pgtable, uintptr_t virt_offset, uintptr_t vaddr = virt_offset & PAGE_MASK; uintptr_t virt_end = phys_end - paddr + vaddr; + assert(phys_start == (phys_start & PHYS_MASK)); + assert(phys_end == (phys_end & PHYS_MASK)); assert(phys_start < phys_end); for (; vaddr < virt_end; vaddr += PAGE_SIZE, paddr += PAGE_SIZE) From patchwork Mon Aug 12 13:44:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13760612 Received: from out-189.mta0.migadu.com (out-189.mta0.migadu.com [91.218.175.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01C1717B43F for ; Mon, 12 Aug 2024 13:45:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.189 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470321; cv=none; b=ejAz99+oI8PK+6wyJsTBba9swZyIM5cqoJ/vr7ywd9Edu1ol7/AZenf+aRS32qW6vKSwUr34AkcR/nvJVBvXdmO0wZ6ZjKSqget0+zhz5roHacFobGyzDhRYUgktSc31+Uj07SjPcGDcCt/7OelvGWjhcRd+QeFH//JsOn+Y95E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470321; c=relaxed/simple; bh=BLyvcz54yqw1cwd0lSpRMPr+MNn/ltNU4PwII5Im8vs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=P6tFIrG9AFJoew6xMgRjVfuIi+RS2F/naBURUVwEst4pOSMUCihnjmYszHWJq2gxDyLiIQL62IERAThbvy350M4nffUv7digpwZRPfSM6LK0EBP41N733kK5+0nb/dfdRmKncuPcg1wQPs3org3PY2TuU5XdVrmEwlICNDmIHZM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=kLHovIh3; arc=none smtp.client-ip=91.218.175.189 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="kLHovIh3" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723470318; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XcHI0hzaFA/CxI3F7rOVjwGJI3765tE7OQbDjHZ6mtQ=; b=kLHovIh38AsJCYGIl4qz6BtAL5jJ5n7588bvYPDS9G+o5tc2FG6/tEepI1cvVPABPFqbJW /JHrkAqSqeNalKVX+EiBsKLt5VkZHIEHkb2nNX1De97gGLpPKUBtOPJiS4fAYYksU/ua3H uC9HibmcrqmQOKwDAFc8M7FodO3nTxA= From: Andrew Jones To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Cc: atishp@rivosinc.com, cade.richard@berkeley.edu, jamestiotio@gmail.com Subject: [kvm-unit-tests PATCH v2 6/7] riscv: Define and use PHYS_PAGE_MASK Date: Mon, 12 Aug 2024 15:44:58 +0200 Message-ID: <20240812134451.112498-15-andrew.jones@linux.dev> In-Reply-To: <20240812134451.112498-9-andrew.jones@linux.dev> References: <20240812134451.112498-9-andrew.jones@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT C doesn't extend the sign bit for unsigned types since there isn't a sign bit to extend. This means a promotion of a u32 to a u64 results in the upper 32 bits of the u64 being zero. When the u64 is then used as a mask on another u64 the upper 32 bits get cleared, and that's definitely not the intention of 'phys_addr & PAGE_MASK', which should only clear the lower bits for page alignment. Create PHYS_PAGE_MASK to do the right thing. Signed-off-by: Andrew Jones --- lib/riscv/asm/mmu.h | 1 + lib/riscv/mmu.c | 6 +++--- lib/riscv/setup.c | 2 +- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/lib/riscv/asm/mmu.h b/lib/riscv/asm/mmu.h index 9cd760093666..28c332f11496 100644 --- a/lib/riscv/asm/mmu.h +++ b/lib/riscv/asm/mmu.h @@ -7,6 +7,7 @@ #include #define PHYS_MASK ((phys_addr_t)SATP_PPN << PAGE_SHIFT | (PAGE_SIZE - 1)) +#define PHYS_PAGE_MASK (~((phys_addr_t)PAGE_SIZE - 1)) static inline pgd_t *current_pgtable(void) { diff --git a/lib/riscv/mmu.c b/lib/riscv/mmu.c index 24f9f90e51c3..ce49e67be84b 100644 --- a/lib/riscv/mmu.c +++ b/lib/riscv/mmu.c @@ -74,7 +74,7 @@ static pteval_t *__install_page(pgd_t *pgtable, phys_addr_t paddr, pteval_t *install_page(pgd_t *pgtable, phys_addr_t phys, void *virt) { - phys_addr_t paddr = phys & PAGE_MASK; + phys_addr_t paddr = phys & PHYS_PAGE_MASK; uintptr_t vaddr = (uintptr_t)virt & PAGE_MASK; assert(phys == (phys & PHYS_MASK)); @@ -87,7 +87,7 @@ void mmu_set_range_ptes(pgd_t *pgtable, uintptr_t virt_offset, phys_addr_t phys_start, phys_addr_t phys_end, pgprot_t prot, bool flush) { - phys_addr_t paddr = phys_start & PAGE_MASK; + phys_addr_t paddr = phys_start & PHYS_PAGE_MASK; uintptr_t vaddr = virt_offset & PAGE_MASK; uintptr_t virt_end = phys_end - paddr + vaddr; @@ -155,7 +155,7 @@ void *setup_mmu(phys_addr_t top, void *opaque) void __iomem *ioremap(phys_addr_t phys_addr, size_t size) { - phys_addr_t start = phys_addr & PAGE_MASK; + phys_addr_t start = phys_addr & PHYS_PAGE_MASK; phys_addr_t end = PAGE_ALIGN(phys_addr + size); pgd_t *pgtable = current_pgtable(); bool flush = true; diff --git a/lib/riscv/setup.c b/lib/riscv/setup.c index 35829309c13d..9a16f00093d7 100644 --- a/lib/riscv/setup.c +++ b/lib/riscv/setup.c @@ -91,7 +91,7 @@ static void mem_allocator_init(struct mem_region *freemem, phys_addr_t freemem_s phys_addr_t base, top; freemem_start = PAGE_ALIGN(freemem_start); - freemem_end &= PAGE_MASK; + freemem_end &= PHYS_PAGE_MASK; /* * The assert below is mostly checking that the free memory doesn't From patchwork Mon Aug 12 13:44:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13760613 Received: from out-187.mta1.migadu.com (out-187.mta1.migadu.com [95.215.58.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 422E817E44A for ; Mon, 12 Aug 2024 13:45:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.187 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470325; cv=none; b=BLoI+7u2fSTLCD6Q44/cF568XDGsyLFQ8OrpsOOyHJv+LgWQb7RKAYNdZSyT5vo001zIwLZx0rvLgFL1Sd65znH9ZEGlk2OqFubIse7p0NfWVburT3gNvXd8f/9Wr8+pvXffjzPKV0B5NzmyZN8MkLCUyIiiAGOoD518CuSqlyI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723470325; c=relaxed/simple; bh=lhF3pTH4I8xK/IBvlxVSscLk3/iBHjh5SV8iq7IJ+oA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Mybejx36RTAeUNuF61cLQKMz5aPr56ESIaAO7vBqHX7D3A68+KKXhXMJSd8koUml3qYqF8bSF90dhqJJnRGSLJdXX2yQWBMdT6ehKC9IbLYhhVAY+12K/vcK3FkJ8xF7jyoXuTDUXQA/EnmpvjZwFCXGPNOrT/A4ri1KRwhje4E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=Te8KoT86; arc=none smtp.client-ip=95.215.58.187 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="Te8KoT86" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723470321; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7vPIBP2a9yupeSh/dTtIjIhVHAEaR6O7IF7oJLTZlss=; b=Te8KoT86Agc628rl3kVeA7m0vcuzoOnAkLe+eT0X9RfwGXM+2ahGGIRm5G5DrGs1L6RxhQ CREKtkAZUXw7/fVeT1PWOx+P6UqTdVzFDwQEgfWry4DntLi52iecwvTQCp8tJZhKI0Fvqa z0YeeqzKC3OCmcBqsCiMzO0fzFXml1I= From: Andrew Jones To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Cc: atishp@rivosinc.com, cade.richard@berkeley.edu, jamestiotio@gmail.com Subject: [kvm-unit-tests PATCH v2 7/7] riscv: mmu: Ensure order of PTE update and sfence Date: Mon, 12 Aug 2024 15:44:59 +0200 Message-ID: <20240812134451.112498-16-andrew.jones@linux.dev> In-Reply-To: <20240812134451.112498-9-andrew.jones@linux.dev> References: <20240812134451.112498-9-andrew.jones@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Use WRITE_ONCE to ensure the compiler won't order the page table write after the TLB flush. Signed-off-by: Andrew Jones --- lib/riscv/mmu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/riscv/mmu.c b/lib/riscv/mmu.c index ce49e67be84b..577c66aa77ba 100644 --- a/lib/riscv/mmu.c +++ b/lib/riscv/mmu.c @@ -64,7 +64,8 @@ static pteval_t *__install_page(pgd_t *pgtable, phys_addr_t paddr, assert(!(ppn & ~PTE_PPN)); ptep = get_pte(pgtable, vaddr); - *ptep = __pte(pte | pgprot_val(prot) | _PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY); + pte |= pgprot_val(prot) | _PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY; + WRITE_ONCE(*ptep, __pte(pte)); if (flush) local_flush_tlb_page(vaddr);