From patchwork Mon Aug 12 15:00:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Bonnefille X-Patchwork-Id: 13760775 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50636136338; Mon, 12 Aug 2024 15:01:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.199 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723474872; cv=none; b=cf6SKw0CRx6gTUQ0jYb51xC+Bkg3UK4q82WeZfsVHaGJC/yorOX76V+cEgoSFpapSWrBtClt5Md81HcjpmyRFJHj+Khqmw4Z+lJI1PqAQ+IS0thm4ovR77U2akIO8kNtwcOS6GweAggMW1boQAZTxhCCV0Z4t6KPHAa1pN5736c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723474872; c=relaxed/simple; bh=ccHNdpaiwHDcsnmiP7d1ByZKherUHj2US15sDIeERIA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VbIAybDncMSNAzpnC36lUSMYH0/X1vaVmHiDTFxug+MgBLw/L/SnXN/05VjeJHVxogc0NZ6mcf7xmKFMPeHRsnROWoeP+vfHrxrN9kF3TsP4VCKqVPTLFKCdS7w7BVzmHyMcQs8ypsjBeoJ2gG2Qhb0prGiu09QGRRv+vo7zlgQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Vyq++eeH; arc=none smtp.client-ip=217.70.183.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Vyq++eeH" Received: by mail.gandi.net (Postfix) with ESMTPSA id DA2AAFF805; Mon, 12 Aug 2024 15:01:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1723474867; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ABArNOKCL6dmgKSQJ2r1D6tE7nlhSkwhi7zy54L8RZI=; b=Vyq++eeHe730h/JM9G8nzdge0nnhbrCqHl4CrV+1FM3mCsUVmDP1w9nPM8ruKnzoN2wha9 YbWuWLAKtAjfAntXX4MPtnN+zKksCClIF5AC3bD4HIutks+PmXyTfyw4VtEys4pu9ntIg9 kuctfrCgq6Wy7peQMg3d18ZdrobDxNoesdrlIoZveA8D7Du+CG9WrOzNVMrXNCFF5mFwMX tdoXoPJMuFia0UWtJOr1EHyefAFQ+sTK5obn9tTqn7KWtgTcqkAUukPhc9DImakPrEQWbL CtefTNJ20izh2w5p0RL1RDZHUzcNUsG04M3KJrQWvTQNTwJsz+gXct5ICIoCng== From: Thomas Bonnefille Date: Mon, 12 Aug 2024 17:00:55 +0200 Subject: [PATCH v4 1/3] dt-bindings: iio: adc: sophgo,cv18xx-saradc.yaml: Add Sophgo CV18XX SARADC binding Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240812-sg2002-adc-v4-1-599bdb67592f@bootlin.com> References: <20240812-sg2002-adc-v4-0-599bdb67592f@bootlin.com> In-Reply-To: <20240812-sg2002-adc-v4-0-599bdb67592f@bootlin.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Thomas Petazzoni , =?utf-8?q?Miqu=C3=A8l_R?= =?utf-8?q?aynal?= , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Thomas Bonnefille X-Mailer: b4 0.14.1 X-GND-Sasl: thomas.bonnefille@bootlin.com The Sophgo SARADC is a Successive Approximation ADC that can be found in the Sophgo SoC. Signed-off-by: Thomas Bonnefille --- .../bindings/iio/adc/sophgo,cv18xx-saradc.yaml | 85 ++++++++++++++++++++++ 1 file changed, 85 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/sophgo,cv18xx-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/sophgo,cv18xx-saradc.yaml new file mode 100644 index 000000000000..846590808e5f --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/sophgo,cv18xx-saradc.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/sophgo,cv18xx-saradc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Sophgo CV18XX SoC series 3 channels Successive Approximation Analog to + Digital Converters + +maintainers: + - Thomas Bonnefille + +description: + Datasheet at https://github.com/sophgo/sophgo-doc/releases + +properties: + compatible: + const: sophgo,cv1800b-saradc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + "^channel@[0-3]+$": + $ref: adc.yaml + + description: | + Represents the channels of the ADC. + + properties: + reg: + description: | + The channel number. It can have up to 3 channels numbered from 0 to 2. + items: + - minimum: 0 + maximum: 2 + + required: + - reg + + additionalProperties: false + + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + #include + adc@30f0000 { + compatible = "sophgo,cv1800b-saradc"; + reg = <0x030f0000 0x1000>; + clocks = <&clk CLK_SARADC>; + interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + }; + channel@1 { + reg = <1>; + }; + channel@2 { + reg = <2>; + }; + }; From patchwork Mon Aug 12 15:00:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Bonnefille X-Patchwork-Id: 13760776 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4614C4D112; Mon, 12 Aug 2024 15:01:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.199 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723474873; cv=none; b=XxBe87IDdKo9X6uY02Xyrl2nWTBeoZB10p32+LGq5v3oYijhv5EQrlSYdjoOuWwA7dVg9rqk3JLjvtJemT9D6Rq5NfYNC9BYz6SCF+IrqVy9NBzxOs0+PGJSw6SBupAje70RKLTju+GwWiwR4SVMBUayhIItVvHjtgu5Gji2SeE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723474873; c=relaxed/simple; bh=PQlPjVrDPUgRAPgwTm0B7JNP4tXrjTJ3OTkiPTB5e/w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nniSyyR4Z91Dx0szjRdC4KQuTBs6Dl1YTwfXxDLkBqsogcRRPply8dC8pkThg0ts85GRcqhE0SenLEg5MMHfaxKWMBhgtlpNFP/R6geAttVEmnobg6RYZxL7BpkC/Q8djga7Lu6y0IXsw+XNK05/r+mA0aDWbZd7hAiWzZTNrX8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Bbhrdsta; arc=none smtp.client-ip=217.70.183.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Bbhrdsta" Received: by mail.gandi.net (Postfix) with ESMTPSA id B2FFCFF806; Mon, 12 Aug 2024 15:01:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1723474868; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BExSz4iOskUobW1Wtu0GnWkPwUOzbXt3bldw+FebJAE=; b=BbhrdstaVAQv9urtLj+TvNjTyMPJuDNrxfIpcdEp8Qwk3c8hUfIhhC1+TVlRiBK77ZWhB5 8nSsoH8qFkU0ZzWEQOeG5OQjw4Zey6WU/zjJ4jWaThdtX32EuSHq4PVZOrPIP4SCNKCTaE PVH/+cBcKahB589fGzIELj7SjqzTXNiLSuUcIjLT6JmmXdYY8nO7HPD/yOm0O/ddAaWfWc wT5SlQyePeZVS3cJw3GKyZZRDqllDSchUVZHYDQ5rWthGMP7qD1ATKv3k8WdxA3XotD/mF 0/JRJzDBPfmNd+wkK5+fV6mUmkAc1s+LsmDMfDUg8JHh7iNSBEQky+nbVz+M+g== From: Thomas Bonnefille Date: Mon, 12 Aug 2024 17:00:56 +0200 Subject: [PATCH v4 2/3] iio: adc: sophgo-saradc: Add driver for Sophgo CV18XX series SARADC Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240812-sg2002-adc-v4-2-599bdb67592f@bootlin.com> References: <20240812-sg2002-adc-v4-0-599bdb67592f@bootlin.com> In-Reply-To: <20240812-sg2002-adc-v4-0-599bdb67592f@bootlin.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Thomas Petazzoni , =?utf-8?q?Miqu=C3=A8l_R?= =?utf-8?q?aynal?= , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Thomas Bonnefille X-Mailer: b4 0.14.1 X-GND-Sasl: thomas.bonnefille@bootlin.com This adds a driver for the common Sophgo SARADC. Signed-off-by: Thomas Bonnefille --- drivers/iio/adc/Kconfig | 10 ++ drivers/iio/adc/Makefile | 1 + drivers/iio/adc/sophgo-cv18xx-adc.c | 208 ++++++++++++++++++++++++++++++++++++ 3 files changed, 219 insertions(+) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index f60fe85a30d5..b10bf26d8e86 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -1156,6 +1156,16 @@ config SC27XX_ADC This driver can also be built as a module. If so, the module will be called sc27xx_adc. +config SOPHGO_CV18XX_ADC + tristate "Sophgo CV18XX series SARADC" + depends on ARCH_SOPHGO || COMPILE_TEST + help + Say yes here to build support for the SARADC integrated inside + the Sophgo CV18XX series SoCs. + + This driver can also be built as a module. If so, the module + will be called sophgo_cv18xx_adc. + config SPEAR_ADC tristate "ST SPEAr ADC" depends on PLAT_SPEAR || COMPILE_TEST diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index d370e066544e..24c241b12ef0 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -105,6 +105,7 @@ obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o obj-$(CONFIG_RZG2L_ADC) += rzg2l_adc.o obj-$(CONFIG_SC27XX_ADC) += sc27xx_adc.o obj-$(CONFIG_SD_ADC_MODULATOR) += sd_adc_modulator.o +obj-$(CONFIG_SOPHGO_CV18XX_ADC) += sophgo-cv18xx-adc.o obj-$(CONFIG_SPEAR_ADC) += spear_adc.o obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o obj-$(CONFIG_STM32_ADC) += stm32-adc.o diff --git a/drivers/iio/adc/sophgo-cv18xx-adc.c b/drivers/iio/adc/sophgo-cv18xx-adc.c new file mode 100644 index 000000000000..ab7ee0f482cc --- /dev/null +++ b/drivers/iio/adc/sophgo-cv18xx-adc.c @@ -0,0 +1,208 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Sophgo CV18XX series SARADC Driver + * + * Copyright (C) Bootlin 2024 + * Author: Thomas Bonnefille + */ + +#include "linux/err.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define CV18XX_ADC_CTRL_REG 0x04 +#define CV18XX_ADC_EN BIT(0) +#define CV18XX_ADC_SEL(x) BIT((x) + 5) +#define CV18XX_ADC_STATUS_REG 0x08 +#define CV18XX_ADC_BUSY BIT(0) +#define CV18XX_ADC_CYC_SET_REG 0x0C +/* The default cycle configuration is set to maximize the accuracy */ +#define CV18XX_ADC_DEF_STARTUP_CYCLE_MASK 0x1F +#define CV18XX_ADC_DEF_SAMPLE_WINDOW_MASK 0xF00 +#define CV18XX_ADC_DEF_CLOCK_DIVIDER_MASK 0xF000 +#define CV18XX_ADC_DEF_COMPARE_CYCLE_MASK 0xF0000 +#define CV18XX_ADC_CH_RESULT_REG(x) (0x14 + 4 * (x)) +#define CV18XX_ADC_CH_RESULT GENMASK(11, 0) +#define CV18XX_ADC_CH_VALID BIT(15) +#define CV18XX_ADC_INTR_EN_REG 0x20 +#define CV18XX_ADC_INTR_CLR_REG 0x24 +#define CV18XX_ADC_INTR_CLR_BIT BIT(0) +#define CV18XX_ADC_INTR_STA_REG 0x28 +#define CV18XX_ADC_INTR_STA_BIT BIT(0) + +#define CV18XX_ADC_CHANNEL(index) \ + { \ + .type = IIO_VOLTAGE, \ + .indexed = 1, \ + .channel = index, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ + .scan_index = index, \ + } + +struct cv18xx_adc { + struct completion completion; + void __iomem *regs; + struct mutex lock; /* ADC Control and Result register */ + int irq; +}; + +static const struct iio_chan_spec sophgo_channels[] = { + CV18XX_ADC_CHANNEL(0), + CV18XX_ADC_CHANNEL(1), + CV18XX_ADC_CHANNEL(2), +}; + +static void cv18xx_adc_start_measurement(struct cv18xx_adc *saradc, + int channel) +{ + writel(0, saradc->regs + CV18XX_ADC_CTRL_REG); + writel(CV18XX_ADC_SEL(channel) | CV18XX_ADC_EN, + saradc->regs + CV18XX_ADC_CTRL_REG); +} + +static int cv18xx_adc_wait(struct cv18xx_adc *saradc) +{ + if (saradc->irq < 0) { + u32 reg; + + return readl_poll_timeout(saradc->regs + CV18XX_ADC_STATUS_REG, + reg, !(reg & CV18XX_ADC_BUSY), + 500, 1000000); + } + return wait_for_completion_timeout(&saradc->completion, + msecs_to_jiffies(1000)) > 0 + ? 0 : -ETIMEDOUT; +} + +static int cv18xx_adc_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + + switch (mask) { + case IIO_CHAN_INFO_RAW:{ + struct cv18xx_adc *saradc = iio_priv(indio_dev); + u32 sample; + + scoped_guard(mutex, &saradc->lock) { + int ret; + + cv18xx_adc_start_measurement(saradc, chan->scan_index); + ret = cv18xx_adc_wait(saradc); + if (ret < 0) + return ret; + + sample = readl(saradc->regs + CV18XX_ADC_CH_RESULT_REG(chan->scan_index)); + } + if (!(sample & CV18XX_ADC_CH_VALID)) + return -ENODATA; + + *val = sample & CV18XX_ADC_CH_RESULT; + return IIO_VAL_INT; + } + case IIO_CHAN_INFO_SCALE: + *val = 3300; + *val2 = 12; + return IIO_VAL_FRACTIONAL_LOG2; + default: + return -EINVAL; + } +} + +static irqreturn_t cv18xx_adc_interrupt_handler(int irq, void *private) +{ + struct cv18xx_adc *saradc = private; + + if (!(FIELD_GET(CV18XX_ADC_INTR_STA_BIT, + readl(saradc->regs + CV18XX_ADC_INTR_STA_REG)))) + return IRQ_NONE; + + writel(CV18XX_ADC_INTR_CLR_BIT, saradc->regs + CV18XX_ADC_INTR_CLR_REG); + complete(&saradc->completion); + return IRQ_HANDLED; +} + +static const struct iio_info cv18xx_adc_info = { + .read_raw = &cv18xx_adc_read_raw, +}; + +static int cv18xx_adc_probe(struct platform_device *pdev) +{ + struct cv18xx_adc *saradc; + struct iio_dev *indio_dev; + struct clk *clk; + int ret; + + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*saradc)); + if (!indio_dev) + return -ENOMEM; + + saradc = iio_priv(indio_dev); + indio_dev->name = "sophgo-cv18xx-adc"; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->info = &cv18xx_adc_info; + indio_dev->num_channels = ARRAY_SIZE(sophgo_channels); + indio_dev->channels = sophgo_channels; + + clk = devm_clk_get_enabled(&pdev->dev, NULL); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + saradc->regs = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(saradc->regs)) + return PTR_ERR(saradc->regs); + + saradc->irq = platform_get_irq_optional(pdev, 0); + if (saradc->irq >= 0) { + init_completion(&saradc->completion); + ret = devm_request_irq(&pdev->dev, saradc->irq, + cv18xx_adc_interrupt_handler, 0, + dev_name(&pdev->dev), saradc); + if (ret) + return ret; + + writel(1, saradc->regs + CV18XX_ADC_INTR_EN_REG); + } + + ret = devm_mutex_init(&pdev->dev, &saradc->lock); + if (ret) + return ret; + + platform_set_drvdata(pdev, indio_dev); + writel(FIELD_PREP(CV18XX_ADC_DEF_STARTUP_CYCLE_MASK, 0xF) | + FIELD_PREP(CV18XX_ADC_DEF_SAMPLE_WINDOW_MASK, 0xF) | + FIELD_PREP(CV18XX_ADC_DEF_CLOCK_DIVIDER_MASK, 0x1) | + FIELD_PREP(CV18XX_ADC_DEF_COMPARE_CYCLE_MASK, 0xF), + saradc->regs + CV18XX_ADC_CYC_SET_REG); + + return devm_iio_device_register(&pdev->dev, indio_dev); +} + +static const struct of_device_id cv18xx_adc_match[] = { + { .compatible = "sophgo,cv1800b-saradc", }, + { } +}; +MODULE_DEVICE_TABLE(of, cv18xx_adc_match); + +static struct platform_driver cv18xx_adc_driver = { + .driver = { + .name = "sophgo-cv18xx-saradc", + .of_match_table = cv18xx_adc_match, + }, + .probe = cv18xx_adc_probe, +}; +module_platform_driver(cv18xx_adc_driver); + +MODULE_AUTHOR("Thomas Bonnefille "); +MODULE_DESCRIPTION("Sophgo CV18XX series SARADC driver"); +MODULE_LICENSE("GPL"); From patchwork Mon Aug 12 15:00:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Bonnefille X-Patchwork-Id: 13760778 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DCDD41DA26; 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arc=none smtp.client-ip=217.70.183.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="eImntX/0" Received: by mail.gandi.net (Postfix) with ESMTPSA id 8E5E8FF807; Mon, 12 Aug 2024 15:01:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1723474869; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qcnVQb/yrvDYJxCY7i392OtDZOwd6IXmcourEZmhOEM=; b=eImntX/09QmFtD+KwtwW/PiFL8FBHh8x6fardUgTSBSQGvgkcg0mvGZwiWIZ7w/PQcZb1g Kvr+ighKlHbB1U2hXlYFC8aTluW8ysYaUIkSprsQvq0/wHQccQh+yxHuTTBj0TnVk6YouR DV1HcDXkm5SHm5Bj6+wGIXajsYOODy2NY1tM1/ZaOknCQYciTuP5Xzuz/s8L7RFn0KtTL/ PknVlgJ6TlyNAySg2HUSu4lfucNRkB6uu7CJCPTeTkeH2McnLmDlfISi1jw09O6xZya0Ua vMzEY8bvYHzkR0SA1cFR3snY1zkepdzuKdd+qPiE1Or7MvwwU/GphKMupT/8xA== From: Thomas Bonnefille Date: Mon, 12 Aug 2024 17:00:57 +0200 Subject: [PATCH v4 3/3] riscv: dts: sophgo: Add SARADC description for Sophgo CV18XX Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240812-sg2002-adc-v4-3-599bdb67592f@bootlin.com> References: <20240812-sg2002-adc-v4-0-599bdb67592f@bootlin.com> In-Reply-To: <20240812-sg2002-adc-v4-0-599bdb67592f@bootlin.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Thomas Petazzoni , =?utf-8?q?Miqu=C3=A8l_R?= =?utf-8?q?aynal?= , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Thomas Bonnefille X-Mailer: b4 0.14.1 X-GND-Sasl: thomas.bonnefille@bootlin.com Adds SARADC nodes for the common Successive Approximation Analog to Digital Converter used in Sophgo CV18xx series SoC. This patch adds two nodes for the two controllers the board, one in the Active domain and the other in the No-Die domain. Signed-off-by: Thomas Bonnefille --- arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi index 891932ae470f..71a2618852fa 100644 --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi @@ -133,6 +133,26 @@ portd: gpio-controller@0 { }; }; + saradc: adc@30f0000 { + compatible = "sophgo,cv1800b-saradc"; + reg = <0x030f0000 0x1000>; + clocks = <&clk CLK_SARADC>; + interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + channel@0 { + reg = <0>; + }; + channel@1 { + reg = <1>; + }; + channel@2 { + reg = <2>; + }; + }; + i2c0: i2c@4000000 { compatible = "snps,designware-i2c"; reg = <0x04000000 0x10000>;