From patchwork Tue Aug 13 23:00:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13762669 Received: from mail-qk1-f169.google.com (mail-qk1-f169.google.com [209.85.222.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C753B1AB52D; Tue, 13 Aug 2024 23:00:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.222.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590052; cv=none; b=qvnKOCufC0f0XaeYg6B7bHfC2u8khT0wbU/Oxv2jwWcZlhG8avOD5AXWNvRUpDD9n/KMtSIAjj6N8at3lFXx/YxCk7IMd0s7F17++T6RDfLAnpYkCB4ZxdpfMAMzQHAKkIFG+0ejR9P1x2qScrDr2QBHTOwQamwa7Bm8iahotEg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590052; c=relaxed/simple; bh=tUVsrR3UmP6exVgP+K283XAPgpieF6IeNkCxRW9t18k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VZsqPslQPEVlZ8AjgLN3l3PrAClxe49bVk2Wfrk/hKSY3B4teQwueQlAghMA5Ep0lhqG9yOcsZK0BTQc7NSBFcXM1F0KxCboUQAB6z1zyJeUYs8RuqvUgQiJu7E86LX1uKgB4j0fnoEBT45wJvqwcfjBdGHYVG+6azS6b8RC5xU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=EIF4nPpp; arc=none smtp.client-ip=209.85.222.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EIF4nPpp" Received: by mail-qk1-f169.google.com with SMTP id af79cd13be357-7a1d5f6c56fso344728585a.0; Tue, 13 Aug 2024 16:00:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723590050; x=1724194850; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=saMoUZRIGH1h+EWOkyRu+WmF8voJw7aMAURbI1aUKas=; b=EIF4nPppDhTTm7p06eSSnNKJOgPMXrzLMHCnNOWAvbi5hklotoA2Qd8V15fs6q8/fN XjCrEfl/VqhcEpqpR//qQRqdHomYkOiIoD4sxiE5l2XXCXxevLgwqFtk5KR7m/yWcZLy a86ynI+mObORwK6uOfCTL3f6STXC3x4LVxRbt3RFgSAJSCQUsgtJzLejrDmf+Qyi4Ekr 9UnxEHyyX+Mnpw62qzIVO+ipqsAPEUhy6A7nRMtF2FzcEkJs/5pKVR2yPHXRWfMkUtv4 /+jA0ZYBJWnJAovPADZCfxVA7bTTovejbNx0r8hVVYEVzFnDKF2cCOAEGtWeNX1r+8Da UPSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723590050; x=1724194850; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=saMoUZRIGH1h+EWOkyRu+WmF8voJw7aMAURbI1aUKas=; b=PqqkjzprG+cbgSfclgmOHeD+5m9UUm5/lMioFbFpFaNYsJrOni9gWktHDrILPb0YzP CRq/XzOMQxJy9SGFXSEboBH0rf/S1mzFO+JmooBPhyI3wmReEg6ESyv6RZMrf/7YDEff 2ybWVfRU0XXJwh8LokLrYEIGG0HNa+mXCNDVoIrUkjWwgbmW3VkQoHNwD6ZJjjIT+DN5 8fbX68QMyFAZ10zJ6X+Jroiht2UkWUyJrp/aWwwLSl71SW7ScoPOBEbvvu+s0tCpQ+Zn /5ihpFW21OYACdC7irhwQWjDENy3cKNzJ0sGmwLeQUsUr0QguNdBf4hkIcCt4HTOAmtS IF1g== X-Forwarded-Encrypted: i=1; AJvYcCWCYSUo1tQD3X8IkPelaGBxFlq4fCXWJ+IZ/nPnq/SwLmtDw9Q0tjnELld0XprSMVPWBmUjVwiI4ARylhIIA8Xg3WbpJND49L+yR/f33n5Gf04J1f0M9cT+DoX7y/WI8Tl82WmSICrMw1wIordWW56/0mLKRwfQvF0ZK0TVJUstBZgSDFCqmUkn79Qzi2yWS0h9SBnR9KsHvO7HeaLXe6QJ/w== X-Gm-Message-State: AOJu0YxyqSHotOWP7qpjCf5MsGGJsxmWSkL8eOw4P4JnBVHjjk8j+nI6 Et41yY5KPoY5p0vtXuYzjSvITl1I/IkDfn1KIATx4EQCzOV53pLY X-Google-Smtp-Source: AGHT+IHbkGwGdtNT2VqYuMklhPwrPnGYsbDb+Pc8D3l6VzJoFwbLw/9bJu4Yp3SgaH4SIVAX1Fnvaw== X-Received: by 2002:a05:620a:2a0f:b0:7a1:62ad:9d89 with SMTP id af79cd13be357-7a4ee3e5045mr148387085a.64.1723590049489; Tue, 13 Aug 2024 16:00:49 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7a4c7e05658sm379696885a.121.2024.08.13.16.00.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Aug 2024 16:00:49 -0700 (PDT) From: Richard Acayan To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Richard Acayan Subject: [PATCH v2 1/5] dt-bindings: i2c: qcom-cci: Document SDM670 compatible Date: Tue, 13 Aug 2024 19:00:40 -0400 Message-ID: <20240813230037.84004-9-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240813230037.84004-8-mailingradian@gmail.com> References: <20240813230037.84004-8-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The CCI on the Snapdragon 670 is the interface for controlling camera hardware over I2C. Add the compatible so it can be added to the SDM670 device tree. Signed-off-by: Richard Acayan Reviewed-by: Bryan O'Donoghue Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml index c33ae7b63b84..87f5e5bdbbe7 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -27,6 +27,7 @@ properties: - enum: - qcom,sc7280-cci - qcom,sc8280xp-cci + - qcom,sdm670-cci - qcom,sdm845-cci - qcom,sm6350-cci - qcom,sm8250-cci @@ -143,6 +144,7 @@ allOf: compatible: contains: enum: + - qcom,sdm670-cci - qcom,sdm845-cci - qcom,sm6350-cci then: From patchwork Tue Aug 13 23:00:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13762670 Received: from mail-qk1-f177.google.com (mail-qk1-f177.google.com [209.85.222.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B2D781ABEBC; Tue, 13 Aug 2024 23:00:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.222.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590054; cv=none; b=a5rN95IeZcFJFmuGxoutizhiWufT0kYsBGoTxZjjWP2IuWmWKGdTVUBVNibUbTMrvi+JJjKjvV74x+MqAqp5xNkuaQ2LwPESVgZ3rP1stSHpYR6qHw1s0aK+GdBvbuMKyqBb7RAq4gjYjue2/RpVaNdfoVPSGunEGevdnp3icsU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590054; c=relaxed/simple; bh=lejGTlD2ZkRwxogfuT9iDEEJxvCIZp4ge+Da6AxpL3w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=I5I0NfL68L7NnMhgZu0uN0d5aspzSrs5tmPFdjscF4SWCK8GSdekwyWPcjYo3RW9tBRduCjD5kgg2ZXq8jgAKJscxdrNpXEk9bi9xae50Ji7pBnsqSrPGA/AOcmIDCYPuZ1bxD6H2CkngP4nBFbeliigMtTJOQ2k2K9tmuyJ00Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=PfpL7g0v; arc=none smtp.client-ip=209.85.222.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="PfpL7g0v" Received: by mail-qk1-f177.google.com with SMTP id af79cd13be357-7a1dd2004e1so376330385a.3; Tue, 13 Aug 2024 16:00:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723590051; x=1724194851; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=94EZmA43tK3sZ2fmzqIAQEiBEFCnZFY3fjtWKaueyqY=; b=PfpL7g0vIW1tErvWAu43OFm7HoRLkTdxJasy1HzrGOFCOIOZXlci9gTM+Q9EDpCajY Wp6/Nk+CmhFDskF0RcWJ//vImYBR38a8+w9mw/FD4xRnRlPX9wsQVSCRDD6Z0k5cwvIJ fjkn9Yny10MzYgqEc2F/ZDwg45u45d2oiGU7axazLqHCWyo6q0bolhkyDDjnYiwtUfW9 79jCnbyqsYDw58yDalCp+cdyzTJQLgq3+qS9eTsX+wMS5c+s038rfR2E/z5Olqk2PDET r4QTaU2A22Y8A422QEq9YIH4vDMy/5vKlc4Dcteb71+cEscsA3HKBNxnfbpcpQcwh6bu K59w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723590051; x=1724194851; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=94EZmA43tK3sZ2fmzqIAQEiBEFCnZFY3fjtWKaueyqY=; b=K8mwk+qhmWBmKJgyXvFBrf6Afw51ANcIq4eTpypfaEEHqxjOncorVLafY1iZUjQrSd 8QT8bKz8XgqylI/vLRNUGMAzcLN+ql57m8unoc0Ni5v296KOCgx53Yr3WyA72oeGgsok wN6LzE4UCUdLpzljHudUR15wVURrnwqwtswN0s7jWwUitCGYrysIuAGJ73fTkp8zjuuI jcQBO2G7aQCQkIdjqQS5OkU4vGKYaRhRwcpmyh5fC3w9wYovuNqhGlG9tuzG27r381+E 5XZIBmYWNt7Nry5PK8fT5Sgy/r2p4noSazQE8cwoobVH/EaRONMqhAjMx3/MpORcchMu p+gw== X-Forwarded-Encrypted: i=1; AJvYcCWGeLADbjczddZopxvdhMesVLSSi4Gl6PntrRE6dlwY0MdNcW/+ZOB5J1KaIID+boZa0iIKq3C2xejqnwkKVoC8IF8RruTw2oY+RJT+6FyRN7Z7kB1vHGULQXaRW4T/Oz+04avSs5l4l0Lrw/d/SSDmUd413fsJ/kKV8y3TdhCbbEAQDgihMmycUW54vu3qP2mfg2oThQW3xWUJWp7NMTJL3Q== X-Gm-Message-State: AOJu0YzpnASTR17TzFZJ1R0EZiBp8X+116fFy7JQMO+7H5QiAA015Ert qNOOlB2TRclHJAyVeRIArwFSKqx7MfPUNlIBWyFXpQi5R8tjGjui X-Google-Smtp-Source: AGHT+IFffIMtEBEyIjCZADGI/b9CiUsM9C8Gx5vaqq9Kr1Qx32TlfsIRMNjVr82/LXZRlXqe1g+fNw== X-Received: by 2002:a05:620a:1a87:b0:79e:ff1a:2359 with SMTP id af79cd13be357-7a4ee319185mr118991685a.14.1723590051401; Tue, 13 Aug 2024 16:00:51 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7a4c7d64328sm378590185a.16.2024.08.13.16.00.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Aug 2024 16:00:51 -0700 (PDT) From: Richard Acayan To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Richard Acayan Subject: [PATCH v2 2/5] dt-bindings: media: camss: Add qcom,sdm670-camss Date: Tue, 13 Aug 2024 19:00:41 -0400 Message-ID: <20240813230037.84004-10-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240813230037.84004-8-mailingradian@gmail.com> References: <20240813230037.84004-8-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 As found in the Pixel 3a, the Snapdragon 670 has a camera subsystem with 3 CSIDs and 3 VFEs (including 1 VFE lite). Add this camera subsystem to the bindings. Adapted from SC8280XP camera subsystem. Signed-off-by: Richard Acayan --- .../bindings/media/qcom,sdm670-camss.yaml | 324 ++++++++++++++++++ 1 file changed, 324 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml diff --git a/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml new file mode 100644 index 000000000000..c276f90c5029 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml @@ -0,0 +1,324 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sdm670-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SDM670 Camera Subsystem (CAMSS) + +maintainers: + - Richard Acayan + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,sdm670-camss + + clocks: + maxItems: 22 + + clock-names: + items: + - const: camnoc_axi + - const: cpas_ahb + - const: csi0 + - const: csi1 + - const: csi2 + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: gcc_camera_ahb + - const: gcc_camera_axi + - const: soc_ahb + - const: vfe0_axi + - const: vfe0 + - const: vfe0_cphy_rx + - const: vfe1_axi + - const: vfe1 + - const: vfe1_cphy_rx + - const: vfe_lite + - const: vfe_lite_cphy_rx + + interrupts: + maxItems: 9 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + iommus: + maxItems: 4 + + power-domains: + items: + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. + - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: ife0 + - const: ife1 + - const: top + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY0. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY1. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY2. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + reg: + maxItems: 9 + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: vfe0 + - const: csiphy0 + - const: vfe1 + - const: csiphy1 + - const: vfe_lite + - const: csiphy2 + + vdda-phy-supply: + description: + Phandle to a regulator supply to PHY core block. + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. + +required: + - clock-names + - clocks + - compatible + - interconnects + - interconnect-names + - interrupts + - interrupt-names + - iommus + - power-domains + - power-domain-names + - reg + - reg-names + - vdda-phy-supply + - vdda-pll-supply + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camss { + compatible = "qcom,sdm670-camss"; + + reg = <0 0x0ac65000 0 0x1000>, + <0 0x0ac66000 0 0x1000>, + <0 0x0ac67000 0 0x1000>, + <0 0x0acaf000 0 0x4000>, + <0 0x0acb3000 0 0x1000>, + <0 0x0acb6000 0 0x4000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acc4000 0 0x4000>, + <0 0x0acc8000 0 0x1000>; + reg-names = "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "csid0", + "vfe1", + "csid1", + "vfe_lite", + "csid2"; + + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0_axi", + "vfe0", + "vfe0_cphy_rx", + "vfe1_axi", + "vfe1", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + iommus = <&apps_smmu 0x808 0x0>, + <&apps_smmu 0x810 0x8>, + <&apps_smmu 0xc08 0x0>, + <&apps_smmu 0xc10 0x8>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + vdda-phy-supply = <&vreg_l1a_1p225>; + vdda-pll-supply = <&vreg_l8a_1p8>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + csiphy_ep0: endpoint { + reg = <0>; + clock-lanes = <7>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&front_sensor_ep>; + }; + }; + }; + }; + }; From patchwork Tue Aug 13 23:00:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13762671 Received: from mail-ot1-f50.google.com (mail-ot1-f50.google.com [209.85.210.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B02D1ABECF; Tue, 13 Aug 2024 23:00:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590056; cv=none; b=LAflF4uSyPHMJ8zTLBQY3xo/LiSlHvjEDtg5biRZr+WoCgqUurhUm+Jo9ENCzfBfQe+FhXyub1+3UvGWozi33WaGFoWWa5CNlRNEGo0ilFCW1aoX8AXPxX2ZRyzn9ofl11MQ4w/Xv/m6J1wyuvOTHG6+GGlHjXSLq3vkTYWYHJc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590056; c=relaxed/simple; bh=YX0Qq2kUDDdO4wAbeg//khEouqqY0Nj3d7OAM0J7UG4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ruPGNRUm2Q7Wmy+3Q4P0x2WLUgeR0FCzxrd73nlLrjUm4PuCuzl5JL+4BRND9D0lNIkosWNev7sj8qeHDSRhSfngLzmBGGad9O/GcvjvYM6Zw5neFeFJ65npiQUFjiCsK7xTi1ilD4tj2eH/W2Rno0vl2WkwuohjR8jMhzYTgP0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Loqt4uqa; arc=none smtp.client-ip=209.85.210.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Loqt4uqa" Received: by mail-ot1-f50.google.com with SMTP id 46e09a7af769-7093d565310so4346286a34.2; Tue, 13 Aug 2024 16:00:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723590053; x=1724194853; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZywuGlQZBGJLs0MygXdTUJJtx54MTpyPJPxIvhPx49c=; b=Loqt4uqaM/C6Yl+dsRG25vIljIi/imcn9AwC3kYMXB9EFqYByhyXoYZL5d/IJ6mscx ppL69DqX4mFtgO8/mSdwpGn18DHdZrMMzlx2LnOL+qNiGbSsz3EX1ou4dOUhUnFOHWvU T4/4oUH97mDwZF5Sdox5YoxRl36Hz/k+lOTbLl/Dr0gklCGFnpchvDxHxxK5gwHRzZQh EBqh+iYJcOe3ut1+GiUfgOyIf3K4CCww7GkzVVbSrOXcbBd5bAz8c4QAUQnpqtpNdHRp 8zrASvAFbYOEcq7uFcoVHE0nRb3BTpEEB3jT5IadKWMPNSskYkqtIOizXMx5oPl+HdF9 T4PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723590053; x=1724194853; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZywuGlQZBGJLs0MygXdTUJJtx54MTpyPJPxIvhPx49c=; b=jZ/82yjWT3HuXQZkQyDKd0sJX1Ob0aq7y2d/hpv1gRZ+SvS9H8P2Tr8Ax9NkjJD9WT YLdzrD2p57+rVuZialandFWSV3s8gE7U/2w8dNzoqfW8AdQmjn0+ObAX2UZmdh+AfVl/ UAybzvw7iZdvHy2foVk3Gb5Fs/x5+I1w2JkUpnV9VmTUNETTxiulFBj7MsXXcHcTWwo/ DI67HhAA9XJdQGCqdp1fTEB8d5H2ORZ08KlKvkVkv1Wj9i+4isEpT36k/weIbr71+zcJ 6mkDWPJ2fA1Ck1hlPhtsvH3qoQ+pg5UlFwqkj1qt3iufR2KctQaSGbAmV+Lc1yAEnp9f 44mQ== X-Forwarded-Encrypted: i=1; AJvYcCVSaoWmRrETlRNk5DNKGgCdYNx4Qp2ZhL1pfBtT/5ggrnlePBxR7auzsEu7DlXg4TzzTvUxtg9kQ/s5/7Nlm9mW2aS3szebUsaTCqiVmhBO2F0T0/ZG2u9mK1imL0OlX9ncvn7NF1C5/t1OVL8yXzpvL0u3aZI5zkNUl8l03h6wsvHZIyW67245BOEHLmXRZ7NQkrR7t6woxWltkuJeWaXT4w== X-Gm-Message-State: AOJu0YxABmRhfOmOUt+BaHynbuu+avhk9gQX7eFNThfJGjSKoPkf0AZa OXeYQkds3PsjiggEJdib6duIjyezVOM7O5JQkx2phRIzBxm1ZZaY+C48Xlqb X-Google-Smtp-Source: AGHT+IEAb8XoVPQ2NaO7li9fGGEAIi5QOSiScDZ3IQHDmY2m+zU5cHdR3We9ap6s4w3+qcqQHe4v3Q== X-Received: by 2002:a05:6358:705:b0:1aa:cdba:4fa8 with SMTP id e5c5f4694b2df-1b1aab8625fmr107054355d.13.1723590053243; Tue, 13 Aug 2024 16:00:53 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7a4c7e0419asm377694585a.118.2024.08.13.16.00.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Aug 2024 16:00:53 -0700 (PDT) From: Richard Acayan To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Richard Acayan Subject: [PATCH v2 3/5] media: camss: add support for SDM670 camss Date: Tue, 13 Aug 2024 19:00:42 -0400 Message-ID: <20240813230037.84004-11-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240813230037.84004-8-mailingradian@gmail.com> References: <20240813230037.84004-8-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera subsystem for the SDM670 the same as on SDM845 except with 3 CSIPHY ports instead of 4. Add support for the SDM670 camera subsystem. Signed-off-by: Richard Acayan --- drivers/media/platform/qcom/camss/camss.c | 194 ++++++++++++++++++++++ 1 file changed, 194 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 51b1d3550421..f5d8443d4157 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -584,6 +584,188 @@ static const struct camss_subdev_resources vfe_res_660[] = { } }; +static const struct camss_subdev_resources csiphy_res_670[] = { + /* CSIPHY0 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "soc_ahb", "cpas_ahb", + "csiphy0", "csiphy0_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY1 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "soc_ahb", "cpas_ahb", + "csiphy1", "csiphy1_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY2 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "soc_ahb", "cpas_ahb", + "csiphy2", "csiphy2_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + } +}; + +static const struct camss_subdev_resources csid_res_670[] = { + /* CSID0 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe0", + "vfe0_cphy_rx", "csi0" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .formats = &csid_formats_gen2 + } + }, + + /* CSID1 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe1", + "vfe1_cphy_rx", "csi1" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .formats = &csid_formats_gen2 + } + }, + + /* CSID2 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe_lite", + "vfe_lite_cphy_rx", "csi2" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid2" }, + .interrupt = { "csid2" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_gen2, + .formats = &csid_formats_gen2 + } + } +}; + +static const struct camss_subdev_resources vfe_res_670[] = { + /* VFE0 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe0", "vfe0_axi", "csi0" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife0", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE1 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe1", "vfe1_axi", "csi1" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife1", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE-lite */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe_lite", "csi2" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "vfe_lite" }, + .interrupt = { "vfe_lite" }, + .vfe = { + .is_lite = true, + .line_num = 4, + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + } +}; + static const struct camss_subdev_resources csiphy_res_845[] = { /* CSIPHY0 */ { @@ -2403,6 +2585,17 @@ static const struct camss_resources sdm660_resources = { .link_entities = camss_link_entities }; +static const struct camss_resources sdm670_resources = { + .version = CAMSS_845, + .csiphy_res = csiphy_res_670, + .csid_res = csid_res_670, + .vfe_res = vfe_res_670, + .csiphy_num = ARRAY_SIZE(csiphy_res_670), + .csid_num = ARRAY_SIZE(csid_res_670), + .vfe_num = ARRAY_SIZE(vfe_res_670), + .link_entities = camss_link_entities +}; + static const struct camss_resources sdm845_resources = { .version = CAMSS_845, .csiphy_res = csiphy_res_845, @@ -2447,6 +2640,7 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8916-camss", .data = &msm8916_resources }, { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, + { .compatible = "qcom,sdm670-camss", .data = &sdm670_resources }, { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources }, From patchwork Tue Aug 13 23:00:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13762672 Received: from mail-qv1-f51.google.com (mail-qv1-f51.google.com [209.85.219.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F09A18A6D6; Tue, 13 Aug 2024 23:00:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590057; cv=none; b=jmaS3EZBomfIcq+CmRGUDjUTyn3nnBEJvqog2Hpxq5Y1CFUdsQ1cgZc5+QOlKisdkIlbmj4sb5zcGyS2Wq7wzQ+kLhAQlr8eSQbY3ZBmZBF4eHjj3dWVURHs/KYNzrD+KWJouORrl27v/9MBChMWY7UzwoJuZUsFxAa4VQx+TmE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590057; c=relaxed/simple; bh=7M2viqOaROj3pXsYrUAvYPUuS9x+ANSZGFnhafQmQhE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Ed0ZlzyQrlpEwRvOlqjHuhbEz5M4Lr4zG4UYPrBE+Na8rujF1IvB/yhKyBVteOt0pql6WovuTQ8jEh+Vq53zXArYxmn1/2kaHCvZE+HvWViN7JsLoyIPR7iOCsu7u58PRftDFDaRt8n+QKTXHS9VehGePMfM/w0FuulL/6rZiio= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=CaDiLiF7; arc=none smtp.client-ip=209.85.219.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="CaDiLiF7" Received: by mail-qv1-f51.google.com with SMTP id 6a1803df08f44-6b7a0ef0dfcso32783096d6.1; Tue, 13 Aug 2024 16:00:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723590055; x=1724194855; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EIwAmHgC/fogGgIARdi0QUwehFPzkJ3dfBzCA61IDEQ=; b=CaDiLiF7+rHiHI9NrMW7fDE5y+AhqG1nRKxJAuPZ7enapT3XE7dSnrcn8f8P+63BN1 e7ZOt9lTyblsMXO2y/qAurlC8ydcTUyEv2wUebSwodfvejSY8X/vF1u1CCRZw9f6ybPN J9tdZUidTApC6wc/7SVBosTn9xJ4ia/4F7+xcnumd0rSd6xMb34qaKYG6a9kLoxSZcSe JY8jOmX9nEVp3fNssoFNkqPKmgojN/LxqftjI313q5yqlJessi4KzFgRph1hkVuJyiKv U1ydzWTzTTHdUBHuc7uxLhJ47XcMlizguV4gzGNjnYnBro6hxLvlMxegt+4oBrIzMnXB l3hQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723590055; x=1724194855; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EIwAmHgC/fogGgIARdi0QUwehFPzkJ3dfBzCA61IDEQ=; b=howr03GBFDu0DlOoC/UKuho+9F6Q5if+SYECVEsaM+u5PT7j1a/1XSc5jagIALT87g J9SAcRlh+nJEgQTB5t/jjMhmws9jk9TZxBH+l8Ehuym4Sg0c5CDmzKAOjUtj9dcibBrr KMAenf6h8wbJ/iD4B7bBKrIsoxzsRCm3fq0lYNcsCA59ppq5WoY9svXIAzh/jhxkVN+T 90OWxTb3i0lzT3FHmIFyyBD9nLDkJvBwy3y1dqU9u5+9k+w0Txl7xY4HFfmcxG8hsTWl NRa9i5lge1DpVK5qF92KB+eMc5b53N/9LiW1DLlsKyHWGmLHc1ZNGCLG+cezJ7QiPE3X AARQ== X-Forwarded-Encrypted: i=1; AJvYcCWyMvekKnVQ6AONlgzTEaYo1AIZic7LJu+ytoar1ZE7nyAAVlg0wrsByhhZz1UP+qQQX6r/fj9sP3jwGgfyppW9nrFutjHoriBvlSoDWEFGhYDAoEAUsQR+ljZoRwlyDeP9BumkzGGiF2YTzhCCi6sALSO1HwHZu7h/fE5lVyaHoAoBPERtbMq1RlC7v0yRMy66+2IP4JM+Dp3wp3Ol+5OtXA== X-Gm-Message-State: AOJu0YxQO+/DQeIgU03IIRjPBOcMYyh2SkI0pSNtt5VFG3YuD7R1b0SI MdFLmCjmvgZqCO+PkCM+yLeW+0aoymSyg8PRutMct5mxEsv3XS9e8QR+LBi1 X-Google-Smtp-Source: AGHT+IEOgLhY/kd6JQMbnbdom5bXWeWMdeajpjfPO/3V5j/qcD0peqB5fAcP09oJlVGoCjIBbz7eew== X-Received: by 2002:a05:6214:5342:b0:6bf:4f29:bdac with SMTP id 6a1803df08f44-6bf5d28e6c1mr8205806d6.57.1723590055154; Tue, 13 Aug 2024 16:00:55 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6bd82e6d2c4sm37601946d6.145.2024.08.13.16.00.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Aug 2024 16:00:54 -0700 (PDT) From: Richard Acayan To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Richard Acayan Subject: [PATCH v2 4/5] arm64: dts: qcom: sdm670: add camcc Date: Tue, 13 Aug 2024 19:00:43 -0400 Message-ID: <20240813230037.84004-12-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240813230037.84004-8-mailingradian@gmail.com> References: <20240813230037.84004-8-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera clock controller on SDM670 controls the clocks that drive the camera subsystem. The clocks are the same as on SDM845. Add the camera clock controller for SDM670. Signed-off-by: Richard Acayan Reviewed-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 187c6698835d..ba93cef33dbb 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1400,6 +1400,16 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; + camcc: clock-controller@ad00000 { + compatible = "qcom,sdm845-camcc"; + reg = <0 0x0ad00000 0 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + mdss: display-subsystem@ae00000 { compatible = "qcom,sdm670-mdss"; reg = <0 0x0ae00000 0 0x1000>; From patchwork Tue Aug 13 23:00:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13762673 Received: from mail-qt1-f182.google.com (mail-qt1-f182.google.com [209.85.160.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 804031A7058; Tue, 13 Aug 2024 23:00:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.160.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590060; cv=none; b=bErLO4f3WbfgU8vMP20hfAWNHeHL19nX9PfvfvRylQDKuJmEH6w9QW7YZyUGcq/Sg6L0OglT/AjRl90dbRb1QFMshgxO07k6A8rAMt5+9LTvuyauQ8s9qg0Qqszf0ix1TY3RwbojdVbXOPbY78x/e86lrZxsx5A39pwdD6gFv/c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590060; c=relaxed/simple; bh=MTs+G93svOkXFpMKIGKuRkI2y7ULikZDdTjHwEouAaY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mgwntEDF2mk58E8fhtJMDKbn1tG2nMI/D/wBXEQMFxDLVsvZF7AkBkv2VG2170H3mOBY7fA63jAWmvtNhNK9vh9kuA1qUpucjGI/MRl/nDqypZAOrGUwuI/JKdj6BdQ9FqjP/ENN1ofKKdkBmPgRw7DtyzBOKsPUkWEZzBpcMzs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ESf0qnns; arc=none smtp.client-ip=209.85.160.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ESf0qnns" Received: by mail-qt1-f182.google.com with SMTP id d75a77b69052e-44ff7bdb5a6so32482281cf.3; Tue, 13 Aug 2024 16:00:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723590057; x=1724194857; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pHbp5xm4kw6fJSSbkDbUTNVhDZ+PJQcOYIRUSidU0PI=; b=ESf0qnnsm0Itp5C3As6R9yQJHGUdI5UrN40t8drM4LHyYQjAhZHjo6ArOnLfpFHFzL wSyTal5CO04HPh5jQ9NC2LnAZatkkSypbXYVe4q7lBJ4m80eGVz5Q9YXxiQncfOO4dl9 NWzYh6uvWqh8AEwv9sHuXCE3EWZVAxff3cZHJYO8SEs+ybS6DO9hI0rc9Y9POxwW2ZGI yft4Lbp6jVV6d+f2VtnAJRDgIOynkOy6AZhcGbicvNSSXjE9FMIF16iXwbR5AEC+j5Vx 4pb1jE8yqtZeWTyqDi0LbvM1m8f0vNoh0NBUKIJzNoqNVkVr/pnAcW9SHlfLQ1hJMExQ yTTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723590057; x=1724194857; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pHbp5xm4kw6fJSSbkDbUTNVhDZ+PJQcOYIRUSidU0PI=; b=Ihqyixf7EysZkHnWZGiV008HOJ+WBqKtiC9APTa+P335dNBA253UToPMaWUVU7RM0V KUGh4Ed4dRgnj9fn/FbJ1CHpstJiCCW3drnc8hNx8BXdSExGmXmBNuQ8jgcHpTU6Hjgc NhEKTt9+A3gtllTq18ffnJUwdGg87gBqzqaf2IBIONwPLeIu+W4BWI1tPCi4FAra0xP4 HtWFZZd9jkNLl3VzuRHCZZRn9q9UqtF+2NYeiBZixhV1elzHEeetPBUYkJCMQ84tYWKJ 9OiC5MoZx9txsTajfAkyFIj/QsOSawo4iGAvQTbXIEWoVxf5DZ3MlNryozM/wHIpN2q4 44xw== X-Forwarded-Encrypted: i=1; AJvYcCUj/Urt/Y2S+VIA2xKh36ea+Tvi2FtPOXlJq4W9mez8Eo267OYVKnDLPOASGEZof7sGOPPouNLyHIWCV3H+lXWhjK+uOrN1IExOjabrfYwA6i/XB97WeoN9/ESE1I3PVK90O3R9CU4xXyuLjBL421eS1+HrvcuQLV43HOppLnDiYuAdjKbpeQpgxK7qE4DUvDEU8zAfwjzBEjakihpPEjLeMA== X-Gm-Message-State: AOJu0Yz8Cxyu4wHL3MUxrP7wWTl/h6x/oADq8zzKePIgMgaHNEAoPIw3 CWT2HT9OE0AguaUiA6MRrmIiNvRVFDJ16Xvml+mpEaRzOlxJcvpt X-Google-Smtp-Source: AGHT+IG12o+DDxSng9qqTCcj3SZsCQqnBjgOGSw2xrsJ9Pal5e9/kUrGXQ9++z6UsWm9oV1Si1fJaw== X-Received: by 2002:a05:622a:1f05:b0:447:e1a4:6c9e with SMTP id d75a77b69052e-4535ba8c5e8mr8947451cf.16.1723590057226; Tue, 13 Aug 2024 16:00:57 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-4531c1dc4bdsm35969621cf.51.2024.08.13.16.00.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Aug 2024 16:00:56 -0700 (PDT) From: Richard Acayan To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Richard Acayan Subject: [PATCH v2 5/5] arm64: dts: qcom: sdm670: add camss and cci Date: Tue, 13 Aug 2024 19:00:44 -0400 Message-ID: <20240813230037.84004-13-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240813230037.84004-8-mailingradian@gmail.com> References: <20240813230037.84004-8-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the camera subsystem and CCI used to interface with cameras on the Snapdragon 670. Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 193 +++++++++++++++++++++++++++ 1 file changed, 193 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index ba93cef33dbb..63a956e0f55f 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -6,6 +6,7 @@ * Copyright (c) 2022, Richard Acayan. All rights reserved. */ +#include #include #include #include @@ -1168,6 +1169,34 @@ tlmm: pinctrl@3400000 { gpio-ranges = <&tlmm 0 0 151>; wakeup-parent = <&pdc>; + cci0_default: cci0-default-state { + pins = "gpio17", "gpio18"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci0_sleep: cci0-sleep-state { + pins = "gpio17", "gpio18"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci1_default: cci1-default-state { + pins = "gpio19", "gpio20"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci1_sleep: cci1-sleep-state { + pins = "gpio19", "gpio20"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + qup_i2c0_default: qup-i2c0-default-state { pins = "gpio0", "gpio1"; function = "qup0"; @@ -1400,6 +1429,170 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; + cci: cci@ac4a000 { + compatible = "qcom,sdm670-cci", "qcom,msm8996-cci"; + #address-cells = <1>; + #size-cells = <0>; + + reg = <0 0x0ac4a000 0 0x4000>; + interrupts = ; + power-domains = <&camcc TITAN_TOP_GDSC>; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_CLK>, + <&camcc CAM_CC_CCI_CLK_SRC>; + clock-names = "camnoc_axi", + "soc_ahb", + "slow_ahb_src", + "cpas_ahb", + "cci", + "cci_src"; + + assigned-clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CCI_CLK>; + assigned-clock-rates = <80000000>, <37500000>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cci0_default &cci1_default>; + pinctrl-1 = <&cci0_sleep &cci1_sleep>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + camss: camera-controller@ac65000 { + compatible = "qcom,sdm670-camss"; + reg = <0 0x0ac65000 0 0x1000>, + <0 0x0ac66000 0 0x1000>, + <0 0x0ac67000 0 0x1000>, + <0 0x0acaf000 0 0x4000>, + <0 0x0acb3000 0 0x1000>, + <0 0x0acb6000 0 0x4000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acc4000 0 0x4000>, + <0 0x0acc8000 0 0x1000>; + reg-names = "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "csid0", + "vfe1", + "csid1", + "vfe_lite", + "csid2"; + + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0_axi", + "vfe0", + "vfe0_cphy_rx", + "vfe1_axi", + "vfe1", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + iommus = <&apps_smmu 0x808 0x0>, + <&apps_smmu 0x810 0x8>, + <&apps_smmu 0xc08 0x0>, + <&apps_smmu 0xc10 0x8>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + camss_port0: port@0 { + reg = <0>; + }; + + camss_port1: port@1 { + reg = <1>; + }; + + camss_port2: port@2 { + reg = <2>; + }; + }; + }; + camcc: clock-controller@ad00000 { compatible = "qcom,sdm845-camcc"; reg = <0 0x0ad00000 0 0x10000>;