From patchwork Wed Aug 14 07:54:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13762994 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8263713AA3F for ; Wed, 14 Aug 2024 08:02:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622556; cv=none; b=IQ+F5l1ejUo7NLwsN/UCNJhhxNLJYdeeKyl2JBeWWXTKEZRBsw/uXA33Jbp7+AMRLNNF0vXnBTSkc8n74YLKB0Cngq/h2plkzy2iTLHbe7nDFRf3lj+RhckaVb07F+AhnvnL+SVGpmCSqGRjPBs5kmb2TfVlvWSUq+RpOvW7X60= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622556; c=relaxed/simple; bh=95lVEX5CsBG7kTAIi2nQlw8g78ZvNp99dsAYOY0HpDo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Z1ZRhKc/uidw8Ti5qyu7EUuXDSiw11j41qtw0Lman4ltx+UZYrchEiALXh3K16X1sdhwTL5NIp2+HelQnfk2MoQHPSglvZgulI1pDTHzlzq2ALyZFJc8Ig4Y1EyGmJF92aGODoDhsSWrQyZv7N7l07eL7DsbDDgFicxcPO6sb4M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Tj5TCMNV; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Tj5TCMNV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723622555; x=1755158555; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=95lVEX5CsBG7kTAIi2nQlw8g78ZvNp99dsAYOY0HpDo=; b=Tj5TCMNV2lRVL+uJB1LpS6aiYZeG4VXLTAmgv+Lpv56+6tcXSvwwJMby 5t+8/6TwCwqSM4Q1jF0+4CAdtxSXXB23JlQwSCSNjfSCWcRG3j0fTWf1+ S2gmWrQWK7uFpx0xwigACKVYXlTsBrurERGnUg0AXegklHOLQo3m7hCrB ifCwDoyaDgLMGpH5Nt1XRgj4kwqPvYvlKEb+acvF9fLKn1vZULu8mKWrt 5wnLKr6xVgnJcdkwruO2WoR03ACjn5IAzvyFw62a9td0QZZKd3TX7fwdw B6146ASVYqrHyxhuaPCHaNv3TMlP8aEu8591Ihl6/QkvAuT/vexINIZ2n Q==; X-CSE-ConnectionGUID: N6nVcZn1RQGB4sxLA2Z+tg== X-CSE-MsgGUID: lixag4HpSgGuktnzDnreDA== X-IronPort-AV: E=McAfee;i="6700,10204,11163"; a="25584458" X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="25584458" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2024 01:02:35 -0700 X-CSE-ConnectionGUID: 8wOW06pLTcCnYg13vPkjNw== X-CSE-MsgGUID: NbBLo//tQNKuSM0CFGdwiA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="59048943" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa010.fm.intel.com with ESMTP; 14 Aug 2024 01:02:32 -0700 From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com Subject: [PATCH 1/9] i386/cpu: Don't construct a all-zero entry for CPUID[0xD 0x3f] Date: Wed, 14 Aug 2024 03:54:23 -0400 Message-Id: <20240814075431.339209-2-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240814075431.339209-1-xiaoyao.li@intel.com> References: <20240814075431.339209-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Currently, QEMU always constructs a all-zero CPUID entry for CPUID[0xD 0x3f]. It's meaningless to construct such a leaf as the end of leaf 0xD. Rework the logic of how subleaves of 0xD are constructed to get rid of such all-zero value of subleaf 0x3f. Signed-off-by: Xiaoyao Li --- target/i386/kvm/kvm.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 31f149c9902c..c168ff5691df 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -1844,10 +1844,6 @@ static uint32_t kvm_x86_build_cpuid(CPUX86State *env, case 0xb: case 0xd: for (j = 0; ; j++) { - if (i == 0xd && j == 64) { - break; - } - c->function = i; c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; c->index = j; @@ -1863,7 +1859,12 @@ static uint32_t kvm_x86_build_cpuid(CPUX86State *env, break; } if (i == 0xd && c->eax == 0) { - continue; + if (j < 63) { + continue; + } else { + cpuid_i--; + break; + } } if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { goto full; From patchwork Wed Aug 14 07:54:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13762995 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6F7977F11 for ; Wed, 14 Aug 2024 08:02:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622557; cv=none; b=PSa9N2fEcKUhhpGVHdSqW+B38LMp/E61jRhHOZOq0X4WNKLqdk7I8VHiZQ1FQ76zX0D5CuLI1kXrVPqn1C/akoQxyWvC7QXKM+mZynf1mPCecPxIoE08qK7m9IdNXlRPrv0pEZOnmHa3+LQXHedNTZ4/cMmfE5yRxOy+9aV3ybs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622557; c=relaxed/simple; bh=Cg5NURAi8EL/prAcQEbdCLOiFO5T+SW5x3k5dhQ2JYo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MZ2CY3FjhnmeVP/HU7RH96B06djXE39McOVXYVC8oDiRx8i2+ehSYxQ9JLuUb+V+7nHSOdFzsT/Z1KzOgnr6RvBTet0ZB2+IgGjQfhl0j95MukylVvOgo6F283dpFIP4qgcCcW6tCQrwIzORcCdLdCKDdELZAd7BphRY5HSOSZQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=S1zkU7wU; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="S1zkU7wU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723622557; x=1755158557; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Cg5NURAi8EL/prAcQEbdCLOiFO5T+SW5x3k5dhQ2JYo=; b=S1zkU7wUYI3ioMJL7ZrgfUIVd17WEFG2SnY995nbZ6GKhu7Ic+MfaXtY c8bwihJqV4KgqZHzrFOYkn6lCiVwH9h1SrFK3NgP0AtaEpY2OS/qqp67D puUhzCDmkO0ysZWhgH251M8Mwb+G80AqEiDQ7Dz8nFhQyEzmZYzJGFW+F aC45KU+qI1etJH5Qb1E8jPqumlqzLTsJ/7UmCdelRPbTc43pLXt7BwDBE CKwOOiF1RFGb1HkjqQ1fMqSZ45xh01DYPK6Utltyhr4EQaCiPiwMBGSIK aLJsXZU1temUqLVZjQvUj2oD6Id5OLnwvdhAqnA8GleNN4OB4hBzHYvKq g==; X-CSE-ConnectionGUID: 6x6qhaEvRuKrCTVVX66xug== X-CSE-MsgGUID: KoOMNPR4RTiGGtxzKUH/CA== X-IronPort-AV: E=McAfee;i="6700,10204,11163"; a="25584470" X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="25584470" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2024 01:02:36 -0700 X-CSE-ConnectionGUID: MkQ/j6iMStqhvnomGk60Ew== X-CSE-MsgGUID: m4F72zKTRqiPog9YBMx+XQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="59048946" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa010.fm.intel.com with ESMTP; 14 Aug 2024 01:02:34 -0700 From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com Subject: [PATCH 2/9] i386/cpu: Enable fdp-excptn-only and zero-fcs-fds Date: Wed, 14 Aug 2024 03:54:24 -0400 Message-Id: <20240814075431.339209-3-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240814075431.339209-1-xiaoyao.li@intel.com> References: <20240814075431.339209-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 - CPUID.(EAX=07H,ECX=0H):EBX[bit 6]: x87 FPU Data Pointer updated only on x87 exceptions if 1. - CPUID.(EAX=07H,ECX=0H):EBX[bit 13]: Deprecates FPU CS and FPU DS values if 1. i.e., X87 FCS and FDS are always zero. Define names for them so that they can be exposed to guest with -cpu host. Also define the bit field MACROs so that named cpu models can add it as well in the future. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 4 ++-- target/i386/cpu.h | 4 ++++ 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 85ef7452c04e..e60d9dd58b60 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1054,9 +1054,9 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { .type = CPUID_FEATURE_WORD, .feat_names = { "fsgsbase", "tsc-adjust", "sgx", "bmi1", - "hle", "avx2", NULL, "smep", + "hle", "avx2", "fdp-excptn-only", "smep", "bmi2", "erms", "invpcid", "rtm", - NULL, NULL, "mpx", NULL, + NULL, "zero-fcs-fds", "mpx", NULL, "avx512f", "avx512dq", "rdseed", "adx", "smap", "avx512ifma", "pcommit", "clflushopt", "clwb", "intel-pt", "avx512pf", "avx512er", diff --git a/target/i386/cpu.h b/target/i386/cpu.h index c6cc035df3d8..542512f65dec 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -826,6 +826,8 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w); #define CPUID_7_0_EBX_HLE (1U << 4) /* Intel Advanced Vector Extensions 2 */ #define CPUID_7_0_EBX_AVX2 (1U << 5) +/* FPU data pointer updated only on x87 exceptions */ +#define CPUID_7_0_EBX_FDP_EXCPTN_ONLY (1u << 6) /* Supervisor-mode Execution Prevention */ #define CPUID_7_0_EBX_SMEP (1U << 7) /* 2nd Group of Advanced Bit Manipulation Extensions */ @@ -836,6 +838,8 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w); #define CPUID_7_0_EBX_INVPCID (1U << 10) /* Restricted Transactional Memory */ #define CPUID_7_0_EBX_RTM (1U << 11) +/* Zero out FPU CS and FPU DS */ +#define CPUID_7_0_EBX_ZERO_FCS_FDS (1U << 13) /* Memory Protection Extension */ #define CPUID_7_0_EBX_MPX (1U << 14) /* AVX-512 Foundation */ From patchwork Wed Aug 14 07:54:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13762996 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0BE313D529 for ; Wed, 14 Aug 2024 08:02:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622559; cv=none; b=cwW+vXjxOFUZiaZjfgV2A+RWUW9VjUxOLXNoGcP6pGNEL2TXd48FjJLB8WAhQXkTmV86te8QhTQdBiIq+PkqkifkF9zKhYovTJTU+Tz1onAilNfPIRxWqXxG9/YixfFJogrSxl3Ttoj3rJK6W1051U8O7SH0qOG91yz/bMRGCoU= ARC-Message-Signature: i=1; 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d="scan'208";a="59048949" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa010.fm.intel.com with ESMTP; 14 Aug 2024 01:02:35 -0700 From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com Subject: [PATCH 3/9] i386/cpu: Add support for bits in CPUID.7_2.EDX Date: Wed, 14 Aug 2024 03:54:25 -0400 Message-Id: <20240814075431.339209-4-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240814075431.339209-1-xiaoyao.li@intel.com> References: <20240814075431.339209-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 KVM started to report the support of bit 0-5 since commit eefe5e668209 ("Advertise CPUID.(EAX=7,ECX=2):EDX[5:0] to userspace") Allow them to be exposed to guest in QEMU. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index e60d9dd58b60..03376ccf3e75 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1148,8 +1148,8 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { [FEAT_7_2_EDX] = { .type = CPUID_FEATURE_WORD, .feat_names = { - NULL, NULL, NULL, NULL, - NULL, "mcdt-no", NULL, NULL, + "psfd", "ipred-ctrl", "rrsba-ctrl", "ddpd-u", + "bhi-ctrl", "mcdt-no", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, From patchwork Wed Aug 14 07:54:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13762997 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C369113D606 for ; Wed, 14 Aug 2024 08:02:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622560; cv=none; b=LJdeuLufljIvdPc4ayXTemXU+qlT7ELent+yFqlGKj/gTzTZnL8LeyqVDwTmhpkOY3JpWzqusNZ4P8Z0Ijj7xfA0QfT+Cu7Fym7U6/beneV51TuHx1vGtquizih57MXtz5nuEO3ebKYaJeKGdl7YYyKUFEoij1N9FG5LxzXeETM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622560; c=relaxed/simple; bh=X3na6+L70Cfx64EUlxwZzmPxVDrsGV+622+OsmsswRI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ZwXt87a3y2+FYon6YkpbbHXFtpqDMInMvu4N1JjmjQkyAtFVmTAvvQBtu24m7qt28SUbdUb9yZBHVriP2IQWYZ/6t1tKNT9sjlXeevRKuSwqJxdnzJ8qdd8Z0Pq4gYkRGuBRtl9kNq0+Qj/PqGR2gUOOhmUjHQiqST6AkqfjtX4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=KdMZ9jrX; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="KdMZ9jrX" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723622559; x=1755158559; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=X3na6+L70Cfx64EUlxwZzmPxVDrsGV+622+OsmsswRI=; b=KdMZ9jrXjAZ8jQ6xXhSI2g8acyE7hl1AXZX8sZbEyT4bvyj2DF+4vWOx UicynWVgnYOOPKs7WvoL7Wjk8XBRjizenOjVddIgDBUhnka8bZDmi9oB6 6v8vAQyWMmJ6mOH7Sj+kD7k7LS/yIsotozjNODf7EK+AH6cuCrzVaYsVQ CFnK8n9laD1dflhDMESQSt2mWs2pOrx56QwKkLNW110uqR7pGNUIs8nJU kwVwAO7uS5fCYKlf8FgnugMxKb4bAd6RCUrWzA1X3v74Ur7Mu08eGlhV7 LQhsinEsL4r8R4hd6PCVJ8TKK1wj+uRjXbDuiTGhAF/s1UI1O7lwCO3qL w==; X-CSE-ConnectionGUID: 8lR253FMQd+Q77ixnyq/Wg== X-CSE-MsgGUID: JQzIiad5QMezLGXCcHF+kQ== X-IronPort-AV: E=McAfee;i="6700,10204,11163"; a="25584480" X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="25584480" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2024 01:02:39 -0700 X-CSE-ConnectionGUID: BUEn6TXQQ9G9BU38uK4/2g== X-CSE-MsgGUID: sSJofb4dTDqskubB5/BOIg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="59048952" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa010.fm.intel.com with ESMTP; 14 Aug 2024 01:02:37 -0700 From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com Subject: [PATCH 4/9] i386/cpu: Construct valid CPUID leaf 5 iff CPUID_EXT_MONITOR Date: Wed, 14 Aug 2024 03:54:26 -0400 Message-Id: <20240814075431.339209-5-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240814075431.339209-1-xiaoyao.li@intel.com> References: <20240814075431.339209-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 When CPUID_EXT_MONITOR is not set, it means no support of MONITOR/MWAIT leaf, i.e., CPUID leaf 5. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 03376ccf3e75..5bee84333089 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6553,10 +6553,14 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; case 5: /* MONITOR/MWAIT Leaf */ - *eax = cpu->mwait.eax; /* Smallest monitor-line size in bytes */ - *ebx = cpu->mwait.ebx; /* Largest monitor-line size in bytes */ - *ecx = cpu->mwait.ecx; /* flags */ - *edx = cpu->mwait.edx; /* mwait substates */ + if (env->features[FEAT_1_ECX] & CPUID_EXT_MONITOR) { + *eax = cpu->mwait.eax; /* Smallest monitor-line size in bytes */ + *ebx = cpu->mwait.ebx; /* Largest monitor-line size in bytes */ + *ecx = cpu->mwait.ecx; /* flags */ + *edx = cpu->mwait.edx; /* mwait substates */ + } else { + *eax = *ebx = *ecx = *edx = 0; + } break; case 6: /* Thermal and Power Leaf */ From patchwork Wed Aug 14 07:54:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13762998 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 45FF813DDBD for ; Wed, 14 Aug 2024 08:02:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622561; cv=none; b=rMkyRKyZUZDKVQ+lU2tK43JvNlIvji5C3bxyD41p6FAKlKn0fgUHS0ya/JDZZwkUTr0YlH7fIBRaxoxPiOsonAOskgHxuMhQK6iHR+jAHVTvt1rR016Kl/LawWmY4Jcl/taKTEkjjMq8ETQIXlgN2GpMkNfqMdeHW/4AB8Hadhg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622561; c=relaxed/simple; bh=l9ibDxi4pjx2BEry03rv9wc5np14WZq/dpLp+/IOpk4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ieliIbwngif0479/rO+eH2DcxcEWwTB7JyPQnYwOX+ypsZXOnpuKL1GulZBHxwW64y6Ex32KU7VwBaikjutGJy84FlGv2cevt0zAkf3PRwIpzwqf9hW1z5zk8qgl1zq/gznX8aA8Vm5A/+SL3ROj4FsNN+iZpHkpctENtTVcyBs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=GHk9qu2n; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="GHk9qu2n" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723622561; x=1755158561; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=l9ibDxi4pjx2BEry03rv9wc5np14WZq/dpLp+/IOpk4=; b=GHk9qu2n2Rshd+ymqXaHf5XECD6ASMUJj5MiQrArUrYanrjIVO1nskxv duwKDm5ogDzQ5JJqgycjjaFuAyExRnhA1BKkOZBn0Q1pmcKBUAvqaVsGz EVflQfORHFIm1Rzs4NEsos796khYEcPtw8AEuBymOfwLayts3xVl9LTYZ 8VP1R2n9NjOXGYX6bNzazFiDj6VfQYwEuUPWi5iYypg78yAAZ0eT1bG/M rSvNDzZwk9AsxdAEJLg7i7TSGYKiRTPyPUihDpPwiW9izznTEDhVBBMXJ mcV6bV61EcdpPXC94oWf8EcZhn0BNJpCngPu7mDYyd7etCo6K+/Q2fA5T Q==; X-CSE-ConnectionGUID: 3v73tpX0QgmmfovHBY6zOQ== X-CSE-MsgGUID: +E6r+WDfS7+po20l7C+RoA== X-IronPort-AV: E=McAfee;i="6700,10204,11163"; a="25584483" X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="25584483" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2024 01:02:41 -0700 X-CSE-ConnectionGUID: w+NWm/qsQEObMRIL6k8yPQ== X-CSE-MsgGUID: SZlHgF/pR8av3GAvF8+zDA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="59048955" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa010.fm.intel.com with ESMTP; 14 Aug 2024 01:02:38 -0700 From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com Subject: [PATCH 5/9] i386/cpu: Construct CPUID 2 as stateful iff times > 1 Date: Wed, 14 Aug 2024 03:54:27 -0400 Message-Id: <20240814075431.339209-6-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240814075431.339209-1-xiaoyao.li@intel.com> References: <20240814075431.339209-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 When times == 1, the CPUID leaf 2 is not stateful. Signed-off-by: Xiaoyao Li --- target/i386/kvm/kvm.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index c168ff5691df..6618259f265c 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -1818,10 +1818,12 @@ static uint32_t kvm_x86_build_cpuid(CPUX86State *env, int times; c->function = i; - c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC | - KVM_CPUID_FLAG_STATE_READ_NEXT; cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); times = c->eax & 0xff; + if (times > 1) { + c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC | + KVM_CPUID_FLAG_STATE_READ_NEXT; + } for (j = 1; j < times; ++j) { if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { From patchwork Wed Aug 14 07:54:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13762999 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C25C140397 for ; Wed, 14 Aug 2024 08:02:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622563; cv=none; b=iJM4JcQ7lYXP+i+gR9jnBb8m6LcEJn+4hyG0U3IioA02TYh85zSJy8mtsjc89hCkj6SN8EdhZfDsWgTMuxytQItPXWchBwp5Avuvg6FtPuBhBmO4SEqn0/WcgZse2d64SQWxnMTws5tI1wxllC2WewHRzpUO3jgLNtJrTZshHk4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622563; c=relaxed/simple; bh=Y3Zdg2gkuvf92qw6n0gEjAnA5h7Gl2EFlz23K8pA8v4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QS3QP2v/YIejyYfMThwPvFZK7oahYB+higaaGfZ6QYRK6Xd0mBZiMQ4khMmdl64pFcLjNW3DmTSzMFhGyeViJi76ZQpq6g8HgapoEEWBeu8o1nqC+mh6YgZ9UClHEY+jxmA9mnfyt0NsvOMIiHrynAGtz18jyxovpREqa9rm+KI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ML6dKqlg; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ML6dKqlg" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723622562; x=1755158562; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Y3Zdg2gkuvf92qw6n0gEjAnA5h7Gl2EFlz23K8pA8v4=; b=ML6dKqlgAnwtJo011D8+iOLQBEGuuOOzjkg+fUn04KQMqxejMdH/F9AE 3WskCeHkpj9/e9s1q3Z0o7ENe/+UykdKLaBU/TeqPLtWNPHbiQTBR2C9G rc1GN7QFgp8X4Ldrh+1a0Q1fMuTKsPaTjmJUw2oVRby/F54RbFu5JOQjt uEY2gBEHVpXwPIXg4uTa0vMg0/mAI16OTYtohRkBkajW8VsauubFq/8Uf q+CZqyBEMi02vDY0gDvNizriWo/OQWdkpJNxYO7+oXQlyauokmqBv7j+L ZcmnoZG0jjua6PsWjmQsye3n7+w5HJZHfIAftPRlgdsMCywnAAwQaZMWr w==; X-CSE-ConnectionGUID: lHRnZs4aRf+eATgxcPMcKA== X-CSE-MsgGUID: wZyd8JrnTmeCOe1nJuPAbQ== X-IronPort-AV: E=McAfee;i="6700,10204,11163"; a="25584492" X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="25584492" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2024 01:02:41 -0700 X-CSE-ConnectionGUID: sbz+iBpqTWSIEzia/8Shwg== X-CSE-MsgGUID: X6d4oiFnSamnUzsFLavRKA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="59048958" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa010.fm.intel.com with ESMTP; 14 Aug 2024 01:02:40 -0700 From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com Subject: [PATCH 6/9] i386/cpu: Set topology info in 0x80000008.ECX only for AMD CPUs Date: Wed, 14 Aug 2024 03:54:28 -0400 Message-Id: <20240814075431.339209-7-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240814075431.339209-1-xiaoyao.li@intel.com> References: <20240814075431.339209-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The whole ECX of CPUID 0x80000008 is reserved for Intel. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 5bee84333089..7a4835289760 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6944,7 +6944,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, *eax |= (cpu->guest_phys_bits << 16); } *ebx = env->features[FEAT_8000_0008_EBX]; - if (threads_per_pkg > 1) { + if (threads_per_pkg > 1 && IS_AMD_CPU(env)) { /* * Bits 15:12 is "The number of bits in the initial * Core::X86::Apic::ApicId[ApicId] value that indicate From patchwork Wed Aug 14 07:54:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13763000 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA5AF13CABC for ; Wed, 14 Aug 2024 08:02:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622565; cv=none; b=kI/AaSiKQPKxWBTyudLxKh6zsDQcx1fsQ77tWKTo7uS6XaaKW5uiHnf9YqGIvaPpO1COV71xqjpL/M4ACrEKRS/S1yrC4NWJt//vufjlRQ8TDnM01fE4ThBnvpqjq4Nzc0iK/dm80ta7LW6UsU4O0zZfL4Ij3TawnQ7DkVBnXq4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622565; c=relaxed/simple; bh=+1CShJKpDmVBjOQNUIrC3GWrHShE0+pF4rvqTJMJim8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qokV/YbuJ5ZJ1RZ8bJsVwy3ycdKysJx4lqp4g4ID8mbPoXbhBzm4My9/T8OIDan8w/qz0s9Ocbh3MmsAxo/pT33oKTu6WhHrHk6YztaRBy/KIce5C8J+czksogGwiJrs45+rodIgEpmuYsqJq+ifuxp+DUqxGCe2ttfhouijk08= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=iuTo6xYl; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="iuTo6xYl" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723622563; x=1755158563; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+1CShJKpDmVBjOQNUIrC3GWrHShE0+pF4rvqTJMJim8=; b=iuTo6xYlp9NBtFCF9OsQTeUU0fKrxgamH7jv0WfEcc56kRuEardkced9 QWLjHOXyyLZuthQeRc5+bvfmI0SnkS1T2D/dvxTgkAG7lf9gahIzKdviF S24KVLVwThvcUDsVHDjr7H1v2+u7eOCIFFAAUc0VFVcgHn032IhMS0KtR TUUvr+HIkGuk231llq3f7V9QF8IvMFc5u4qrA3sdryAJg21c35pqVGwLD 1PFjKrUR3pcz+whoP3y+SZCQfWQohoJ0AuV4EfwH2jzu/5Sas/4SOQe+y 2TquhUMRUnSAZRFZZ5G5xrHWK6y455j9kktWSkQ/pyO/3QSZq0GId6Nkl Q==; X-CSE-ConnectionGUID: F7hAn5w8QjeTQgeepYDjnQ== X-CSE-MsgGUID: HQFXyfAjRmG6XliA4tZNQQ== X-IronPort-AV: E=McAfee;i="6700,10204,11163"; a="25584502" X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="25584502" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2024 01:02:43 -0700 X-CSE-ConnectionGUID: KEfZ5W48QYaoJauvCfm6gQ== X-CSE-MsgGUID: 0Haszx6eSjqibH/f847CBQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="59048963" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa010.fm.intel.com with ESMTP; 14 Aug 2024 01:02:42 -0700 From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com Subject: [PATCH 7/9] i386/cpu: Suppress CPUID values not defined by Intel Date: Wed, 14 Aug 2024 03:54:29 -0400 Message-Id: <20240814075431.339209-8-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240814075431.339209-1-xiaoyao.li@intel.com> References: <20240814075431.339209-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some CPUID leaves are defined by AMD while it also gets exposed to Intel VMs by QEMU. It causes no issue with current VMs however it will not work with Intel TDX because these CPUID leaves are enforced by TDX module as reserved. Stop to advertise them to Intel VMs when vendor_cpuid_only is true. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 7a4835289760..fed805e04aeb 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6863,12 +6863,16 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; case 0x80000000: *eax = env->cpuid_xlevel; - *ebx = env->cpuid_vendor1; - *edx = env->cpuid_vendor2; - *ecx = env->cpuid_vendor3; + if (cpu->vendor_cpuid_only && IS_INTEL_CPU(env)) { + *ebx = *ecx = *edx = 0; + } else { + *ebx = env->cpuid_vendor1; + *edx = env->cpuid_vendor2; + *ecx = env->cpuid_vendor3; + } break; case 0x80000001: - *eax = env->cpuid_version; + *eax = (cpu->vendor_cpuid_only && IS_INTEL_CPU(env)) ? 0 : env->cpuid_version; *ebx = 0; *ecx = env->features[FEAT_8000_0001_ECX]; *edx = env->features[FEAT_8000_0001_EDX]; From patchwork Wed Aug 14 07:54:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13763001 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 082DB1422BD for ; Wed, 14 Aug 2024 08:02:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622566; cv=none; b=rr+yAqRxD+HWdD+OtC9XsjUCQFMvnLcYm42JQc3rj/NTKWVXIZO5zxSVoQp41zCXq7GqWdvmL2onNdf+o5tf5im0zeHxVBxUQkMCv7ZIcEl6SHUmok32Ow01bVxF1E1PLT+itdZRBvDk7yyidVwAz1Rp2CSf7+5vhRABYMv+ATc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622566; c=relaxed/simple; bh=YQXU1V8cjOIRfFnAkE3ZUsJxcIpDFj6x85Y7iJEOblI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=GiotfhNJ/03BWUaTCJcUL6KM84NBR5DXivVSrk++8NpbsG2ICyEYUtVPKBy3xlblY5D41/Sxcx6JuaPLqg5EuOnuOKgYxiXwaqvBOKxAFBzTi2nTgVHoMTi5tHDppdsZGUlu2PJx8JUkaxZz7hC/XHVTWRIUFlEYVed4S0oKyDA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=FAsVuJSU; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="FAsVuJSU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723622565; x=1755158565; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YQXU1V8cjOIRfFnAkE3ZUsJxcIpDFj6x85Y7iJEOblI=; b=FAsVuJSUhjhd/Y9c+6E21bfNvNCvm7l9FUOBRAi5DwYcMMQGJk/KxSqX ljSdzf7CRMWpljpTPUq+mj2804jSYvAYwUPM8fdh/kDHjcD4N8Ct/eani 7qsl9D1DV0b3QKNAepM0TACF7YVzBdXC/XsUeZzLtsRlKH2R+Cq51JKbz 5e6zKIfS/ZIRWoL2hB3irap9QxNQUs+BiYwf76m5Jq2Fe7dMhT30ywQcE 6G568WlLusethbDs0b5SJuUwolgDn6Gb7UyOCStf4AS16m5MgqWaybWgR za1mAScm8TTt9BBxMUJrz2St6JOnIceSRroi6W/kYVB4aVBuH+C3kSvYl A==; X-CSE-ConnectionGUID: T2bXfMHQT7WyOqDSAI17IA== X-CSE-MsgGUID: jKq6PBzPTtyGxU61haXxOQ== X-IronPort-AV: E=McAfee;i="6700,10204,11163"; a="25584508" X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="25584508" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2024 01:02:44 -0700 X-CSE-ConnectionGUID: aHkv1BIkToCVIdaFFa7Yyg== X-CSE-MsgGUID: t1AZl/TdSAq9Ftp1CBFuKg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="59048966" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa010.fm.intel.com with ESMTP; 14 Aug 2024 01:02:43 -0700 From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com Subject: [PATCH 8/9] i386/cpu: Drop AMD alias bits in FEAT_8000_0001_EDX for non-AMD guests Date: Wed, 14 Aug 2024 03:54:30 -0400 Message-Id: <20240814075431.339209-9-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240814075431.339209-1-xiaoyao.li@intel.com> References: <20240814075431.339209-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The AMD alias bits are reserved for Intel. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fed805e04aeb..85ce405ece80 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6118,6 +6118,11 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w) #endif break; + case FEAT_8000_0001_EDX: + if (cpu && !IS_AMD_CPU(&cpu->env)) { + unavail = CPUID_EXT2_AMD_ALIASES; + } + break; default: break; } From patchwork Wed Aug 14 07:54:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13763002 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 89B0C14264C for ; Wed, 14 Aug 2024 08:02:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622568; cv=none; b=JrZ/2+/AdtyiJv4B7YjH1lYFN8n6jTsjr+XPPD3+AMIekwF7Ly68Upe5vr3TYYTVPBDlc6nEVoqRYMQ5/QXN31K/CGkgOOahfkTD5ZZuEs5bf4Cz+jgZr5ZzITgth0Mas5vhN3vaE7lcYUbFAu2ioDo4cJP9V0uDGxwWwbTrtaw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723622568; c=relaxed/simple; bh=CS43UzH48cjlmpX92LFl+4C3u5GSWZlxQ4JoVqNlFE8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=JPRHBQXM0Lgft/pKNAV/atuWGAbAX/mXJgrL0u45ZaKl2TIl6wFrav5vxpLmnJZCYm76z5cIs4f78DtC9QWSEWyZQ9cdoIbuN1IECMXSO4wkXH5xCwthhd81iRvIbzPirBGztPPGXJi3Oze7rmbjmJt9073NRAhmxM13aJUjmFA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=SU+m6C4C; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="SU+m6C4C" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723622566; x=1755158566; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CS43UzH48cjlmpX92LFl+4C3u5GSWZlxQ4JoVqNlFE8=; b=SU+m6C4Cqfd59QNVOjJEuNESO1+6REwtZHLd1Mu7EcMsRxCCIHjJn3Au j8/m+u2ieYdjIRxxZygSVh/sBxoYqZl8JL9cB5DT6IHUSew+YpRdBfwlO xZQSvCKVylhIiSrupnJRTOvYrtLRAAn3mWOUutfi2QEvhrrT/0wh+zs97 VZvYHTSobD+OpUL2F0w/UQOngw97XtrPyPJzwl7JGiSlUa9xopuR//6EK fsQZMht+RCsYAlCPM6QVjqtD1FN7LZoociZfB8L1JtekW91B86UTQxG6t 88l+BfjYBKrq+0QVTnaLHKirEFu9gTO99wsOFJ+Zpzekk32V8Vg3CKLGd w==; X-CSE-ConnectionGUID: W4EFHr66TomPPHAv7wRaTQ== X-CSE-MsgGUID: BuJy5qmaRcuqVm9YCMPJfg== X-IronPort-AV: E=McAfee;i="6700,10204,11163"; a="25584512" X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="25584512" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2024 01:02:46 -0700 X-CSE-ConnectionGUID: KgvttIVYRdeLtaOXm/+pdw== X-CSE-MsgGUID: prB1e/MfTna/Sx4+fuK1gg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,288,1716274800"; d="scan'208";a="59048969" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa010.fm.intel.com with ESMTP; 14 Aug 2024 01:02:45 -0700 From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com Subject: [PATCH 9/9] i386/cpu: Make invtsc migratable when user sets tsc-khz explicitly Date: Wed, 14 Aug 2024 03:54:31 -0400 Message-Id: <20240814075431.339209-10-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240814075431.339209-1-xiaoyao.li@intel.com> References: <20240814075431.339209-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 When user sets tsc-frequency explicitly, the invtsc feature is actually migratable because the tsc-frequency is supposed to be fixed during the migration. See commit d99569d9d856 ("kvm: Allow invtsc migration if tsc-khz is set explicitly") for referrence. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 85ce405ece80..fb3519fc6836 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1865,9 +1865,10 @@ static inline uint64_t x86_cpu_xsave_xss_components(X86CPU *cpu) * Returns the set of feature flags that are supported and migratable by * QEMU, for a given FeatureWord. */ -static uint64_t x86_cpu_get_migratable_flags(FeatureWord w) +static uint64_t x86_cpu_get_migratable_flags(X86CPU *cpu, FeatureWord w) { FeatureWordInfo *wi = &feature_word_info[w]; + CPUX86State *env = &cpu->env; uint64_t r = 0; int i; @@ -1881,6 +1882,12 @@ static uint64_t x86_cpu_get_migratable_flags(FeatureWord w) r |= f; } } + + /* when tsc-khz is set explicitly, invtsc is migratable */ + if ((w == FEAT_8000_0007_EDX) && env->user_tsc_khz) { + r |= CPUID_APM_INVTSC; + } + return r; } @@ -6129,7 +6136,7 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w) r &= ~unavail; if (cpu && cpu->migratable) { - r &= x86_cpu_get_migratable_flags(w); + r &= x86_cpu_get_migratable_flags(cpu, w); } return r; }