From patchwork Tue Mar 5 21:42:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 10840141 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0FE751575 for ; Tue, 5 Mar 2019 21:42:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EE58E2D022 for ; Tue, 5 Mar 2019 21:42:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E300C2D041; Tue, 5 Mar 2019 21:42:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 681132D03F for ; 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bh=XURuyW4/0JZAXwwF07kDW5Wg7eJQuF769RkLAzybchM=; b=DK2iHlj5aPCDVOF5WN7+EaDCqSDkLo/FubxcME9AZ1wUE/383MDmbL3TUxJkxnIceD HquNDjwQ/Ula42yDstvAm7Gun+EEdsRuAi/R27xkK3fNp7cS7a1HrjFGTZjSZYEFUpx4 y/Ot5/NFyCDGHYNgQeo8DZ/yXOuVSEJlK7EtWEQ8+R18z2m1qdSEh6L7hREE86uJISoc lxJN2sRNB4l8S3dAde84eJk5RW1JYN2xKtEeEz0LCJZ1CokJqIFGhT67q83X76ilz3ac szKj+afq3dn8/CjMM/1+/hJ2WuyUm/ISdWp3I/0aRqAxzzuRYkZVegASxMdzgUd67vew Fatw== X-Gm-Message-State: APjAAAViOIAah96zLFdsHphIfF4u+9H0HBMzfbeFYhWyM/T12TTjCfAO N2uMrAdK/KK2bn+IXpMifL5j7A== X-Google-Smtp-Source: APXvYqxiV2wn4mNG1Gv1QwYNeAVlBwkmgQCX1+ULbxfQlVnJ2vzi3HiSxNpfyxQP0bPINpRl+fikMw== X-Received: by 2002:a62:f51d:: with SMTP id n29mr3858271pfh.21.1551822135966; Tue, 05 Mar 2019 13:42:15 -0800 (PST) Received: from localhost ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id d5sm13197208pfo.83.2019.03.05.13.42.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Mar 2019 13:42:15 -0800 (PST) Date: Tue, 05 Mar 2019 13:42:15 -0800 (PST) X-Google-Original-Date: Tue, 05 Mar 2019 13:40:41 PST (-0800) Subject: [GIT PULL] RISC-V Patches for the 5.1 Merge Window, Part 1 From: Palmer Dabbelt To: Linus Torvalds , linux-riscv@lists.infradead.org Message-ID: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190305_134217_082544_9CFDFA4F X-CRM114-Status: GOOD ( 19.33 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The following changes since commit 41fb9d54f12b87fb1f670653e95d34668a08e8ee: Revert "RISC-V: Make BSS section as the last section in vmlinux.lds.S" (2019-02-11 15:24:45 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git tags/riscv-for-linus-5.1-mw0 for you to fetch changes up to 13fd5de06514458eb320188b7a815d65696efd99: RISC-V: Fixmap support and MM cleanups (2019-03-04 11:47:04 -0800) ---------------------------------------------------------------- RISC-V Patches for the 5.1 Merge Window, Part 1 This contains the vast majority of the RISC-V patches for this merge window. It includes: * A handful of cleanups to our kernel prints, most of which are things I should have caught the first time. * We now provide an HWCAP that contains the ISA extensions that all enabled processors support, as supposed to just looking at the first enabled processor. * We no longer spin forever waiting for all harts to boot. * A fixmap implementation, which is coupled to some cleanups in our MM code. The only outstanding patches I know of right now are Vincent Chen's patches to fix c.ebreak handling in the kernel, the v2 of which was posted this morning. I'd like those in the MW, but I didn't want to hold up everything else. The patch set is based on top of my last fixes submission, but I've tested it with a conflict-free merge from v5.0. I'm doing this rather than my "just go rebase everything" flow due to a discussion with Linus, but if I misunderstood then just let me know and I'll do something else. It's also the first time I've taken a PR into my own tree, so let me know if I screwed that one up. I've used my standard testing flow (QEMU in Fedora), but now that we're starting to get the kernel in better shape I think it's time to impose some more testing here -- specifically I'm going to require that patches boot on the HiFive Unleashed because we're getting to the point where we can actually expect that to work. I haven't done that for this tag, but I'm going to do it for future ones. I know the board is a bit expensive and not everyone has one, but if I've sent you a free one and your patches break the boot then I'm going to yell at you :). If you don't have one then please indicate how you tested in your cover letter, and if you have a board then please add your Tested-by to patches if they work for your testing flow. ---------------------------------------------------------------- Andreas Schwab (1): arch: riscv: fix logic error in parse_dtb Anup Patel (5): RISC-V: Setup init_mm before parse_early_param() RISC-V: Move setup_bootmem() to mm/init.c RISC-V: Move setup_vm() to mm/init.c RISC-V: Implement compile-time fixed mappings RISC-V: Free-up initrd in free_initrd_mem() Atish Patra (6): RISC-V: Do not wait indefinitely in __cpu_up RISC-V: Move cpuid to hartid mapping to SMP. RISC-V: Remove NR_CPUs check during hartid search from DT RISC-V: Allow hartid-to-cpuid function to fail. RISC-V: Compare cpuid with NR_CPUS before mapping. RISC-V: Assign hwcap as per comman capabilities. Christoph Hellwig (1): riscv: remove the HAVE_KPROBES option Johan Hovold (5): riscv: add missing newlines to printk messages riscv: use pr_info and friends riscv: fix riscv_of_processor_hartid() comment riscv: treat cpu devicetree nodes without status as enabled riscv: use for_each_of_cpu_node iterator Palmer Dabbelt (1): RISC-V: Fixmap support and MM cleanups arch/riscv/Kconfig | 6 +- arch/riscv/include/asm/fixmap.h | 44 +++++++++++ arch/riscv/include/asm/pgtable.h | 1 + arch/riscv/include/asm/smp.h | 18 +++-- arch/riscv/kernel/cpu.c | 30 +++----- arch/riscv/kernel/cpufeature.c | 48 ++++++------ arch/riscv/kernel/ftrace.c | 2 +- arch/riscv/kernel/setup.c | 141 ++--------------------------------- arch/riscv/kernel/smp.c | 10 ++- arch/riscv/kernel/smpboot.c | 24 ++++-- arch/riscv/mm/init.c | 156 ++++++++++++++++++++++++++++++++++++++- 11 files changed, 287 insertions(+), 193 deletions(-) create mode 100644 arch/riscv/include/asm/fixmap.h