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[121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.09.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:01 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Jessica Clarke Subject: [PATCH v2 01/17] bsd-user: Implement RISC-V CPU initialization and main loop Date: Sat, 17 Aug 2024 03:09:33 +1000 Message-Id: <20240816170949.238511-2-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=itachis6234@gmail.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Added the initial implementation for RISC-V CPU initialization and main loop. This includes setting up the general-purpose registers and program counter based on the provided target architecture definitions. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Jessica Clarke --- bsd-user/riscv/target_arch_cpu.h | 39 ++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 bsd-user/riscv/target_arch_cpu.h diff --git a/bsd-user/riscv/target_arch_cpu.h b/bsd-user/riscv/target_arch_cpu.h new file mode 100644 index 0000000000..28f56560e0 --- /dev/null +++ b/bsd-user/riscv/target_arch_cpu.h @@ -0,0 +1,39 @@ +/* + * RISC-V CPU init and loop + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_CPU_H +#define TARGET_ARCH_CPU_H + +#include "target_arch.h" + +#define TARGET_DEFAULT_CPU_MODEL "max" + +static inline void target_cpu_init(CPURISCVState *env, + struct target_pt_regs *regs) +{ + int i; + + for (i = 0; i < 32; i++) { + env->gpr[i] = regs->regs[i]; + } + + env->pc = regs->sepc; +} + +#endif /* TARGET_ARCH_CPU_H */ From patchwork Fri Aug 16 17:09:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766663 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DCDD5C3DA4A for ; Fri, 16 Aug 2024 17:10:46 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0Su-0004Dy-MJ; Fri, 16 Aug 2024 13:10:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0St-0004DG-Dn for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:15 -0400 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0Sl-0007M1-TT for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:09 -0400 Received: by mail-pj1-x102f.google.com with SMTP id 98e67ed59e1d1-2d3bd8784d3so1629529a91.3 for ; Fri, 16 Aug 2024 10:10:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828205; x=1724433005; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5JX4fMSWYAeIvZxxe4ZWzsUZ5Z4cADcMR98comH+Msg=; b=ZA+pnVRxRzvrVW/stIIWTdxRfj0wZbXxuFKxCnLkI3CjWmKJx9MVD/CxkIMXtQaPSB fXdvq6YhnxxHTiuS/C4ga/IW+WU3+2wBduyAJgdlRxh74T+R/zjWrSWcoaXws4w7sJ+w aRJ2YwSD76BOe13tSRbiy5DMQ6K9NioK3rqTNaFK3veaSdENXBDiqgnsM0+Hi4oNoUtK m38O+M3+yM2RMhKEjPTa5peUtKtsXnpFKfUwnGCIxeuaK5yiRVacl0GZeWqWQxW35mD3 hgbwNyhGw2Y/KvzBreZtxFQB2SCGTPIICCJhKJLXtljzTQ5zzfuQ8FFvWwl6DzBKnL+H LCUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828205; x=1724433005; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5JX4fMSWYAeIvZxxe4ZWzsUZ5Z4cADcMR98comH+Msg=; b=NOd2/W7+Zb6E0IY79VRn7gvF5S+FQ2KPY+t3kVocDPywpbnIgcsLlhCfjcj1WhOL7a GAGNeLDhsWutlSUv2MJhlBmChKrAcORwWN1zW2vi6NPkuVqsB1yt2QhkZwmK92gen6U/ LxC35yy741Yu39j4jbwgduRYm+uu5XLmaztLiwCvUswV0YfkWwucw6mtIsSgPqCruanL eGX88gWv06ky4vCOnWbuBr+wesksveA9NSoMjV96P4xrdEGkpDCs59EkBoDGKHOyytxK kdzD78sdytkjESgM/M968pWT/QnlQ7mpSlgMMDSymrMYEj+lY5ZvUc3eJE1CC8HQIH3d FmXQ== X-Gm-Message-State: AOJu0YypB1njSbl/RfTCJSoanxgHbp2kmKUaKOBnnsxpPKQQINQZL4Us JFzJjOCuohB9oK93CrKrSjojZ9XmlxRISBSxcNleV0jbMK5pPsBklyRQd1FsNVs= X-Google-Smtp-Source: AGHT+IEBzu9hMrO/SZuCyTgRZ+IjMCHP23Ulq8fmEaVfLwqUr1meFQhPEF5536nF8fnPglpHKXzELQ== X-Received: by 2002:a17:90a:8a02:b0:2d3:d0b7:da4 with SMTP id 98e67ed59e1d1-2d40569bc90mr129772a91.19.1723828205026; Fri, 16 Aug 2024 10:10:05 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:04 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Jessica Clarke , Kyle Evans , Richard Henderson Subject: [PATCH v2 02/17] bsd-user: Add RISC-V CPU execution loop and syscall handling Date: Sat, 17 Aug 2024 03:09:34 +1000 Message-Id: <20240816170949.238511-3-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=itachis6234@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Implemented the RISC-V CPU execution loop, including handling various exceptions and system calls. The loop continuously executes CPU instructions,processes exceptions, and handles system calls by invoking FreeBSD syscall handlers. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Jessica Clarke Co-authored-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_cpu.h | 94 ++++++++++++++++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/bsd-user/riscv/target_arch_cpu.h b/bsd-user/riscv/target_arch_cpu.h index 28f56560e0..5b436b2ac9 100644 --- a/bsd-user/riscv/target_arch_cpu.h +++ b/bsd-user/riscv/target_arch_cpu.h @@ -36,4 +36,98 @@ static inline void target_cpu_init(CPURISCVState *env, env->pc = regs->sepc; } +static inline void target_cpu_loop(CPURISCVState *env) +{ + CPUState *cs = env_cpu(env); + int trapnr; + abi_long ret; + unsigned int syscall_num; + int32_t signo, code; + + for (;;) { + cpu_exec_start(cs); + trapnr = cpu_exec(cs); + cpu_exec_end(cs); + process_queued_cpu_work(cs); + + signo = 0; + + switch (trapnr) { + case EXCP_INTERRUPT: + /* just indicate that signals should be handled asap */ + break; + case EXCP_ATOMIC: + cpu_exec_step_atomic(cs); + break; + case RISCV_EXCP_U_ECALL: + syscall_num = env->gpr[xT0]; /* t0 */ + env->pc += TARGET_INSN_SIZE; + /* Compare to cpu_fetch_syscall_args() in riscv/riscv/trap.c */ + if (TARGET_FREEBSD_NR___syscall == syscall_num || + TARGET_FREEBSD_NR_syscall == syscall_num) { + ret = do_freebsd_syscall(env, + env->gpr[xA0], /* a0 */ + env->gpr[xA1], /* a1 */ + env->gpr[xA2], /* a2 */ + env->gpr[xA3], /* a3 */ + env->gpr[xA4], /* a4 */ + env->gpr[xA5], /* a5 */ + env->gpr[xA6], /* a6 */ + env->gpr[xA7], /* a7 */ + 0); + } else { + ret = do_freebsd_syscall(env, + syscall_num, + env->gpr[xA0], /* a0 */ + env->gpr[xA1], /* a1 */ + env->gpr[xA2], /* a2 */ + env->gpr[xA3], /* a3 */ + env->gpr[xA4], /* a4 */ + env->gpr[xA5], /* a5 */ + env->gpr[xA6], /* a6 */ + env->gpr[xA7] /* a7 */ + ); + } + + /* + * Compare to cpu_set_syscall_retval() in + * riscv/riscv/vm_machdep.c + */ + if (ret >= 0) { + env->gpr[xA0] = ret; /* a0 */ + env->gpr[xT0] = 0; /* t0 */ + } else if (ret == -TARGET_ERESTART) { + env->pc -= TARGET_INSN_SIZE; + } else if (ret != -TARGET_EJUSTRETURN) { + env->gpr[xA0] = -ret; /* a0 */ + env->gpr[xT0] = 1; /* t0 */ + } + break; + case RISCV_EXCP_ILLEGAL_INST: + signo = TARGET_SIGILL; + code = TARGET_ILL_ILLOPC; + break; + case RISCV_EXCP_BREAKPOINT: + signo = TARGET_SIGTRAP; + code = TARGET_TRAP_BRKPT; + break; + case EXCP_DEBUG: + signo = TARGET_SIGTRAP; + code = TARGET_TRAP_BRKPT; + break; + default: + fprintf(stderr, "qemu: unhandled CPU exception " + "0x%x - aborting\n", trapnr); + cpu_dump_state(cs, stderr, 0); + abort(); + } + + if (signo) { + force_sig_fault(signo, code, env->pc); + } + + process_pending_signals(env); + } +} + #endif /* TARGET_ARCH_CPU_H */ From patchwork Fri Aug 16 17:09:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2ACC7C531DC for ; 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[121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:07 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 03/17] bsd-user: Implement RISC-V CPU register cloning and reset functions Date: Sat, 17 Aug 2024 03:09:35 +1000 Message-Id: <20240816170949.238511-4-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=itachis6234@gmail.com; helo=mail-pj1-x1030.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_HELO_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Added functions for cloning CPU registers and resetting the CPU state for RISC-V architecture. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_cpu.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/bsd-user/riscv/target_arch_cpu.h b/bsd-user/riscv/target_arch_cpu.h index 5b436b2ac9..bdb527573b 100644 --- a/bsd-user/riscv/target_arch_cpu.h +++ b/bsd-user/riscv/target_arch_cpu.h @@ -130,4 +130,18 @@ static inline void target_cpu_loop(CPURISCVState *env) } } +static inline void target_cpu_clone_regs(CPURISCVState *env, target_ulong newsp) +{ + if (newsp) { + env->gpr[xSP] = newsp; + } + + env->gpr[xA0] = 0; /* a0 */ + env->gpr[xT0] = 0; /* t0 */ +} + +static inline void target_cpu_reset(CPUArchState *env) +{ +} + #endif /* TARGET_ARCH_CPU_H */ From patchwork Fri Aug 16 17:09:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766673 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1234C531DC for ; Fri, 16 Aug 2024 17:12:26 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TI-00064h-FY; Fri, 16 Aug 2024 13:10:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0T7-000556-Ob for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:32 -0400 Received: from mail-pj1-x102b.google.com ([2607:f8b0:4864:20::102b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0St-0007Md-5o for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:28 -0400 Received: by mail-pj1-x102b.google.com with SMTP id 98e67ed59e1d1-2cb53da06a9so1523546a91.0 for ; Fri, 16 Aug 2024 10:10:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828210; x=1724433010; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Q8SeRNxqA0kdGYXuMPPKRU3j4MVX/4+712bEYl1oABA=; b=iscvKFrjt/A5EF61wo4QtDkKgIZPKZ+n4fZDDdZFHFGilP4wxO2zPTnjbH+wO7dotb KtyrT4b8J2A1mQt0h38oMVvn853qeLYUOI0A4CP+J+xJslPkWmGYkCDNov0jLHUW9n9b 1SnOqAyv0rZEB4fYZ5tepwQNcDOJLHAXQJjw42i8F61Qhz2isO42GHnfucetJ4uEhwl+ SDgENmnEZ7TG1JtATC40e6TYwZTPkap0nlpCzozxMhQDG97p6hllgrlva+mQPpeuDh9b t2N29Eqv0gItTmeA/7gyjC4Fgib5AKUk8/7RFRztKXJ4O60cZrWXJ+JE69TCLfV+1K2r 4PhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828210; x=1724433010; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Q8SeRNxqA0kdGYXuMPPKRU3j4MVX/4+712bEYl1oABA=; b=TD986ETRwwv348oyDH7d/Ri+7ywmI5PXst7gocXLbgTTI6JCBOijNjON6QXOsKZHjC Kvcsjt8Fev0bd9q3M9RrDEZFWYjti0mhwiekX52yTee4MDYy2/hXzmio3AFNkVMcULS2 QdqiPmh8eKlec6ePRU/iO1b94NbSbgY62WfEoTpTXTMzCuNytVQ5yuu6WaSPrHjXQJZt Yc6ktxp7PLnw4ZTt5In44GL7Op22zaRQIv4QueY8fbKFOqcIVODEhgCkHFzVRU38uPEv WG7cm1o96qBXRXmXv2A91GGdF4Nq4LVZqIP8YhN4KuayvQc4lXz8W5cH2ATfvF+cTLw/ N44A== X-Gm-Message-State: AOJu0Yxl06CENfhhJESgt2uD8GeIKrrkkMROFsBqhjg0yVWJP9oJ8Sbc ZnwbO5JPIXiHkT1fYI2qZ0yndtvYiyiPesTummOzkLN/gne15LTPPD5Ks0VdYY4= X-Google-Smtp-Source: AGHT+IEw9LlDo44bKLnPOtesVidS+Ec1LUqo9j3zhj+z2q6c3fiV6l1i9W36UfJHYLb6SUZws76t1Q== X-Received: by 2002:a17:90a:43a2:b0:2d3:ca71:dbb3 with SMTP id 98e67ed59e1d1-2d3ca71e1b8mr8889183a91.17.1723828210168; Fri, 16 Aug 2024 10:10:10 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:09 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 04/17] bsd-user: Implement RISC-V TLS register setup Date: Sat, 17 Aug 2024 03:09:36 +1000 Message-Id: <20240816170949.238511-5-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=itachis6234@gmail.com; helo=mail-pj1-x102b.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Included the prototype for the 'target_cpu_set_tls' function in the 'target_arch.h' header file. This function is responsible for setting the Thread Local Storage (TLS) register for RISC-V architecture. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch.h | 27 +++++++++++++++++++++++++++ bsd-user/riscv/target_arch_cpu.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+) create mode 100644 bsd-user/riscv/target_arch.h create mode 100644 bsd-user/riscv/target_arch_cpu.c diff --git a/bsd-user/riscv/target_arch.h b/bsd-user/riscv/target_arch.h new file mode 100644 index 0000000000..26ce07f343 --- /dev/null +++ b/bsd-user/riscv/target_arch.h @@ -0,0 +1,27 @@ +/* + * RISC-V specific prototypes + * + * Copyright (c) 2019 Mark Corbin + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef TARGET_ARCH_H +#define TARGET_ARCH_H + +#include "qemu.h" + +void target_cpu_set_tls(CPURISCVState *env, target_ulong newtls); + +#endif /* TARGET_ARCH_H */ diff --git a/bsd-user/riscv/target_arch_cpu.c b/bsd-user/riscv/target_arch_cpu.c new file mode 100644 index 0000000000..44e25d2ddf --- /dev/null +++ b/bsd-user/riscv/target_arch_cpu.c @@ -0,0 +1,29 @@ +/* + * RISC-V CPU related code + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ +#include "qemu/osdep.h" + +#include "target_arch.h" + +#define TP_OFFSET 16 + +/* Compare with cpu_set_user_tls() in riscv/riscv/vm_machdep.c */ +void target_cpu_set_tls(CPURISCVState *env, target_ulong newtls) +{ + env->gpr[xTP] = newtls + TP_OFFSET; +} From patchwork Fri Aug 16 17:09:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766674 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CE45C3DA4A for ; Fri, 16 Aug 2024 17:12:27 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TK-0006Ux-O7; Fri, 16 Aug 2024 13:10:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0T5-00051Q-OP for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:29 -0400 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0St-0007Mo-69 for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:27 -0400 Received: by mail-pj1-x1034.google.com with SMTP id 98e67ed59e1d1-2d3b595c18dso1934923a91.0 for ; Fri, 16 Aug 2024 10:10:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828213; x=1724433013; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g4MfaAoEg0D4PG1s02DK0HI+nWn0NbjMokYUO+miRKs=; b=Z1sW9m9boTwu/RhQFdgtG0+YQg0PbKePnLEPz5V6kVkxvNbIsCkvUJyiBUJZT3Xw9C FNqgI9IipiQh8bGZVjO3as3Jjp5Pa2nSRVuymzQyY4xWGwLWyShqKJ8huQiQHPMLe7B9 qksID8/PegtDb6cdnJF3fouP4y58ZwbRKD9FB37RIfkZOPzR1mrQNvfPymW2sMw+DuFF Ws8FBkhR4WxjXU4JEVxb7X0GOCYKoRXDzQx4GzkD0iq9RMNXHsXfEQK4HJdQaR9PiKRu uOCaBiVnLp0Doc/yf5evef1Ff05IxpP7CMRXNnqoznBe10MMCP1xXSIQrgVisCgGY0hg lmnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828213; x=1724433013; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g4MfaAoEg0D4PG1s02DK0HI+nWn0NbjMokYUO+miRKs=; b=BIXuB1oKbUYUqTFc7uVM5DQjPre8D3TfGb3bPmHSExMYvuOoB3NGH9CKbW4tGSY/vU DVIBwFw3lyq3bJB95Ud0VtEMY2pYGgT1lbUXyHaoc122rpoqGXXGb3TIgNaQOjl+8MQY RacLXJ+MpULCUch/IAeHF7tqbP2VkuX/+6hokxu5rJLSHQJdCvRuMQTdn28hKZ3vdLx8 ZahsEb9iYAQXeSGYBW1hdNAqPs8A84BLFvUcVyLak0f5ApawKXBIFo5DEFFsGn+BNxkr N1xa6Tp3U8Mc9RU1AFwhhcF1SDKl27QmEann1oI0KT8ZSiLYPjyhDgAHtu1ICPPAaqjt zkXQ== X-Gm-Message-State: AOJu0YxxjbldfMHEjJEKOqzo+Pcnpvclf2Etn5LQ2YovGhiv2KTIQs/3 ZQIKyMCx+wY1tkAndbiTfUZ8nSquZplllcwGb6cxdUzU2Urgx4KShHmir9bOs1k= X-Google-Smtp-Source: AGHT+IFUT4p2VfI411zfvXh7tcfxzz+eRQAPAvaiBCrH4dVrNkK6Lad9K6ge14qa/uHBuoXd/G/YeA== X-Received: by 2002:a17:90a:fe13:b0:2c3:34f4:5154 with SMTP id 98e67ed59e1d1-2d3c38dde4cmr10359838a91.1.1723828212946; Fri, 16 Aug 2024 10:10:12 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:12 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Kyle Evans , Richard Henderson Subject: [PATCH v2 05/17] bsd-user: Add RISC-V ELF definitions and hardware capability detection Date: Sat, 17 Aug 2024 03:09:37 +1000 Message-Id: <20240816170949.238511-6-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=itachis6234@gmail.com; helo=mail-pj1-x1034.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Introduced RISC-V specific ELF definitions and hardware capability detection. Additionally, a function to retrieve hardware capabilities ('get_elf_hwcap') is implemented, which returns the common bits set in each CPU's ISA strings. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_elf.h | 42 ++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 bsd-user/riscv/target_arch_elf.h diff --git a/bsd-user/riscv/target_arch_elf.h b/bsd-user/riscv/target_arch_elf.h new file mode 100644 index 0000000000..4eb915e61e --- /dev/null +++ b/bsd-user/riscv/target_arch_elf.h @@ -0,0 +1,42 @@ +/* + * RISC-V ELF definitions + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_ELF_H +#define TARGET_ARCH_ELF_H + +#define elf_check_arch(x) ((x) == EM_RISCV) +#define ELF_START_MMAP 0x80000000 +#define ELF_ET_DYN_LOAD_ADDR 0x100000 +#define ELF_CLASS ELFCLASS64 + +#define ELF_DATA ELFDATA2LSB +#define ELF_ARCH EM_RISCV + +#define ELF_HWCAP get_elf_hwcap() +static uint32_t get_elf_hwcap(void) +{ + RISCVCPU *cpu = RISCV_CPU(thread_cpu); + + return cpu->env.misa_ext_mask; +} + +#define USE_ELF_CORE_DUMP +#define ELF_EXEC_PAGESIZE 4096 + +#endif /* TARGET_ARCH_ELF_H */ From patchwork Fri Aug 16 17:09:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766676 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88F45C3DA4A for ; Fri, 16 Aug 2024 17:12:37 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TI-00065a-FL; Fri, 16 Aug 2024 13:10:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0TA-0005Le-9P for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:34 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0Sw-0007NC-Hh for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:30 -0400 Received: by mail-pj1-x102e.google.com with SMTP id 98e67ed59e1d1-2cb53da06a9so1523589a91.0 for ; Fri, 16 Aug 2024 10:10:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828216; x=1724433016; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=a+NCEiOZJzboz9w1INUibK6hoUbq+IVFPstbDaWXows=; b=XUwe0/e3mWEB/5or7pcJMJuVVlS2WFvc9P0pYyXjIybvwnZ60VylD/t4cU6kg+KYY/ IMNhLiDnowQJqD45T7HkYBu7nIFKWa7BkehnNgd+q9fz3SqmryrnlmFVOC1Smte/E6Yb j6rzLUV+nTY8lEOmLxNKAkq5JmkUPz9sjdcPn7sGAzwcRSkdL4a/LZVf5WlRAq7RjHDP zcksIj/A7J+Gnbtzgr2EAiPlAiz4YDo0BNG6Dwu5FBBC35q7GMQx68txZ9uYclUK+rBC hdVkLHM66h5/i2NESMXXUoeLjXoxjn6ygjwVAkcDA94e2dm7zRzsLtxVTGu5lwbB17zO 8p2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828216; x=1724433016; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a+NCEiOZJzboz9w1INUibK6hoUbq+IVFPstbDaWXows=; b=UuA9Zr0W5xcIEh/1ziV4tTEV3t1lJIYSsQbENgITr95l86+SeDlHCKLMpFxQ4Czz/o 8x8Mllq7OfUI8A/yKRbL2q2JTH5H35vrP0mp4nz4/hkAej8Qx/gmDj63/HVEKYVENt0i Gzl7kPsX8aNoxiNXJ8TAE3YZQjriwvweFfdxoiX3rppTvfhxwarP1VIeDnepnx6YnBDG ozG4WIiltCeSsywdv3/RhQWKlvL9hcVhMqQkoYrg6Y8MBKrYgJXzAHzr8K+RKMO/VV81 3NjhaCTTLopht0q1vzmaxwTIkDkeSPJJ1E+1pbKOL+EO86dOFC/+JZ1my21ymjLdbpVx /8Zw== X-Gm-Message-State: AOJu0Yxj642ZAsr8/vtFN3YPUcmCelSSPBzmCgTYr8ATcN0eufcChnRt Jepd8Cz5C0x+uaqM5A185nJHgujN+2U4CZROtZ7xW++3rEjG0wY0Tx08uxWQR2I= X-Google-Smtp-Source: AGHT+IG7DLCzkBqmtaasx864Q++FJ+rbCuav7V8150xy/9F79fFYfxpEBvITGdwhvhzuE75ywS4iZA== X-Received: by 2002:a17:90a:68c7:b0:2c9:6753:6192 with SMTP id 98e67ed59e1d1-2d3e457a19bmr4856599a91.12.1723828215476; Fri, 16 Aug 2024 10:10:15 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:15 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 06/17] bsd-user: Define RISC-V register structures and register copying Date: Sat, 17 Aug 2024 03:09:38 +1000 Message-Id: <20240816170949.238511-7-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=itachis6234@gmail.com; helo=mail-pj1-x102e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Added definitions for RISC-V register structures, including general-purpose registers and floating-point registers, in 'target_arch_reg.h'. Implemented the 'target_copy_regs' function to copy register values from the CPU state to the target register structure, ensuring proper endianness handling using 'tswapreg'. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_reg.h | 88 ++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 bsd-user/riscv/target_arch_reg.h diff --git a/bsd-user/riscv/target_arch_reg.h b/bsd-user/riscv/target_arch_reg.h new file mode 100644 index 0000000000..12b1c96b61 --- /dev/null +++ b/bsd-user/riscv/target_arch_reg.h @@ -0,0 +1,88 @@ +/* + * RISC-V register structures + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_REG_H +#define TARGET_ARCH_REG_H + +/* Compare with riscv/include/reg.h */ +typedef struct target_reg { + uint64_t ra; /* return address */ + uint64_t sp; /* stack pointer */ + uint64_t gp; /* global pointer */ + uint64_t tp; /* thread pointer */ + uint64_t t[7]; /* temporaries */ + uint64_t s[12]; /* saved registers */ + uint64_t a[8]; /* function arguments */ + uint64_t sepc; /* exception program counter */ + uint64_t sstatus; /* status register */ +} target_reg_t; + +typedef struct target_fpreg { + uint64_t fp_x[32][2]; /* Floating point registers */ + uint64_t fp_fcsr; /* Floating point control reg */ +} target_fpreg_t; + +#define tswapreg(ptr) tswapal(ptr) + +/* Compare with struct trapframe in riscv/include/frame.h */ +static inline void target_copy_regs(target_reg_t *regs, + const CPURISCVState *env) +{ + + regs->ra = tswapreg(env->gpr[1]); + regs->sp = tswapreg(env->gpr[2]); + regs->gp = tswapreg(env->gpr[3]); + regs->tp = tswapreg(env->gpr[4]); + + regs->t[0] = tswapreg(env->gpr[5]); + regs->t[1] = tswapreg(env->gpr[6]); + regs->t[2] = tswapreg(env->gpr[7]); + regs->t[3] = tswapreg(env->gpr[28]); + regs->t[4] = tswapreg(env->gpr[29]); + regs->t[5] = tswapreg(env->gpr[30]); + regs->t[6] = tswapreg(env->gpr[31]); + + regs->s[0] = tswapreg(env->gpr[8]); + regs->s[1] = tswapreg(env->gpr[9]); + regs->s[2] = tswapreg(env->gpr[18]); + regs->s[3] = tswapreg(env->gpr[19]); + regs->s[4] = tswapreg(env->gpr[20]); + regs->s[5] = tswapreg(env->gpr[21]); + regs->s[6] = tswapreg(env->gpr[22]); + regs->s[7] = tswapreg(env->gpr[23]); + regs->s[8] = tswapreg(env->gpr[24]); + regs->s[9] = tswapreg(env->gpr[25]); + regs->s[10] = tswapreg(env->gpr[26]); + regs->s[11] = tswapreg(env->gpr[27]); + + regs->a[0] = tswapreg(env->gpr[10]); + regs->a[1] = tswapreg(env->gpr[11]); + regs->a[2] = tswapreg(env->gpr[12]); + regs->a[3] = tswapreg(env->gpr[13]); + regs->a[4] = tswapreg(env->gpr[14]); + regs->a[5] = tswapreg(env->gpr[15]); + regs->a[6] = tswapreg(env->gpr[16]); + regs->a[7] = tswapreg(env->gpr[17]); + + regs->sepc = tswapreg(env->pc); +} + +#undef tswapreg + +#endif /* TARGET_ARCH_REG_H */ From patchwork Fri Aug 16 17:09:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D0950C531DC for ; Fri, 16 Aug 2024 17:10:45 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TF-0005fG-Hf; Fri, 16 Aug 2024 13:10:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0T6-00052t-5H for qemu-devel@nongnu.org; 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[121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:17 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 07/17] bsd-user: Add RISC-V signal trampoline setup function Date: Sat, 17 Aug 2024 03:09:39 +1000 Message-Id: <20240816170949.238511-8-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=itachis6234@gmail.com; helo=mail-pg1-x533.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Implemented the `setup_sigtramp` function for setting up the signal trampoline code in the RISC-V architecture. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_sigtramp.h | 46 +++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 bsd-user/riscv/target_arch_sigtramp.h diff --git a/bsd-user/riscv/target_arch_sigtramp.h b/bsd-user/riscv/target_arch_sigtramp.h new file mode 100644 index 0000000000..39c878db22 --- /dev/null +++ b/bsd-user/riscv/target_arch_sigtramp.h @@ -0,0 +1,46 @@ +/* + * RISC-V sigcode + * + * Copyright (c) 2019 Mark Corbin + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef TARGET_ARCH_SIGTRAMP_H +#define TARGET_ARCH_SIGTRAMP_H + +/* Compare with sigcode() in riscv/riscv/locore.S */ +static inline abi_long setup_sigtramp(abi_ulong offset, unsigned sigf_uc, + unsigned sys_sigreturn) +{ + int i; + uint32_t sys_exit = TARGET_FREEBSD_NR_exit; + + uint32_t sigtramp_code[] = { + /* 1 */ 0x00010513, /* mv a0, sp */ + /* 2 */ 0x00050513 + (sigf_uc << 20), /* addi a0, a0, sigf_uc */ + /* 3 */ 0x00000293 + (sys_sigreturn << 20), /* li t0, sys_sigreturn */ + /* 4 */ 0x00000073, /* ecall */ + /* 5 */ 0x00000293 + (sys_exit << 20), /* li t0, sys_exit */ + /* 6 */ 0x00000073, /* ecall */ + /* 7 */ 0xFF1FF06F /* b -16 */ + }; + + for (i = 0; i < 7; i++) { + tswap32s(&sigtramp_code[i]); + } + + return memcpy_to_target(offset, sigtramp_code, TARGET_SZSIGCODE); +} +#endif /* TARGET_ARCH_SIGTRAMP_H */ From patchwork Fri Aug 16 17:09:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766672 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFBCFC531DF for ; Fri, 16 Aug 2024 17:12:21 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TK-0006Sg-EM; Fri, 16 Aug 2024 13:10:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0T7-00058s-NG for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:31 -0400 Received: from mail-pg1-x52e.google.com ([2607:f8b0:4864:20::52e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0T1-0007Na-HK for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:29 -0400 Received: by mail-pg1-x52e.google.com with SMTP id 41be03b00d2f7-7a1843b4cdbso1673660a12.2 for ; Fri, 16 Aug 2024 10:10:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828221; x=1724433021; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lfzjBG7+9yzLMDJFHDoCCaXekwfn4Gr8dayPzH/NfvM=; b=NeMg7fnG7dFLhDdV3JzwiRYzIsILEtnTrIkLA20ievOapY2FExwiSfCHZ1yeYhJbtI mibOFyXmzPbdy3F4bTZAzx2o7C7UI0uR5qS1MTkKy01ifkEh9CAh0R8MM5d/HbpmoMZc xOG8tJNrzbzIGMdaA15/cs3azgTRA3SmAcR9QR2YjQS4HXZnT1XSJjnEw6UCznXyi/8q CAcXx6Jlj/d2DQS0qKi17X+Yuub2WVOsWiFUhA9EU3TI8d4JZnpnTkt3omSvMenZ8XCg M2gYy8wPcwtzAEirQB55K/wTaudRjIo82KuTea32bEwDoglhbNo1WKg/LQx7HFV7BdiT AFWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828221; x=1724433021; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lfzjBG7+9yzLMDJFHDoCCaXekwfn4Gr8dayPzH/NfvM=; b=CXNr2LZIkfdeR7hLV1RwEy5vDtZAOjFqiLP/48MgOjHlUZ8JIfZLLxBIhQHymEGqUf AOTJFJI6P4aAWCdX7xddT+6PtCCHLb+1iiOx18IlcBElarLoQHl6QbuW3st7v375Cuhi E03UxOACrWM1jSLQ7H11RHBD2ZEssSfhqb+Kc/5TdA9+syVdK1pnDgqsTMidMxS9SzhS 0f0LP8oriojlmlsTIUMo12y7wPuAbb5EXwMgTMYRTBjpiDxkdT6PJICUCVUnzMSBXitV /6+7DxdpFk2Ga/2HUfeSI5e5mQqjnCMkyLMhXt79s1+5M3Ke2/8EUrg6lyRzuGGlI+bU n/9Q== X-Gm-Message-State: AOJu0YwXVsxU+ULJfokJtn64Es1mgQ5ISIruWnI+PAD/9oD4zGph+4oh yEqFk6txpnhwneNIrDshLIVN0rIoR6+LW7AAq+4rN3G+tMi+fliCyuiKzhG7C/4= X-Google-Smtp-Source: AGHT+IHrukgL00U/0e/iKJODEncnQSTgnnnmZj/L7RhTrnqD0S0O5GbHzkGfPZrbBaxDETV92bUcCQ== X-Received: by 2002:a17:90b:1e03:b0:2d3:dca0:89b7 with SMTP id 98e67ed59e1d1-2d40533a66emr152704a91.3.1723828220562; Fri, 16 Aug 2024 10:10:20 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:20 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 08/17] bsd-user: Implement RISC-V sysarch system call emulation Date: Sat, 17 Aug 2024 03:09:40 +1000 Message-Id: <20240816170949.238511-9-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=itachis6234@gmail.com; helo=mail-pg1-x52e.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Added the 'do_freebsd_arch_sysarch' function to emulate the 'sysarch' system call for the RISC-V architecture. Currently, this function returns '-TARGET_EOPNOTSUPP' to indicate that the operation is not supported. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_sysarch.h | 41 ++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 bsd-user/riscv/target_arch_sysarch.h diff --git a/bsd-user/riscv/target_arch_sysarch.h b/bsd-user/riscv/target_arch_sysarch.h new file mode 100644 index 0000000000..9af42331b4 --- /dev/null +++ b/bsd-user/riscv/target_arch_sysarch.h @@ -0,0 +1,41 @@ +/* + * RISC-V sysarch() system call emulation + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_SYSARCH_H +#define TARGET_ARCH_SYSARCH_H + +#include "target_syscall.h" +#include "target_arch.h" + +static inline abi_long do_freebsd_arch_sysarch(CPURISCVState *env, int op, + abi_ulong parms) +{ + + return -TARGET_EOPNOTSUPP; +} + +static inline void do_freebsd_arch_print_sysarch( + const struct syscallname *name, abi_long arg1, abi_long arg2, + abi_long arg3, abi_long arg4, abi_long arg5, abi_long arg6) +{ + + gemu_log("UNKNOWN OP: %d, " TARGET_ABI_FMT_lx ")", (int)arg1, arg2); +} + +#endif /* TARGET_ARCH_SYSARCH_H */ From patchwork Fri Aug 16 17:09:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766675 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1FB78C3DA4A for ; Fri, 16 Aug 2024 17:12:33 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TL-0006dA-QX; Fri, 16 Aug 2024 13:10:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0T7-00058r-Mz for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:31 -0400 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0T4-0007Nu-6d for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:29 -0400 Received: by mail-pl1-x62c.google.com with SMTP id d9443c01a7336-20203988f37so11051025ad.1 for ; Fri, 16 Aug 2024 10:10:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828224; x=1724433024; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ltx3coYvH4EqEQjQYY11IM0VCXZXqxusmpe5jU7Dxo0=; b=mbXIW9X81Nk7T9nvo4e0w4OrGPIH0XOcQdBnIglFenYoN0HS8pxHo7Q4LS/I/zlLFY ZD6jQvg7pBkCCdbGmIdI5IPgQ61R4TvZzvd1iKN+cuQDJDEb2SUe8nerx/xBAz4sPlrx 1FeyPomPPg9yhn82m9+VXbWFvorAp25Zk5PCmXMybVqQgeLL0oD40dI3dWVC5UgeNvGl QIS2ZtfkrhzqR1pCwVZ2SzhIysFh5+xJaeXq4cdPWnUDrsKuY4J7u1r1Wle0PghUDzCD FHQLUA3iMLGpdKZNa+uT45A0JQ7srzjkOCgrVQZ0+GXbjsppQCJzoIPxt7p7EWWiEfwH V37g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828224; x=1724433024; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ltx3coYvH4EqEQjQYY11IM0VCXZXqxusmpe5jU7Dxo0=; b=dMD1NRLxvsbH5XuSWniCcAdtUAb1Q6Lw2+W/C0O4kqO4dGFLhUsPDHdsGI4wIZqWtl PtJIdWK9mEMB5dRCCxqFRozTFJ8ZHkheykETRKiy0vnWQzQIZuPIFTKU2qboZ4cmkB+Q ICejuGwvpBuhetQ8Xepn/Ooyhmjp3dTwK5IRO508g49OLtNwsJicyagNfWH6c9h0KSGe 56MUrAzDplu1V8yTTrUg3wh2GJHWs3XXroAjHC4Bg0SjuET3Aa0fy+uac0wOCLzGqhTe gjDkzvxUMY5ITfypeUMDwspKpHeSvJvHhORcFbTEsocuuznj2mAsq4pDhcwISdQsZ7ok IuMA== X-Gm-Message-State: AOJu0YzXLLnxiNCIfTayd0BcKcAwmZD3b3aKSkWdhCh+N/DEfIi1sY1l VgQ6bBGBuc+DrQ7lxfhGnfWfYB2/2g/ORsfkgEwlVMC/ZRgSeaWtVSnnR7xrDCQ= X-Google-Smtp-Source: AGHT+IE8gsZBF1y9p4hZ1aOmfpozfo3gl0F++DiGOokbc3ArL7gseqNXSkxtlsyQxRHp1s646qAjLA== X-Received: by 2002:a17:90a:fa06:b0:2d3:da99:b41b with SMTP id 98e67ed59e1d1-2d3dffc6078mr3607095a91.17.1723828223315; Fri, 16 Aug 2024 10:10:23 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:23 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Jessica Clarke , Kyle Evans Subject: [PATCH v2 09/17] bsd-user: Add RISC-V thread setup and initialization support Date: Sat, 17 Aug 2024 03:09:41 +1000 Message-Id: <20240816170949.238511-10-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x62c.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Implemented functions for setting up and initializing threads in the RISC-V architecture. The 'target_thread_set_upcall' function sets up the stack pointer, program counter, and function argument for new threads. The 'target_thread_init' function initializes thread registers based on the provided image information. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Jessica Clarke Co-authored-by: Kyle Evans --- bsd-user/riscv/target_arch_thread.h | 47 +++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 bsd-user/riscv/target_arch_thread.h diff --git a/bsd-user/riscv/target_arch_thread.h b/bsd-user/riscv/target_arch_thread.h new file mode 100644 index 0000000000..4596d3d51f --- /dev/null +++ b/bsd-user/riscv/target_arch_thread.h @@ -0,0 +1,47 @@ +/* + * RISC-V thread support + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_THREAD_H +#define TARGET_ARCH_THREAD_H + +/* Compare with cpu_set_upcall() in riscv/riscv/vm_machdep.c */ +static inline void target_thread_set_upcall(CPURISCVState *regs, + abi_ulong entry, abi_ulong arg, abi_ulong stack_base, + abi_ulong stack_size) +{ + abi_ulong sp; + + sp = (abi_ulong)(stack_base + stack_size) & ~(16 - 1); + + regs->gpr[xSP] = sp; + regs->pc = entry; + regs->gpr[xA0] = arg; +} + +/* Compare with exec_setregs() in riscv/riscv/machdep.c */ +static inline void target_thread_init(struct target_pt_regs *regs, + struct image_info *infop) +{ + regs->sepc = infop->entry; + regs->regs[xRA] = infop->entry; + regs->regs[xA0] = infop->start_stack; + regs->regs[xSP] = ROUND_DOWN(infop->start_stack,16); +} + +#endif /* TARGET_ARCH_THREAD_H */ From patchwork Fri Aug 16 17:09:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766669 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E9694C3DA4A for ; Fri, 16 Aug 2024 17:12:05 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TL-0006cA-NC; Fri, 16 Aug 2024 13:10:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0TB-0005Sj-Gn for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:35 -0400 Received: from mail-pg1-x533.google.com ([2607:f8b0:4864:20::533]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0T5-0007O2-Qk for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:33 -0400 Received: by mail-pg1-x533.google.com with SMTP id 41be03b00d2f7-7a0e8b76813so1682103a12.3 for ; Fri, 16 Aug 2024 10:10:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828226; x=1724433026; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BISuETtEj/uI6CddQsRG+h5xaQo8IxKpbRWv0bTNq7U=; b=HhZqQwVp0n7UZ968VHzXQ4/CHdUu2LBP16Pr9FyJFSkBy8TSE1wttt0Mez1C6+tav6 G372QeBMBHOr6lgwLEF+NmiWK4PpT2mcQ4n/JMGvVD+koE665gp9wllrRvL+FaLlbzrz VtUX25bJ5X4TSuC+vOLaCxuU02mc/157t/JaeuIt/ZmlX2VrDehho7PbN7KUuLnFUwTf iUkPSLt91KooLR00nOXVyp5res5SxOD3VeNYQSkOYK2UopsvBdw/Fr/VJKEJqvrMqJIC 6617x3uzQfYvkQAw8TJc1zUpirEpjVAswfj6NdXGwwRdHWR87d+0J/re0VJ3ECiKZoN/ vOZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828226; x=1724433026; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BISuETtEj/uI6CddQsRG+h5xaQo8IxKpbRWv0bTNq7U=; b=fbxsqmnWU25pwroWl8yK9zngnbqiPZSGRuqA79j04Hqoj+JUzO7+uv/MWuCS7bPlBQ H1Batslr9kbwYnxfkNHcOIIgfy9z/+k6vc2zCgtLi9QJy5WnJl1avLL2XDCBO7ArHv4r J2C11HMZ6XvrjB65j85liLKOsGpzpi/mbE9yPs04CehY5FwxhGqCYekDeOJBUEMM3OsL 94yedIuYZ01+KV+QXDw3l10q2ao+XRFT0zpLPGrPTuDTHKW1EUz/YuVpHYOl38QCdcU6 vPTf7zYj82I+0YasX0wvMlZoSfLAcBjCBg3PR6x1kMHaGDY6S1ZN7cprWwZUfeKu5AKx yx0Q== X-Gm-Message-State: AOJu0YxKP7mT5r02wEQECSeAF8BNC1XCqlGjflO472O07DUhQbLUSBNh xPHIpM4Rrow6A+tUwOFMxy8ST4AKSJv0gC6fU4xKghDoTX6aK8FchauSFGUSTpQ= X-Google-Smtp-Source: AGHT+IF1yYR0Sae4Vw6kxwVQcRJd3WWOzyfpmjw/yIsrtpQw32iabsxSA9glBQP07QNIPj9zeRlICQ== X-Received: by 2002:a17:90b:4b47:b0:2ca:5a46:cbc8 with SMTP id 98e67ed59e1d1-2d3e00f01c2mr4008337a91.26.1723828226022; Fri, 16 Aug 2024 10:10:26 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:25 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 10/17] bsd-user: Define RISC-V VM parameters and helper functions Date: Sat, 17 Aug 2024 03:09:42 +1000 Message-Id: <20240816170949.238511-11-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=itachis6234@gmail.com; helo=mail-pg1-x533.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Added definitions for RISC-V VM parameters, including maximum and default sizes for text, data, and stack, as well as address space limits. Implemented helper functions for retrieving and setting specific values in the CPU state, such as stack pointer and return values. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_vmparam.h | 53 ++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 bsd-user/riscv/target_arch_vmparam.h diff --git a/bsd-user/riscv/target_arch_vmparam.h b/bsd-user/riscv/target_arch_vmparam.h new file mode 100644 index 0000000000..0f2486def1 --- /dev/null +++ b/bsd-user/riscv/target_arch_vmparam.h @@ -0,0 +1,53 @@ +/* + * RISC-V VM parameters definitions + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_VMPARAM_H +#define TARGET_ARCH_VMPARAM_H + +#include "cpu.h" + +/* Compare with riscv/include/vmparam.h */ +#define TARGET_MAXTSIZ (1 * GiB) /* max text size */ +#define TARGET_DFLDSIZ (128 * MiB) /* initial data size limit */ +#define TARGET_MAXDSIZ (1 * GiB) /* max data size */ +#define TARGET_DFLSSIZ (128 * MiB) /* initial stack size limit */ +#define TARGET_MAXSSIZ (1 * GiB) /* max stack size */ +#define TARGET_SGROWSIZ (128 * KiB) /* amount to grow stack */ + +#define TARGET_VM_MINUSER_ADDRESS (0x0000000000000000UL) +#define TARGET_VM_MAXUSER_ADDRESS (0x0000004000000000UL) + +#define TARGET_USRSTACK (TARGET_VM_MAXUSER_ADDRESS - TARGET_PAGE_SIZE) + +static inline abi_ulong get_sp_from_cpustate(CPURISCVState *state) +{ + return state->gpr[xSP]; +} + +static inline void set_second_rval(CPURISCVState *state, abi_ulong retval2) +{ + state->gpr[xA1] = retval2; +} + +static inline abi_ulong get_second_rval(CPURISCVState *state) +{ + return state->gpr[xA1]; +} + +#endif /* TARGET_ARCH_VMPARAM_H */ From patchwork Fri Aug 16 17:09:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766664 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB0BCC531DC for ; Fri, 16 Aug 2024 17:11:08 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TJ-0006KW-KO; Fri, 16 Aug 2024 13:10:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0TD-0005hO-Pp for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:36 -0400 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0TA-0007Om-0C for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:34 -0400 Received: by mail-pf1-x42f.google.com with SMTP id d2e1a72fcca58-70d1cbbeeaeso1938799b3a.0 for ; Fri, 16 Aug 2024 10:10:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828229; x=1724433029; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/upld7cTqaC/atkB+nu7yGsbOxCVGK3zsoQHBJP0niw=; b=SQB6EHjOzuPZdOJluSQiL+C/PFlkLcnNHjvxyvrTOd0hetJqdA43Xu/6ICI8iKSHfs KZ97nKkfJ5Siv5vAAaTcan2LUwh8uNKj0i4wRubtXlickVm5FLpQeIJP+ieMaAuQmMof 8kv52F1+uqinem8LO3l98OsY6FDG0kHz4R9DLTqYuKjEpt5ByUD4A9X7RR2YOsMhulWu jCkjg0wvbKCUEd5BNYUYciSDwFdMZiPIzyHg90F92AI/kqShmH0C5YL6OiHW/fvRRrzs 7f67z8y+VvXzFvEchyISvJKQkIvnQer5w+KAY+2eD6l1K4C3zjeXFMvIFQ3kfoMyTqMS ZgMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828229; x=1724433029; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/upld7cTqaC/atkB+nu7yGsbOxCVGK3zsoQHBJP0niw=; b=V07UbDAABxY/Ei12od25BbQovCT7uFqMaCWWXYPbv+AnYavmt8KY1XzauBYj0D2OmG CXtc1DjvcqLHKkuEzE1lnWOkJSA1NwtlNGAYhaXpErqXgm6GAEsKUSs19/1jzgWX+6tv Dqs7vW3GlolUagkZLKXvHsVR4nYWUTepKJXJd9/L8xhr9HhxkzHru3opZASLiwJ9vwXR BQL3YN5Y2pOten0rPnx/IDHzbBtXPF0RkEJQOtl306BVbcWT/BMtKJ3uQdzE1A9wlzL4 D7w2/GZpQ2Dk0SR7j5TKVrUxRwR7M9A/NUOpjZiScMxp+E7GuatCBhW0FbhbKPI8JQmr pzSQ== X-Gm-Message-State: AOJu0YzwxfaMzOkXFwFa5ugpK4Ht3Oyk6H24/VMPPdkFByOqf8O73HZD 2n45qY7Y4uJGLQBlBkTqitBvKSlMtXlQMRrQG4ASgR3SjpyYR4s21dsU5ADcJcM= X-Google-Smtp-Source: AGHT+IEBvnsGbg5j6vlYUt3za/l1EpcKuqKM4GIZU1u9ZzDeUTWZT2H5DNan6Zp6s0wzWSYtpvTPuQ== X-Received: by 2002:a17:90a:ac0c:b0:2c8:647:1600 with SMTP id 98e67ed59e1d1-2d3dfc37c6emr3669525a91.9.1723828228797; Fri, 16 Aug 2024 10:10:28 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:28 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Jessica Clarke , Richard Henderson Subject: [PATCH v2 11/17] bsd-user: Define RISC-V system call structures and constants Date: Sat, 17 Aug 2024 03:09:43 +1000 Message-Id: <20240816170949.238511-12-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=itachis6234@gmail.com; helo=mail-pf1-x42f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Introduced definitions for the RISC-V system call interface, including the 'target_pt_regs' structure that outlines the register storage layout during a system call. Added constants for hardware machine identifiers. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Jessica Clarke Reviewed-by: Richard Henderson --- bsd-user/riscv/target_syscall.h | 38 +++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 bsd-user/riscv/target_syscall.h diff --git a/bsd-user/riscv/target_syscall.h b/bsd-user/riscv/target_syscall.h new file mode 100644 index 0000000000..e7e5231309 --- /dev/null +++ b/bsd-user/riscv/target_syscall.h @@ -0,0 +1,38 @@ +/* + * RISC-V system call definitions + * + * Copyright (c) Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef BSD_USER_RISCV_TARGET_SYSCALL_H +#define BSD_USER_RISCV_TARGET_SYSCALL_H + +/* + * struct target_pt_regs defines the way the registers are stored on the stack + * during a system call. + */ + +struct target_pt_regs { + abi_ulong regs[32]; + abi_ulong sepc; +}; + +#define UNAME_MACHINE "riscv64" + +#define TARGET_HW_MACHINE "riscv" +#define TARGET_HW_MACHINE_ARCH UNAME_MACHINE + +#endif /* BSD_USER_RISCV_TARGET_SYSCALL_H */ From patchwork Fri Aug 16 17:09:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766667 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3A79FC531DC for ; Fri, 16 Aug 2024 17:11:42 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TJ-0006IU-FH; Fri, 16 Aug 2024 13:10:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0TE-0005mv-WC for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:37 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0TC-0007P0-Sh for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:36 -0400 Received: by mail-pj1-x102e.google.com with SMTP id 98e67ed59e1d1-2d3da6d3f22so1120236a91.0 for ; Fri, 16 Aug 2024 10:10:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828231; x=1724433031; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cjm2NL6Wgqty15f3ap7G8BavBfHkA8e5dbFy1QdhwG4=; b=fmWxfGQs4/NmwQVzkb8SUSMN7iKPReYpzZoc/HQLeqBzD0HnpaMa0HpJVxMZA3fRPb iXODnV5Z8az0yh6AFFmvFh0+x4vmqq+UGWFbXEoflSZF8ZwaRgaqh6j9iajvDS45xvG9 YXhwqKycrPZBIsqnK5TAYwCbCrqWUxGi3EzbcVHzYJgL+4QnpnElB3NLOopNO7opX2bw ul9FgRhBk+40DRa4Pvp8S7g41T9p5e3qzEvqu/NHM7ocbJvPiwgL93nEfSeF/TZ7ccZB 5lq8zsv3SMtUksIfxk9xNY0ZF5df9nyfzoHzGCQ9t5cpGADhkIlpgDU/sGWnupU/V4rQ p6YQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828231; x=1724433031; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cjm2NL6Wgqty15f3ap7G8BavBfHkA8e5dbFy1QdhwG4=; b=q8jW7GsFGjQDdPb/FQk/NT5tNsGB08huAu2cYAi4TcAng2xWmVUxZVqv9j5NOL9sjj E1wl4I9fSoh/OtA05RacawRTHtcDFXnL/777xgAPBGQQ/n3Fy+izmIuA3W6WFyW8uhyE nRPYG6M4mb+Sllp/WrCXjJN8Gq97y9hi7CqsrTDfKpwhtRq9RxShGdH0GPCllG+OOeFz vj5GeL3FrsFJfxAMtn8Jj6AkZpe/s3uaZBUXUVKOxPR2WXjm46FFAb4U1vxn2hyTlXTa hKOyoRBm9jyzMHKvEFLD+Pc1mmZ+mZ4Hq6T83A1kDVRcgCJV2wWgjZsFRPfwN0J2ZM1c Rvjw== X-Gm-Message-State: AOJu0Ywko+qAt+M4sINomxU93CuNB0jDoDfxk+GaW/fDkmPuLwWekl9+ v4F3qxckpHW3dTc3fPF3MJ/BnDLxz/V9pd/ta+zCcNWOb8RULMkQKo9ArZyfk/A= X-Google-Smtp-Source: AGHT+IEU1lERPymDUGAzPNGmy+/sYLFle6YrB8nP36JdMYYclGQtxmT2XeZi6BnBBtkqtL39q/uiRQ== X-Received: by 2002:a17:90a:8a14:b0:2c9:6d07:18f4 with SMTP id 98e67ed59e1d1-2d3e086bf86mr3849955a91.35.1723828231315; Fri, 16 Aug 2024 10:10:31 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:31 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 12/17] bsd-user: Add generic RISC-V64 target definitions Date: Sat, 17 Aug 2024 03:09:44 +1000 Message-Id: <20240816170949.238511-13-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=itachis6234@gmail.com; helo=mail-pj1-x102e.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Warner Losh Added a generic definition for RISC-V64 target-specific details. Implemented the 'regpairs_aligned' function,which returns 'false' to indicate that register pairs are not aligned in the RISC-V64 ABI. Signed-off-by: Warner Losh Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 bsd-user/riscv/target.h diff --git a/bsd-user/riscv/target.h b/bsd-user/riscv/target.h new file mode 100644 index 0000000000..036ddd185e --- /dev/null +++ b/bsd-user/riscv/target.h @@ -0,0 +1,20 @@ +/* + * Riscv64 general target stuff that's common to all aarch details + * + * Copyright (c) 2022 M. Warner Losh + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef TARGET_H +#define TARGET_H + +/* + * riscv64 ABI does not 'lump' the registers for 64-bit args. + */ +static inline bool regpairs_aligned(void *cpu_env) +{ + return false; +} + +#endif /* TARGET_H */ From patchwork Fri Aug 16 17:09:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766670 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10E71C531DC for ; Fri, 16 Aug 2024 17:12:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TO-0006wl-3E; Fri, 16 Aug 2024 13:10:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0TF-0005oH-Bx for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:38 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0TD-0007PG-Hs for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:37 -0400 Received: by mail-pj1-x1030.google.com with SMTP id 98e67ed59e1d1-2d3da6d3f22so1120266a91.0 for ; Fri, 16 Aug 2024 10:10:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828234; x=1724433034; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=voYN43OZ7lwbwneNl7z2eHNOhROV9NjNWmAvKPq1wXw=; b=Bwr5tsRHaP1rDZlSAjqhBlkRm4QYENyrEq7xaUqNC8qlxZ1V50eefoqWjB9gJbBkS2 PEb+Mm1QWg49f4yDGwkgS3ltmjwmOJUqkEYOJL5JCmDM8eT5U5AtA6OFc+93xy46wNR4 olF0oyDFaxHTMmGh4Fv6+cQqWLhf9Udr0GSl7/9fWaReInvjfdfx5xmR4f8ecjgVufdc 6P6hfIt3KAmJ4x6Nv8bz3Bpfls5R6lZAhWr818zIzScVBF7Jpwhyo9RhqbN3poD6go+r 2eOx8e2wBgK2sCCt03QgQW0SCwnWroelFKuZHTGPkh4vAHrgibbIy90dvDkjv1P4Ekgt zQtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828234; x=1724433034; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=voYN43OZ7lwbwneNl7z2eHNOhROV9NjNWmAvKPq1wXw=; b=ah3gORcb072Lm6eRlxeWOXsD5kLvu9fQX2lJpWlM1n9vn7zuAzncMOBKjVcYFK8ytQ eLI+ji1yqZ0O8eyw70fS8I5DWNFaDIg9gjvxLXc79QLhlG81GCThyXl1CK8uNibevT29 Bez7MWp1zXf7juTV/UcdKzUuncKIGVEZnbZaNXKdS5ekhSUeSejx8kdRJ95w9xrz9tGa +rUqzfKfljXhvX/jcWjBh+/m12RPKjVf6JK7FEEmQ00NwsKqdEVoRcnaybyEAQd29nqv /IOZW76ENB/0Qgj00DepjEiGYKIi54p73gl3PM1bFhLYtHV/VMe4CCu7fCJyxg4xPVfC N3Pw== X-Gm-Message-State: AOJu0YyVaM2mFY7VJZouiF28D7bw0hwv4RB0818LcmqmeTiy+XOpKOcI E+erel7fCRR+tCTmSqPa3xDiFA5jic3+GxAL5QNAsx5NHO3xUS3XGadUmxE9H54= X-Google-Smtp-Source: AGHT+IEepZWVLGfzOcgKQMY7jQfVT782qm+Ez4NCoSavpuxxgQtzaoFOlSwbJ77bOUiLpVLczI4c2A== X-Received: by 2002:a17:90b:ed0:b0:2d3:9137:2375 with SMTP id 98e67ed59e1d1-2d3dfdaadc6mr3982487a91.4.1723828233877; Fri, 16 Aug 2024 10:10:33 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:33 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 13/17] bsd-user: Define RISC-V signal handling structures and constants Date: Sat, 17 Aug 2024 03:09:45 +1000 Message-Id: <20240816170949.238511-14-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=itachis6234@gmail.com; helo=mail-pj1-x1030.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Added definitions for RISC-V signal handling, including structures and constants for managing signal frames and context Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_signal.h | 75 +++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 bsd-user/riscv/target_arch_signal.h diff --git a/bsd-user/riscv/target_arch_signal.h b/bsd-user/riscv/target_arch_signal.h new file mode 100644 index 0000000000..1a634b865b --- /dev/null +++ b/bsd-user/riscv/target_arch_signal.h @@ -0,0 +1,75 @@ +/* + * RISC-V signal definitions + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_SIGNAL_H +#define TARGET_ARCH_SIGNAL_H + +#include "cpu.h" + + +#define TARGET_INSN_SIZE 4 /* riscv instruction size */ + +/* Size of the signal trampoline code placed on the stack. */ +#define TARGET_SZSIGCODE ((abi_ulong)(7 * TARGET_INSN_SIZE)) + +/* Compare with riscv/include/_limits.h */ +#define TARGET_MINSIGSTKSZ (1024 * 4) +#define TARGET_SIGSTKSZ (TARGET_MINSIGSTKSZ + 32768) + +struct target_gpregs { + uint64_t gp_ra; + uint64_t gp_sp; + uint64_t gp_gp; + uint64_t gp_tp; + uint64_t gp_t[7]; + uint64_t gp_s[12]; + uint64_t gp_a[8]; + uint64_t gp_sepc; + uint64_t gp_sstatus; +}; + +struct target_fpregs { + uint64_t fp_x[32][2]; + uint64_t fp_fcsr; + uint32_t fp_flags; + uint32_t pad; +}; + +typedef struct target_mcontext { + struct target_gpregs mc_gpregs; + struct target_fpregs mc_fpregs; + uint32_t mc_flags; +#define TARGET_MC_FP_VALID 0x01 + uint32_t mc_pad; + uint64_t mc_spare[8]; +} target_mcontext_t; + +#define TARGET_MCONTEXT_SIZE 864 +#define TARGET_UCONTEXT_SIZE 936 + +#include "target_os_ucontext.h" + +struct target_sigframe { + target_ucontext_t sf_uc; /* = *sf_uncontext */ + target_siginfo_t sf_si; /* = *sf_siginfo (SA_SIGINFO case)*/ +}; + +#define TARGET_SIGSTACK_ALIGN 16 + +#endif /* TARGET_ARCH_SIGNAL_H */ From patchwork Fri Aug 16 17:09:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766678 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7FE86C531DF for ; Fri, 16 Aug 2024 17:12:52 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TP-000769-5J; Fri, 16 Aug 2024 13:10:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0TI-000698-KO for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:40 -0400 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0TG-0007Pj-E2 for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:40 -0400 Received: by mail-pg1-x535.google.com with SMTP id 41be03b00d2f7-7c6b4222fe3so1404927a12.3 for ; Fri, 16 Aug 2024 10:10:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828237; x=1724433037; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7+bsO6A/4UIjh+UAI8JcbcWlILl99UyeWUeQ1BHs21E=; b=iuIru8regYdy64/oH/ZmhA6zBWnfOZQA2a8n6yvfhRiliHAeDmxsgzFrkrAISuELXG aPLQe4mQQ1RNfHyO46Lzagu8rXcqCvjWJsDy1wkel1jaf6eXYm8s7ZQksGIYNqqWqR/K RHT1RRuULON/USd/EfQQQ8h+HDdwmB1FlBdWyqc8rzgSBuxhWtg71T2zxdqCOPAREtAL mSE0m1N/YX7pHBxmZA1x8fXQXOpo7N1VxlBozdSxgNjsvwunX8NKyjvRsbjfQH/yuqD/ Nv7OHc6gMJh9pumRIJcj/BiVt2HoLa3YyKk162ov4fThfJjaE6A842dM93AH1xx5qqXy D+gQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828237; x=1724433037; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7+bsO6A/4UIjh+UAI8JcbcWlILl99UyeWUeQ1BHs21E=; b=cFuLjCydxljMAiG6a/qd+18R8SdY4JcjD6rWIHAMycPnfxcSw5s2aqvswb0uoQLFUK ZJUgL+m1ew0gPlcK/WcoW4I6w3GXUdTFRyWI+pm+U/gg8UJWenf0kyYQWCQHJGpgES+B G3TcqVMa/wuS/aQX6SeRnSFhB81QLf5BPPbStT9vJAlBZ6YGovC0hL1/DyV3goTdNw59 MqwfOpa6jyxY34f2Cv/czRcwmloqhVBT1L2fQpgc7ShhAwocKrlgP5z8cs8oeR/BU5Sz 7AQ4i9MzQ+4+ZJseL9y7jaiAh0jrMOKnpw4yF+5xoJv8SeKcA+gHm4lHKulx7AQwvUHo WpdQ== X-Gm-Message-State: AOJu0Yyuu1p6quBDKaffxW8aWAgFFpEJlhMEJ8nR5/7rsG18NalSxgB1 qR1tHWMD8A5Q2DHO2CiWVnfNX4Fz7kjX72SaXZlLX6rq0y1CqXXmvQpZqAn/mRU= X-Google-Smtp-Source: AGHT+IH7ao67LJ4flg23yJUplV/POt3Du98roKvuaxnAGrwEhqb0IemDYsCi09oGXaNKTC2VHDDUnA== X-Received: by 2002:a17:90b:4d8f:b0:2d3:da82:28e0 with SMTP id 98e67ed59e1d1-2d3dfc37993mr3646517a91.9.1723828236482; Fri, 16 Aug 2024 10:10:36 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:36 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 14/17] bsd-user: Implement RISC-V signal trampoline setup functions Date: Sat, 17 Aug 2024 03:09:46 +1000 Message-Id: <20240816170949.238511-15-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=itachis6234@gmail.com; helo=mail-pg1-x535.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Added functions for setting up the RISC-V signal trampoline and signal frame: 'set_sigtramp_args()': Configures the RISC-V CPU state with arguments for the signal handler. It sets up the registers with the signal number,pointers to the signal info and user context, the signal handler address, and the signal frame pointer. 'setup_sigframe_arch()': Initializes the signal frame with the current machine context.This function copies the context from the CPU state to the signal frame, preparing it for the signal handler. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Signed-off-by: Warner Losh Co-authored-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/riscv/signal.c | 63 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 bsd-user/riscv/signal.c diff --git a/bsd-user/riscv/signal.c b/bsd-user/riscv/signal.c new file mode 100644 index 0000000000..2597fec2fd --- /dev/null +++ b/bsd-user/riscv/signal.c @@ -0,0 +1,63 @@ +/* + * RISC-V signal definitions + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ +#include "qemu/osdep.h" + +#include "qemu.h" + +/* + * Compare with sendsig() in riscv/riscv/exec_machdep.c + * Assumes that target stack frame memory is locked. + */ +abi_long +set_sigtramp_args(CPURISCVState *regs, int sig, struct target_sigframe *frame, + abi_ulong frame_addr, struct target_sigaction *ka) +{ + /* + * Arguments to signal handler: + * a0 (10) = signal number + * a1 (11) = siginfo pointer + * a2 (12) = ucontext pointer + * pc = signal pointer handler + * sp (2) = sigframe pointer + * ra (1) = sigtramp at base of user stack + */ + + regs->gpr[xA0] = sig; + regs->gpr[xA1] = frame_addr + + offsetof(struct target_sigframe, sf_si); + regs->gpr[xA2] = frame_addr + + offsetof(struct target_sigframe, sf_uc); + regs->pc = ka->_sa_handler; + regs->gpr[xSP] = frame_addr; + regs->gpr[xRA] = TARGET_PS_STRINGS - TARGET_SZSIGCODE; + return 0; +} + +/* + * Compare to riscv/riscv/exec_machdep.c sendsig() + * Assumes that the memory is locked if frame points to user memory. + */ +abi_long setup_sigframe_arch(CPURISCVState *env, abi_ulong frame_addr, + struct target_sigframe *frame, int flags) +{ + target_mcontext_t *mcp = &frame->sf_uc.uc_mcontext; + + get_mcontext(env, mcp, flags); + return 0; +} From patchwork Fri Aug 16 17:09:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766668 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E8B8FC531DC for ; Fri, 16 Aug 2024 17:12:03 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sf0TQ-0007Co-5M; Fri, 16 Aug 2024 13:10:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sf0TK-0006Vi-OX for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:42 -0400 Received: from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sf0TI-0007Q4-TD for qemu-devel@nongnu.org; Fri, 16 Aug 2024 13:10:42 -0400 Received: by mail-pg1-x52b.google.com with SMTP id 41be03b00d2f7-7c6b03c414fso788958a12.2 for ; Fri, 16 Aug 2024 10:10:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723828239; x=1724433039; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gy74LlRTmtwc1XLq4kdnjaS7OlYM0YhDmnWN/nXgpX8=; b=cZyaZh3GzwBuYcVV1amPt7INb9cOazQUKPKM9hUMflpuLffjk58/OHJi5mhtpmGhdy i71Jagd+JWT+mzi0nPJd5ic3oKubxsB9hhBK+pzjb52gjOan8JyWYxcZ4qYYSy3CPDTT tF1B0GF855QZaMVbKnWdIQMoxkaQaED1otFqReOTbQtyL9Km6CBQrwxTv0m5h6CjWZjo J7zj3bFHK+QQYe9fzKBLgeVh/BDLzRlxuxPe6kipgRLeWoypH0QjHgq4grGxew2uxba/ R60VKVmMG62MscKcHrGzwUib46nVpHjije5xpRYdhEhHTKVAF7ef1W5nQAsUs8pAcgMs VW9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723828239; x=1724433039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gy74LlRTmtwc1XLq4kdnjaS7OlYM0YhDmnWN/nXgpX8=; b=l1GkbW3igEZRuHX/7ZL+Q94UucI7qTzfT3Rx/FBWSqxsiiyUQGYYUTrzZDdSjpncz/ +vTtAelUBgWtyRpHQcnkr10/jYG3TFhECc7gPqtOo0yxVyfwgl+BE4U1nI6hIWc8F4QT NHy+rVUEsLAfcOFTLlBG/YOJepC7up9gvu4+oK9nV+jyHBCm1pKG4AHrLpsKLV1GGt4h X2OjsL3KhFjXFxOfYy5MWV8HWfR52OLpZ3Y5dMdSmVN4gzZaPo/v91FxePaAI4ys7SjD iiIBJiWe7VxXqBfmpapJgSfhAb49YYCxPzwSnt69+ZpMTFWAxcCw4qxI2oemx6xtrss2 z0bg== X-Gm-Message-State: AOJu0Yzm/QDQt/tV1Qpq2Hqt8an7J5+9qeHlDPmLOYEnjMwwCcZCrSFx 5yUQuwmoZQ9n2EiA/OtmgbLWTwNH/W0v+TfC6mhUiRlY+QMWOlC62ItwJGrhuJ0= X-Google-Smtp-Source: AGHT+IGjg1mly/XIYVqi6sIAY6I/oLkMW2QK0E/3bkXpdiqm7tt6BCkNotk/Yy7Q1nbZTposy8BDHA== X-Received: by 2002:a17:90a:5e0f:b0:2c8:e3e6:ec99 with SMTP id 98e67ed59e1d1-2d3e03f2820mr3542541a91.43.1723828239036; Fri, 16 Aug 2024 10:10:39 -0700 (PDT) Received: from localhost.localdomain (121-45-122-195.tpgi.com.au. [121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:38 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 15/17] bsd-user: Implement 'get_mcontext' for RISC-V Date: Sat, 17 Aug 2024 03:09:47 +1000 Message-Id: <20240816170949.238511-16-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=itachis6234@gmail.com; helo=mail-pg1-x52b.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Added the 'get_mcontext' function to extract and populate the RISC-V machine context from the CPU state. This function is used to gather the current state of the general-purpose registers and store it in a 'target_mcontext_' structure. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Signed-off-by: Warner Losh Co-authored-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/riscv/signal.c | 53 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/bsd-user/riscv/signal.c b/bsd-user/riscv/signal.c index 2597fec2fd..072ad821d2 100644 --- a/bsd-user/riscv/signal.c +++ b/bsd-user/riscv/signal.c @@ -61,3 +61,56 @@ abi_long setup_sigframe_arch(CPURISCVState *env, abi_ulong frame_addr, get_mcontext(env, mcp, flags); return 0; } + +/* + * Compare with get_mcontext() in riscv/riscv/machdep.c + * Assumes that the memory is locked if mcp points to user memory. + */ +abi_long get_mcontext(CPURISCVState *regs, target_mcontext_t *mcp, + int flags) +{ + + mcp->mc_gpregs.gp_t[0] = tswap64(regs->gpr[5]); + mcp->mc_gpregs.gp_t[1] = tswap64(regs->gpr[6]); + mcp->mc_gpregs.gp_t[2] = tswap64(regs->gpr[7]); + mcp->mc_gpregs.gp_t[3] = tswap64(regs->gpr[28]); + mcp->mc_gpregs.gp_t[4] = tswap64(regs->gpr[29]); + mcp->mc_gpregs.gp_t[5] = tswap64(regs->gpr[30]); + mcp->mc_gpregs.gp_t[6] = tswap64(regs->gpr[31]); + + mcp->mc_gpregs.gp_s[0] = tswap64(regs->gpr[8]); + mcp->mc_gpregs.gp_s[1] = tswap64(regs->gpr[9]); + mcp->mc_gpregs.gp_s[2] = tswap64(regs->gpr[18]); + mcp->mc_gpregs.gp_s[3] = tswap64(regs->gpr[19]); + mcp->mc_gpregs.gp_s[4] = tswap64(regs->gpr[20]); + mcp->mc_gpregs.gp_s[5] = tswap64(regs->gpr[21]); + mcp->mc_gpregs.gp_s[6] = tswap64(regs->gpr[22]); + mcp->mc_gpregs.gp_s[7] = tswap64(regs->gpr[23]); + mcp->mc_gpregs.gp_s[8] = tswap64(regs->gpr[24]); + mcp->mc_gpregs.gp_s[9] = tswap64(regs->gpr[25]); + mcp->mc_gpregs.gp_s[10] = tswap64(regs->gpr[26]); + mcp->mc_gpregs.gp_s[11] = tswap64(regs->gpr[27]); + + mcp->mc_gpregs.gp_a[0] = tswap64(regs->gpr[10]); + mcp->mc_gpregs.gp_a[1] = tswap64(regs->gpr[11]); + mcp->mc_gpregs.gp_a[2] = tswap64(regs->gpr[12]); + mcp->mc_gpregs.gp_a[3] = tswap64(regs->gpr[13]); + mcp->mc_gpregs.gp_a[4] = tswap64(regs->gpr[14]); + mcp->mc_gpregs.gp_a[5] = tswap64(regs->gpr[15]); + mcp->mc_gpregs.gp_a[6] = tswap64(regs->gpr[16]); + mcp->mc_gpregs.gp_a[7] = tswap64(regs->gpr[17]); + + if (flags & TARGET_MC_GET_CLEAR_RET) { + mcp->mc_gpregs.gp_a[0] = 0; /* a0 */ + mcp->mc_gpregs.gp_a[1] = 0; /* a1 */ + mcp->mc_gpregs.gp_t[0] = 0; /* clear syscall error */ + } + + mcp->mc_gpregs.gp_ra = tswap64(regs->gpr[1]); + mcp->mc_gpregs.gp_sp = tswap64(regs->gpr[2]); + mcp->mc_gpregs.gp_gp = tswap64(regs->gpr[3]); + mcp->mc_gpregs.gp_tp = tswap64(regs->gpr[4]); + mcp->mc_gpregs.gp_sepc = tswap64(regs->pc); + + return 0; +} From patchwork Fri Aug 16 17:09:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7DE1CC3DA4A for ; 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[121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:41 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 16/17] bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV Date: Sat, 17 Aug 2024 03:09:48 +1000 Message-Id: <20240816170949.238511-17-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=itachis6234@gmail.com; helo=mail-pj1-x1029.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Corbin Added implementations for 'set_mcontext' and 'get_ucontext_sigreturn' functions for RISC-V architecture, Both functions ensure that the CPU state and user context are properly managed. Signed-off-by: Mark Corbin Signed-off-by: Warner Losh Signed-off-by: Ajeet Singh Co-authored-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/riscv/signal.c | 54 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/bsd-user/riscv/signal.c b/bsd-user/riscv/signal.c index 072ad821d2..10c940cd49 100644 --- a/bsd-user/riscv/signal.c +++ b/bsd-user/riscv/signal.c @@ -114,3 +114,57 @@ abi_long get_mcontext(CPURISCVState *regs, target_mcontext_t *mcp, return 0; } + +/* Compare with set_mcontext() in riscv/riscv/exec_machdep.c */ +abi_long set_mcontext(CPURISCVState *regs, target_mcontext_t *mcp, + int srflag) +{ + + regs->gpr[5] = tswap64(mcp->mc_gpregs.gp_t[0]); + regs->gpr[6] = tswap64(mcp->mc_gpregs.gp_t[1]); + regs->gpr[7] = tswap64(mcp->mc_gpregs.gp_t[2]); + regs->gpr[28] = tswap64(mcp->mc_gpregs.gp_t[3]); + regs->gpr[29] = tswap64(mcp->mc_gpregs.gp_t[4]); + regs->gpr[30] = tswap64(mcp->mc_gpregs.gp_t[5]); + regs->gpr[31] = tswap64(mcp->mc_gpregs.gp_t[6]); + + regs->gpr[8] = tswap64(mcp->mc_gpregs.gp_s[0]); + regs->gpr[9] = tswap64(mcp->mc_gpregs.gp_s[1]); + regs->gpr[18] = tswap64(mcp->mc_gpregs.gp_s[2]); + regs->gpr[19] = tswap64(mcp->mc_gpregs.gp_s[3]); + regs->gpr[20] = tswap64(mcp->mc_gpregs.gp_s[4]); + regs->gpr[21] = tswap64(mcp->mc_gpregs.gp_s[5]); + regs->gpr[22] = tswap64(mcp->mc_gpregs.gp_s[6]); + regs->gpr[23] = tswap64(mcp->mc_gpregs.gp_s[7]); + regs->gpr[24] = tswap64(mcp->mc_gpregs.gp_s[8]); + regs->gpr[25] = tswap64(mcp->mc_gpregs.gp_s[9]); + regs->gpr[26] = tswap64(mcp->mc_gpregs.gp_s[10]); + regs->gpr[27] = tswap64(mcp->mc_gpregs.gp_s[11]); + + regs->gpr[10] = tswap64(mcp->mc_gpregs.gp_a[0]); + regs->gpr[11] = tswap64(mcp->mc_gpregs.gp_a[1]); + regs->gpr[12] = tswap64(mcp->mc_gpregs.gp_a[2]); + regs->gpr[13] = tswap64(mcp->mc_gpregs.gp_a[3]); + regs->gpr[14] = tswap64(mcp->mc_gpregs.gp_a[4]); + regs->gpr[15] = tswap64(mcp->mc_gpregs.gp_a[5]); + regs->gpr[16] = tswap64(mcp->mc_gpregs.gp_a[6]); + regs->gpr[17] = tswap64(mcp->mc_gpregs.gp_a[7]); + + + regs->gpr[1] = tswap64(mcp->mc_gpregs.gp_ra); + regs->gpr[2] = tswap64(mcp->mc_gpregs.gp_sp); + regs->gpr[3] = tswap64(mcp->mc_gpregs.gp_gp); + regs->gpr[4] = tswap64(mcp->mc_gpregs.gp_tp); + regs->pc = tswap64(mcp->mc_gpregs.gp_sepc); + + return 0; +} + +/* Compare with sys_sigreturn() in riscv/riscv/machdep.c */ +abi_long get_ucontext_sigreturn(CPURISCVState *regs, + abi_ulong target_sf, abi_ulong *target_uc) +{ + + *target_uc = target_sf; + return 0; +} From patchwork Fri Aug 16 17:09:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 13766671 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E8BA3C531DC for ; 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[121.45.122.195]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d3ac7ca33dsm5988407a91.6.2024.08.16.10.10.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 10:10:43 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v2 17/17] bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML Files Date: Sat, 17 Aug 2024 03:09:49 +1000 Message-Id: <20240816170949.238511-18-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816170949.238511-1-itachis@FreeBSD.org> References: <20240816170949.238511-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=itachis6234@gmail.com; helo=mail-pf1-x436.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Warner Losh Added configuration for RISC-V 64-bit target to the build system. Signed-off-by: Warner Losh Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- configs/targets/riscv64-bsd-user.mak | 4 ++++ 1 file changed, 4 insertions(+) create mode 100644 configs/targets/riscv64-bsd-user.mak diff --git a/configs/targets/riscv64-bsd-user.mak b/configs/targets/riscv64-bsd-user.mak new file mode 100644 index 0000000000..191c2c483f --- /dev/null +++ b/configs/targets/riscv64-bsd-user.mak @@ -0,0 +1,4 @@ +TARGET_ARCH=riscv64 +TARGET_BASE_ARCH=riscv +TARGET_ABI_DIR=riscv +TARGET_XML_FILES= gdb-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-64bit-virtual.xml