From patchwork Wed Mar 6 01:26:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 10840293 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DAB231515 for ; Wed, 6 Mar 2019 01:26:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C7F882CFEF for ; Wed, 6 Mar 2019 01:26:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BC9062CFF7; Wed, 6 Mar 2019 01:26:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 783E22CFEF for ; Wed, 6 Mar 2019 01:26:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 090626E046; Wed, 6 Mar 2019 01:26:55 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id ADF5D6E03E for ; Wed, 6 Mar 2019 01:26:51 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Mar 2019 17:26:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,445,1544515200"; d="scan'208";a="149616611" Received: from ldmartin-desk.jf.intel.com ([10.24.9.41]) by fmsmga004.fm.intel.com with ESMTP; 05 Mar 2019 17:26:49 -0800 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org Date: Tue, 5 Mar 2019 17:26:32 -0800 Message-Id: <20190306012636.18619-2-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190306012636.18619-1-lucas.demarchi@intel.com> References: <20190306012636.18619-1-lucas.demarchi@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/5] drm/i915/icl: split combo and mg pll enable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Let's start using the vfuncs to differentiate MG and Combo PLLs. The end goal is to decouple the type of the PLL from the IDs since the latter are likely to change from one platform to another. This also makes the code easier to read by not having lots of if/else chains on leaf functions. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c index e4ec73d415d9..3b3de99756d6 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c @@ -3117,10 +3117,10 @@ static void icl_mg_pll_write(struct drm_i915_private *dev_priv, } static void icl_pll_enable(struct drm_i915_private *dev_priv, - struct intel_shared_dpll *pll) + struct intel_shared_dpll *pll, + i915_reg_t enable_reg) { const enum intel_dpll_id id = pll->info->id; - i915_reg_t enable_reg = icl_pll_id_to_enable_reg(id); u32 val; val = I915_READ(enable_reg); @@ -3157,6 +3157,23 @@ static void icl_pll_enable(struct drm_i915_private *dev_priv, /* DVFS post sequence would be here. See the comment above. */ } +static void combo_pll_enable(struct drm_i915_private *dev_priv, + struct intel_shared_dpll *pll) +{ + i915_reg_t enable_reg = icl_pll_id_to_enable_reg(pll->info->id); + + icl_pll_enable(dev_priv, pll, enable_reg); +} + +static void mg_pll_enable(struct drm_i915_private *dev_priv, + struct intel_shared_dpll *pll) +{ + i915_reg_t enable_reg = + MG_PLL_ENABLE(icl_pll_id_to_tc_port(pll->info->id)); + + icl_pll_enable(dev_priv, pll, enable_reg); +} + static void icl_pll_disable(struct drm_i915_private *dev_priv, struct intel_shared_dpll *pll) { @@ -3218,13 +3235,13 @@ static void icl_dump_hw_state(struct drm_i915_private *dev_priv, } static const struct intel_shared_dpll_funcs icl_pll_funcs = { - .enable = icl_pll_enable, + .enable = combo_pll_enable, .disable = icl_pll_disable, .get_hw_state = icl_pll_get_hw_state, }; static const struct intel_shared_dpll_funcs mg_pll_funcs = { - .enable = icl_pll_enable, + .enable = mg_pll_enable, .disable = icl_pll_disable, .get_hw_state = mg_pll_get_hw_state, }; From patchwork Wed Mar 6 01:26:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 10840287 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 36A6117E0 for ; Wed, 6 Mar 2019 01:26:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 22F512CFEF for ; Wed, 6 Mar 2019 01:26:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 15F8F2CFF7; Wed, 6 Mar 2019 01:26:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C12F32CFEF for ; Wed, 6 Mar 2019 01:26:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E10156E034; Wed, 6 Mar 2019 01:26:52 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id D579D6E034 for ; Wed, 6 Mar 2019 01:26:51 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Mar 2019 17:26:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,445,1544515200"; d="scan'208";a="149616614" Received: from ldmartin-desk.jf.intel.com ([10.24.9.41]) by fmsmga004.fm.intel.com with ESMTP; 05 Mar 2019 17:26:50 -0800 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org Date: Tue, 5 Mar 2019 17:26:33 -0800 Message-Id: <20190306012636.18619-3-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190306012636.18619-1-lucas.demarchi@intel.com> References: <20190306012636.18619-1-lucas.demarchi@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/5] drm/i915/icl: use a function pointer for pll_write when enabling X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This allows us to share the icl_pll_enable() between the different types of PLL while allowing the caller to differentiate how to write the registers. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c index 3b3de99756d6..5511bc23ea3d 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c @@ -3118,9 +3118,10 @@ static void icl_mg_pll_write(struct drm_i915_private *dev_priv, static void icl_pll_enable(struct drm_i915_private *dev_priv, struct intel_shared_dpll *pll, - i915_reg_t enable_reg) + i915_reg_t enable_reg, + void (*pll_write)(struct drm_i915_private *dev_priv, + struct intel_shared_dpll *pll)) { - const enum intel_dpll_id id = pll->info->id; u32 val; val = I915_READ(enable_reg); @@ -3133,12 +3134,9 @@ static void icl_pll_enable(struct drm_i915_private *dev_priv, */ if (intel_wait_for_register(dev_priv, enable_reg, PLL_POWER_STATE, PLL_POWER_STATE, 1)) - DRM_ERROR("PLL %d Power not enabled\n", id); + DRM_ERROR("PLL %d Power not enabled\n", pll->info->id); - if (intel_dpll_is_combophy(id) || id == DPLL_ID_ICL_TBTPLL) - icl_dpll_write(dev_priv, pll); - else - icl_mg_pll_write(dev_priv, pll); + pll_write(dev_priv, pll); /* * DVFS pre sequence would be here, but in our driver the cdclk code @@ -3152,7 +3150,7 @@ static void icl_pll_enable(struct drm_i915_private *dev_priv, if (intel_wait_for_register(dev_priv, enable_reg, PLL_LOCK, PLL_LOCK, 1)) /* 600us actually. */ - DRM_ERROR("PLL %d not locked\n", id); + DRM_ERROR("PLL %d not locked\n", pll->info->id); /* DVFS post sequence would be here. See the comment above. */ } @@ -3162,7 +3160,7 @@ static void combo_pll_enable(struct drm_i915_private *dev_priv, { i915_reg_t enable_reg = icl_pll_id_to_enable_reg(pll->info->id); - icl_pll_enable(dev_priv, pll, enable_reg); + icl_pll_enable(dev_priv, pll, enable_reg, icl_dpll_write); } static void mg_pll_enable(struct drm_i915_private *dev_priv, @@ -3171,7 +3169,7 @@ static void mg_pll_enable(struct drm_i915_private *dev_priv, i915_reg_t enable_reg = MG_PLL_ENABLE(icl_pll_id_to_tc_port(pll->info->id)); - icl_pll_enable(dev_priv, pll, enable_reg); + icl_pll_enable(dev_priv, pll, enable_reg, icl_mg_pll_write); } static void icl_pll_disable(struct drm_i915_private *dev_priv, From patchwork Wed Mar 6 01:26:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 10840297 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3525817E0 for ; Wed, 6 Mar 2019 01:27:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 20BFF2CFEF for ; Wed, 6 Mar 2019 01:27:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1544A2CFF7; Wed, 6 Mar 2019 01:27:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C08662CFEF for ; Wed, 6 Mar 2019 01:27:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 197EE6E049; Wed, 6 Mar 2019 01:27:00 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 09ACD6E03E for ; Wed, 6 Mar 2019 01:26:52 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Mar 2019 17:26:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,445,1544515200"; d="scan'208";a="149616617" Received: from ldmartin-desk.jf.intel.com ([10.24.9.41]) by fmsmga004.fm.intel.com with ESMTP; 05 Mar 2019 17:26:50 -0800 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org Date: Tue, 5 Mar 2019 17:26:34 -0800 Message-Id: <20190306012636.18619-4-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190306012636.18619-1-lucas.demarchi@intel.com> References: <20190306012636.18619-1-lucas.demarchi@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/5] drm/i915/icl: split combo and mg pll disable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Like was done in the enable case, split the implementation of the disable for MG and Combo PLLs. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 30 ++++++++++++++++++++------- 1 file changed, 23 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c index 5511bc23ea3d..d334dd9bcae6 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c @@ -3173,10 +3173,9 @@ static void mg_pll_enable(struct drm_i915_private *dev_priv, } static void icl_pll_disable(struct drm_i915_private *dev_priv, - struct intel_shared_dpll *pll) + struct intel_shared_dpll *pll, + i915_reg_t enable_reg) { - const enum intel_dpll_id id = pll->info->id; - i915_reg_t enable_reg = icl_pll_id_to_enable_reg(id); u32 val; /* The first steps are done by intel_ddi_post_disable(). */ @@ -3193,7 +3192,7 @@ static void icl_pll_disable(struct drm_i915_private *dev_priv, /* Timeout is actually 1us. */ if (intel_wait_for_register(dev_priv, enable_reg, PLL_LOCK, 0, 1)) - DRM_ERROR("PLL %d locked\n", id); + DRM_ERROR("PLL %d locked\n", pll->info->id); /* DVFS post sequence would be here. See the comment above. */ @@ -3207,7 +3206,24 @@ static void icl_pll_disable(struct drm_i915_private *dev_priv, */ if (intel_wait_for_register(dev_priv, enable_reg, PLL_POWER_STATE, 0, 1)) - DRM_ERROR("PLL %d Power not disabled\n", id); + DRM_ERROR("PLL %d Power not disabled\n", pll->info->id); +} + +static void combo_pll_disable(struct drm_i915_private *dev_priv, + struct intel_shared_dpll *pll) +{ + i915_reg_t enable_reg = icl_pll_id_to_enable_reg(pll->info->id); + + icl_pll_disable(dev_priv, pll, enable_reg); +} + +static void mg_pll_disable(struct drm_i915_private *dev_priv, + struct intel_shared_dpll *pll) +{ + i915_reg_t enable_reg = + MG_PLL_ENABLE(icl_pll_id_to_tc_port(pll->info->id)); + + icl_pll_disable(dev_priv, pll, enable_reg); } static void icl_dump_hw_state(struct drm_i915_private *dev_priv, @@ -3234,13 +3250,13 @@ static void icl_dump_hw_state(struct drm_i915_private *dev_priv, static const struct intel_shared_dpll_funcs icl_pll_funcs = { .enable = combo_pll_enable, - .disable = icl_pll_disable, + .disable = combo_pll_disable, .get_hw_state = icl_pll_get_hw_state, }; static const struct intel_shared_dpll_funcs mg_pll_funcs = { .enable = mg_pll_enable, - .disable = icl_pll_disable, + .disable = mg_pll_disable, .get_hw_state = mg_pll_get_hw_state, }; From patchwork Wed Mar 6 01:26:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 10840291 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F0B6A1515 for ; Wed, 6 Mar 2019 01:26:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DE2D32CFEF for ; Wed, 6 Mar 2019 01:26:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D29A02CFF7; Wed, 6 Mar 2019 01:26:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 739A62CFEF for ; Wed, 6 Mar 2019 01:26:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 530586E043; Wed, 6 Mar 2019 01:26:53 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 302586E034 for ; Wed, 6 Mar 2019 01:26:52 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Mar 2019 17:26:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,445,1544515200"; d="scan'208";a="149616621" Received: from ldmartin-desk.jf.intel.com ([10.24.9.41]) by fmsmga004.fm.intel.com with ESMTP; 05 Mar 2019 17:26:50 -0800 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org Date: Tue, 5 Mar 2019 17:26:35 -0800 Message-Id: <20190306012636.18619-5-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190306012636.18619-1-lucas.demarchi@intel.com> References: <20190306012636.18619-1-lucas.demarchi@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/5] drm/i915/icl: split combo and tbt pll funcs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Like was done for MG and combo, now finish the per-type split of the vfunc by moving TBT out of the combo functions. Now we can completely remove icl_pll_id_to_enable_reg() since each PLL type pass as all the information via arguments. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 63 ++++++++++++++++++--------- 1 file changed, 42 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c index d334dd9bcae6..d26e6f41cb30 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c @@ -2956,16 +2956,6 @@ icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, return pll; } -static i915_reg_t icl_pll_id_to_enable_reg(enum intel_dpll_id id) -{ - if (intel_dpll_is_combophy(id)) - return CNL_DPLL_ENABLE(id); - else if (id == DPLL_ID_ICL_TBTPLL) - return TBT_PLL_ENABLE; - - return MG_PLL_ENABLE(icl_pll_id_to_tc_port(id)); -} - static bool mg_pll_get_hw_state(struct drm_i915_private *dev_priv, struct intel_shared_dpll *pll, struct intel_dpll_hw_state *hw_state) @@ -3030,7 +3020,8 @@ static bool mg_pll_get_hw_state(struct drm_i915_private *dev_priv, static bool icl_pll_get_hw_state(struct drm_i915_private *dev_priv, struct intel_shared_dpll *pll, - struct intel_dpll_hw_state *hw_state) + struct intel_dpll_hw_state *hw_state, + i915_reg_t enable_reg) { const enum intel_dpll_id id = pll->info->id; intel_wakeref_t wakeref; @@ -3042,7 +3033,7 @@ static bool icl_pll_get_hw_state(struct drm_i915_private *dev_priv, if (!wakeref) return false; - val = I915_READ(icl_pll_id_to_enable_reg(id)); + val = I915_READ(enable_reg); if (!(val & PLL_ENABLE)) goto out; @@ -3055,6 +3046,21 @@ static bool icl_pll_get_hw_state(struct drm_i915_private *dev_priv, return ret; } +static bool combo_pll_get_hw_state(struct drm_i915_private *dev_priv, + struct intel_shared_dpll *pll, + struct intel_dpll_hw_state *hw_state) +{ + return icl_pll_get_hw_state(dev_priv, pll, hw_state, + CNL_DPLL_ENABLE(pll->info->id)); +} + +static bool tbt_pll_get_hw_state(struct drm_i915_private *dev_priv, + struct intel_shared_dpll *pll, + struct intel_dpll_hw_state *hw_state) +{ + return icl_pll_get_hw_state(dev_priv, pll, hw_state, TBT_PLL_ENABLE); +} + static void icl_dpll_write(struct drm_i915_private *dev_priv, struct intel_shared_dpll *pll) { @@ -3158,9 +3164,14 @@ static void icl_pll_enable(struct drm_i915_private *dev_priv, static void combo_pll_enable(struct drm_i915_private *dev_priv, struct intel_shared_dpll *pll) { - i915_reg_t enable_reg = icl_pll_id_to_enable_reg(pll->info->id); + icl_pll_enable(dev_priv, pll, CNL_DPLL_ENABLE(pll->info->id), + icl_dpll_write); +} - icl_pll_enable(dev_priv, pll, enable_reg, icl_dpll_write); +static void tbt_pll_enable(struct drm_i915_private *dev_priv, + struct intel_shared_dpll *pll) +{ + icl_pll_enable(dev_priv, pll, TBT_PLL_ENABLE, icl_dpll_write); } static void mg_pll_enable(struct drm_i915_private *dev_priv, @@ -3212,9 +3223,13 @@ static void icl_pll_disable(struct drm_i915_private *dev_priv, static void combo_pll_disable(struct drm_i915_private *dev_priv, struct intel_shared_dpll *pll) { - i915_reg_t enable_reg = icl_pll_id_to_enable_reg(pll->info->id); + icl_pll_disable(dev_priv, pll, CNL_DPLL_ENABLE(pll->info->id)); +} - icl_pll_disable(dev_priv, pll, enable_reg); +static void tbt_pll_disable(struct drm_i915_private *dev_priv, + struct intel_shared_dpll *pll) +{ + icl_pll_disable(dev_priv, pll, TBT_PLL_ENABLE); } static void mg_pll_disable(struct drm_i915_private *dev_priv, @@ -3248,10 +3263,16 @@ static void icl_dump_hw_state(struct drm_i915_private *dev_priv, hw_state->mg_pll_tdc_coldst_bias); } -static const struct intel_shared_dpll_funcs icl_pll_funcs = { +static const struct intel_shared_dpll_funcs combo_pll_funcs = { .enable = combo_pll_enable, .disable = combo_pll_disable, - .get_hw_state = icl_pll_get_hw_state, + .get_hw_state = combo_pll_get_hw_state, +}; + +static const struct intel_shared_dpll_funcs tbt_pll_funcs = { + .enable = tbt_pll_enable, + .disable = tbt_pll_disable, + .get_hw_state = tbt_pll_get_hw_state, }; static const struct intel_shared_dpll_funcs mg_pll_funcs = { @@ -3261,9 +3282,9 @@ static const struct intel_shared_dpll_funcs mg_pll_funcs = { }; static const struct dpll_info icl_plls[] = { - { "DPLL 0", &icl_pll_funcs, DPLL_ID_ICL_DPLL0, 0 }, - { "DPLL 1", &icl_pll_funcs, DPLL_ID_ICL_DPLL1, 0 }, - { "TBT PLL", &icl_pll_funcs, DPLL_ID_ICL_TBTPLL, 0 }, + { "DPLL 0", &combo_pll_funcs, DPLL_ID_ICL_DPLL0, 0 }, + { "DPLL 1", &combo_pll_funcs, DPLL_ID_ICL_DPLL1, 0 }, + { "TBT PLL", &tbt_pll_funcs, DPLL_ID_ICL_TBTPLL, 0 }, { "MG PLL 1", &mg_pll_funcs, DPLL_ID_ICL_MGPLL1, 0 }, { "MG PLL 2", &mg_pll_funcs, DPLL_ID_ICL_MGPLL2, 0 }, { "MG PLL 3", &mg_pll_funcs, DPLL_ID_ICL_MGPLL3, 0 }, From patchwork Wed Mar 6 01:26:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 10840295 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A562717E0 for ; Wed, 6 Mar 2019 01:26:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 933C62CFEF for ; Wed, 6 Mar 2019 01:26:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 878E22CFF7; Wed, 6 Mar 2019 01:26:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4B6732CFEF for ; Wed, 6 Mar 2019 01:26:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9EA2E6E044; Wed, 6 Mar 2019 01:26:56 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4F9896E03E for ; Wed, 6 Mar 2019 01:26:52 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Mar 2019 17:26:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,445,1544515200"; d="scan'208";a="149616624" Received: from ldmartin-desk.jf.intel.com ([10.24.9.41]) by fmsmga004.fm.intel.com with ESMTP; 05 Mar 2019 17:26:50 -0800 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org Date: Tue, 5 Mar 2019 17:26:36 -0800 Message-Id: <20190306012636.18619-6-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190306012636.18619-1-lucas.demarchi@intel.com> References: <20190306012636.18619-1-lucas.demarchi@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 5/5] drm/i915/icl: remove intel_dpll_is_combophy() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This is only used in intel_display() and shouldn't be needed there. We don't want to keep converting from pll id to pll type so just remove the function. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_display.c | 3 --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 5 ----- 2 files changed, 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d852cb282060..c2558231dcb2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9592,9 +9592,6 @@ static void icelake_get_ddi_pll(struct drm_i915_private *dev_priv, temp = I915_READ(DPCLKA_CFGCR0_ICL) & DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port); id = temp >> DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port); - - if (WARN_ON(!intel_dpll_is_combophy(id))) - return; } else if (intel_port_is_tc(dev_priv, port)) { id = icl_tc_port_to_pll_id(intel_port_to_tc(dev_priv, port)); } else { diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c index d26e6f41cb30..5147e0cabb58 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c @@ -2649,11 +2649,6 @@ enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port) return tc_port + DPLL_ID_ICL_MGPLL1; } -bool intel_dpll_is_combophy(enum intel_dpll_id id) -{ - return id == DPLL_ID_ICL_DPLL0 || id == DPLL_ID_ICL_DPLL1; -} - static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc, u32 *target_dco_khz, struct intel_dpll_hw_state *state)