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Mon, 19 Aug 2024 15:57:18 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 01/44] drm: Add helper for conversion from signed-magnitude Date: Mon, 19 Aug 2024 16:56:28 -0400 Message-ID: <20240819205714.316380-2-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB03.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD9:EE_|LV2PR12MB5869:EE_ X-MS-Office365-Filtering-Correlation-Id: 56a63ede-c451-4ced-f3cb-08dcc0918482 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|376014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: 4owasCf7iFzGQ+8rNCm3vV7q+Oo/upH5F8vH50HHO5iQRLw2BJiuG4F8iNIZgGk5u+Pod/rufN1LPgaVgAPl1Gy+WtS2bi33ZzKbVO/IWQgvGJTH0ffajLoM6uL7WfWFaoRuGCBIYEpn6tucrrM7uj0hTHSrsazhgmXNT/6pUii7EvoqBBRJV3th3v1Vyvr3yZmMxidTNK8vl0GygbUN6LPv7/2q9sW+bpAi8MOjseQXN3lyAC6ewcpQ3ac7hBQ3S2gS6CoeJgYf6yZ/Mt2PKNr4JRycjKtgzcsiHVkVNz+SvPgA4HLp5ShraKYG7LwC1FW5iwaF8ruta6MDR9MSD+2guJyaPG/Ur7kT2ilmNd2/79T2KWOeeAQ4z6/k5AMAiF8hTK92iqRho8cQxp2cOWaaliGMCxQ4euXprZgHm4YrGX5pzWPpH4JmqurHyXKwz6mKQkPt4OOqEn1ePgvi66rAjRkZ0yi8GxSk+uR5fFmLOUyCnyUeJ6JWLz2RAsSiZTWNU/5NgC7ESkg+ZZ64FK7bAwsbnrO892fDH+AA6PnOJ4pKa33XMOM0QOhc+sgMfkk2zIsA3p5f6c63+TtxUqa9e48AwhLNqoqoh+NFNT/3vO1y3REh5VQSWybi+20RB8BH5ugQGkYcINm3KBPMZMEUUuGCWHxiFd7Cnzm4gxy9m/u0B6AABBeiOhg1VGGlvFtnwDlrpK5ule7RBMi7rN8s4AMnZqTF82adC/uUo/sZI/JXGVPXwsFX405A+OaYTY1AzeUIlNDaAkyXE3UCMsXd/4dpRBeRHfX7s9oK0dNK55CyKJ89NX8V0jaZY1KklaQhatoZR4Mp2ep6JLOZzC0BwTGyLC1eu6A+9TgdoMVsW6iKJNKbDreeki5c9xJ98i40wVkbGGXgnGaDgkpSiQwWEWKTrK7wRFknW8NjJDBeedgBZv60ABvoHdEOuPKbKEdyO9h2Haz0kTDsB1nElALObg5/HzAsqBj9K32vh/sLoY0oZEX4JLmvM3qzOdHUrrXJocQhlymP62CXe9cD7NgUhfCgNAULAAmJbMKShHvnaX3G6Xn61Gkc8s7BzlMPFEWMAgKzB5GoOVQYJUfeCj2cC5uGnC3psaWSmP+983Ny2eRgaoXiBz/CcxM1LbDa75Ur7fJDs/fKqvBeoV+dWH36kYKnagWdKdq7Q73qrE4ctKCv37vqa6J8bkl+THxjBLJFykg6NGAlMS87VzsA9dgL+tGUSJ+ELX1VCl0phGgWlByjKtv4dEX46nrPat8dssoI/VpXk77h0XndFYzugvMmvOuyyyDn9wHie23Ckf1D/rGhulxkdVV0TrcThDu4qeyyRhcF/BqlyjvN8uoDvDjeHAym0lQLzSjAS5k9Hr1PHq5R0h4m+XnauiojFsDz6P9PSjUCRaLPLLApW1BMKZnWnZhZQ75L9T4l4YQ8FMcB5jCEbZ3vnAZP+4FrHGjr X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(376014)(82310400026)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:20.4952 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 56a63ede-c451-4ced-f3cb-08dcc0918482 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5869 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" CTM values are defined as signed-magnitude values. Add a helper that converts from CTM signed-magnitude fixed point value to the twos-complement value used by drm_fixed. Signed-off-by: Harry Wentland --- include/drm/drm_fixed.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/include/drm/drm_fixed.h b/include/drm/drm_fixed.h index ef8bc8d72039..793768c1e776 100644 --- a/include/drm/drm_fixed.h +++ b/include/drm/drm_fixed.h @@ -77,6 +77,24 @@ static inline u32 dfixed_div(fixed20_12 A, fixed20_12 B) #define DRM_FIXED_EPSILON 1LL #define DRM_FIXED_ALMOST_ONE (DRM_FIXED_ONE - DRM_FIXED_EPSILON) +/** + * @drm_sm2fixp + * + * Convert a 1.31.32 signed-magnitude fixed point to 32.32 + * 2s-complement fixed point + * + * @return s64 2s-complement fixed point + */ +static inline s64 drm_sm2fixp(__u64 a) +{ + if ((a & (1LL << 63))) { + return -(a & 0x7fffffffffffffffll); + } else { + return a; + } + +} + static inline s64 drm_int2fixp(int a) { return ((s64)a) << DRM_FIXED_POINT; From patchwork Mon Aug 19 20:56:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768966 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D5A1DC52D7C for ; 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We need the new fixp2int_round. Signed-off-by: Harry Wentland Reviewed-by: Louis Chauvet --- drivers/gpu/drm/vkms/vkms_composer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vkms/vkms_composer.c b/drivers/gpu/drm/vkms/vkms_composer.c index e7441b227b3c..3d6785d081f2 100644 --- a/drivers/gpu/drm/vkms/vkms_composer.c +++ b/drivers/gpu/drm/vkms/vkms_composer.c @@ -98,7 +98,7 @@ static u16 lerp_u16(u16 a, u16 b, s64 t) s64 delta = drm_fixp_mul(b_fp - a_fp, t); - return drm_fixp2int(a_fp + delta); + return drm_fixp2int_round(a_fp + delta); } static s64 get_lut_index(const struct vkms_color_lut *lut, u16 channel_value) From patchwork Mon Aug 19 20:56:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768972 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 066EEC52D7C for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by MN1PEPF0000ECD9.mail.protection.outlook.com (10.167.242.138) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7849.8 via Frontend Transport; Mon, 19 Aug 2024 20:57:21 +0000 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 19 Aug 2024 15:57:20 -0500 Received: from localhost.localdomain (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Mon, 19 Aug 2024 15:57:20 -0500 From: Harry Wentland To: , CC: , Harry Wentland , Arthur Grillo Subject: [PATCH v5 03/44] drm/vkms: Add kunit tests for VKMS LUT handling Date: Mon, 19 Aug 2024 16:56:30 -0400 Message-ID: <20240819205714.316380-4-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB03.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD9:EE_|SJ0PR12MB6968:EE_ X-MS-Office365-Filtering-Correlation-Id: 294d47cb-924e-44dd-c57d-08dcc0918516 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:21.4639 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 294d47cb-924e-44dd-c57d-08dcc0918516 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6968 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Debugging LUT math is much easier when we can unit test it. Add kunit functionality to VKMS and add tests for - get_lut_index - lerp_u16 v5: - Bring back static for lerp_u16 and get_lut_index (Arthur) v4: - Test the critical points of the lerp function (Pekka) v3: - Use include way of testing static functions (Arthur) Signed-off-by: Harry Wentland Cc: Arthur Grillo --- drivers/gpu/drm/vkms/Kconfig | 5 + drivers/gpu/drm/vkms/tests/.kunitconfig | 4 + drivers/gpu/drm/vkms/tests/vkms_color_tests.c | 163 ++++++++++++++++++ drivers/gpu/drm/vkms/vkms_composer.c | 4 + 4 files changed, 176 insertions(+) create mode 100644 drivers/gpu/drm/vkms/tests/.kunitconfig create mode 100644 drivers/gpu/drm/vkms/tests/vkms_color_tests.c diff --git a/drivers/gpu/drm/vkms/Kconfig b/drivers/gpu/drm/vkms/Kconfig index b9ecdebecb0b..c1f8b343ff0e 100644 --- a/drivers/gpu/drm/vkms/Kconfig +++ b/drivers/gpu/drm/vkms/Kconfig @@ -13,3 +13,8 @@ config DRM_VKMS a VKMS. If M is selected the module will be called vkms. + +config DRM_VKMS_KUNIT_TESTS + tristate "Tests for VKMS" if !KUNIT_ALL_TESTS + depends on DRM_VKMS && KUNIT + default KUNIT_ALL_TESTS diff --git a/drivers/gpu/drm/vkms/tests/.kunitconfig b/drivers/gpu/drm/vkms/tests/.kunitconfig new file mode 100644 index 000000000000..70e378228cbd --- /dev/null +++ b/drivers/gpu/drm/vkms/tests/.kunitconfig @@ -0,0 +1,4 @@ +CONFIG_KUNIT=y +CONFIG_DRM=y +CONFIG_DRM_VKMS=y +CONFIG_DRM_VKMS_KUNIT_TESTS=y diff --git a/drivers/gpu/drm/vkms/tests/vkms_color_tests.c b/drivers/gpu/drm/vkms/tests/vkms_color_tests.c new file mode 100644 index 000000000000..fc73e48aa57c --- /dev/null +++ b/drivers/gpu/drm/vkms/tests/vkms_color_tests.c @@ -0,0 +1,163 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#include + +#include + +#define TEST_LUT_SIZE 16 + +static struct drm_color_lut test_linear_array[TEST_LUT_SIZE] = { + { 0x0, 0x0, 0x0, 0 }, + { 0x1111, 0x1111, 0x1111, 0 }, + { 0x2222, 0x2222, 0x2222, 0 }, + { 0x3333, 0x3333, 0x3333, 0 }, + { 0x4444, 0x4444, 0x4444, 0 }, + { 0x5555, 0x5555, 0x5555, 0 }, + { 0x6666, 0x6666, 0x6666, 0 }, + { 0x7777, 0x7777, 0x7777, 0 }, + { 0x8888, 0x8888, 0x8888, 0 }, + { 0x9999, 0x9999, 0x9999, 0 }, + { 0xaaaa, 0xaaaa, 0xaaaa, 0 }, + { 0xbbbb, 0xbbbb, 0xbbbb, 0 }, + { 0xcccc, 0xcccc, 0xcccc, 0 }, + { 0xdddd, 0xdddd, 0xdddd, 0 }, + { 0xeeee, 0xeeee, 0xeeee, 0 }, + { 0xffff, 0xffff, 0xffff, 0 }, +}; + +const struct vkms_color_lut test_linear_lut = { + .base = test_linear_array, + .lut_length = TEST_LUT_SIZE, + .channel_value2index_ratio = 0xf000fll +}; + + +static void vkms_color_test_get_lut_index(struct kunit *test) +{ + int i; + + KUNIT_EXPECT_EQ(test, drm_fixp2int(get_lut_index(&test_linear_lut, test_linear_array[0].red)), 0); + + for (i = 0; i < TEST_LUT_SIZE; i++) + KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&test_linear_lut, test_linear_array[i].red)), i); +} + +static void vkms_color_test_lerp(struct kunit *test) +{ + /*** half-way round down ***/ + s64 t = 0x80000000 - 1; + KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x8); + + /* odd a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x8); + + /* odd b */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0x8); + + /* b = a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10); + + /* b = a + 1 */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x10); + + + /*** half-way round up ***/ + t = 0x80000000; + KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x8); + + /* odd a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x9); + + /* odd b */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0x8); + + /* b = a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10); + + /* b = a + 1 */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x11); + + /*** t = 0.0 ***/ + t = 0x0; + KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x0); + + /* odd a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x1); + + /* odd b */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0x1); + + /* b = a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10); + + /* b = a + 1 */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x10); + + /*** t = 1.0 ***/ + t = 0x100000000; + KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x10); + + /* odd a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x10); + + /* odd b */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0xf); + + /* b = a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10); + + /* b = a + 1 */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x11); + + + /*** t = 0.0 + 1 ***/ + t = 0x0 + 1; + KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x0); + + /* odd a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x1); + + /* odd b */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0x1); + + /* b = a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10); + + /* b = a + 1 */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x10); + + /*** t = 1.0 - 1 ***/ + t = 0x100000000 - 1; + KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x10); + + /* odd a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x10); + + /* odd b */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0xf); + + /* b = a */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10); + + /* b = a + 1 */ + KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x11); + + + /*** t chosen to verify the flipping point of result a (or b) to a+1 (or b-1) ***/ + KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x1, 0x80000000 - 1), 0x0); + KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x1, 0x80000000), 0x1); +} + +static struct kunit_case vkms_color_test_cases[] = { + KUNIT_CASE(vkms_color_test_get_lut_index), + KUNIT_CASE(vkms_color_test_lerp), + {} +}; + +static struct kunit_suite vkms_color_test_suite = { + .name = "vkms-color", + .test_cases = vkms_color_test_cases, +}; +kunit_test_suite(vkms_color_test_suite); + +MODULE_LICENSE("GPL"); \ No newline at end of file diff --git a/drivers/gpu/drm/vkms/vkms_composer.c b/drivers/gpu/drm/vkms/vkms_composer.c index 3d6785d081f2..3ecda70c2b55 100644 --- a/drivers/gpu/drm/vkms/vkms_composer.c +++ b/drivers/gpu/drm/vkms/vkms_composer.c @@ -435,3 +435,7 @@ int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name) return ret; } + +#ifdef CONFIG_DRM_VKMS_KUNIT_TESTS +#include "tests/vkms_color_tests.c" +#endif From patchwork Mon Aug 19 20:56:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768979 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9BAE8C52D7C for ; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:22.5733 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f3df29f2-e6c2-47fc-0cbe-08dcc09185c0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8884 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" v5: - Don't require BYPASS to succeed (Sebastian) - use DATA for 1D and 3D LUT types (Sebastian) - update 3DLUT ops to use 3DLUT_MODES and 3DLUT_MODE_INDEX - Add section on drm_colorop extensibility - Add color_pipeline.rst to RFC toc tree v4: - Drop IOCTL docs since we dropped the IOCTLs (Pekka) - Clarify reading and setting of COLOR_PIPELINE prop (Pekka) - Add blurb about not requiring to reject a pipeline due to incompatible ops, as long as op can be bypassed (Pekka) - Dropped informational strings (such as input CSC) as they're not actually intended to be advertised (Pekka) v3: - Describe DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE (Sebastian) - Ask for clear documentation of colorop behavior (Sebastian) v2: - Update colorop visualizations to match reality (Sebastian, Alex Hung) - Updated wording (Pekka) - Change BYPASS wording to make it non-mandatory (Sebastian) - Drop cover-letter-like paragraph from COLOR_PIPELINE Plane Property section (Pekka) - Use PQ EOTF instead of its inverse in Pipeline Programming example (Melissa) - Add "Driver Implementer's Guide" section (Pekka) - Add "Driver Forward/Backward Compatibility" section (Sebastian, Pekka) Signed-off-by: Harry Wentland --- Documentation/gpu/rfc/color_pipeline.rst | 376 +++++++++++++++++++++++ Documentation/gpu/rfc/index.rst | 3 + 2 files changed, 379 insertions(+) create mode 100644 Documentation/gpu/rfc/color_pipeline.rst diff --git a/Documentation/gpu/rfc/color_pipeline.rst b/Documentation/gpu/rfc/color_pipeline.rst new file mode 100644 index 000000000000..4135f07b85a7 --- /dev/null +++ b/Documentation/gpu/rfc/color_pipeline.rst @@ -0,0 +1,376 @@ +======================== +Linux Color Pipeline API +======================== + +What problem are we solving? +============================ + +We would like to support pre-, and post-blending complex color +transformations in display controller hardware in order to allow for +HW-supported HDR use-cases, as well as to provide support to +color-managed applications, such as video or image editors. + +It is possible to support an HDR output on HW supporting the Colorspace +and HDR Metadata drm_connector properties, but that requires the +compositor or application to render and compose the content into one +final buffer intended for display. Doing so is costly. + +Most modern display HW offers various 1D LUTs, 3D LUTs, matrices, and other +operations to support color transformations. These operations are often +implemented in fixed-function HW and therefore much more power efficient than +performing similar operations via shaders or CPU. + +We would like to make use of this HW functionality to support complex color +transformations with no, or minimal CPU or shader load. + + +How are other OSes solving this problem? +======================================== + +The most widely supported use-cases regard HDR content, whether video or +gaming. + +Most OSes will specify the source content format (color gamut, encoding transfer +function, and other metadata, such as max and average light levels) to a driver. +Drivers will then program their fixed-function HW accordingly to map from a +source content buffer's space to a display's space. + +When fixed-function HW is not available the compositor will assemble a shader to +ask the GPU to perform the transformation from the source content format to the +display's format. + +A compositor's mapping function and a driver's mapping function are usually +entirely separate concepts. On OSes where a HW vendor has no insight into +closed-source compositor code such a vendor will tune their color management +code to visually match the compositor's. On other OSes, where both mapping +functions are open to an implementer they will ensure both mappings match. + +This results in mapping algorithm lock-in, meaning that no-one alone can +experiment with or introduce new mapping algorithms and achieve +consistent results regardless of which implementation path is taken. + +Why is Linux different? +======================= + +Unlike other OSes, where there is one compositor for one or more drivers, on +Linux we have a many-to-many relationship. Many compositors; many drivers. +In addition each compositor vendor or community has their own view of how +color management should be done. This is what makes Linux so beautiful. + +This means that a HW vendor can now no longer tune their driver to one +compositor, as tuning it to one could make it look fairly different from +another compositor's color mapping. + +We need a better solution. + + +Descriptive API +=============== + +An API that describes the source and destination colorspaces is a descriptive +API. It describes the input and output color spaces but does not describe +how precisely they should be mapped. Such a mapping includes many minute +design decision that can greatly affect the look of the final result. + +It is not feasible to describe such mapping with enough detail to ensure the +same result from each implementation. In fact, these mappings are a very active +research area. + + +Prescriptive API +================ + +A prescriptive API describes not the source and destination colorspaces. It +instead prescribes a recipe for how to manipulate pixel values to arrive at the +desired outcome. + +This recipe is generally an ordered list of straight-forward operations, +with clear mathematical definitions, such as 1D LUTs, 3D LUTs, matrices, +or other operations that can be described in a precise manner. + + +The Color Pipeline API +====================== + +HW color management pipelines can significantly differ between HW +vendors in terms of availability, ordering, and capabilities of HW +blocks. This makes a common definition of color management blocks and +their ordering nigh impossible. Instead we are defining an API that +allows user space to discover the HW capabilities in a generic manner, +agnostic of specific drivers and hardware. + + +drm_colorop Object +================== + +To support the definition of color pipelines we define the DRM core +object type drm_colorop. Individual drm_colorop objects will be chained +via the NEXT property of a drm_colorop to constitute a color pipeline. +Each drm_colorop object is unique, i.e., even if multiple color +pipelines have the same operation they won't share the same drm_colorop +object to describe that operation. + +Note that drivers are not expected to map drm_colorop objects statically +to specific HW blocks. The mapping of drm_colorop objects is entirely a +driver-internal detail and can be as dynamic or static as a driver needs +it to be. See more in the Driver Implementation Guide section below. + +Each drm_colorop has three core properties: + +TYPE: An enumeration property, definint the type of transformation, such as +* enumerated curve +* custom (uniform) 1D LUT +* 3x3 matrix +* 3x4 matrix +* 3D LUT +* etc. + +Depending on the type of transformation other properties will describe +more details. + +BYPASS: A boolean property that can be used to easily put a block into +bypass mode. The BYPASS property is not mandatory for a colorop, as long +as the entire pipeline can get bypassed by setting the COLOR_PIPELINE on +a plane to '0'. + +NEXT: The ID of the next drm_colorop in a color pipeline, or 0 if this +drm_colorop is the last in the chain. + +An example of a drm_colorop object might look like one of these:: + + /* 1D enumerated curve */ + Color operation 42 + ├─ "TYPE": immutable enum {1D enumerated curve, 1D LUT, 3x3 matrix, 3x4 matrix, 3D LUT, etc.} = 1D enumerated curve + ├─ "BYPASS": bool {true, false} + ├─ "CURVE_1D_TYPE": enum {sRGB EOTF, sRGB inverse EOTF, PQ EOTF, PQ inverse EOTF, …} + └─ "NEXT": immutable color operation ID = 43 + + /* custom 4k entry 1D LUT */ + Color operation 52 + ├─ "TYPE": immutable enum {1D enumerated curve, 1D LUT, 3x3 matrix, 3x4 matrix, 3D LUT, etc.} = 1D LUT + ├─ "BYPASS": bool {true, false} + ├─ "SIZE": immutable range = 4096 + ├─ "DATA": blob + └─ "NEXT": immutable color operation ID = 0 + + /* 17^3 3D LUT */ + Color operation 72 + ├─ "TYPE": immutable enum {1D enumerated curve, 1D LUT, 3x3 matrix, 3x4 matrix, 3D LUT, etc.} = 3D LUT + ├─ "BYPASS": bool {true, false} + ├─ "3DLUT_MODES": read-only blob of supported 3DLUT modes + ├─ "3DLUT_MODE_INDEX": index of selected 3DLUT mode + ├─ "DATA": blob + └─ "NEXT": immutable color operation ID = 73 + +drm_colorop extensibility +------------------------- + +Unlike existing DRM core objects, like &drm_plane, drm_colorop is not +extensible. This simplifies implementations and keeps all functionality +for managing &drm_colorop objects in the DRM core. + +If there is a need one may introduce a simple &drm_colorop_funcs +function table in the future, for example to support an IN_FORMATS +property on a &drm_colorop. + +If a driver requires the ability to create a driver-specific colorop +object they will need to add &drm_colorop func table support with +support for the usual functions, like destroy, atomic_duplicate_state, +and atomic_destroy_state. + + +COLOR_PIPELINE Plane Property +============================= + +Color Pipelines are created by a driver and advertised via a new +COLOR_PIPELINE enum property on each plane. Values of the property +always include object id 0, which is the default and means all color +processing is disabled. Additional values will be the object IDs of the +first drm_colorop in a pipeline. A driver can create and advertise none, +one, or more possible color pipelines. A DRM client will select a color +pipeline by setting the COLOR PIPELINE to the respective value. + +NOTE: Many DRM clients will set enumeration properties via the string +value, often hard-coding it. Since this enumeration is generated based +on the colorop object IDs it is important to perform the Color Pipeline +Discovery, described below, instead of hard-coding color pipeline +assignment. Drivers might generate the enum strings dynamically. +Hard-coded strings might only work for specific drivers on a specific +pieces of HW. Color Pipeline Discovery can work universally, as long as +drivers implement the required color operations. + +The COLOR_PIPELINE property is only exposed when the +DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE is set. Drivers shall ignore any +existing pre-blend color operations when this cap is set, such as +COLOR_RANGE and COLOR_ENCODING. If drivers want to support COLOR_RANGE +or COLOR_ENCODING functionality when the color pipeline client cap is +set, they are expected to expose colorops in the pipeline to allow for +the appropriate color transformation. + +Setting of the COLOR_PIPELINE plane property or drm_colorop properties +is only allowed for userspace that sets this client cap. + +An example of a COLOR_PIPELINE property on a plane might look like this:: + + Plane 10 + ├─ "TYPE": immutable enum {Overlay, Primary, Cursor} = Primary + ├─ … + └─ "COLOR_PIPELINE": enum {0, 42, 52} = 0 + + +Color Pipeline Discovery +======================== + +A DRM client wanting color management on a drm_plane will: + +1. Get the COLOR_PIPELINE property of the plane +2. iterate all COLOR_PIPELINE enum values +3. for each enum value walk the color pipeline (via the NEXT pointers) + and see if the available color operations are suitable for the + desired color management operations + +If userspace encounters an unknown or unsuitable color operation during +discovery it does not need to reject the entire color pipeline outright, +as long as the unknown or unsuitable colorop has a "BYPASS" property. +Drivers will ensure that a bypassed block does not have any effect. + +An example of chained properties to define an AMD pre-blending color +pipeline might look like this:: + + Plane 10 + ├─ "TYPE" (immutable) = Primary + └─ "COLOR_PIPELINE": enum {0, 44} = 0 + + Color operation 44 + ├─ "TYPE" (immutable) = 1D enumerated curve + ├─ "BYPASS": bool + ├─ "CURVE_1D_TYPE": enum {sRGB EOTF, PQ EOTF} = sRGB EOTF + └─ "NEXT" (immutable) = 45 + + Color operation 45 + ├─ "TYPE" (immutable) = 3x4 Matrix + ├─ "BYPASS": bool + ├─ "DATA": blob + └─ "NEXT" (immutable) = 46 + + Color operation 46 + ├─ "TYPE" (immutable) = 1D enumerated curve + ├─ "BYPASS": bool + ├─ "CURVE_1D_TYPE": enum {sRGB Inverse EOTF, PQ Inverse EOTF} = sRGB EOTF + └─ "NEXT" (immutable) = 47 + + Color operation 47 + ├─ "TYPE" (immutable) = 1D LUT + ├─ "SIZE": immutable range = 4096 + ├─ "DATA": blob + └─ "NEXT" (immutable) = 48 + + Color operation 48 + ├─ "TYPE" (immutable) = 3D LUT + ├─ "3DLUT_MODE_INDEX": 0 + ├─ "DATA": blob + └─ "NEXT" (immutable) = 49 + + Color operation 49 + ├─ "TYPE" (immutable) = 1D enumerated curve + ├─ "BYPASS": bool + ├─ "CURVE_1D_TYPE": enum {sRGB EOTF, PQ EOTF} = sRGB EOTF + └─ "NEXT" (immutable) = 0 + + +Color Pipeline Programming +========================== + +Once a DRM client has found a suitable pipeline it will: + +1. Set the COLOR_PIPELINE enum value to the one pointing at the first + drm_colorop object of the desired pipeline +2. Set the properties for all drm_colorop objects in the pipeline to the + desired values, setting BYPASS to true for unused drm_colorop blocks, + and false for enabled drm_colorop blocks +3. Perform (TEST_ONLY or not) atomic commit with all the other KMS + states it wishes to change + +To configure the pipeline for an HDR10 PQ plane and blending in linear +space, a compositor might perform an atomic commit with the following +property values:: + + Plane 10 + └─ "COLOR_PIPELINE" = 42 + + Color operation 42 + └─ "BYPASS" = true + + Color operation 44 + └─ "BYPASS" = true + + Color operation 45 + └─ "BYPASS" = true + + Color operation 46 + └─ "BYPASS" = true + + Color operation 47 + ├─ "LUT_3D_DATA" = Gamut mapping + tone mapping + night mode + └─ "BYPASS" = false + + Color operation 48 + ├─ "CURVE_1D_TYPE" = PQ EOTF + └─ "BYPASS" = false + + +Driver Implementer's Guide +========================== + +What does this all mean for driver implementations? As noted above the +colorops can map to HW directly but don't need to do so. Here are some +suggestions on how to think about creating your color pipelines: + +- Try to expose pipelines that use already defined colorops, even if + your hardware pipeline is split differently. This allows existing + userspace to immediately take advantage of the hardware. + +- Additionally, try to expose your actual hardware blocks as colorops. + Define new colorop types where you believe it can offer significant + benefits if userspace learns to program them. + +- Avoid defining new colorops for compound operations with very narrow + scope. If you have a hardware block for a special operation that + cannot be split further, you can expose that as a new colorop type. + However, try to not define colorops for "use cases", especially if + they require you to combine multiple hardware blocks. + +- Design new colorops as prescriptive, not descriptive; by the + mathematical formula, not by the assumed input and output. + +A defined colorop type must be deterministic. The exact behavior of the +colorop must be documented entirely, whether via a mathematical formula +or some other description. Its operation can depend only on its +properties and input and nothing else, allowed error tolerance +notwithstanding. + + +Driver Forward/Backward Compatibility +===================================== + +As this is uAPI drivers can't regress color pipelines that have been +introduced for a given HW generation. New HW generations are free to +abandon color pipelines advertised for previous generations. +Nevertheless, it can be beneficial to carry support for existing color +pipelines forward as those will likely already have support in DRM +clients. + +Introducing new colorops to a pipeline is fine, as long as they can be +bypassed or are purely informational. DRM clients implementing support +for the pipeline can always skip unknown properties as long as they can +be confident that doing so will not cause unexpected results. + +If a new colorop doesn't fall into one of the above categories +(bypassable or informational) the modified pipeline would be unusable +for user space. In this case a new pipeline should be defined. + + +References +========== + +1. https://lore.kernel.org/dri-devel/QMers3awXvNCQlyhWdTtsPwkp5ie9bze_hD5nAccFW7a_RXlWjYB7MoUW_8CKLT2bSQwIXVi5H6VULYIxCdgvryZoAoJnC5lZgyK1QWn488=@emersion.fr/ \ No newline at end of file diff --git a/Documentation/gpu/rfc/index.rst b/Documentation/gpu/rfc/index.rst index 476719771eef..d3726adeca6a 100644 --- a/Documentation/gpu/rfc/index.rst +++ b/Documentation/gpu/rfc/index.rst @@ -31,3 +31,6 @@ host such documentation: .. toctree:: i915_vm_bind.rst + +.. toctree:: + color_pipeline.rst \ No newline at end of file From patchwork Mon Aug 19 20:56:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768973 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E9928C52D7C for ; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:23.2139 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ba20a8ea-ca24-48e1-cd0c-08dcc0918621 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7213 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patches introduces a new drm_colorop mode object. This object represents color transformations and can be used to define color pipelines. We also introduce the drm_colorop_state here, as well as various helpers and state tracking bits. v5: - Add comment to drm_atomic_state.colorops - Replace a misplaced 'plane' with 'colorop' in comment - Fix colorop_list kernel doc - Add kernel doc for color_pipeline - drop unused drm_colorop_destroy_state - drop drm_colorop_init, to be introduced in later patch when used - Add kernel docs - Drop TODOs v4: - Drop IOCTL definitions (Pekka) - add missing declaration (Chaitanya Kumar Borah) v3: - Drop TODO for lock (it's handled in drm_modeset_drop_locks) (Melissa) - Don't get plane state when getting colorop state - Make some functions static (kernel test robot) Signed-off-by: Harry Wentland --- drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/drm_atomic.c | 70 +++++++++++++ drivers/gpu/drm/drm_atomic_helper.c | 12 +++ drivers/gpu/drm/drm_atomic_uapi.c | 48 +++++++++ drivers/gpu/drm/drm_colorop.c | 103 +++++++++++++++++++ drivers/gpu/drm/drm_mode_config.c | 7 ++ include/drm/drm_atomic.h | 89 ++++++++++++++++ include/drm/drm_atomic_uapi.h | 1 + include/drm/drm_colorop.h | 152 ++++++++++++++++++++++++++++ include/drm/drm_mode_config.h | 18 ++++ include/drm/drm_plane.h | 8 ++ include/uapi/drm/drm_mode.h | 1 + 12 files changed, 510 insertions(+) create mode 100644 drivers/gpu/drm/drm_colorop.c create mode 100644 include/drm/drm_colorop.h diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 68cc9258ffc4..45b687fadabe 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -44,6 +44,7 @@ drm-y := \ drm_client.o \ drm_client_modeset.o \ drm_color_mgmt.o \ + drm_colorop.o \ drm_connector.o \ drm_crtc.o \ drm_displayid.o \ diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index 6e516c39a372..f82240eccc69 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -42,6 +42,7 @@ #include #include #include +#include #include "drm_crtc_internal.h" #include "drm_internal.h" @@ -108,6 +109,7 @@ void drm_atomic_state_default_release(struct drm_atomic_state *state) kfree(state->connectors); kfree(state->crtcs); kfree(state->planes); + kfree(state->colorops); kfree(state->private_objs); } EXPORT_SYMBOL(drm_atomic_state_default_release); @@ -139,6 +141,10 @@ drm_atomic_state_init(struct drm_device *dev, struct drm_atomic_state *state) sizeof(*state->planes), GFP_KERNEL); if (!state->planes) goto fail; + state->colorops = kcalloc(dev->mode_config.num_colorop, + sizeof(*state->colorops), GFP_KERNEL); + if (!state->colorops) + goto fail; /* * Because drm_atomic_state can be committed asynchronously we need our @@ -250,6 +256,20 @@ void drm_atomic_state_default_clear(struct drm_atomic_state *state) state->planes[i].new_state = NULL; } + for (i = 0; i < config->num_colorop; i++) { + struct drm_colorop *colorop = state->colorops[i].ptr; + + if (!colorop) + continue; + + drm_colorop_atomic_destroy_state(colorop, + state->colorops[i].state); + state->colorops[i].ptr = NULL; + state->colorops[i].state = NULL; + state->colorops[i].old_state = NULL; + state->colorops[i].new_state = NULL; + } + for (i = 0; i < state->num_private_objs; i++) { struct drm_private_obj *obj = state->private_objs[i].ptr; @@ -571,6 +591,56 @@ drm_atomic_get_plane_state(struct drm_atomic_state *state, } EXPORT_SYMBOL(drm_atomic_get_plane_state); + +/** + * drm_atomic_get_colorop_state - get colorop state + * @state: global atomic state object + * @colorop: colorop to get state object for + * + * This function returns the colorop state for the given colorop, allocating it + * if needed. It will also grab the relevant plane lock to make sure that the + * state is consistent. + * + * Returns: + * + * Either the allocated state or the error code encoded into the pointer. When + * the error is EDEADLK then the w/w mutex code has detected a deadlock and the + * entire atomic sequence must be restarted. All other errors are fatal. + */ +struct drm_colorop_state * +drm_atomic_get_colorop_state(struct drm_atomic_state *state, + struct drm_colorop *colorop) +{ + int ret, index = drm_colorop_index(colorop); + struct drm_colorop_state *colorop_state; + + WARN_ON(!state->acquire_ctx); + + colorop_state = drm_atomic_get_existing_colorop_state(state, colorop); + if (colorop_state) + return colorop_state; + + ret = drm_modeset_lock(&colorop->plane->mutex, state->acquire_ctx); + if (ret) + return ERR_PTR(ret); + + colorop_state = drm_atomic_helper_colorop_duplicate_state(colorop); + if (!colorop_state) + return ERR_PTR(-ENOMEM); + + state->colorops[index].state = colorop_state; + state->colorops[index].ptr = colorop; + state->colorops[index].old_state = colorop->state; + state->colorops[index].new_state = colorop_state; + colorop_state->state = state; + + drm_dbg_atomic(colorop->dev, "Added [COLOROP:%d] %p state to %p\n", + colorop->base.id, colorop_state, state); + + return colorop_state; +} +EXPORT_SYMBOL(drm_atomic_get_colorop_state); + static bool plane_switching_crtc(const struct drm_plane_state *old_plane_state, const struct drm_plane_state *new_plane_state) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index fb97b51b38f1..6418ddc184de 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -3024,6 +3024,8 @@ int drm_atomic_helper_swap_state(struct drm_atomic_state *state, struct drm_crtc_state *old_crtc_state, *new_crtc_state; struct drm_plane *plane; struct drm_plane_state *old_plane_state, *new_plane_state; + struct drm_colorop *colorop; + struct drm_colorop_state *old_colorop_state, *new_colorop_state; struct drm_crtc_commit *commit; struct drm_private_obj *obj; struct drm_private_state *old_obj_state, *new_obj_state; @@ -3101,6 +3103,16 @@ int drm_atomic_helper_swap_state(struct drm_atomic_state *state, } } + for_each_oldnew_colorop_in_state(state, colorop, old_colorop_state, new_colorop_state, i) { + WARN_ON(colorop->state != old_colorop_state); + + old_colorop_state->state = state; + new_colorop_state->state = NULL; + + state->colorops[i].state = old_colorop_state; + colorop->state = new_colorop_state; + } + drm_panic_lock(state->dev, flags); for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { WARN_ON(plane->state != old_plane_state); diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 7609c798d73d..fce7683e4178 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include @@ -642,6 +643,26 @@ drm_atomic_plane_get_property(struct drm_plane *plane, return 0; } + +static int drm_atomic_colorop_set_property(struct drm_colorop *colorop, + struct drm_colorop_state *state, struct drm_file *file_priv, + struct drm_property *property, uint64_t val) +{ + drm_dbg_atomic(colorop->dev, + "[COLOROP:%d] unknown property [PROP:%d:%s]]\n", + colorop->base.id, + property->base.id, property->name); + return -EINVAL; +} + +static int +drm_atomic_colorop_get_property(struct drm_colorop *colorop, + const struct drm_colorop_state *state, + struct drm_property *property, uint64_t *val) +{ + return -EINVAL; +} + static int drm_atomic_set_writeback_fb_for_connector( struct drm_connector_state *conn_state, struct drm_framebuffer *fb) @@ -908,6 +929,16 @@ int drm_atomic_get_property(struct drm_mode_object *obj, plane->state, property, val); break; } + case DRM_MODE_OBJECT_COLOROP: { + struct drm_colorop *colorop = obj_to_colorop(obj); + + if (colorop->plane) + WARN_ON(!drm_modeset_is_locked(&colorop->plane->mutex)); + + ret = drm_atomic_colorop_get_property(colorop, + colorop->state, property, val); + break; + } default: drm_dbg_atomic(dev, "[OBJECT:%d] has no properties\n", obj->id); ret = -EINVAL; @@ -1091,6 +1122,23 @@ int drm_atomic_set_property(struct drm_atomic_state *state, ret = drm_atomic_plane_set_property(plane, plane_state, file_priv, prop, prop_value); + + break; + } + case DRM_MODE_OBJECT_COLOROP: { + struct drm_colorop *colorop = obj_to_colorop(obj); + struct drm_colorop_state *colorop_state; + + colorop_state = drm_atomic_get_colorop_state(state, colorop); + if (IS_ERR(colorop_state)) { + ret = PTR_ERR(colorop_state); + break; + } + + ret = drm_atomic_colorop_set_property(colorop, + colorop_state, file_priv, + prop, prop_value); + break; } default: diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c new file mode 100644 index 000000000000..e005aba7d28a --- /dev/null +++ b/drivers/gpu/drm/drm_colorop.c @@ -0,0 +1,103 @@ +/* + * Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#include +#include +#include +#include + +#include "drm_crtc_internal.h" + +static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop, + struct drm_colorop_state *state) +{ + memcpy(state, colorop->state, sizeof(*state)); +} + +struct drm_colorop_state * +drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop) +{ + struct drm_colorop_state *state; + + if (WARN_ON(!colorop->state)) + return NULL; + + state = kmalloc(sizeof(*state), GFP_KERNEL); + if (state) + __drm_atomic_helper_colorop_duplicate_state(colorop, state); + + return state; +} + + +void drm_colorop_atomic_destroy_state(struct drm_colorop *colorop, + struct drm_colorop_state *state) +{ + kfree(state); +} + +/** + * __drm_colorop_state_reset - resets colorop state to default values + * @colorop_state: atomic colorop state, must not be NULL + * @colorop: colorop object, must not be NULL + * + * Initializes the newly allocated @colorop_state with default + * values. This is useful for drivers that subclass the CRTC state. + */ +static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state, + struct drm_colorop *colorop) +{ + colorop_state->colorop = colorop; +} + +/** + * __drm_colorop_reset - reset state on colorop + * @colorop: drm colorop + * @colorop_state: colorop state to assign + * + * Initializes the newly allocated @colorop_state and assigns it to + * the &drm_crtc->state pointer of @colorop, usually required when + * initializing the drivers or when called from the &drm_colorop_funcs.reset + * hook. + * + * This is useful for drivers that subclass the colorop state. + */ +static void __drm_colorop_reset(struct drm_colorop *colorop, + struct drm_colorop_state *colorop_state) +{ + if (colorop_state) + __drm_colorop_state_reset(colorop_state, colorop); + + colorop->state = colorop_state; +} + +void drm_colorop_reset(struct drm_colorop *colorop) +{ + kfree(colorop->state); + colorop->state = kzalloc(sizeof(*colorop->state), GFP_KERNEL); + + if (colorop->state) + __drm_colorop_reset(colorop, colorop->state); +} diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c index 37d2e0a4ef4b..f238a2f049b0 100644 --- a/drivers/gpu/drm/drm_mode_config.c +++ b/drivers/gpu/drm/drm_mode_config.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include "drm_crtc_internal.h" @@ -182,11 +183,15 @@ int drm_mode_getresources(struct drm_device *dev, void *data, void drm_mode_config_reset(struct drm_device *dev) { struct drm_crtc *crtc; + struct drm_colorop *colorop; struct drm_plane *plane; struct drm_encoder *encoder; struct drm_connector *connector; struct drm_connector_list_iter conn_iter; + drm_for_each_colorop(colorop, dev) + drm_colorop_reset(colorop); + drm_for_each_plane(plane, dev) if (plane->funcs->reset) plane->funcs->reset(plane); @@ -420,6 +425,7 @@ int drmm_mode_config_init(struct drm_device *dev) INIT_LIST_HEAD(&dev->mode_config.property_list); INIT_LIST_HEAD(&dev->mode_config.property_blob_list); INIT_LIST_HEAD(&dev->mode_config.plane_list); + INIT_LIST_HEAD(&dev->mode_config.colorop_list); INIT_LIST_HEAD(&dev->mode_config.privobj_list); idr_init_base(&dev->mode_config.object_idr, 1); idr_init_base(&dev->mode_config.tile_idr, 1); @@ -441,6 +447,7 @@ int drmm_mode_config_init(struct drm_device *dev) dev->mode_config.num_crtc = 0; dev->mode_config.num_encoder = 0; dev->mode_config.num_total_plane = 0; + dev->mode_config.num_colorop = 0; if (IS_ENABLED(CONFIG_LOCKDEP)) { struct drm_modeset_acquire_ctx modeset_ctx; diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h index 4d7f4c5f2001..d2b44121b7fb 100644 --- a/include/drm/drm_atomic.h +++ b/include/drm/drm_atomic.h @@ -30,6 +30,7 @@ #include #include +#include /** * struct drm_crtc_commit - track modeset commits on a CRTC @@ -157,6 +158,11 @@ struct drm_crtc_commit { bool abort_completion; }; +struct __drm_colorops_state { + struct drm_colorop *ptr; + struct drm_colorop_state *state, *old_state, *new_state; +}; + struct __drm_planes_state { struct drm_plane *ptr; struct drm_plane_state *state, *old_state, *new_state; @@ -408,6 +414,14 @@ struct drm_atomic_state { */ bool duplicated : 1; + /** + * @colorops: + * + * Pointer to array of @drm_colorop and @drm_colorop_state part of this + * update. + */ + struct __drm_colorops_state *colorops; + /** * @planes: * @@ -549,6 +563,9 @@ drm_atomic_get_crtc_state(struct drm_atomic_state *state, struct drm_plane_state * __must_check drm_atomic_get_plane_state(struct drm_atomic_state *state, struct drm_plane *plane); +struct drm_colorop_state * +drm_atomic_get_colorop_state(struct drm_atomic_state *state, + struct drm_colorop *colorop); struct drm_connector_state * __must_check drm_atomic_get_connector_state(struct drm_atomic_state *state, struct drm_connector *connector); @@ -678,6 +695,55 @@ drm_atomic_get_new_plane_state(const struct drm_atomic_state *state, return state->planes[drm_plane_index(plane)].new_state; } + +/** + * drm_atomic_get_existing_colorop_state - get colorop state, if it exists + * @state: global atomic state object + * @colorop: colorop to grab + * + * This function returns the colorop state for the given colorop, or NULL + * if the colorop is not part of the global atomic state. + * + * This function is deprecated, @drm_atomic_get_old_colorop_state or + * @drm_atomic_get_new_colorop_state should be used instead. + */ +static inline struct drm_colorop_state * +drm_atomic_get_existing_colorop_state(struct drm_atomic_state *state, + struct drm_colorop *colorop) +{ + return state->colorops[drm_colorop_index(colorop)].state; +} + +/** + * drm_atomic_get_old_colorop_state - get colorop state, if it exists + * @state: global atomic state object + * @colorop: colorop to grab + * + * This function returns the old colorop state for the given colorop, or + * NULL if the colorop is not part of the global atomic state. + */ +static inline struct drm_colorop_state * +drm_atomic_get_old_colorop_state(struct drm_atomic_state *state, + struct drm_colorop *colorop) +{ + return state->colorops[drm_colorop_index(colorop)].old_state; +} + +/** + * drm_atomic_get_new_colorop_state - get colorop state, if it exists + * @state: global atomic state object + * @colorop: colorop to grab + * + * This function returns the new colorop state for the given colorop, or + * NULL if the colorop is not part of the global atomic state. + */ +static inline struct drm_colorop_state * +drm_atomic_get_new_colorop_state(struct drm_atomic_state *state, + struct drm_colorop *colorop) +{ + return state->colorops[drm_colorop_index(colorop)].new_state; +} + /** * drm_atomic_get_existing_connector_state - get connector state, if it exists * @state: global atomic state object @@ -925,6 +991,29 @@ void drm_state_dump(struct drm_device *dev, struct drm_printer *p); (new_crtc_state) = (__state)->crtcs[__i].new_state, \ (void)(new_crtc_state) /* Only to avoid unused-but-set-variable warning */, 1)) +/** + * for_each_oldnew_colorop_in_state - iterate over all colorops in an atomic update + * @__state: &struct drm_atomic_state pointer + * @colorop: &struct drm_colorop iteration cursor + * @old_colorop_state: &struct drm_colorop_state iteration cursor for the old state + * @new_colorop_state: &struct drm_colorop_state iteration cursor for the new state + * @__i: int iteration cursor, for macro-internal use + * + * This iterates over all colorops in an atomic update, tracking both old and + * new state. This is useful in places where the state delta needs to be + * considered, for example in atomic check functions. + */ +#define for_each_oldnew_colorop_in_state(__state, colorop, old_colorop_state, new_colorop_state, __i) \ + for ((__i) = 0; \ + (__i) < (__state)->dev->mode_config.num_colorop; \ + (__i)++) \ + for_each_if ((__state)->colorops[__i].ptr && \ + ((colorop) = (__state)->colorops[__i].ptr, \ + (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \ + (old_colorop_state) = (__state)->colorops[__i].old_state,\ + (new_colorop_state) = (__state)->colorops[__i].new_state, 1)) + + /** * for_each_oldnew_plane_in_state - iterate over all planes in an atomic update * @__state: &struct drm_atomic_state pointer diff --git a/include/drm/drm_atomic_uapi.h b/include/drm/drm_atomic_uapi.h index 4c6d39d7bdb2..70a115d523cd 100644 --- a/include/drm/drm_atomic_uapi.h +++ b/include/drm/drm_atomic_uapi.h @@ -37,6 +37,7 @@ struct drm_crtc; struct drm_connector_state; struct dma_fence; struct drm_framebuffer; +struct drm_colorop; int __must_check drm_atomic_set_mode_for_crtc(struct drm_crtc_state *state, diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h new file mode 100644 index 000000000000..1bd658617840 --- /dev/null +++ b/include/drm/drm_colorop.h @@ -0,0 +1,152 @@ +/* + * Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#ifndef __DRM_COLOROP_H__ +#define __DRM_COLOROP_H__ + +#include +#include +#include + +/** + * struct drm_colorop_state - mutable colorop state + */ +struct drm_colorop_state { + /** @colorop: backpointer to the colorop */ + struct drm_colorop *colorop; + + /* colorop properties */ + + /** @state: backpointer to global drm_atomic_state */ + struct drm_atomic_state *state; +}; + +/** + * struct drm_colorop - DRM color operation control structure + * + * A colorop represents one color operation. They can be chained via + * the 'next' pointer to build a color pipeline. + */ +struct drm_colorop { + /** @dev: parent DRM device */ + struct drm_device *dev; + + /** + * @head: + * + * List of all colorops on @dev, linked from &drm_mode_config.colorop_list. + * Invariant over the lifetime of @dev and therefore does not need + * locking. + */ + struct list_head head; + + /** + * @index: Position inside the mode_config.list, can be used as an array + * index. It is invariant over the lifetime of the colorop. + */ + unsigned index; + + /** @base: base mode object */ + struct drm_mode_object base; + + /** + * @plane: + * + * The plane on which the colorop sits. A drm_colorop is always unique + * to a plane. + */ + struct drm_plane *plane; + + /** + * @state: + * + * Current atomic state for this colorop. + * + * This is protected by @mutex. Note that nonblocking atomic commits + * access the current colorop state without taking locks. + */ + struct drm_colorop_state *state; + + /* colorop properties */ + + /** @properties: property tracking for this colorop */ + struct drm_object_properties properties; + +}; + +#define obj_to_colorop(x) container_of(x, struct drm_colorop, base) + +/** + * drm_colorop_find - look up a Colorop object from its ID + * @dev: DRM device + * @file_priv: drm file to check for lease against. + * @id: &drm_mode_object ID + * + * This can be used to look up a Colorop from its userspace ID. Only used by + * drivers for legacy IOCTLs and interface, nowadays extensions to the KMS + * userspace interface should be done using &drm_property. + */ +static inline struct drm_colorop *drm_colorop_find(struct drm_device *dev, + struct drm_file *file_priv, + uint32_t id) +{ + struct drm_mode_object *mo; + mo = drm_mode_object_find(dev, file_priv, id, DRM_MODE_OBJECT_COLOROP); + return mo ? obj_to_colorop(mo) : NULL; +} + +struct drm_colorop_state * +drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop); + +void drm_colorop_atomic_destroy_state(struct drm_colorop *colorop, + struct drm_colorop_state *state); + +/** + * drm_colorop_reset - reset colorop atomic state + * @colorop: drm colorop + * + * Resets the atomic state for @colorop by freeing the state pointer (which might + * be NULL, e.g. at driver load time) and allocating a new empty state object. + */ +void drm_colorop_reset(struct drm_colorop *colorop); + +/** + * drm_colorop_index - find the index of a registered colorop + * @colorop: colorop to find index for + * + * Given a registered colorop, return the index of that colorop within a DRM + * device's list of colorops. + */ +static inline unsigned int drm_colorop_index(const struct drm_colorop *colorop) +{ + return colorop->index; +} + + +#define drm_for_each_colorop(colorop, dev) \ + list_for_each_entry(colorop, &(dev)->mode_config.colorop_list, head) + + +#endif /* __DRM_COLOROP_H__ */ diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index ab0f167474b1..dfdd80da8da2 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -515,6 +515,24 @@ struct drm_mode_config { */ struct raw_spinlock panic_lock; + /** + * @num_colorop: + * + * Number of colorop objects on this device. + * This is invariant over the lifetime of a device and hence doesn't + * need any locks. + */ + int num_colorop; + + /** + * @colorop_list: + * + * List of colorop objects linked with &drm_colorop.head. This is + * invariant over the lifetime of a device and hence doesn't need any + * locks. + */ + struct list_head colorop_list; + /** * @num_crtc: * diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index dd718c62ac31..2a9b902623c0 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h @@ -243,6 +243,14 @@ struct drm_plane_state { */ enum drm_scaling_filter scaling_filter; + /** + * @color_pipeline: + * + * The first colorop of the active color pipeline, or NULL, if no + * color pipeline is active. + */ + struct drm_colorop *color_pipeline; + /** * @commit: Tracks the pending commit to prevent use-after-free conditions, * and for async plane updates. diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index d390011b89b4..af71a5c84aa0 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -629,6 +629,7 @@ struct drm_mode_connector_set_property { #define DRM_MODE_OBJECT_FB 0xfbfbfbfb #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee +#define DRM_MODE_OBJECT_COLOROP 0xfafafafa #define DRM_MODE_OBJECT_ANY 0 struct drm_mode_obj_get_properties { From patchwork Mon Aug 19 20:56:33 2024 Content-Type: text/plain; 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Mon, 19 Aug 2024 15:57:22 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 06/44] drm/colorop: Add TYPE property Date: Mon, 19 Aug 2024 16:56:33 -0400 Message-ID: <20240819205714.316380-7-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB03.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD9:EE_|SJ2PR12MB8718:EE_ X-MS-Office365-Filtering-Correlation-Id: 0893d3b9-3485-4228-1442-08dcc09186cb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|1800799024|376014|82310400026; X-Microsoft-Antispam-Message-Info: mV+rrR3P/Smz9D5yPTyNFM+xFBwJCpJxZWwL2pXwHw0SHIOaZMmO9Yd4KbDD9Of4EBu32UxQ3s3DDwXRRxOVnmYx6cNdYgMdfJ0W5VO8Uk93kZzbgUmdkAqkfPBxKMG2yRYGQwzmk0OZbJCm1BLHL7sO7AQbdX+1ZTyL8BDaEZTfU2L3ljwf6SDs6S67KNOtjsqvedtkEDF4KsxvPFaV8hW97x/1fke4ExO/HYuOypuj7DUujpvdrUSHwDsQ0FGsFw1fqA6eqy6IAlddj4Y9U4dKeWMgIpMnjPIUIzzdtfeT2xgRD4XEUgntmaRBHhXI9dJ5+Xil/d845U3Rzzn5NKhu2l9JteFCRULQJlPaVNw5jKxmfpv8WyA5lTSJw9CeTQ25fqcynAUmYUrXyzdPQzfAvsyrZywnpXlw11FzeOwjYpiyzGYxe88dFoMYFYJ7WKGbbveoVheCcd2zcWlBJI8FIktkGWVsBFO7NrMkshCZsRBUQIkvurklFnaNzlOOVx93RA9kH5+VX8iyB0Qu0/8Q/qfRVPKnRV0DD8ZL9nsbeeKk0Nm4ucuCRrCLK2fN7HBp8YSa0grQJI7dRZezqSRz9ccoQo1GrAbqvJnOPNVB3Mknj9ljrCKNZ5KfUNPdOpPDMCtIyT4OwX9QfxFCCdLpHA38L+kjiZLrSu6QqpM6xvWcaC0sby+5aO0nHseNrLPKoPfYrdNdROUfLKfWCVjf6Z4oG1PmUJQXcxAKrp/7q5eALTeu9fyCcutw5YBD21kfX389iML3vXygKORbLMNb8Zsb5KMd77NFVWF1a21uacbVKyHSjodUeIqXwAlUZaFtSuKDJI4anpicyYdLMnZ+mJW9/mWBZMZlKApNh37tOm9y3avA1nzfFNPDBeLqTwxf/fqShGIEbxXnxxCLePQkrL5OvHC4I0lF0sKT3hg7Zsd9Oz0yzXPk4AdtCkr495VMXIIWI3uy3H4G8u+j5T8pIKC8zPKV2QysGGyWke9+IY78VEYzdQ7tj/SVabAZAwwa8Q/rLR/CcM1snFVZgD0yirW/6hp0ZR5sltRcxVpBUVff2dcr9HDEI4qxNi7j/dUlNxgVEzovLAMEUphVDzFJxIkgIF3QlL4Vuabw3cxMu3ScTUNa1QH+BUJOs+OBLtvepkLK4ZUz6WdFCbbV0Iz1/9LoOoZ7TerBHXgZxgRmtHYqAMrFaK7Fb+l7fNxCppUqe73T8O66PdI1T+qM4gWdzuD19RYxgu5j6oeDp9mk2t6JxpFexgj7CDB1655TY+crV0OJde12K2rYD3mwzOn23hnC2rTNQUrUDUyJja9Ls2s06tl/1n7uGb9OwixrTyVWo9EHJx+k8fBOfC174PfTr8rr9MuEyMdqZtesza0tRNYDNla7i/xz/eAjze90/PZtmTyTxG6Y26oJQkkJTijywJ4BAQlh//Xuw92PPPnxRY0PRqgF1DSvrF1F71qa X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(376014)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:24.3389 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0893d3b9-3485-4228-1442-08dcc09186cb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8718 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add a read-only TYPE property. The TYPE specifies the colorop type, such as enumerated curve, 1D LUT, CTM, 3D LUT, PWL LUT, etc. v5: - Add drm_get_colorop_type_name in header - Add kernel docs v4: - Use enum property for TYPE (Pekka) v3: - Make TYPE a range property - Move enum drm_colorop_type to uapi header - Fix drm_get_colorop_type_name description For now we're only introducing an enumerated 1D LUT type to illustrate the concept. Signed-off-by: Harry Wentland --- drivers/gpu/drm/drm_atomic.c | 4 ++-- drivers/gpu/drm/drm_atomic_uapi.c | 8 +++++++- drivers/gpu/drm/drm_colorop.c | 12 ++++++++++++ include/drm/drm_colorop.h | 23 +++++++++++++++++++++++ include/uapi/drm/drm_mode.h | 15 +++++++++++++++ 5 files changed, 59 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index f82240eccc69..b09db9835e1f 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -634,8 +634,8 @@ drm_atomic_get_colorop_state(struct drm_atomic_state *state, state->colorops[index].new_state = colorop_state; colorop_state->state = state; - drm_dbg_atomic(colorop->dev, "Added [COLOROP:%d] %p state to %p\n", - colorop->base.id, colorop_state, state); + drm_dbg_atomic(colorop->dev, "Added [COLOROP:%d:%d] %p state to %p\n", + colorop->base.id, colorop->type, colorop_state, state); return colorop_state; } diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index fce7683e4178..f76a83d79993 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -660,7 +660,13 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop, const struct drm_colorop_state *state, struct drm_property *property, uint64_t *val) { - return -EINVAL; + if (property == colorop->type_property) { + *val = colorop->type; + } else { + return -EINVAL; + } + + return 0; } static int drm_atomic_set_writeback_fb_for_connector( diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index e005aba7d28a..79af42b349a0 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -101,3 +101,15 @@ void drm_colorop_reset(struct drm_colorop *colorop) if (colorop->state) __drm_colorop_reset(colorop, colorop->state); } + +static const char * const colorop_type_name[] = { + [DRM_COLOROP_1D_CURVE] = "1D Curve", +}; + +const char *drm_get_colorop_type_name(enum drm_colorop_type type) +{ + if (WARN_ON(type >= ARRAY_SIZE(colorop_type_name))) + return "unknown"; + + return colorop_type_name[type]; +} diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index 1bd658617840..75ec3ec827ac 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -94,6 +94,21 @@ struct drm_colorop { /** @properties: property tracking for this colorop */ struct drm_object_properties properties; + /** + * @type: + * + * Read-only + * Type of color operation + */ + enum drm_colorop_type type; + + /** + * @type_property: + * + * Read-only "TYPE" property for specifying the type of + * this color operation. The type is enum drm_colorop_type. + */ + struct drm_property *type_property; }; #define obj_to_colorop(x) container_of(x, struct drm_colorop, base) @@ -148,5 +163,13 @@ static inline unsigned int drm_colorop_index(const struct drm_colorop *colorop) #define drm_for_each_colorop(colorop, dev) \ list_for_each_entry(colorop, &(dev)->mode_config.colorop_list, head) +/** + * drm_get_colorop_type_name - return a string for colorop type + * @type: colorop type to compute name of + * + * In contrast to the other drm_get_*_name functions this one here returns a + * const pointer and hence is threadsafe. + */ +const char *drm_get_colorop_type_name(enum drm_colorop_type type); #endif /* __DRM_COLOROP_H__ */ diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index af71a5c84aa0..3dd89ae6515a 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -858,6 +858,21 @@ struct drm_color_lut { __u16 reserved; }; +/** + * enum drm_colorop_type - Type of color operation + * + * @DRM_COLOROP_1D_CURVE: A 1D curve that is being applied to all color channels. + * The curve is specified via tha CURVE_1D_TYPE colorop + * property. + * + * drm_colorops can be of many different types. Each type behaves differently + * and defines a different set of properties. This enum defines all types and + * gives a high-level description. + */ +enum drm_colorop_type { + DRM_COLOROP_1D_CURVE +}; + /** * struct drm_plane_size_hint - Plane size hints * From patchwork Mon Aug 19 20:56:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E542FC3DA4A for ; Mon, 19 Aug 2024 20:57:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4DF5110E37D; Mon, 19 Aug 2024 20:57:36 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(376014)(1800799024)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:25.0889 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5e0f23ec-4837-4e83-e749-08dcc091873f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6124 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" v5: - Add drm_get_colorop_curve_1d_type_name in header - Add drm_colorop_init - Set default curve - Add kernel docs v4: - Use drm_colorop_curve_1d_type_enum_list to get name (Pekka) - Create separate init function for 1D curve - Pass supported TFs into 1D curve init function Signed-off-by: Harry Wentland Signed-off-by: Alex Hung Co-developed-by: Alex Hung --- drivers/gpu/drm/drm_atomic_uapi.c | 18 ++-- drivers/gpu/drm/drm_colorop.c | 134 ++++++++++++++++++++++++++++++ include/drm/drm_colorop.h | 60 +++++++++++++ 3 files changed, 207 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index f76a83d79993..b867bff49f67 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -648,11 +648,17 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop, struct drm_colorop_state *state, struct drm_file *file_priv, struct drm_property *property, uint64_t val) { - drm_dbg_atomic(colorop->dev, - "[COLOROP:%d] unknown property [PROP:%d:%s]]\n", - colorop->base.id, - property->base.id, property->name); - return -EINVAL; + if (property == colorop->curve_1d_type_property) { + state->curve_1d_type = val; + } else { + drm_dbg_atomic(colorop->dev, + "[COLOROP:%d:%d] unknown property [PROP:%d:%s]]\n", + colorop->base.id, colorop->type, + property->base.id, property->name); + return -EINVAL; + } + + return 0; } static int @@ -662,6 +668,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop, { if (property == colorop->type_property) { *val = colorop->type; + } else if (property == colorop->curve_1d_type_property) { + *val = state->curve_1d_type; } else { return -EINVAL; } diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 79af42b349a0..98d22ac163e8 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -30,6 +30,123 @@ #include "drm_crtc_internal.h" +static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = { + { DRM_COLOROP_1D_CURVE, "1D Curve" }, +}; + +static const char * const colorop_curve_1d_type_names[] = { + [DRM_COLOROP_1D_CURVE_SRGB_EOTF] = "sRGB EOTF", + [DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF] = "sRGB Inverse EOTF", +}; + + +/* Init Helpers */ + +static int drm_colorop_init(struct drm_device *dev, struct drm_colorop *colorop, + struct drm_plane *plane, enum drm_colorop_type type) +{ + struct drm_mode_config *config = &dev->mode_config; + struct drm_property *prop; + int ret = 0; + + ret = drm_mode_object_add(dev, &colorop->base, DRM_MODE_OBJECT_COLOROP); + if (ret) + return ret; + + colorop->base.properties = &colorop->properties; + colorop->dev = dev; + colorop->type = type; + colorop->plane = plane; + + list_add_tail(&colorop->head, &config->colorop_list); + colorop->index = config->num_colorop++; + + /* add properties */ + + /* type */ + prop = drm_property_create_enum(dev, + DRM_MODE_PROP_IMMUTABLE, + "TYPE", drm_colorop_type_enum_list, + ARRAY_SIZE(drm_colorop_type_enum_list)); + + if (!prop) + return -ENOMEM; + + colorop->type_property = prop; + + drm_object_attach_property(&colorop->base, + colorop->type_property, + colorop->type); + + return ret; +} + +/** + * drm_colorop_curve_1d_init - Initialize a DRM_COLOROP_1D_CURVE + * + * @dev: DRM device + * @colorop: The drm_colorop object to initialize + * @plane: The associated drm_plane + * @supported_tfs: A bitfield of supported drm_colorop_curve_1d_init enum values, + * created using BIT(curve_type) and combined with the OR '|' + * operator. + * @return zero on success, -E value on failure + */ +int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *colorop, + struct drm_plane *plane, u64 supported_tfs) +{ + struct drm_prop_enum_list enum_list[DRM_COLOROP_1D_CURVE_COUNT]; + int i, len; + + struct drm_property *prop; + int ret; + + if (!supported_tfs) { + drm_err(dev, + "No supported TFs for new 1D curve colorop on [PLANE:%d:%s]\n", + plane->base.id, plane->name); + return -EINVAL; + } + + if ((supported_tfs & -BIT(DRM_COLOROP_1D_CURVE_COUNT)) != 0) { + drm_err(dev, "Unknown TF provided on [PLANE:%d:%s]\n", + plane->base.id, plane->name); + return -EINVAL; + } + + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_1D_CURVE); + if (ret) + return ret; + + len = 0; + for (i = 0; i < DRM_COLOROP_1D_CURVE_COUNT; i++) { + if ((supported_tfs & BIT(i)) == 0) + continue; + + enum_list[len].type = i; + enum_list[len].name = colorop_curve_1d_type_names[i]; + len++; + } + + if (WARN_ON(len <= 0)) + return -EINVAL; + + + /* initialize 1D curve only attribute */ + prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "CURVE_1D_TYPE", + enum_list, len); + if (!prop) + return -ENOMEM; + + colorop->curve_1d_type_property = prop; + drm_object_attach_property(&colorop->base, colorop->curve_1d_type_property, + enum_list[0].type); + drm_colorop_reset(colorop); + + return 0; +} +EXPORT_SYMBOL(drm_colorop_curve_1d_init); + static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop, struct drm_colorop_state *state) { @@ -69,7 +186,16 @@ void drm_colorop_atomic_destroy_state(struct drm_colorop *colorop, static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state, struct drm_colorop *colorop) { + u64 val; + colorop_state->colorop = colorop; + + if (colorop->curve_1d_type_property) { + drm_object_property_get_default_value(&colorop->base, + colorop->curve_1d_type_property, + &val); + colorop_state->curve_1d_type = val; + } } /** @@ -113,3 +239,11 @@ const char *drm_get_colorop_type_name(enum drm_colorop_type type) return colorop_type_name[type]; } + +const char *drm_get_colorop_curve_1d_type_name(enum drm_colorop_curve_1d_type type) +{ + if (WARN_ON(type >= ARRAY_SIZE(colorop_curve_1d_type_names))) + return "unknown"; + + return colorop_curve_1d_type_names[type]; +} diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index 75ec3ec827ac..dd6943117461 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -30,6 +30,39 @@ #include #include + +/** + * enum drm_colorop_curve_1d_type - type of 1D curve + * + * Describes a 1D curve to be applied by the DRM_COLOROP_1D_CURVE colorop. + * + */ +enum drm_colorop_curve_1d_type { + /** + * @DRM_COLOROP_1D_CURVE_SRGB_EOTF: + * + * sRGB piece-wise electro-optical transfer function. Transfer + * characteristics as defined by IEC 61966-2-1 sRGB. Equivalent + * to H.273 TransferCharacteristics code point 13 with + * MatrixCoefficients set to 0. + */ + DRM_COLOROP_1D_CURVE_SRGB_EOTF, + + /** + * @DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF: + * + * The inverse of &DRM_COLOROP_1D_CURVE_SRGB_EOTF + */ + DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF, + + /** + * @DRM_COLOROP_1D_CURVE_COUNT: + * + * enum value denoting the size of the enum + */ + DRM_COLOROP_1D_CURVE_COUNT +}; + /** * struct drm_colorop_state - mutable colorop state */ @@ -39,6 +72,13 @@ struct drm_colorop_state { /* colorop properties */ + /** + * @curve_1d_type: + * + * Type of 1D curve. + */ + enum drm_colorop_curve_1d_type curve_1d_type; + /** @state: backpointer to global drm_atomic_state */ struct drm_atomic_state *state; }; @@ -109,6 +149,14 @@ struct drm_colorop { * this color operation. The type is enum drm_colorop_type. */ struct drm_property *type_property; + + /** + * @curve_1d_type_property: + * + * Sub-type for DRM_COLOROP_1D_CURVE type. + */ + struct drm_property *curve_1d_type_property; + }; #define obj_to_colorop(x) container_of(x, struct drm_colorop, base) @@ -132,6 +180,9 @@ static inline struct drm_colorop *drm_colorop_find(struct drm_device *dev, return mo ? obj_to_colorop(mo) : NULL; } +int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *colorop, + struct drm_plane *plane, u64 supported_tfs); + struct drm_colorop_state * drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop); @@ -172,4 +223,13 @@ static inline unsigned int drm_colorop_index(const struct drm_colorop *colorop) */ const char *drm_get_colorop_type_name(enum drm_colorop_type type); +/** + * drm_get_colorop_curve_1d_type_name - return a string for 1D curve type + * @type: 1d curve type to compute name of + * + * In contrast to the other drm_get_*_name functions this one here returns a + * const pointer and hence is threadsafe. + */ +const char *drm_get_colorop_curve_1d_type_name(enum drm_colorop_curve_1d_type type); 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Mon, 19 Aug 2024 15:57:23 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 08/44] Documentation/gpu: document drm_colorop Date: Mon, 19 Aug 2024 16:56:35 -0400 Message-ID: <20240819205714.316380-9-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB03.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD9:EE_|PH8PR12MB7373:EE_ X-MS-Office365-Filtering-Correlation-Id: 21de3b5c-2469-47c1-2e64-08dcc09187e9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|36860700013|1800799024|376014; X-Microsoft-Antispam-Message-Info: AfN4WkUIBevQ7t/tMEaPDUW3ZPtoSUwnd0ra3nUMMiUT9CvZx7BrFDZNeyk3LfjituiLX9/ahXDzQjbS0WBqxkqH1mkcnRVyVFKUG95BpDVMAP8Kz3rWMf3fIZpgMUrOlYs5C1L1Nsk2EAZWvrrmfxBoIFDcvA8vXeptktDHKz5RFPFerIUSPI6wZr3gOFpJxvQgK5uVXOx704B0HJsMPKOHmcFoN0f+qIg+3bnI5jqsHniv6eKhhVoSkzee3jlaJbtPuRIKf0Ii451zrg6AYOAbpmPqVxFOwSkqloFdV5X8MQ8lOB3vfTwgm69OHpLDjf3VSa1WJw4zOzlrDjgEkgn5QmnaMkeLW5vNzMaw04HuGQb/F1Aw2ZnDdreMoIzaVeXIQP7c2vEK7Jaux62A1ArWDDCxmsdkZn8tRpd5h+Z+HhvsdwZLxop3jpn8Cvcxnl4AFOkfqlIWb+3NHPExDoPcJtTpoVB1qLTyLM4prNNz9WHi5nFOgEDBuKBCfra4SCFzDfKlQbSqNsa6rWH9iFzetRIoVodl+LiDHVuPvVuckUzV0eC6R8S/UBszD/RUYv0Nz6fjj2SVQUaemBtkypVdTA+OP7lD9waAJWzpe0t8EZuDndHjhjTixcRzz/xZ/4HWse4QqMEcIfwG16jpjU9thgU8J7jRLciLNmrclbuIQZIB5IEOE7WEgU7XZq3qnaB0drjMz5rDcKJTbfgUHWzktQJpaAzR7yQ60RxuaFs9TGxAnOepUmMzH9SNxU4AgnpoOg2fG5SsOokzPyxEBy9yetDgH2SVLeW3blgnK5cLHnK3XvbSsBLcn21NX6nlwa8VzKjrFfJiYDOMWByl320Oq2TvXWv1IAipD3XPYEhzpa7E8crf8jylHgN/bxyOdSUWa6x3pe49y6TgF+zWLseHqI8E+7E5wINBTHTOA/18X/rGuGOBgdA8l/Mn8gvUPb6ywYmrQuW/QJrhc5UgNGhADyam+jYQowtgqUybXRzgA5YrpMzVCh3sArxxvk/U16Zr2gQ56U8HjgGmmmWLNq+sozUdwJwoAqItyAvcNA/6PGa5Uyso2e5ELnuaaUq2u/BpLpWqe3yAoVcWFOfbgxg0FiSYf4AZWhv6obEbepEt0m2nCvqjg76+GSlPAHfRgusYuG46FGEAqZSKAkqu0AE2WbBZCvD/uARkF71pOadXviRqy+3ZUrkhPX7AIgnYCsoVgtWLh1hsSnhHugFABjdfL652FdNEi/rDQ9pfKoEkCAueLGZDb3dwvNXXSIIdsVrC39kZAa/dro2QhR/IBlrRUcMloRrpbZW3iJKX8YN4YVcUFl9wgCQufbKvO4OuH7jLCSaTdu5zgVHOfCAAD3oAtdQ7fFtIVwkwm+0A+EwvHDScdGuONsYH9cP9xUVEin41Cr5w/rJH9kfh15Q5EqI7pMh1WgswusCaYK/7ebLmBgLhBqZD1hJ1G/LGiaIR X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(36860700013)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:26.1983 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 21de3b5c-2469-47c1-2e64-08dcc09187e9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB7373 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Signed-off-by: Harry Wentland --- Documentation/gpu/drm-kms.rst | 15 +++++++++++++++ drivers/gpu/drm/drm_colorop.c | 31 +++++++++++++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst index abfe220764e1..2292e65f044c 100644 --- a/Documentation/gpu/drm-kms.rst +++ b/Documentation/gpu/drm-kms.rst @@ -413,6 +413,21 @@ Plane Panic Functions Reference .. kernel-doc:: drivers/gpu/drm/drm_panic.c :export: +Colorop Abstraction +=================== + +.. kernel-doc:: drivers/gpu/drm/drm_colorop.c + :doc: overview + +Colorop Functions Reference +--------------------------- + +.. kernel-doc:: include/drm/drm_colorop.h + :internal: + +.. kernel-doc:: drivers/gpu/drm/drm_colorop.c + :export: + Display Modes Function Reference ================================ diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 98d22ac163e8..5b844daabd44 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -30,6 +30,37 @@ #include "drm_crtc_internal.h" +/** + * DOC: overview + * + * A colorop represents a single color operation. Colorops are chained + * via the NEXT property and make up color pipelines. Color pipelines + * are advertised and selected via the COLOR_PIPELINE &drm_plane + * property. + * + * A colorop will be of a certain type, advertised by the read-only TYPE + * property. Each type of colorop will advertise a different set of + * properties and is programmed in a different manner. Types can be + * enumerated 1D curves, 1D LUTs, 3D LUTs, matrices, etc. See the + * &drm_colorop_type documentation for information on each type. + * + * If a colorop advertises the BYPASS property it can be bypassed. + * + * Since colorops cannot stand-alone and are used to describe colorop + * operations on a plane they don't have their own locking mechanism but + * are locked and programmed along with their associated &drm_plane. + * + * Colorops are only advertised and valid for atomic drivers and atomic + * userspace that signals the DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE client + * cap. When a driver advertises the COLOR_PIPELINE property on a + * &drm_plane and userspace signals the + * DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE the driver shall ignore all other + * plane color properties, such as COLOR_ENCODING and COLOR_RANGE. + * + * More information about colorops and color pipelines can be found at + * rfc/color_pipeline.rst. + */ + static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = { { DRM_COLOROP_1D_CURVE, "1D Curve" }, }; From patchwork Mon Aug 19 20:56:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768978 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 914B8C54722 for ; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:27.2139 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ca4b3316-b942-449f-273a-08dcc0918884 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6738 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We want to be able to bypass each colorop at all times. Introduce a new BYPASS boolean property for this. v5: - Drop TODO Signed-off-by: Harry Wentland --- drivers/gpu/drm/drm_atomic_uapi.c | 6 +++++- drivers/gpu/drm/drm_colorop.c | 15 +++++++++++++++ include/drm/drm_colorop.h | 20 ++++++++++++++++++++ 3 files changed, 40 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index b867bff49f67..419813be21b0 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -648,7 +648,9 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop, struct drm_colorop_state *state, struct drm_file *file_priv, struct drm_property *property, uint64_t val) { - if (property == colorop->curve_1d_type_property) { + if (property == colorop->bypass_property) { + state->bypass = val; + } else if (property == colorop->curve_1d_type_property) { state->curve_1d_type = val; } else { drm_dbg_atomic(colorop->dev, @@ -668,6 +670,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop, { if (property == colorop->type_property) { *val = colorop->type; + } else if (property == colorop->bypass_property) { + *val = state->bypass; } else if (property == colorop->curve_1d_type_property) { *val = state->curve_1d_type; } else { diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 5b844daabd44..054e7f01151b 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -109,6 +109,17 @@ static int drm_colorop_init(struct drm_device *dev, struct drm_colorop *colorop, colorop->type_property, colorop->type); + /* bypass */ + prop = drm_property_create_bool(dev, DRM_MODE_PROP_ATOMIC, + "BYPASS"); + if (!prop) + return -ENOMEM; + + colorop->bypass_property = prop; + drm_object_attach_property(&colorop->base, + colorop->bypass_property, + 1); + return ret; } @@ -166,6 +177,7 @@ int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *coloro /* initialize 1D curve only attribute */ prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "CURVE_1D_TYPE", enum_list, len); + if (!prop) return -ENOMEM; @@ -182,6 +194,8 @@ static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colo struct drm_colorop_state *state) { memcpy(state, colorop->state, sizeof(*state)); + + state->bypass = true; } struct drm_colorop_state * @@ -220,6 +234,7 @@ static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state, u64 val; colorop_state->colorop = colorop; + colorop_state->bypass = true; if (colorop->curve_1d_type_property) { drm_object_property_get_default_value(&colorop->base, diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index dd6943117461..7ecf4e3dca4f 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -72,6 +72,14 @@ struct drm_colorop_state { /* colorop properties */ + /** + * @bypass: + * + * True if colorop shall be bypassed. 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NEXT will point to the next drm_colorop in the pipeline, or by 0 if we're at the end of the pipeline. v5: - move next comment here from Add 3x4 CTM patch (Sebastian) - Add kernel doc v4: - Allow setting of NEXT property to NULL (Chaitanya Kumar Borah) v3: - Add next pointer to colorop to be used by drivers and in DRM core Signed-off-by: Harry Wentland --- drivers/gpu/drm/drm_colorop.c | 30 ++++++++++++++++++++++++++++++ include/drm/drm_colorop.h | 20 ++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 054e7f01151b..685dd18126aa 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -88,6 +88,7 @@ static int drm_colorop_init(struct drm_device *dev, struct drm_colorop *colorop, colorop->dev = dev; colorop->type = type; colorop->plane = plane; + colorop->next = NULL; list_add_tail(&colorop->head, &config->colorop_list); colorop->index = config->num_colorop++; @@ -120,6 +121,16 @@ static int drm_colorop_init(struct drm_device *dev, struct drm_colorop *colorop, colorop->bypass_property, 1); + /* next */ + prop = drm_property_create_object(dev, DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_ATOMIC, + "NEXT", DRM_MODE_OBJECT_COLOROP); + if (!prop) + return -ENOMEM; + colorop->next_property = prop; + drm_object_attach_property(&colorop->base, + colorop->next_property, + 0); + return ret; } @@ -293,3 +304,22 @@ const char *drm_get_colorop_curve_1d_type_name(enum drm_colorop_curve_1d_type ty return colorop_curve_1d_type_names[type]; } + +/** + * drm_colorop_set_next_property - sets the next pointer + * @colorop: drm colorop + * @next: next colorop + * + * Should be used when constructing the color pipeline + */ +void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next) +{ + if (!colorop->next_property) + return; + + drm_object_property_set_value(&colorop->base, + colorop->next_property, + next ? next->base.id : 0); + colorop->next = next; +} +EXPORT_SYMBOL(drm_colorop_set_next_property); diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index 7ecf4e3dca4f..5255cf44f4b1 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -150,6 +150,14 @@ struct drm_colorop { */ enum drm_colorop_type type; + /** + * @next: + * + * Read-only + * Pointer to next drm_colorop in pipeline + */ + struct drm_colorop *next; + /** * @type_property: * @@ -177,10 +185,20 @@ struct drm_colorop { */ struct drm_property *curve_1d_type_property; + /** + * @next_property: + * + * Read-only property to next colorop in the pipeline + */ + struct drm_property *next_property; + }; #define obj_to_colorop(x) container_of(x, struct drm_colorop, base) + + + /** * drm_colorop_find - look up a Colorop object from its ID * @dev: DRM device @@ -252,4 +270,6 @@ const char *drm_get_colorop_type_name(enum drm_colorop_type type); */ const char *drm_get_colorop_curve_1d_type_name(enum drm_colorop_curve_1d_type type); +void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next); + #endif /* __DRM_COLOROP_H__ */ From patchwork Mon Aug 19 20:56:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768969 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC3EEC5320E for ; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:28.8858 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8975597c-5b18-49da-e078-08dcc0918980 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4357 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Signed-off-by: Harry Wentland --- drivers/gpu/drm/drm_atomic.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index b09db9835e1f..096460d38545 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -780,6 +780,19 @@ static int drm_atomic_plane_check(const struct drm_plane_state *old_plane_state, return 0; } + + +static void drm_atomic_colorop_print_state(struct drm_printer *p, + const struct drm_colorop_state *state) +{ + struct drm_colorop *colorop = state->colorop; + + drm_printf(p, "colorop[%u]:\n", colorop->base.id); + drm_printf(p, "\ttype=%s\n", drm_get_colorop_type_name(colorop->type)); + drm_printf(p, "\tbypass=%u\n", state->bypass); + drm_printf(p, "\tcurve_1d_type=%s\n", drm_get_colorop_curve_1d_type_name(state->curve_1d_type)); +} + static void drm_atomic_plane_print_state(struct drm_printer *p, const struct drm_plane_state *state) { @@ -801,7 +814,8 @@ static void drm_atomic_plane_print_state(struct drm_printer *p, drm_printf(p, "\tcolor-range=%s\n", drm_get_color_range_name(state->color_range)); drm_printf(p, "\tcolor_mgmt_changed=%d\n", state->color_mgmt_changed); - + drm_printf(p, "\tcolor-pipeline=%d\n", + state->color_pipeline ? state->color_pipeline->base.id : 0); if (plane->funcs->atomic_print_state) plane->funcs->atomic_print_state(p, state); } @@ -1848,6 +1862,7 @@ static void __drm_state_dump(struct drm_device *dev, struct drm_printer *p, bool take_locks) { struct drm_mode_config *config = &dev->mode_config; + struct drm_colorop *colorop; struct drm_plane *plane; struct drm_crtc *crtc; struct drm_connector *connector; @@ -1857,6 +1872,14 @@ static void __drm_state_dump(struct drm_device *dev, struct drm_printer *p, if (!drm_drv_uses_atomic_modeset(dev)) return; + list_for_each_entry(colorop, &config->colorop_list, head) { + if (take_locks) + drm_modeset_lock(&colorop->plane->mutex, NULL); + drm_atomic_colorop_print_state(p, colorop->state); + if (take_locks) + drm_modeset_unlock(&colorop->plane->mutex); + } + list_for_each_entry(plane, &config->plane_list, head) { if (take_locks) drm_modeset_lock(&plane->mutex, NULL); From patchwork Mon Aug 19 20:56:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768987 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5E455C5321D for ; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:29.1827 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6cddcf8b-240f-4599-8fb7-08dcc09189b0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8187 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We're adding a new enum COLOR PIPELINE property. This property will have entries for each COLOR PIPELINE by referencing the DRM object ID of the first drm_colorop of the pipeline. 0 disables the entire COLOR PIPELINE. Userspace can use this to discover the available color pipelines, as well as set the desired one. The color pipelines are programmed via properties on the actual drm_colorop objects. v4: - Add pipeline property creation helper (Pekka) - Fix function comment for drm_atomic_set_colorop_for_plane (Pekka) - Always create Bypass pipeline (Pekka) - Add missing function declaration (Chaitanya Kumar Borah) Signed-off-by: Harry Wentland --- drivers/gpu/drm/drm_atomic.c | 46 ++++++++++++++++++++ drivers/gpu/drm/drm_atomic_state_helper.c | 5 +++ drivers/gpu/drm/drm_atomic_uapi.c | 42 ++++++++++++++++++ drivers/gpu/drm/drm_plane.c | 52 +++++++++++++++++++++++ include/drm/drm_atomic.h | 3 ++ include/drm/drm_atomic_uapi.h | 2 + include/drm/drm_plane.h | 11 +++++ 7 files changed, 161 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index 096460d38545..d333433319f6 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -1466,6 +1466,52 @@ drm_atomic_add_affected_planes(struct drm_atomic_state *state, } EXPORT_SYMBOL(drm_atomic_add_affected_planes); +/** + * drm_atomic_add_affected_colorops - add colorops for plane + * @state: atomic state + * @plane: DRM plane + * + * This function walks the current configuration and adds all colorops + * currently used by @plane to the atomic configuration @state. This is useful + * when an atomic commit also needs to check all currently enabled colorop on + * @plane, e.g. when changing the mode. It's also useful when re-enabling a plane + * to avoid special code to force-enable all colorops. + * + * Since acquiring a colorop state will always also acquire the w/w mutex of the + * current plane for that colorop (if there is any) adding all the colorop states for + * a plane will not reduce parallelism of atomic updates. + * + * Returns: + * 0 on success or can fail with -EDEADLK or -ENOMEM. When the error is EDEADLK + * then the w/w mutex code has detected a deadlock and the entire atomic + * sequence must be restarted. All other errors are fatal. + */ +int +drm_atomic_add_affected_colorops(struct drm_atomic_state *state, + struct drm_plane *plane) +{ + struct drm_colorop *colorop; + struct drm_colorop_state *colorop_state; + + WARN_ON(!drm_atomic_get_new_plane_state(state, plane)); + + drm_dbg_atomic(plane->dev, + "Adding all current colorops for [plane:%d:%s] to %p\n", + plane->base.id, plane->name, state); + + drm_for_each_colorop(colorop, plane->dev) { + if (colorop->plane != plane) + continue; + + colorop_state = drm_atomic_get_colorop_state(state, colorop); + if (IS_ERR(colorop_state)) + return PTR_ERR(colorop_state); + } + + return 0; +} +EXPORT_SYMBOL(drm_atomic_add_affected_colorops); + /** * drm_atomic_check_only - check whether a given config would work * @state: atomic configuration to check diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index 519228eb1095..d1dd082b1286 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -267,6 +267,11 @@ void __drm_atomic_helper_plane_state_reset(struct drm_plane_state *plane_state, plane_state->color_range = val; } + if (plane->color_pipeline_property) { + /* default is always NULL, i.e., bypass */ + plane_state->color_pipeline = NULL; + } + if (plane->zpos_property) { if (!drm_object_property_get_default_value(&plane->base, plane->zpos_property, diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 419813be21b0..d8d5be358b3e 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -256,6 +256,36 @@ drm_atomic_set_fb_for_plane(struct drm_plane_state *plane_state, } EXPORT_SYMBOL(drm_atomic_set_fb_for_plane); + +/** + * drm_atomic_set_colorop_for_plane - set colorop for plane + * @plane_state: atomic state object for the plane + * @colorop: colorop to use for the plane + * + * Helper function to select the color pipeline on a plane by setting + * it to the first drm_colorop element of the pipeline. + */ +void +drm_atomic_set_colorop_for_plane(struct drm_plane_state *plane_state, + struct drm_colorop *colorop) +{ + struct drm_plane *plane = plane_state->plane; + + if (colorop) + drm_dbg_atomic(plane->dev, + "Set [COLOROP:%d] for [PLANE:%d:%s] state %p\n", + colorop->base.id, plane->base.id, plane->name, + plane_state); + else + drm_dbg_atomic(plane->dev, + "Set [NOCOLOROP] for [PLANE:%d:%s] state %p\n", + plane->base.id, plane->name, plane_state); + + plane_state->color_pipeline = colorop; +} +EXPORT_SYMBOL(drm_atomic_set_colorop_for_plane); + + /** * drm_atomic_set_crtc_for_connector - set CRTC for connector * @conn_state: atomic state object for the connector @@ -539,6 +569,16 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane, state->color_encoding = val; } else if (property == plane->color_range_property) { state->color_range = val; + } else if (property == plane->color_pipeline_property) { + /* find DRM colorop object */ + struct drm_colorop *colorop = NULL; + colorop = drm_colorop_find(dev, file_priv, val); + + if (val && !colorop) + return -EACCES; + + /* set it on drm_plane_state */ + drm_atomic_set_colorop_for_plane(state, colorop); } else if (property == config->prop_fb_damage_clips) { ret = drm_property_replace_blob_from_id(dev, &state->fb_damage_clips, @@ -621,6 +661,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane, *val = state->color_encoding; } else if (property == plane->color_range_property) { *val = state->color_range; + } else if (property == plane->color_pipeline_property) { + *val = (state->color_pipeline) ? state->color_pipeline->base.id : 0; } else if (property == config->prop_fb_damage_clips) { *val = (state->fb_damage_clips) ? state->fb_damage_clips->base.id : 0; diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index a28b22fdd7a4..e3a85a27fa7a 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -1793,3 +1793,55 @@ int drm_plane_add_size_hints_property(struct drm_plane *plane, return 0; } EXPORT_SYMBOL(drm_plane_add_size_hints_property); + +#define MAX_COLOR_PIPELINES 5 + +/** + * drm_plane_create_color_pipeline_property - create a new color pipeline + * property + * + * @plane: drm plane + * @pipelines: list of pipelines + * @num_pipelines: number of pipelines + * + * Create the COLOR_PIPELINE plane property to specific color pipelines on + * the plane. + * + * RETURNS: + * Zero for success or -errno + */ +int drm_plane_create_color_pipeline_property(struct drm_plane *plane, + struct drm_prop_enum_list *pipelines, + int num_pipelines) +{ + struct drm_prop_enum_list all_pipelines[MAX_COLOR_PIPELINES]; + int len = 0; + int i; + struct drm_property *prop; + + if (num_pipelines > (MAX_COLOR_PIPELINES - 1)) + return -EINVAL; + + /* Create default Bypass color pipeline */ + all_pipelines[len].type = 0; + all_pipelines[len].name = "Bypass"; + len++; + + /* Add all other color pipelines */ + for (i = 0; i < num_pipelines; i++, len++) { + all_pipelines[len].type = pipelines[i].type; + all_pipelines[len].name = pipelines[i].name; + } + + prop = drm_property_create_enum(plane->dev, DRM_MODE_PROP_ATOMIC, + "COLOR_PIPELINE", + all_pipelines, len); + if (IS_ERR(prop)) + return PTR_ERR(prop); + + drm_object_attach_property(&plane->base, prop, 0); + plane->color_pipeline_property = prop; + + return 0; +} +EXPORT_SYMBOL(drm_plane_create_color_pipeline_property); diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h index d2b44121b7fb..d8232fbb002b 100644 --- a/include/drm/drm_atomic.h +++ b/include/drm/drm_atomic.h @@ -852,6 +852,9 @@ drm_atomic_add_affected_connectors(struct drm_atomic_state *state, int __must_check drm_atomic_add_affected_planes(struct drm_atomic_state *state, struct drm_crtc *crtc); +int __must_check +drm_atomic_add_affected_colorops(struct drm_atomic_state *state, + struct drm_plane *plane); int __must_check drm_atomic_check_only(struct drm_atomic_state *state); int __must_check drm_atomic_commit(struct drm_atomic_state *state); diff --git a/include/drm/drm_atomic_uapi.h b/include/drm/drm_atomic_uapi.h index 70a115d523cd..436315523326 100644 --- a/include/drm/drm_atomic_uapi.h +++ b/include/drm/drm_atomic_uapi.h @@ -50,6 +50,8 @@ drm_atomic_set_crtc_for_plane(struct drm_plane_state *plane_state, struct drm_crtc *crtc); void drm_atomic_set_fb_for_plane(struct drm_plane_state *plane_state, struct drm_framebuffer *fb); +void drm_atomic_set_colorop_for_plane(struct drm_plane_state *plane_state, + struct drm_colorop *colorop); int __must_check drm_atomic_set_crtc_for_connector(struct drm_connector_state *conn_state, struct drm_crtc *crtc); diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index 2a9b902623c0..8a769c6a8251 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h @@ -774,6 +774,14 @@ struct drm_plane { */ struct drm_property *color_range_property; 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Mon, 19 Aug 2024 15:57:26 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 13/44] drm/colorop: Add NEXT to colorop state print Date: Mon, 19 Aug 2024 16:56:40 -0400 Message-ID: <20240819205714.316380-14-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FC1:EE_|IA1PR12MB6161:EE_ X-MS-Office365-Filtering-Correlation-Id: debee3fc-12bb-4dd2-db78-08dcc0918893 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|376014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: QpJVX5Hw+XLYJ/RK4v35Ax/o/Yk0KpheMTCP91iC0ENNLXrbi2OvcjFJSZ8kZdpJCcuS+/2Yw1z2kRIzhji2c7LwLV3WUzZMGRIV1Fm7ccx0SBWzbscwllY8YZdvfPJtaCdTwwiwiQM0kPW2LVCnGSO3UDjbfs+GqsTP+k6dTaGBFXd7ZrbZ2BloChsXCvgP5fcEQ3ZTnF60seSVP1ITsFLuE3PIoYEXoOZU3gLbM95NnqdmgIFgvD39D3RX/CpFW/0tBqRo50ntqzyrfzAZpSnPncPjlNSF+jGovF4cW2V/1Gb0nfGVDuySU+XpbNQLdKvf/CqCbhPVTiVGSBCC3Mv2pMCoxF1HXsGnjDhiZnO1Wl3ag1RPg5ARPFvuPAJXRSUAKNUDHyTkPaosscye95RpPBaYGrTp0sXpfV7z0kbhhZmLVZrmlOm6Xtyra/xNoqLk4zxQTJrQFsLM3lLXe4zU4yBUMeM0xRMTmnXOijTr6Du+VGo4uDsswCu7cduIBOAMM4aEdVUeblP87AsqelHpsJ9N64VaE7DlznK0MkQNy9cLPulKnt7zdAthtr1FcCvblnNsPDOR0PANrKED56+azqK385dC1zmcsT082tCsl24dWD9PzgTm+Yt3AVcklRAZdZKPPeNBM3hkPvbQadW3yHnaUAwTGNhQHvT9b1NJlFV2XAbHQjy/gUQK3apDiniobYa47MiGBrFY7+LM2cpgarQxn8uuPGwg0N/a752wmeVoTuVqWe02/uLf/yaEThhoPXdx0K/rrtSo+8J9XGC5ILB1gG/NaPadygjh0zRzUPuwRJJPQMEUxCR71pPU2b8AglySdDHdwhX4DPIhVfXUCWcNQTUUhv8sXwJKchpRXSvofxZ3LcUdAl9ZRZQwX3puZFuKV40q5e0V5A6Bk/Q9VZi2HfIAAyPKqsE3kW3i0z8awbCQEskwOf/6rurI6h7yVYiPNQWyyCkaU6CA+WscRZpptcMsmWMv+ZnqU2nP7CJc5CW1iBW5I6Tb1rDDpHBr9l9jzzjT2Bq845nq3i9OahEwSZZI7J3IYIjmPZ0v3xECtX9F0YRgVQu+HAbj3WelkcyR2Q227CYzxhuf5erQNp704PEUhFaDaJw3hF/0Z6OQDRc9f+TeHSOz/G05Pa/VfvHxhcn+mWzY260ZyBHzHe0K8N9VNVIHnZmeQqq6CWvGfo3ZP+LPIr4IPepDNyooHqsGTzn3+ZTy9+Tsls6Q5dqFx2qjVj1OyohBH8CH2s8ZZbRReDiXhOaqLXY13JucZnYaKyn4Dc6HCOLeZWwuJsLK9Pdo7j9kRGVvfrKsEK3LVLxEo2wI1i+T6Yjnu8642wS+bMugmY5GYmLMZbE3aP1M+3NTNDR8iFmjSe/xs1TZXXqT7GoPliAbKTjzWTe6xNk3V8YQJqUCtuksrd+qgNm5LxOw1XjY5sdoAE4= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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drm_printf(p, "\tbypass=%u\n", state->bypass); drm_printf(p, "\tcurve_1d_type=%s\n", drm_get_colorop_curve_1d_type_name(state->curve_1d_type)); + drm_printf(p, "\tnext=%d\n", colorop->next ? colorop->next->base.id : 0); } static void drm_atomic_plane_print_state(struct drm_printer *p, From patchwork Mon Aug 19 20:56:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768986 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9947CC52D7C for ; Mon, 19 Aug 2024 20:58:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C4A7410E398; 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Mon, 19 Aug 2024 15:57:27 -0500 Received: from localhost.localdomain (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Mon, 19 Aug 2024 15:57:27 -0500 From: Harry Wentland To: , CC: , Harry Wentland , Alex Hung Subject: [PATCH v5 14/44] drm/vkms: Add enumerated 1D curve colorop Date: Mon, 19 Aug 2024 16:56:41 -0400 Message-ID: <20240819205714.316380-15-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB03.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD9:EE_|PH7PR12MB6468:EE_ X-MS-Office365-Filtering-Correlation-Id: 1a879be2-6762-42e3-6464-08dcc0918a06 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(376014)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:29.7452 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1a879be2-6762-42e3-6464-08dcc0918a06 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6468 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch introduces a VKMS color pipeline that includes two drm_colorops for named transfer functions. For now the only ones supported are sRGB EOTF, sRGB Inverse EOTF, and a Linear TF. We will expand this in the future but I don't want to do so without accompanying IGT tests. We introduce a new vkms_luts.c file that hard-codes sRGB EOTF, sRGB Inverse EOTF, and a linear EOTF LUT. These have been generated with 256 entries each as IGT is currently testing only 8 bpc surfaces. We will likely need higher precision but I'm reluctant to make that change without clear indication that we need it. We'll revisit and, if necessary, regenerate the LUTs when we have IGT tests for higher precision buffers. v5: - Squash with "Pull apply_colorop out of pre_blend_color_transform" (Sebastian) - Fix warnings - Fix include - Drop TODOs v4: - Drop _tf_ from color_pipeline init function - Pass supported TFs into colorop init - Create bypass pipeline in DRM helper (Pekka) v2: - Add commit description - Fix sRGB EOTF LUT definition - Add linear and sRGB inverse EOTF LUTs Signed-off-by: Harry Wentland Signed-off-by: Alex Hung --- drivers/gpu/drm/vkms/Makefile | 4 +- drivers/gpu/drm/vkms/vkms_colorop.c | 72 +++ drivers/gpu/drm/vkms/vkms_composer.c | 51 ++ drivers/gpu/drm/vkms/vkms_drv.h | 4 + drivers/gpu/drm/vkms/vkms_luts.c | 802 +++++++++++++++++++++++++++ drivers/gpu/drm/vkms/vkms_luts.h | 12 + drivers/gpu/drm/vkms/vkms_plane.c | 2 + 7 files changed, 946 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/vkms/vkms_colorop.c create mode 100644 drivers/gpu/drm/vkms/vkms_luts.c create mode 100644 drivers/gpu/drm/vkms/vkms_luts.h diff --git a/drivers/gpu/drm/vkms/Makefile b/drivers/gpu/drm/vkms/Makefile index 1b28a6a32948..c38455c46be4 100644 --- a/drivers/gpu/drm/vkms/Makefile +++ b/drivers/gpu/drm/vkms/Makefile @@ -6,6 +6,8 @@ vkms-y := \ vkms_formats.o \ vkms_crtc.o \ vkms_composer.o \ - vkms_writeback.o + vkms_writeback.o \ + vkms_colorop.o \ + vkms_luts.o obj-$(CONFIG_DRM_VKMS) += vkms.o diff --git a/drivers/gpu/drm/vkms/vkms_colorop.c b/drivers/gpu/drm/vkms/vkms_colorop.c new file mode 100644 index 000000000000..f61dfde47156 --- /dev/null +++ b/drivers/gpu/drm/vkms/vkms_colorop.c @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#include +#include +#include +#include +#include + +#include "vkms_drv.h" + +#define MAX_COLOR_PIPELINES 5 + +static const u64 supported_tfs = + BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) | + BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF); + +static int vkms_initialize_color_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list) +{ + + struct drm_colorop *op, *prev_op; + struct drm_device *dev = plane->dev; + int ret; + + /* 1st op: 1d curve */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_curve_1d_init(dev, op, plane, supported_tfs); + if (ret) + return ret; + + list->type = op->base.id; + list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", op->base.id); + + prev_op = op; + + /* 2nd op: 1d curve */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_curve_1d_init(dev, op, plane, supported_tfs); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, op); + + return 0; +} + +int vkms_initialize_colorops(struct drm_plane *plane) +{ + struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES]; + int len = 0; + int ret; + + /* Add color pipeline */ + ret = vkms_initialize_color_pipeline(plane, &(pipelines[len])); + if (ret) + return ret; + len++; + + /* Create COLOR_PIPELINE property and attach */ + drm_plane_create_color_pipeline_property(plane, pipelines, len); + + return 0; +} diff --git a/drivers/gpu/drm/vkms/vkms_composer.c b/drivers/gpu/drm/vkms/vkms_composer.c index 3ecda70c2b55..bc116d16e378 100644 --- a/drivers/gpu/drm/vkms/vkms_composer.c +++ b/drivers/gpu/drm/vkms/vkms_composer.c @@ -12,6 +12,7 @@ #include #include "vkms_drv.h" +#include "vkms_luts.h" static u16 pre_mul_blend_channel(u16 src, u16 dst, u16 alpha) { @@ -163,6 +164,53 @@ static void apply_lut(const struct vkms_crtc_state *crtc_state, struct line_buff } } +static void apply_colorop(struct pixel_argb_u16 *pixel, struct drm_colorop *colorop) +{ + struct drm_colorop_state *colorop_state = colorop->state; + + if (colorop->type == DRM_COLOROP_1D_CURVE) { + switch (colorop_state->curve_1d_type) { + case DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF: + pixel->r = apply_lut_to_channel_value(&srgb_inv_eotf, pixel->r, LUT_RED); + pixel->g = apply_lut_to_channel_value(&srgb_inv_eotf, pixel->g, LUT_GREEN); + pixel->b = apply_lut_to_channel_value(&srgb_inv_eotf, pixel->b, LUT_BLUE); + break; + case DRM_COLOROP_1D_CURVE_SRGB_EOTF: + pixel->r = apply_lut_to_channel_value(&srgb_eotf, pixel->r, LUT_RED); + pixel->g = apply_lut_to_channel_value(&srgb_eotf, pixel->g, LUT_GREEN); + pixel->b = apply_lut_to_channel_value(&srgb_eotf, pixel->b, LUT_BLUE); + break; + default: + DRM_DEBUG_DRIVER("unkown colorop 1D curve type %d\n", colorop_state->curve_1d_type); + break; + } + } + +} + +static void pre_blend_color_transform(const struct vkms_plane_state *plane_state, struct line_buffer *output_buffer) +{ + struct drm_colorop *colorop = plane_state->base.base.color_pipeline; + + while (colorop) { + struct drm_colorop_state *colorop_state; + + if (!colorop) + return; + + colorop_state = colorop->state; + + if (!colorop_state) + return; + + for (size_t x = 0; x < output_buffer->n_pixels; x++) + if (!colorop_state->bypass) + apply_colorop(&output_buffer->pixels[x], colorop); + + colorop = colorop->next; + } +} + /** * blend - blend the pixels from all planes and compute crc * @wb: The writeback frame buffer metadata @@ -200,6 +248,9 @@ static void blend(struct vkms_writeback_job *wb, continue; vkms_compose_row(stage_buffer, plane[i], y_pos); + + pre_blend_color_transform(plane[i], stage_buffer); + pre_mul_alpha_blend(plane[i]->frame_info, stage_buffer, output_buffer); } diff --git a/drivers/gpu/drm/vkms/vkms_drv.h b/drivers/gpu/drm/vkms/vkms_drv.h index 5e46ea5b96dc..278cf3533f58 100644 --- a/drivers/gpu/drm/vkms/vkms_drv.h +++ b/drivers/gpu/drm/vkms/vkms_drv.h @@ -169,4 +169,8 @@ void vkms_writeback_row(struct vkms_writeback_job *wb, const struct line_buffer /* Writeback */ int vkms_enable_writeback_connector(struct vkms_device *vkmsdev); +/* Colorops */ +int vkms_initialize_colorops(struct drm_plane *plane); + + #endif /* _VKMS_DRV_H_ */ diff --git a/drivers/gpu/drm/vkms/vkms_luts.c b/drivers/gpu/drm/vkms/vkms_luts.c new file mode 100644 index 000000000000..6553d6d442b4 --- /dev/null +++ b/drivers/gpu/drm/vkms/vkms_luts.c @@ -0,0 +1,802 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#include + +#include "vkms_drv.h" +#include "vkms_luts.h" + +static struct drm_color_lut linear_array[LUT_SIZE] = { + { 0x0, 0x0, 0x0, 0 }, + { 0x101, 0x101, 0x101, 0 }, + { 0x202, 0x202, 0x202, 0 }, + { 0x303, 0x303, 0x303, 0 }, + { 0x404, 0x404, 0x404, 0 }, + { 0x505, 0x505, 0x505, 0 }, + { 0x606, 0x606, 0x606, 0 }, + { 0x707, 0x707, 0x707, 0 }, + { 0x808, 0x808, 0x808, 0 }, + { 0x909, 0x909, 0x909, 0 }, + { 0xa0a, 0xa0a, 0xa0a, 0 }, + { 0xb0b, 0xb0b, 0xb0b, 0 }, + { 0xc0c, 0xc0c, 0xc0c, 0 }, + { 0xd0d, 0xd0d, 0xd0d, 0 }, + { 0xe0e, 0xe0e, 0xe0e, 0 }, + { 0xf0f, 0xf0f, 0xf0f, 0 }, + { 0x1010, 0x1010, 0x1010, 0 }, + { 0x1111, 0x1111, 0x1111, 0 }, + { 0x1212, 0x1212, 0x1212, 0 }, + { 0x1313, 0x1313, 0x1313, 0 }, + { 0x1414, 0x1414, 0x1414, 0 }, + { 0x1515, 0x1515, 0x1515, 0 }, + { 0x1616, 0x1616, 0x1616, 0 }, + { 0x1717, 0x1717, 0x1717, 0 }, + { 0x1818, 0x1818, 0x1818, 0 }, + { 0x1919, 0x1919, 0x1919, 0 }, + { 0x1a1a, 0x1a1a, 0x1a1a, 0 }, + { 0x1b1b, 0x1b1b, 0x1b1b, 0 }, + { 0x1c1c, 0x1c1c, 0x1c1c, 0 }, + { 0x1d1d, 0x1d1d, 0x1d1d, 0 }, + { 0x1e1e, 0x1e1e, 0x1e1e, 0 }, + { 0x1f1f, 0x1f1f, 0x1f1f, 0 }, + { 0x2020, 0x2020, 0x2020, 0 }, + { 0x2121, 0x2121, 0x2121, 0 }, + { 0x2222, 0x2222, 0x2222, 0 }, + { 0x2323, 0x2323, 0x2323, 0 }, + { 0x2424, 0x2424, 0x2424, 0 }, + { 0x2525, 0x2525, 0x2525, 0 }, + { 0x2626, 0x2626, 0x2626, 0 }, + { 0x2727, 0x2727, 0x2727, 0 }, + { 0x2828, 0x2828, 0x2828, 0 }, + { 0x2929, 0x2929, 0x2929, 0 }, + { 0x2a2a, 0x2a2a, 0x2a2a, 0 }, + { 0x2b2b, 0x2b2b, 0x2b2b, 0 }, + { 0x2c2c, 0x2c2c, 0x2c2c, 0 }, + { 0x2d2d, 0x2d2d, 0x2d2d, 0 }, + { 0x2e2e, 0x2e2e, 0x2e2e, 0 }, + { 0x2f2f, 0x2f2f, 0x2f2f, 0 }, + { 0x3030, 0x3030, 0x3030, 0 }, + { 0x3131, 0x3131, 0x3131, 0 }, + { 0x3232, 0x3232, 0x3232, 0 }, + { 0x3333, 0x3333, 0x3333, 0 }, + { 0x3434, 0x3434, 0x3434, 0 }, + { 0x3535, 0x3535, 0x3535, 0 }, + { 0x3636, 0x3636, 0x3636, 0 }, + { 0x3737, 0x3737, 0x3737, 0 }, + { 0x3838, 0x3838, 0x3838, 0 }, + { 0x3939, 0x3939, 0x3939, 0 }, + { 0x3a3a, 0x3a3a, 0x3a3a, 0 }, + { 0x3b3b, 0x3b3b, 0x3b3b, 0 }, + { 0x3c3c, 0x3c3c, 0x3c3c, 0 }, + { 0x3d3d, 0x3d3d, 0x3d3d, 0 }, + { 0x3e3e, 0x3e3e, 0x3e3e, 0 }, + { 0x3f3f, 0x3f3f, 0x3f3f, 0 }, + { 0x4040, 0x4040, 0x4040, 0 }, + { 0x4141, 0x4141, 0x4141, 0 }, + { 0x4242, 0x4242, 0x4242, 0 }, + { 0x4343, 0x4343, 0x4343, 0 }, + { 0x4444, 0x4444, 0x4444, 0 }, + { 0x4545, 0x4545, 0x4545, 0 }, + { 0x4646, 0x4646, 0x4646, 0 }, + { 0x4747, 0x4747, 0x4747, 0 }, + { 0x4848, 0x4848, 0x4848, 0 }, + { 0x4949, 0x4949, 0x4949, 0 }, + { 0x4a4a, 0x4a4a, 0x4a4a, 0 }, + { 0x4b4b, 0x4b4b, 0x4b4b, 0 }, + { 0x4c4c, 0x4c4c, 0x4c4c, 0 }, + { 0x4d4d, 0x4d4d, 0x4d4d, 0 }, + { 0x4e4e, 0x4e4e, 0x4e4e, 0 }, + { 0x4f4f, 0x4f4f, 0x4f4f, 0 }, + { 0x5050, 0x5050, 0x5050, 0 }, + { 0x5151, 0x5151, 0x5151, 0 }, + { 0x5252, 0x5252, 0x5252, 0 }, + { 0x5353, 0x5353, 0x5353, 0 }, + { 0x5454, 0x5454, 0x5454, 0 }, + { 0x5555, 0x5555, 0x5555, 0 }, + { 0x5656, 0x5656, 0x5656, 0 }, + { 0x5757, 0x5757, 0x5757, 0 }, + { 0x5858, 0x5858, 0x5858, 0 }, + { 0x5959, 0x5959, 0x5959, 0 }, + { 0x5a5a, 0x5a5a, 0x5a5a, 0 }, + { 0x5b5b, 0x5b5b, 0x5b5b, 0 }, + { 0x5c5c, 0x5c5c, 0x5c5c, 0 }, + { 0x5d5d, 0x5d5d, 0x5d5d, 0 }, + { 0x5e5e, 0x5e5e, 0x5e5e, 0 }, + { 0x5f5f, 0x5f5f, 0x5f5f, 0 }, + { 0x6060, 0x6060, 0x6060, 0 }, + { 0x6161, 0x6161, 0x6161, 0 }, + { 0x6262, 0x6262, 0x6262, 0 }, + { 0x6363, 0x6363, 0x6363, 0 }, + { 0x6464, 0x6464, 0x6464, 0 }, + { 0x6565, 0x6565, 0x6565, 0 }, + { 0x6666, 0x6666, 0x6666, 0 }, + { 0x6767, 0x6767, 0x6767, 0 }, + { 0x6868, 0x6868, 0x6868, 0 }, + { 0x6969, 0x6969, 0x6969, 0 }, + { 0x6a6a, 0x6a6a, 0x6a6a, 0 }, + { 0x6b6b, 0x6b6b, 0x6b6b, 0 }, + { 0x6c6c, 0x6c6c, 0x6c6c, 0 }, + { 0x6d6d, 0x6d6d, 0x6d6d, 0 }, + { 0x6e6e, 0x6e6e, 0x6e6e, 0 }, + { 0x6f6f, 0x6f6f, 0x6f6f, 0 }, + { 0x7070, 0x7070, 0x7070, 0 }, + { 0x7171, 0x7171, 0x7171, 0 }, + { 0x7272, 0x7272, 0x7272, 0 }, + { 0x7373, 0x7373, 0x7373, 0 }, + { 0x7474, 0x7474, 0x7474, 0 }, + { 0x7575, 0x7575, 0x7575, 0 }, + { 0x7676, 0x7676, 0x7676, 0 }, + { 0x7777, 0x7777, 0x7777, 0 }, + { 0x7878, 0x7878, 0x7878, 0 }, + { 0x7979, 0x7979, 0x7979, 0 }, + { 0x7a7a, 0x7a7a, 0x7a7a, 0 }, + { 0x7b7b, 0x7b7b, 0x7b7b, 0 }, + { 0x7c7c, 0x7c7c, 0x7c7c, 0 }, + { 0x7d7d, 0x7d7d, 0x7d7d, 0 }, + { 0x7e7e, 0x7e7e, 0x7e7e, 0 }, + { 0x7f7f, 0x7f7f, 0x7f7f, 0 }, + { 0x8080, 0x8080, 0x8080, 0 }, + { 0x8181, 0x8181, 0x8181, 0 }, + { 0x8282, 0x8282, 0x8282, 0 }, + { 0x8383, 0x8383, 0x8383, 0 }, + { 0x8484, 0x8484, 0x8484, 0 }, + { 0x8585, 0x8585, 0x8585, 0 }, + { 0x8686, 0x8686, 0x8686, 0 }, + { 0x8787, 0x8787, 0x8787, 0 }, + { 0x8888, 0x8888, 0x8888, 0 }, + { 0x8989, 0x8989, 0x8989, 0 }, + { 0x8a8a, 0x8a8a, 0x8a8a, 0 }, + { 0x8b8b, 0x8b8b, 0x8b8b, 0 }, + { 0x8c8c, 0x8c8c, 0x8c8c, 0 }, + { 0x8d8d, 0x8d8d, 0x8d8d, 0 }, + { 0x8e8e, 0x8e8e, 0x8e8e, 0 }, + { 0x8f8f, 0x8f8f, 0x8f8f, 0 }, + { 0x9090, 0x9090, 0x9090, 0 }, + { 0x9191, 0x9191, 0x9191, 0 }, + { 0x9292, 0x9292, 0x9292, 0 }, + { 0x9393, 0x9393, 0x9393, 0 }, + { 0x9494, 0x9494, 0x9494, 0 }, + { 0x9595, 0x9595, 0x9595, 0 }, + { 0x9696, 0x9696, 0x9696, 0 }, + { 0x9797, 0x9797, 0x9797, 0 }, + { 0x9898, 0x9898, 0x9898, 0 }, + { 0x9999, 0x9999, 0x9999, 0 }, + { 0x9a9a, 0x9a9a, 0x9a9a, 0 }, + { 0x9b9b, 0x9b9b, 0x9b9b, 0 }, + { 0x9c9c, 0x9c9c, 0x9c9c, 0 }, + { 0x9d9d, 0x9d9d, 0x9d9d, 0 }, + { 0x9e9e, 0x9e9e, 0x9e9e, 0 }, + { 0x9f9f, 0x9f9f, 0x9f9f, 0 }, + { 0xa0a0, 0xa0a0, 0xa0a0, 0 }, + { 0xa1a1, 0xa1a1, 0xa1a1, 0 }, + { 0xa2a2, 0xa2a2, 0xa2a2, 0 }, + { 0xa3a3, 0xa3a3, 0xa3a3, 0 }, + { 0xa4a4, 0xa4a4, 0xa4a4, 0 }, + { 0xa5a5, 0xa5a5, 0xa5a5, 0 }, + { 0xa6a6, 0xa6a6, 0xa6a6, 0 }, + { 0xa7a7, 0xa7a7, 0xa7a7, 0 }, + { 0xa8a8, 0xa8a8, 0xa8a8, 0 }, + { 0xa9a9, 0xa9a9, 0xa9a9, 0 }, + { 0xaaaa, 0xaaaa, 0xaaaa, 0 }, + { 0xabab, 0xabab, 0xabab, 0 }, + { 0xacac, 0xacac, 0xacac, 0 }, + { 0xadad, 0xadad, 0xadad, 0 }, + { 0xaeae, 0xaeae, 0xaeae, 0 }, + { 0xafaf, 0xafaf, 0xafaf, 0 }, + { 0xb0b0, 0xb0b0, 0xb0b0, 0 }, + { 0xb1b1, 0xb1b1, 0xb1b1, 0 }, + { 0xb2b2, 0xb2b2, 0xb2b2, 0 }, + { 0xb3b3, 0xb3b3, 0xb3b3, 0 }, + { 0xb4b4, 0xb4b4, 0xb4b4, 0 }, + { 0xb5b5, 0xb5b5, 0xb5b5, 0 }, + { 0xb6b6, 0xb6b6, 0xb6b6, 0 }, + { 0xb7b7, 0xb7b7, 0xb7b7, 0 }, + { 0xb8b8, 0xb8b8, 0xb8b8, 0 }, + { 0xb9b9, 0xb9b9, 0xb9b9, 0 }, + { 0xbaba, 0xbaba, 0xbaba, 0 }, + { 0xbbbb, 0xbbbb, 0xbbbb, 0 }, + { 0xbcbc, 0xbcbc, 0xbcbc, 0 }, + { 0xbdbd, 0xbdbd, 0xbdbd, 0 }, + { 0xbebe, 0xbebe, 0xbebe, 0 }, + { 0xbfbf, 0xbfbf, 0xbfbf, 0 }, + { 0xc0c0, 0xc0c0, 0xc0c0, 0 }, + { 0xc1c1, 0xc1c1, 0xc1c1, 0 }, + { 0xc2c2, 0xc2c2, 0xc2c2, 0 }, + { 0xc3c3, 0xc3c3, 0xc3c3, 0 }, + { 0xc4c4, 0xc4c4, 0xc4c4, 0 }, + { 0xc5c5, 0xc5c5, 0xc5c5, 0 }, + { 0xc6c6, 0xc6c6, 0xc6c6, 0 }, + { 0xc7c7, 0xc7c7, 0xc7c7, 0 }, + { 0xc8c8, 0xc8c8, 0xc8c8, 0 }, + { 0xc9c9, 0xc9c9, 0xc9c9, 0 }, + { 0xcaca, 0xcaca, 0xcaca, 0 }, + { 0xcbcb, 0xcbcb, 0xcbcb, 0 }, + { 0xcccc, 0xcccc, 0xcccc, 0 }, + { 0xcdcd, 0xcdcd, 0xcdcd, 0 }, + { 0xcece, 0xcece, 0xcece, 0 }, + { 0xcfcf, 0xcfcf, 0xcfcf, 0 }, + { 0xd0d0, 0xd0d0, 0xd0d0, 0 }, + { 0xd1d1, 0xd1d1, 0xd1d1, 0 }, + { 0xd2d2, 0xd2d2, 0xd2d2, 0 }, + { 0xd3d3, 0xd3d3, 0xd3d3, 0 }, + { 0xd4d4, 0xd4d4, 0xd4d4, 0 }, + { 0xd5d5, 0xd5d5, 0xd5d5, 0 }, + { 0xd6d6, 0xd6d6, 0xd6d6, 0 }, + { 0xd7d7, 0xd7d7, 0xd7d7, 0 }, + { 0xd8d8, 0xd8d8, 0xd8d8, 0 }, + { 0xd9d9, 0xd9d9, 0xd9d9, 0 }, + { 0xdada, 0xdada, 0xdada, 0 }, + { 0xdbdb, 0xdbdb, 0xdbdb, 0 }, + { 0xdcdc, 0xdcdc, 0xdcdc, 0 }, + { 0xdddd, 0xdddd, 0xdddd, 0 }, + { 0xdede, 0xdede, 0xdede, 0 }, + { 0xdfdf, 0xdfdf, 0xdfdf, 0 }, + { 0xe0e0, 0xe0e0, 0xe0e0, 0 }, + { 0xe1e1, 0xe1e1, 0xe1e1, 0 }, + { 0xe2e2, 0xe2e2, 0xe2e2, 0 }, + { 0xe3e3, 0xe3e3, 0xe3e3, 0 }, + { 0xe4e4, 0xe4e4, 0xe4e4, 0 }, + { 0xe5e5, 0xe5e5, 0xe5e5, 0 }, + { 0xe6e6, 0xe6e6, 0xe6e6, 0 }, + { 0xe7e7, 0xe7e7, 0xe7e7, 0 }, + { 0xe8e8, 0xe8e8, 0xe8e8, 0 }, + { 0xe9e9, 0xe9e9, 0xe9e9, 0 }, + { 0xeaea, 0xeaea, 0xeaea, 0 }, + { 0xebeb, 0xebeb, 0xebeb, 0 }, + { 0xecec, 0xecec, 0xecec, 0 }, + { 0xeded, 0xeded, 0xeded, 0 }, + { 0xeeee, 0xeeee, 0xeeee, 0 }, + { 0xefef, 0xefef, 0xefef, 0 }, + { 0xf0f0, 0xf0f0, 0xf0f0, 0 }, + { 0xf1f1, 0xf1f1, 0xf1f1, 0 }, + { 0xf2f2, 0xf2f2, 0xf2f2, 0 }, + { 0xf3f3, 0xf3f3, 0xf3f3, 0 }, + { 0xf4f4, 0xf4f4, 0xf4f4, 0 }, + { 0xf5f5, 0xf5f5, 0xf5f5, 0 }, + { 0xf6f6, 0xf6f6, 0xf6f6, 0 }, + { 0xf7f7, 0xf7f7, 0xf7f7, 0 }, + { 0xf8f8, 0xf8f8, 0xf8f8, 0 }, + { 0xf9f9, 0xf9f9, 0xf9f9, 0 }, + { 0xfafa, 0xfafa, 0xfafa, 0 }, + { 0xfbfb, 0xfbfb, 0xfbfb, 0 }, + { 0xfcfc, 0xfcfc, 0xfcfc, 0 }, + { 0xfdfd, 0xfdfd, 0xfdfd, 0 }, + { 0xfefe, 0xfefe, 0xfefe, 0 }, + { 0xffff, 0xffff, 0xffff, 0 }, +}; + +const struct vkms_color_lut linear_eotf = { + .base = linear_array, + .lut_length = LUT_SIZE, + .channel_value2index_ratio = 0xff00ffll +}; + + +static struct drm_color_lut srgb_array[LUT_SIZE] = { + { 0x0, 0x0, 0x0, 0 }, + { 0x13, 0x13, 0x13, 0 }, + { 0x27, 0x27, 0x27, 0 }, + { 0x3b, 0x3b, 0x3b, 0 }, + { 0x4f, 0x4f, 0x4f, 0 }, + { 0x63, 0x63, 0x63, 0 }, + { 0x77, 0x77, 0x77, 0 }, + { 0x8b, 0x8b, 0x8b, 0 }, + { 0x9f, 0x9f, 0x9f, 0 }, + { 0xb3, 0xb3, 0xb3, 0 }, + { 0xc6, 0xc6, 0xc6, 0 }, + { 0xdb, 0xdb, 0xdb, 0 }, + { 0xf0, 0xf0, 0xf0, 0 }, + { 0x107, 0x107, 0x107, 0 }, + { 0x11f, 0x11f, 0x11f, 0 }, + { 0x139, 0x139, 0x139, 0 }, + { 0x153, 0x153, 0x153, 0 }, + { 0x16f, 0x16f, 0x16f, 0 }, + { 0x18c, 0x18c, 0x18c, 0 }, + { 0x1aa, 0x1aa, 0x1aa, 0 }, + { 0x1ca, 0x1ca, 0x1ca, 0 }, + { 0x1eb, 0x1eb, 0x1eb, 0 }, + { 0x20d, 0x20d, 0x20d, 0 }, + { 0x231, 0x231, 0x231, 0 }, + { 0x256, 0x256, 0x256, 0 }, + { 0x27d, 0x27d, 0x27d, 0 }, + { 0x2a4, 0x2a4, 0x2a4, 0 }, + { 0x2ce, 0x2ce, 0x2ce, 0 }, + { 0x2f9, 0x2f9, 0x2f9, 0 }, + { 0x325, 0x325, 0x325, 0 }, + { 0x352, 0x352, 0x352, 0 }, + { 0x381, 0x381, 0x381, 0 }, + { 0x3b2, 0x3b2, 0x3b2, 0 }, + { 0x3e4, 0x3e4, 0x3e4, 0 }, + { 0x418, 0x418, 0x418, 0 }, + { 0x44d, 0x44d, 0x44d, 0 }, + { 0x484, 0x484, 0x484, 0 }, + { 0x4bc, 0x4bc, 0x4bc, 0 }, + { 0x4f6, 0x4f6, 0x4f6, 0 }, + { 0x531, 0x531, 0x531, 0 }, + { 0x56e, 0x56e, 0x56e, 0 }, + { 0x5ad, 0x5ad, 0x5ad, 0 }, + { 0x5ed, 0x5ed, 0x5ed, 0 }, + { 0x62f, 0x62f, 0x62f, 0 }, + { 0x672, 0x672, 0x672, 0 }, + { 0x6b7, 0x6b7, 0x6b7, 0 }, + { 0x6fe, 0x6fe, 0x6fe, 0 }, + { 0x746, 0x746, 0x746, 0 }, + { 0x791, 0x791, 0x791, 0 }, + { 0x7dc, 0x7dc, 0x7dc, 0 }, + { 0x82a, 0x82a, 0x82a, 0 }, + { 0x879, 0x879, 0x879, 0 }, + { 0x8ca, 0x8ca, 0x8ca, 0 }, + { 0x91d, 0x91d, 0x91d, 0 }, + { 0x971, 0x971, 0x971, 0 }, + { 0x9c7, 0x9c7, 0x9c7, 0 }, + { 0xa1f, 0xa1f, 0xa1f, 0 }, + { 0xa79, 0xa79, 0xa79, 0 }, + { 0xad4, 0xad4, 0xad4, 0 }, + { 0xb32, 0xb32, 0xb32, 0 }, + { 0xb91, 0xb91, 0xb91, 0 }, + { 0xbf2, 0xbf2, 0xbf2, 0 }, + { 0xc54, 0xc54, 0xc54, 0 }, + { 0xcb9, 0xcb9, 0xcb9, 0 }, + { 0xd1f, 0xd1f, 0xd1f, 0 }, + { 0xd88, 0xd88, 0xd88, 0 }, + { 0xdf2, 0xdf2, 0xdf2, 0 }, + { 0xe5e, 0xe5e, 0xe5e, 0 }, + { 0xecc, 0xecc, 0xecc, 0 }, + { 0xf3c, 0xf3c, 0xf3c, 0 }, + { 0xfad, 0xfad, 0xfad, 0 }, + { 0x1021, 0x1021, 0x1021, 0 }, + { 0x1096, 0x1096, 0x1096, 0 }, + { 0x110e, 0x110e, 0x110e, 0 }, + { 0x1187, 0x1187, 0x1187, 0 }, + { 0x1203, 0x1203, 0x1203, 0 }, + { 0x1280, 0x1280, 0x1280, 0 }, + { 0x12ff, 0x12ff, 0x12ff, 0 }, + { 0x1380, 0x1380, 0x1380, 0 }, + { 0x1404, 0x1404, 0x1404, 0 }, + { 0x1489, 0x1489, 0x1489, 0 }, + { 0x1510, 0x1510, 0x1510, 0 }, + { 0x1599, 0x1599, 0x1599, 0 }, + { 0x1624, 0x1624, 0x1624, 0 }, + { 0x16b2, 0x16b2, 0x16b2, 0 }, + { 0x1741, 0x1741, 0x1741, 0 }, + { 0x17d2, 0x17d2, 0x17d2, 0 }, + { 0x1865, 0x1865, 0x1865, 0 }, + { 0x18fb, 0x18fb, 0x18fb, 0 }, + { 0x1992, 0x1992, 0x1992, 0 }, + { 0x1a2c, 0x1a2c, 0x1a2c, 0 }, + { 0x1ac8, 0x1ac8, 0x1ac8, 0 }, + { 0x1b65, 0x1b65, 0x1b65, 0 }, + { 0x1c05, 0x1c05, 0x1c05, 0 }, + { 0x1ca7, 0x1ca7, 0x1ca7, 0 }, + { 0x1d4b, 0x1d4b, 0x1d4b, 0 }, + { 0x1df1, 0x1df1, 0x1df1, 0 }, + { 0x1e99, 0x1e99, 0x1e99, 0 }, + { 0x1f44, 0x1f44, 0x1f44, 0 }, + { 0x1ff0, 0x1ff0, 0x1ff0, 0 }, + { 0x209f, 0x209f, 0x209f, 0 }, + { 0x2150, 0x2150, 0x2150, 0 }, + { 0x2203, 0x2203, 0x2203, 0 }, + { 0x22b8, 0x22b8, 0x22b8, 0 }, + { 0x2370, 0x2370, 0x2370, 0 }, + { 0x2429, 0x2429, 0x2429, 0 }, + { 0x24e5, 0x24e5, 0x24e5, 0 }, + { 0x25a3, 0x25a3, 0x25a3, 0 }, + { 0x2663, 0x2663, 0x2663, 0 }, + { 0x2726, 0x2726, 0x2726, 0 }, + { 0x27ea, 0x27ea, 0x27ea, 0 }, + { 0x28b1, 0x28b1, 0x28b1, 0 }, + { 0x297a, 0x297a, 0x297a, 0 }, + { 0x2a45, 0x2a45, 0x2a45, 0 }, + { 0x2b13, 0x2b13, 0x2b13, 0 }, + { 0x2be3, 0x2be3, 0x2be3, 0 }, + { 0x2cb5, 0x2cb5, 0x2cb5, 0 }, + { 0x2d89, 0x2d89, 0x2d89, 0 }, + { 0x2e60, 0x2e60, 0x2e60, 0 }, + { 0x2f39, 0x2f39, 0x2f39, 0 }, + { 0x3014, 0x3014, 0x3014, 0 }, + { 0x30f2, 0x30f2, 0x30f2, 0 }, + { 0x31d2, 0x31d2, 0x31d2, 0 }, + { 0x32b4, 0x32b4, 0x32b4, 0 }, + { 0x3398, 0x3398, 0x3398, 0 }, + { 0x347f, 0x347f, 0x347f, 0 }, + { 0x3569, 0x3569, 0x3569, 0 }, + { 0x3654, 0x3654, 0x3654, 0 }, + { 0x3742, 0x3742, 0x3742, 0 }, + { 0x3832, 0x3832, 0x3832, 0 }, + { 0x3925, 0x3925, 0x3925, 0 }, + { 0x3a1a, 0x3a1a, 0x3a1a, 0 }, + { 0x3b11, 0x3b11, 0x3b11, 0 }, + { 0x3c0b, 0x3c0b, 0x3c0b, 0 }, + { 0x3d07, 0x3d07, 0x3d07, 0 }, + { 0x3e05, 0x3e05, 0x3e05, 0 }, + { 0x3f06, 0x3f06, 0x3f06, 0 }, + { 0x400a, 0x400a, 0x400a, 0 }, + { 0x410f, 0x410f, 0x410f, 0 }, + { 0x4218, 0x4218, 0x4218, 0 }, + { 0x4322, 0x4322, 0x4322, 0 }, + { 0x442f, 0x442f, 0x442f, 0 }, + { 0x453f, 0x453f, 0x453f, 0 }, + { 0x4650, 0x4650, 0x4650, 0 }, + { 0x4765, 0x4765, 0x4765, 0 }, + { 0x487c, 0x487c, 0x487c, 0 }, + { 0x4995, 0x4995, 0x4995, 0 }, + { 0x4ab1, 0x4ab1, 0x4ab1, 0 }, + { 0x4bcf, 0x4bcf, 0x4bcf, 0 }, + { 0x4cf0, 0x4cf0, 0x4cf0, 0 }, + { 0x4e13, 0x4e13, 0x4e13, 0 }, + { 0x4f39, 0x4f39, 0x4f39, 0 }, + { 0x5061, 0x5061, 0x5061, 0 }, + { 0x518b, 0x518b, 0x518b, 0 }, + { 0x52b9, 0x52b9, 0x52b9, 0 }, + { 0x53e8, 0x53e8, 0x53e8, 0 }, + { 0x551b, 0x551b, 0x551b, 0 }, + { 0x5650, 0x5650, 0x5650, 0 }, + { 0x5787, 0x5787, 0x5787, 0 }, + { 0x58c1, 0x58c1, 0x58c1, 0 }, + { 0x59fd, 0x59fd, 0x59fd, 0 }, + { 0x5b3c, 0x5b3c, 0x5b3c, 0 }, + { 0x5c7e, 0x5c7e, 0x5c7e, 0 }, + { 0x5dc2, 0x5dc2, 0x5dc2, 0 }, + { 0x5f09, 0x5f09, 0x5f09, 0 }, + { 0x6052, 0x6052, 0x6052, 0 }, + { 0x619e, 0x619e, 0x619e, 0 }, + { 0x62ec, 0x62ec, 0x62ec, 0 }, + { 0x643d, 0x643d, 0x643d, 0 }, + { 0x6591, 0x6591, 0x6591, 0 }, + { 0x66e7, 0x66e7, 0x66e7, 0 }, + { 0x6840, 0x6840, 0x6840, 0 }, + { 0x699b, 0x699b, 0x699b, 0 }, + { 0x6afa, 0x6afa, 0x6afa, 0 }, + { 0x6c5a, 0x6c5a, 0x6c5a, 0 }, + { 0x6dbe, 0x6dbe, 0x6dbe, 0 }, + { 0x6f24, 0x6f24, 0x6f24, 0 }, + { 0x708c, 0x708c, 0x708c, 0 }, + { 0x71f8, 0x71f8, 0x71f8, 0 }, + { 0x7366, 0x7366, 0x7366, 0 }, + { 0x74d6, 0x74d6, 0x74d6, 0 }, + { 0x764a, 0x764a, 0x764a, 0 }, + { 0x77c0, 0x77c0, 0x77c0, 0 }, + { 0x7938, 0x7938, 0x7938, 0 }, + { 0x7ab4, 0x7ab4, 0x7ab4, 0 }, + { 0x7c32, 0x7c32, 0x7c32, 0 }, + { 0x7db3, 0x7db3, 0x7db3, 0 }, + { 0x7f36, 0x7f36, 0x7f36, 0 }, + { 0x80bc, 0x80bc, 0x80bc, 0 }, + { 0x8245, 0x8245, 0x8245, 0 }, + { 0x83d1, 0x83d1, 0x83d1, 0 }, + { 0x855f, 0x855f, 0x855f, 0 }, + { 0x86f0, 0x86f0, 0x86f0, 0 }, + { 0x8884, 0x8884, 0x8884, 0 }, + { 0x8a1a, 0x8a1a, 0x8a1a, 0 }, + { 0x8bb4, 0x8bb4, 0x8bb4, 0 }, + { 0x8d50, 0x8d50, 0x8d50, 0 }, + { 0x8eee, 0x8eee, 0x8eee, 0 }, + { 0x9090, 0x9090, 0x9090, 0 }, + { 0x9234, 0x9234, 0x9234, 0 }, + { 0x93db, 0x93db, 0x93db, 0 }, + { 0x9585, 0x9585, 0x9585, 0 }, + { 0x9732, 0x9732, 0x9732, 0 }, + { 0x98e1, 0x98e1, 0x98e1, 0 }, + { 0x9a93, 0x9a93, 0x9a93, 0 }, + { 0x9c48, 0x9c48, 0x9c48, 0 }, + { 0x9e00, 0x9e00, 0x9e00, 0 }, + { 0x9fbb, 0x9fbb, 0x9fbb, 0 }, + { 0xa178, 0xa178, 0xa178, 0 }, + { 0xa338, 0xa338, 0xa338, 0 }, + { 0xa4fb, 0xa4fb, 0xa4fb, 0 }, + { 0xa6c1, 0xa6c1, 0xa6c1, 0 }, + { 0xa88a, 0xa88a, 0xa88a, 0 }, + { 0xaa56, 0xaa56, 0xaa56, 0 }, + { 0xac24, 0xac24, 0xac24, 0 }, + { 0xadf5, 0xadf5, 0xadf5, 0 }, + { 0xafc9, 0xafc9, 0xafc9, 0 }, + { 0xb1a0, 0xb1a0, 0xb1a0, 0 }, + { 0xb37a, 0xb37a, 0xb37a, 0 }, + { 0xb557, 0xb557, 0xb557, 0 }, + { 0xb736, 0xb736, 0xb736, 0 }, + { 0xb919, 0xb919, 0xb919, 0 }, + { 0xbafe, 0xbafe, 0xbafe, 0 }, + { 0xbce6, 0xbce6, 0xbce6, 0 }, + { 0xbed2, 0xbed2, 0xbed2, 0 }, + { 0xc0c0, 0xc0c0, 0xc0c0, 0 }, + { 0xc2b0, 0xc2b0, 0xc2b0, 0 }, + { 0xc4a4, 0xc4a4, 0xc4a4, 0 }, + { 0xc69b, 0xc69b, 0xc69b, 0 }, + { 0xc895, 0xc895, 0xc895, 0 }, + { 0xca91, 0xca91, 0xca91, 0 }, + { 0xcc91, 0xcc91, 0xcc91, 0 }, + { 0xce93, 0xce93, 0xce93, 0 }, + { 0xd098, 0xd098, 0xd098, 0 }, + { 0xd2a1, 0xd2a1, 0xd2a1, 0 }, + { 0xd4ac, 0xd4ac, 0xd4ac, 0 }, + { 0xd6ba, 0xd6ba, 0xd6ba, 0 }, + { 0xd8cb, 0xd8cb, 0xd8cb, 0 }, + { 0xdadf, 0xdadf, 0xdadf, 0 }, + { 0xdcf7, 0xdcf7, 0xdcf7, 0 }, + { 0xdf11, 0xdf11, 0xdf11, 0 }, + { 0xe12e, 0xe12e, 0xe12e, 0 }, + { 0xe34e, 0xe34e, 0xe34e, 0 }, + { 0xe571, 0xe571, 0xe571, 0 }, + { 0xe796, 0xe796, 0xe796, 0 }, + { 0xe9bf, 0xe9bf, 0xe9bf, 0 }, + { 0xebeb, 0xebeb, 0xebeb, 0 }, + { 0xee1a, 0xee1a, 0xee1a, 0 }, + { 0xf04c, 0xf04c, 0xf04c, 0 }, + { 0xf281, 0xf281, 0xf281, 0 }, + { 0xf4b9, 0xf4b9, 0xf4b9, 0 }, + { 0xf6f4, 0xf6f4, 0xf6f4, 0 }, + { 0xf932, 0xf932, 0xf932, 0 }, + { 0xfb73, 0xfb73, 0xfb73, 0 }, + { 0xfdb7, 0xfdb7, 0xfdb7, 0 }, + { 0xffff, 0xffff, 0xffff, 0 }, +}; + +const struct vkms_color_lut srgb_eotf = { + .base = srgb_array, + .lut_length = LUT_SIZE, + .channel_value2index_ratio = 0xff00ffll +}; + +static struct drm_color_lut srgb_inv_array[LUT_SIZE] = { + { 0x0, 0x0, 0x0, 0 }, + { 0xcc2, 0xcc2, 0xcc2, 0 }, + { 0x15be, 0x15be, 0x15be, 0 }, + { 0x1c56, 0x1c56, 0x1c56, 0 }, + { 0x21bd, 0x21bd, 0x21bd, 0 }, + { 0x2666, 0x2666, 0x2666, 0 }, + { 0x2a8a, 0x2a8a, 0x2a8a, 0 }, + { 0x2e4c, 0x2e4c, 0x2e4c, 0 }, + { 0x31c0, 0x31c0, 0x31c0, 0 }, + { 0x34f6, 0x34f6, 0x34f6, 0 }, + { 0x37f9, 0x37f9, 0x37f9, 0 }, + { 0x3acf, 0x3acf, 0x3acf, 0 }, + { 0x3d80, 0x3d80, 0x3d80, 0 }, + { 0x4010, 0x4010, 0x4010, 0 }, + { 0x4284, 0x4284, 0x4284, 0 }, + { 0x44dd, 0x44dd, 0x44dd, 0 }, + { 0x4720, 0x4720, 0x4720, 0 }, + { 0x494e, 0x494e, 0x494e, 0 }, + { 0x4b69, 0x4b69, 0x4b69, 0 }, + { 0x4d73, 0x4d73, 0x4d73, 0 }, + { 0x4f6e, 0x4f6e, 0x4f6e, 0 }, + { 0x5159, 0x5159, 0x5159, 0 }, + { 0x5337, 0x5337, 0x5337, 0 }, + { 0x5509, 0x5509, 0x5509, 0 }, + { 0x56cf, 0x56cf, 0x56cf, 0 }, + { 0x588a, 0x588a, 0x588a, 0 }, + { 0x5a3b, 0x5a3b, 0x5a3b, 0 }, + { 0x5be2, 0x5be2, 0x5be2, 0 }, + { 0x5d80, 0x5d80, 0x5d80, 0 }, + { 0x5f16, 0x5f16, 0x5f16, 0 }, + { 0x60a4, 0x60a4, 0x60a4, 0 }, + { 0x6229, 0x6229, 0x6229, 0 }, + { 0x63a8, 0x63a8, 0x63a8, 0 }, + { 0x6520, 0x6520, 0x6520, 0 }, + { 0x6691, 0x6691, 0x6691, 0 }, + { 0x67fc, 0x67fc, 0x67fc, 0 }, + { 0x6961, 0x6961, 0x6961, 0 }, + { 0x6ac0, 0x6ac0, 0x6ac0, 0 }, + { 0x6c19, 0x6c19, 0x6c19, 0 }, + { 0x6d6e, 0x6d6e, 0x6d6e, 0 }, + { 0x6ebd, 0x6ebd, 0x6ebd, 0 }, + { 0x7008, 0x7008, 0x7008, 0 }, + { 0x714d, 0x714d, 0x714d, 0 }, + { 0x728f, 0x728f, 0x728f, 0 }, + { 0x73cc, 0x73cc, 0x73cc, 0 }, + { 0x7504, 0x7504, 0x7504, 0 }, + { 0x7639, 0x7639, 0x7639, 0 }, + { 0x776a, 0x776a, 0x776a, 0 }, + { 0x7897, 0x7897, 0x7897, 0 }, + { 0x79c1, 0x79c1, 0x79c1, 0 }, + { 0x7ae7, 0x7ae7, 0x7ae7, 0 }, + { 0x7c09, 0x7c09, 0x7c09, 0 }, + { 0x7d28, 0x7d28, 0x7d28, 0 }, + { 0x7e44, 0x7e44, 0x7e44, 0 }, + { 0x7f5d, 0x7f5d, 0x7f5d, 0 }, + { 0x8073, 0x8073, 0x8073, 0 }, + { 0x8186, 0x8186, 0x8186, 0 }, + { 0x8296, 0x8296, 0x8296, 0 }, + { 0x83a4, 0x83a4, 0x83a4, 0 }, + { 0x84ae, 0x84ae, 0x84ae, 0 }, + { 0x85b6, 0x85b6, 0x85b6, 0 }, + { 0x86bc, 0x86bc, 0x86bc, 0 }, + { 0x87bf, 0x87bf, 0x87bf, 0 }, + { 0x88bf, 0x88bf, 0x88bf, 0 }, + { 0x89be, 0x89be, 0x89be, 0 }, + { 0x8ab9, 0x8ab9, 0x8ab9, 0 }, + { 0x8bb3, 0x8bb3, 0x8bb3, 0 }, + { 0x8cab, 0x8cab, 0x8cab, 0 }, + { 0x8da0, 0x8da0, 0x8da0, 0 }, + { 0x8e93, 0x8e93, 0x8e93, 0 }, + { 0x8f84, 0x8f84, 0x8f84, 0 }, + { 0x9073, 0x9073, 0x9073, 0 }, + { 0x9161, 0x9161, 0x9161, 0 }, + { 0x924c, 0x924c, 0x924c, 0 }, + { 0x9335, 0x9335, 0x9335, 0 }, + { 0x941d, 0x941d, 0x941d, 0 }, + { 0x9503, 0x9503, 0x9503, 0 }, + { 0x95e7, 0x95e7, 0x95e7, 0 }, + { 0x96c9, 0x96c9, 0x96c9, 0 }, + { 0x97aa, 0x97aa, 0x97aa, 0 }, + { 0x9889, 0x9889, 0x9889, 0 }, + { 0x9966, 0x9966, 0x9966, 0 }, + { 0x9a42, 0x9a42, 0x9a42, 0 }, + { 0x9b1c, 0x9b1c, 0x9b1c, 0 }, + { 0x9bf5, 0x9bf5, 0x9bf5, 0 }, + { 0x9ccc, 0x9ccc, 0x9ccc, 0 }, + { 0x9da1, 0x9da1, 0x9da1, 0 }, + { 0x9e76, 0x9e76, 0x9e76, 0 }, + { 0x9f49, 0x9f49, 0x9f49, 0 }, + { 0xa01a, 0xa01a, 0xa01a, 0 }, + { 0xa0ea, 0xa0ea, 0xa0ea, 0 }, + { 0xa1b9, 0xa1b9, 0xa1b9, 0 }, + { 0xa286, 0xa286, 0xa286, 0 }, + { 0xa352, 0xa352, 0xa352, 0 }, + { 0xa41d, 0xa41d, 0xa41d, 0 }, + { 0xa4e7, 0xa4e7, 0xa4e7, 0 }, + { 0xa5af, 0xa5af, 0xa5af, 0 }, + { 0xa676, 0xa676, 0xa676, 0 }, + { 0xa73c, 0xa73c, 0xa73c, 0 }, + { 0xa801, 0xa801, 0xa801, 0 }, + { 0xa8c5, 0xa8c5, 0xa8c5, 0 }, + { 0xa987, 0xa987, 0xa987, 0 }, + { 0xaa48, 0xaa48, 0xaa48, 0 }, + { 0xab09, 0xab09, 0xab09, 0 }, + { 0xabc8, 0xabc8, 0xabc8, 0 }, + { 0xac86, 0xac86, 0xac86, 0 }, + { 0xad43, 0xad43, 0xad43, 0 }, + { 0xadff, 0xadff, 0xadff, 0 }, + { 0xaeba, 0xaeba, 0xaeba, 0 }, + { 0xaf74, 0xaf74, 0xaf74, 0 }, + { 0xb02d, 0xb02d, 0xb02d, 0 }, + { 0xb0e5, 0xb0e5, 0xb0e5, 0 }, + { 0xb19c, 0xb19c, 0xb19c, 0 }, + { 0xb252, 0xb252, 0xb252, 0 }, + { 0xb307, 0xb307, 0xb307, 0 }, + { 0xb3bb, 0xb3bb, 0xb3bb, 0 }, + { 0xb46f, 0xb46f, 0xb46f, 0 }, + { 0xb521, 0xb521, 0xb521, 0 }, + { 0xb5d3, 0xb5d3, 0xb5d3, 0 }, + { 0xb683, 0xb683, 0xb683, 0 }, + { 0xb733, 0xb733, 0xb733, 0 }, + { 0xb7e2, 0xb7e2, 0xb7e2, 0 }, + { 0xb890, 0xb890, 0xb890, 0 }, + { 0xb93d, 0xb93d, 0xb93d, 0 }, + { 0xb9ea, 0xb9ea, 0xb9ea, 0 }, + { 0xba96, 0xba96, 0xba96, 0 }, + { 0xbb40, 0xbb40, 0xbb40, 0 }, + { 0xbbea, 0xbbea, 0xbbea, 0 }, + { 0xbc94, 0xbc94, 0xbc94, 0 }, + { 0xbd3c, 0xbd3c, 0xbd3c, 0 }, + { 0xbde4, 0xbde4, 0xbde4, 0 }, + { 0xbe8b, 0xbe8b, 0xbe8b, 0 }, + { 0xbf31, 0xbf31, 0xbf31, 0 }, + { 0xbfd7, 0xbfd7, 0xbfd7, 0 }, + { 0xc07b, 0xc07b, 0xc07b, 0 }, + { 0xc120, 0xc120, 0xc120, 0 }, + { 0xc1c3, 0xc1c3, 0xc1c3, 0 }, + { 0xc266, 0xc266, 0xc266, 0 }, + { 0xc308, 0xc308, 0xc308, 0 }, + { 0xc3a9, 0xc3a9, 0xc3a9, 0 }, + { 0xc449, 0xc449, 0xc449, 0 }, + { 0xc4e9, 0xc4e9, 0xc4e9, 0 }, + { 0xc589, 0xc589, 0xc589, 0 }, + { 0xc627, 0xc627, 0xc627, 0 }, + { 0xc6c5, 0xc6c5, 0xc6c5, 0 }, + { 0xc763, 0xc763, 0xc763, 0 }, + { 0xc7ff, 0xc7ff, 0xc7ff, 0 }, + { 0xc89b, 0xc89b, 0xc89b, 0 }, + { 0xc937, 0xc937, 0xc937, 0 }, + { 0xc9d2, 0xc9d2, 0xc9d2, 0 }, + { 0xca6c, 0xca6c, 0xca6c, 0 }, + { 0xcb06, 0xcb06, 0xcb06, 0 }, + { 0xcb9f, 0xcb9f, 0xcb9f, 0 }, + { 0xcc37, 0xcc37, 0xcc37, 0 }, + { 0xcccf, 0xcccf, 0xcccf, 0 }, + { 0xcd66, 0xcd66, 0xcd66, 0 }, + { 0xcdfd, 0xcdfd, 0xcdfd, 0 }, + { 0xce93, 0xce93, 0xce93, 0 }, + { 0xcf29, 0xcf29, 0xcf29, 0 }, + { 0xcfbe, 0xcfbe, 0xcfbe, 0 }, + { 0xd053, 0xd053, 0xd053, 0 }, + { 0xd0e7, 0xd0e7, 0xd0e7, 0 }, + { 0xd17a, 0xd17a, 0xd17a, 0 }, + { 0xd20d, 0xd20d, 0xd20d, 0 }, + { 0xd2a0, 0xd2a0, 0xd2a0, 0 }, + { 0xd331, 0xd331, 0xd331, 0 }, + { 0xd3c3, 0xd3c3, 0xd3c3, 0 }, + { 0xd454, 0xd454, 0xd454, 0 }, + { 0xd4e4, 0xd4e4, 0xd4e4, 0 }, + { 0xd574, 0xd574, 0xd574, 0 }, + { 0xd603, 0xd603, 0xd603, 0 }, + { 0xd692, 0xd692, 0xd692, 0 }, + { 0xd720, 0xd720, 0xd720, 0 }, + { 0xd7ae, 0xd7ae, 0xd7ae, 0 }, + { 0xd83c, 0xd83c, 0xd83c, 0 }, + { 0xd8c9, 0xd8c9, 0xd8c9, 0 }, + { 0xd955, 0xd955, 0xd955, 0 }, + { 0xd9e1, 0xd9e1, 0xd9e1, 0 }, + { 0xda6d, 0xda6d, 0xda6d, 0 }, + { 0xdaf8, 0xdaf8, 0xdaf8, 0 }, + { 0xdb83, 0xdb83, 0xdb83, 0 }, + { 0xdc0d, 0xdc0d, 0xdc0d, 0 }, + { 0xdc97, 0xdc97, 0xdc97, 0 }, + { 0xdd20, 0xdd20, 0xdd20, 0 }, + { 0xdda9, 0xdda9, 0xdda9, 0 }, + { 0xde31, 0xde31, 0xde31, 0 }, + { 0xdeb9, 0xdeb9, 0xdeb9, 0 }, + { 0xdf41, 0xdf41, 0xdf41, 0 }, + { 0xdfc8, 0xdfc8, 0xdfc8, 0 }, + { 0xe04f, 0xe04f, 0xe04f, 0 }, + { 0xe0d5, 0xe0d5, 0xe0d5, 0 }, + { 0xe15b, 0xe15b, 0xe15b, 0 }, + { 0xe1e0, 0xe1e0, 0xe1e0, 0 }, + { 0xe266, 0xe266, 0xe266, 0 }, + { 0xe2ea, 0xe2ea, 0xe2ea, 0 }, + { 0xe36f, 0xe36f, 0xe36f, 0 }, + { 0xe3f3, 0xe3f3, 0xe3f3, 0 }, + { 0xe476, 0xe476, 0xe476, 0 }, + { 0xe4f9, 0xe4f9, 0xe4f9, 0 }, + { 0xe57c, 0xe57c, 0xe57c, 0 }, + { 0xe5fe, 0xe5fe, 0xe5fe, 0 }, + { 0xe680, 0xe680, 0xe680, 0 }, + { 0xe702, 0xe702, 0xe702, 0 }, + { 0xe783, 0xe783, 0xe783, 0 }, + { 0xe804, 0xe804, 0xe804, 0 }, + { 0xe884, 0xe884, 0xe884, 0 }, + { 0xe905, 0xe905, 0xe905, 0 }, + { 0xe984, 0xe984, 0xe984, 0 }, + { 0xea04, 0xea04, 0xea04, 0 }, + { 0xea83, 0xea83, 0xea83, 0 }, + { 0xeb02, 0xeb02, 0xeb02, 0 }, + { 0xeb80, 0xeb80, 0xeb80, 0 }, + { 0xebfe, 0xebfe, 0xebfe, 0 }, + { 0xec7b, 0xec7b, 0xec7b, 0 }, + { 0xecf9, 0xecf9, 0xecf9, 0 }, + { 0xed76, 0xed76, 0xed76, 0 }, + { 0xedf2, 0xedf2, 0xedf2, 0 }, + { 0xee6f, 0xee6f, 0xee6f, 0 }, + { 0xeeeb, 0xeeeb, 0xeeeb, 0 }, + { 0xef66, 0xef66, 0xef66, 0 }, + { 0xefe2, 0xefe2, 0xefe2, 0 }, + { 0xf05d, 0xf05d, 0xf05d, 0 }, + { 0xf0d7, 0xf0d7, 0xf0d7, 0 }, + { 0xf152, 0xf152, 0xf152, 0 }, + { 0xf1cc, 0xf1cc, 0xf1cc, 0 }, + { 0xf245, 0xf245, 0xf245, 0 }, + { 0xf2bf, 0xf2bf, 0xf2bf, 0 }, + { 0xf338, 0xf338, 0xf338, 0 }, + { 0xf3b0, 0xf3b0, 0xf3b0, 0 }, + { 0xf429, 0xf429, 0xf429, 0 }, + { 0xf4a1, 0xf4a1, 0xf4a1, 0 }, + { 0xf519, 0xf519, 0xf519, 0 }, + { 0xf590, 0xf590, 0xf590, 0 }, + { 0xf608, 0xf608, 0xf608, 0 }, + { 0xf67e, 0xf67e, 0xf67e, 0 }, + { 0xf6f5, 0xf6f5, 0xf6f5, 0 }, + { 0xf76b, 0xf76b, 0xf76b, 0 }, + { 0xf7e1, 0xf7e1, 0xf7e1, 0 }, + { 0xf857, 0xf857, 0xf857, 0 }, + { 0xf8cd, 0xf8cd, 0xf8cd, 0 }, + { 0xf942, 0xf942, 0xf942, 0 }, + { 0xf9b7, 0xf9b7, 0xf9b7, 0 }, + { 0xfa2b, 0xfa2b, 0xfa2b, 0 }, + { 0xfaa0, 0xfaa0, 0xfaa0, 0 }, + { 0xfb14, 0xfb14, 0xfb14, 0 }, + { 0xfb88, 0xfb88, 0xfb88, 0 }, + { 0xfbfb, 0xfbfb, 0xfbfb, 0 }, + { 0xfc6e, 0xfc6e, 0xfc6e, 0 }, + { 0xfce1, 0xfce1, 0xfce1, 0 }, + { 0xfd54, 0xfd54, 0xfd54, 0 }, + { 0xfdc6, 0xfdc6, 0xfdc6, 0 }, + { 0xfe39, 0xfe39, 0xfe39, 0 }, + { 0xfeaa, 0xfeaa, 0xfeaa, 0 }, + { 0xff1c, 0xff1c, 0xff1c, 0 }, + { 0xff8d, 0xff8d, 0xff8d, 0 }, + { 0xffff, 0xffff, 0xffff, 0 }, +}; + +const struct vkms_color_lut srgb_inv_eotf = { + .base = srgb_inv_array, + .lut_length = LUT_SIZE, + .channel_value2index_ratio = 0xff00ffll +}; diff --git a/drivers/gpu/drm/vkms/vkms_luts.h b/drivers/gpu/drm/vkms/vkms_luts.h new file mode 100644 index 000000000000..053512a643f7 --- /dev/null +++ b/drivers/gpu/drm/vkms/vkms_luts.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef _VKMS_LUTS_H_ +#define _VKMS_LUTS_H_ + +#define LUT_SIZE 256 + +extern const struct vkms_color_lut linear_eotf; +extern const struct vkms_color_lut srgb_eotf; +extern const struct vkms_color_lut srgb_inv_eotf; + +#endif /* _VKMS_LUTS_H_ */ \ No newline at end of file diff --git a/drivers/gpu/drm/vkms/vkms_plane.c b/drivers/gpu/drm/vkms/vkms_plane.c index e5c625ab8e3e..8520ee0534d1 100644 --- a/drivers/gpu/drm/vkms/vkms_plane.c +++ b/drivers/gpu/drm/vkms/vkms_plane.c @@ -215,5 +215,7 @@ struct vkms_plane *vkms_plane_init(struct vkms_device *vkmsdev, drm_plane_create_rotation_property(&plane->base, DRM_MODE_ROTATE_0, DRM_MODE_ROTATE_MASK | DRM_MODE_REFLECT_MASK); + vkms_initialize_colorops(&plane->base); + return plane; } From patchwork Mon Aug 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Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Signed-off-by: Harry Wentland --- drivers/gpu/drm/vkms/tests/vkms_color_tests.c | 37 ++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vkms/tests/vkms_color_tests.c b/drivers/gpu/drm/vkms/tests/vkms_color_tests.c index fc73e48aa57c..e6ac01dee830 100644 --- a/drivers/gpu/drm/vkms/tests/vkms_color_tests.c +++ b/drivers/gpu/drm/vkms/tests/vkms_color_tests.c @@ -31,7 +31,6 @@ const struct vkms_color_lut test_linear_lut = { .channel_value2index_ratio = 0xf000fll }; - static void vkms_color_test_get_lut_index(struct kunit *test) { int i; @@ -40,6 +39,19 @@ static void vkms_color_test_get_lut_index(struct kunit *test) for (i = 0; i < TEST_LUT_SIZE; i++) KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&test_linear_lut, test_linear_array[i].red)), i); + + KUNIT_EXPECT_EQ(test, drm_fixp2int(get_lut_index(&srgb_eotf, 0x0)), 0x0); + KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_eotf, 0x0)), 0x0); + KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_eotf, 0x101)), 0x1); + KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_eotf, 0x202)), 0x2); + + KUNIT_EXPECT_EQ(test, drm_fixp2int(get_lut_index(&srgb_inv_eotf, 0x0)), 0x0); + KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_inv_eotf, 0x0)), 0x0); + KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_inv_eotf, 0x101)), 0x1); + KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_inv_eotf, 0x202)), 0x2); + + KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_eotf, 0xfefe)), 0xfe); + KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_eotf, 0xffff)), 0xff); } static void vkms_color_test_lerp(struct kunit *test) @@ -148,9 +160,32 @@ static void vkms_color_test_lerp(struct kunit *test) KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x1, 0x80000000), 0x1); } +static void vkms_color_test_linear(struct kunit *test) +{ + for (int i = 0; i < LUT_SIZE; i++) { + int linear = apply_lut_to_channel_value(&linear_eotf, i * 0x101, LUT_RED); + KUNIT_EXPECT_EQ(test, DIV_ROUND_CLOSEST(linear, 0x101), i); + } +} + +static void vkms_color_srgb_inv_srgb(struct kunit *test) +{ + u16 srgb, final; + + for (int i = 0; i < LUT_SIZE; i++) { + srgb = apply_lut_to_channel_value(&srgb_eotf, i * 0x101, LUT_RED); + final = apply_lut_to_channel_value(&srgb_inv_eotf, srgb, LUT_RED); + + KUNIT_EXPECT_GE(test, final / 0x101, i-1); + KUNIT_EXPECT_LE(test, final / 0x101, i+1); + } +} + static struct kunit_case vkms_color_test_cases[] = { KUNIT_CASE(vkms_color_test_get_lut_index), KUNIT_CASE(vkms_color_test_lerp), + KUNIT_CASE(vkms_color_test_linear), + KUNIT_CASE(vkms_color_srgb_inv_srgb), {} }; From patchwork Mon Aug 19 20:56:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: 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with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Mon, 19 Aug 2024 15:57:28 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 16/44] drm/colorop: Introduce DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE Date: Mon, 19 Aug 2024 16:56:43 -0400 Message-ID: <20240819205714.316380-17-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBE:EE_|IA1PR12MB7734:EE_ X-MS-Office365-Filtering-Correlation-Id: 9676d6eb-0fb8-46d0-f7fe-08dcc09189bb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|36860700013|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: 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Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" With the introduction of the pre-blending color pipeline we can no longer have color operations that don't have a clear position in the color pipeline. We deprecate all existing plane properties. For upstream drivers those are: - COLOR_ENCODING - COLOR_RANGE Drivers are expected to ignore these properties when programming the HW. Setting of the COLOR_PIPELINE plane property or drm_colorop properties is only allowed for userspace that sets this client cap. v5: - Fix kernel docs v4: - Don't block setting of COLOR_RANGE and COLOR_ENCODING when client cap is set Signed-off-by: Harry Wentland --- drivers/gpu/drm/drm_atomic_uapi.c | 13 ++++++++++++- drivers/gpu/drm/drm_ioctl.c | 7 +++++++ include/drm/drm_file.h | 7 +++++++ include/uapi/drm/drm.h | 16 ++++++++++++++++ 4 files changed, 42 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index d8d5be358b3e..5dd834e3979b 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -570,6 +570,12 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane, } else if (property == plane->color_range_property) { state->color_range = val; } else if (property == plane->color_pipeline_property) { + if (!file_priv->plane_color_pipeline) { + drm_dbg_atomic(dev, + "Setting COLOR_PIPELINE plane property not permitted unless DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE is set\n"); + return -EINVAL; + } + /* find DRM colorop object */ struct drm_colorop *colorop = NULL; colorop = drm_colorop_find(dev, file_priv, val); @@ -1186,6 +1192,12 @@ int drm_atomic_set_property(struct drm_atomic_state *state, break; } case DRM_MODE_OBJECT_COLOROP: { + if (!file_priv->plane_color_pipeline) { + drm_dbg_atomic(prop->dev, + "[OBJECT:%d] is a colorop but DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE not set\n", + obj->id); + ret = -EINVAL; + } struct drm_colorop *colorop = obj_to_colorop(obj); struct drm_colorop_state *colorop_state; @@ -1198,7 +1210,6 @@ int drm_atomic_set_property(struct drm_atomic_state *state, ret = drm_atomic_colorop_set_property(colorop, colorop_state, file_priv, prop, prop_value); - break; } default: diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c index 51f39912866f..6b5021b68e35 100644 --- a/drivers/gpu/drm/drm_ioctl.c +++ b/drivers/gpu/drm/drm_ioctl.c @@ -373,6 +373,13 @@ drm_setclientcap(struct drm_device *dev, void *data, struct drm_file *file_priv) return -EINVAL; file_priv->supports_virtualized_cursor_plane = req->value; break; + case DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE: + if (!file_priv->atomic) + return -EINVAL; + if (req->value > 1) + return -EINVAL; + file_priv->plane_color_pipeline = req->value; + break; default: return -EINVAL; } diff --git a/include/drm/drm_file.h b/include/drm/drm_file.h index ab230d3af138..63c1d29b8520 100644 --- a/include/drm/drm_file.h +++ b/include/drm/drm_file.h @@ -204,6 +204,13 @@ struct drm_file { */ bool writeback_connectors; + /** + * @plane_color_pipeline: + * + * True if client understands plane color pipelines + */ + bool plane_color_pipeline; + /** * @was_master: * diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h index 16122819edfe..a2fc85ecdea1 100644 --- a/include/uapi/drm/drm.h +++ b/include/uapi/drm/drm.h @@ -875,6 +875,22 @@ struct drm_get_cap { */ #define DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 6 +/** + * DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE + * + * If set to 1 the DRM core will allow setting the COLOR_PIPELINE + * property on a &drm_plane, as well as drm_colorop properties. + * + * Drivers will ignore these drm_plane properties: + * - COLOR_ENCODING + * - COLOR_RANGE + * + * The client must enable &DRM_CLIENT_CAP_ATOMIC first. + * + * This capability is currently in development. + */ +#define DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE 7 + /* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */ struct drm_set_client_cap { __u64 capability; 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Mon, 19 Aug 2024 15:57:28 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 17/44] drm/colorop: Add 3x4 CTM type Date: Mon, 19 Aug 2024 16:56:44 -0400 Message-ID: <20240819205714.316380-18-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBE:EE_|CH3PR12MB7740:EE_ X-MS-Office365-Filtering-Correlation-Id: 94e29d07-af5a-402c-e0fb-08dcc0918a05 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|36860700013|376014|82310400026; X-Microsoft-Antispam-Message-Info: 0Z4caCoXxWoYdB7l8QJuq0BZPvDPYTv4HjjWgHydoQVz/t806fvVnFk1M20RREXbhcRhfY2wLyynnvQCzIVROwO8QOucmfbrvfhSaPaIWk3xvLIYZTDeOp5I5Zcv4eNdv++IbE4QcWv0A3+OYkrN5PyZYbxETATTurT2x47xYDlWiwcJY5X7mjccSA0clRbapZdsLdWy5RcU+5aw6xUdD6lZYBeNqnuohrXnhVBQOLTPC9wrnle7Bj2iqz5wZqLnlECYU47AOyItz12MEoRYqevabTwflVu1pALRqJS1KKVQ6RsW4cOwvGC7/ActWJ/H2DhC9By+ji1x79NC2jitJET/FLOsxFdZ5StHf8ZQnuQW2ypFwDUnmZvQ6QIS35BQ62f4dM7YJ+datqsNV8pWnXUfg/kqcv4g7WImNP96YMCvQlhawJyytZOmxIi0XMe7DfmB+hJPkokJBW0rgUj5JlShs0zs7JkAcFGAGzEQg4l0jkzoKU1SeuCzvnoaRDN1CuMIQpfh7XtQ1mwNq5GWHG5mP14Tl+QQx9VaAqP19cd3xu3jEjfqy4M/75tcBkd7ymmBmSpQh5/kB2OYhdMvFVGSpfSWgyy2N9Qbwlp+MX3YHEj2Hf6hDAafKe6Dy6cnzAnfIT6GPjKGalrMVBb4cyD9dV8Mo9CqKHNC4cbYG7PW5nLa/O9y/iht9Ojvxpx+mklFwheqI1/DmhGbPTty5aKcODQ4BGNQB+S9kuUI1LraWy7vOuEuAWqtt6H7qnIW0Wk41NqE3Z+0uMSy4JBXV0TuTqXAe9Bg0tmOh2WDG5iYGqiP02oh0aHkwsP1hV8D0m1+/mbhgp6s49SoVZzgkgjsStQWfT7uQu+hNx3QvV8EaXEFj4/tUyJPh0aBTa+t0jXveihqMrQJ20I0RO6cWe0pJABfebfuYDdBxtp0BG8LwkZjQHSmA2tl9uHbUzriMcQkks6q+dhBTsFpaCXgHMLx4iLkHGaIZfTlhdi8dttVCvbplcI8JncsTaNmZdW4vKkmR1G5DVGbbVZO3XG9ErhAVA+cTaKqpmPaUlW9d+Ia4bEPpew+OwCMgVzIINfH4sTq6hTWAiIKVNXLf8EZ2B5B6PIjp/8tZblVZjLB//0pE17tbhGwxFfq6moPk85V2jcx6kryyldTDTXnbVFKdH8wsNT4pBL0IV5a1SZoh5nUDQLg+LwPuPjXXKnaEkEq6WqBbT9Odua4WUN21b+K4k4335c6U3ii1fkT0YLqMT/dE/EkvdggZqSHMsEOnKLtdDjYZE4AGNHCDGpMyZ/Rppf/UsmK+coWcWz1CaE8oDt2YmwWAhwqMgu/suhaXTJq1fAwWf13Yechj3GPoPqAcuLoOhEJoOX1v7Ytjd47rVF31Q31be2e4QR6EdoCbWjq116bNdVV3nPhbTbqA7yrkEa5uPfRM+HzLzOL32F8mXawbOZCAlYb3zF4sGKwhjAX X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(36860700013)(376014)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:29.7574 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 94e29d07-af5a-402c-e0fb-08dcc0918a05 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBE.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7740 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This type is used to support a 3x4 matrix in colorops. A 3x4 matrix uses the last column as a "bias" column. Some HW exposes support for 3x4. The calculation looks like: out matrix in |R| |0 1 2 3 | | R | |G| = |4 5 6 7 | x | G | |B| |8 9 10 11| | B | |1.0| This is also the first colorop where we need a blob property to program the property. For that we'll introduce a new DATA property that can be used by all colorop TYPEs requiring a blob. The way a DATA blob is read depends on the TYPE of the colorop. We only create the DATA property for property types that need it. v5: - Add function signature for init (Sebastian) - Fix kernel-doc v4: - Create helper function for creating 3x4 CTM colorop - Fix CTM indexes in comment (Pekka) Signed-off-by: Harry Wentland --- drivers/gpu/drm/drm_atomic.c | 14 ++++++++++- drivers/gpu/drm/drm_atomic_uapi.c | 29 +++++++++++++++++++++++ drivers/gpu/drm/drm_colorop.c | 39 +++++++++++++++++++++++++++++++ include/drm/drm_colorop.h | 21 +++++++++++++++++ include/uapi/drm/amdgpu_drm.h | 9 ------- include/uapi/drm/drm_mode.h | 33 ++++++++++++++++++++++---- 6 files changed, 131 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index 9919a6f1092f..c2fcde96e218 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -790,7 +790,19 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p, drm_printf(p, "colorop[%u]:\n", colorop->base.id); drm_printf(p, "\ttype=%s\n", drm_get_colorop_type_name(colorop->type)); drm_printf(p, "\tbypass=%u\n", state->bypass); - drm_printf(p, "\tcurve_1d_type=%s\n", drm_get_colorop_curve_1d_type_name(state->curve_1d_type)); + + switch (colorop->type) { + case DRM_COLOROP_1D_CURVE: + drm_printf(p, "\tcurve_1d_type=%s\n", + drm_get_colorop_curve_1d_type_name(state->curve_1d_type)); + break; + case DRM_COLOROP_CTM_3X4: + drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0); + break; + default: + break; + } + drm_printf(p, "\tnext=%d\n", colorop->next ? colorop->next->base.id : 0); } diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 5dd834e3979b..4a9cb1f7dbf7 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -691,6 +691,30 @@ drm_atomic_plane_get_property(struct drm_plane *plane, return 0; } +static int drm_atomic_color_set_data_property(struct drm_colorop *colorop, + struct drm_colorop_state *state, + struct drm_property *property, uint64_t val) +{ + ssize_t elem_size = -1; + ssize_t size = -1; + bool replaced = false; + + switch (colorop->type) { + case DRM_COLOROP_CTM_3X4: + size = sizeof(struct drm_color_ctm_3x4); + break; + default: + /* should never get here */ + return -EINVAL; + } + + return drm_property_replace_blob_from_id(colorop->dev, + &state->data, + val, + size, + elem_size, + &replaced); +} static int drm_atomic_colorop_set_property(struct drm_colorop *colorop, struct drm_colorop_state *state, struct drm_file *file_priv, @@ -700,6 +724,9 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop, state->bypass = val; } else if (property == colorop->curve_1d_type_property) { state->curve_1d_type = val; + } else if (property == colorop->data_property) { + return drm_atomic_color_set_data_property(colorop, + state, property, val); } else { drm_dbg_atomic(colorop->dev, "[COLOROP:%d:%d] unknown property [PROP:%d:%s]]\n", @@ -722,6 +749,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop, *val = state->bypass; } else if (property == colorop->curve_1d_type_property) { *val = state->curve_1d_type; + } else if (property == colorop->data_property) { + *val = (state->data) ? state->data->base.id : 0; } else { return -EINVAL; } diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 685dd18126aa..73fd4b7a4ce3 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -63,6 +63,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = { { DRM_COLOROP_1D_CURVE, "1D Curve" }, + { DRM_COLOROP_CTM_3X4, "3x4 Matrix"} }; static const char * const colorop_curve_1d_type_names[] = { @@ -201,6 +202,43 @@ int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *coloro } EXPORT_SYMBOL(drm_colorop_curve_1d_init); +static int drm_colorop_create_data_prop(struct drm_device *dev, struct drm_colorop *colorop) +{ + struct drm_property *prop; + + /* data */ + prop = drm_property_create(dev, DRM_MODE_PROP_ATOMIC | DRM_MODE_PROP_BLOB, + "DATA", 0); + if (!prop) + return -ENOMEM; + + colorop->data_property = prop; + drm_object_attach_property(&colorop->base, + colorop->data_property, + 0); + + return 0; +} + +int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop, + struct drm_plane *plane) +{ + int ret; + + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_CTM_3X4); + if (ret) + return ret; + + ret = drm_colorop_create_data_prop(dev, colorop); + if (ret) + return ret; + + drm_colorop_reset(colorop); + + return 0; +} +EXPORT_SYMBOL(drm_colorop_ctm_3x4_init); + static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop, struct drm_colorop_state *state) { @@ -287,6 +325,7 @@ void drm_colorop_reset(struct drm_colorop *colorop) static const char * const colorop_type_name[] = { [DRM_COLOROP_1D_CURVE] = "1D Curve", + [DRM_COLOROP_CTM_3X4] = "3x4 Matrix" }; const char *drm_get_colorop_type_name(enum drm_colorop_type type) diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index 5255cf44f4b1..1566d88fd018 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -87,6 +87,14 @@ struct drm_colorop_state { */ enum drm_colorop_curve_1d_type curve_1d_type; + /** + * @data: + * + * Data blob for any TYPE that requires such a blob. The + * interpretation of the blob is TYPE-specific. + */ + struct drm_property_blob *data; + /** @state: backpointer to global drm_atomic_state */ struct drm_atomic_state *state; }; @@ -185,6 +193,17 @@ struct drm_colorop { */ struct drm_property *curve_1d_type_property; + /** + * @data_property: + * + * blob property for any TYPE that requires a blob of data, + * such as 1DLUT, CTM, 3DLUT, etc. + * + * The way this blob is interpreted depends on the TYPE of + * this + */ + struct drm_property *data_property; + /** * @next_property: * @@ -220,6 +239,8 @@ static inline struct drm_colorop *drm_colorop_find(struct drm_device *dev, int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *colorop, struct drm_plane *plane, u64 supported_tfs); +int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop, + struct drm_plane *plane); struct drm_colorop_state * drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop); diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index efe5de6ce208..e44362e74fa1 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -1283,15 +1283,6 @@ struct drm_amdgpu_info_gpuvm_fault { #define AMDGPU_FAMILY_GC_11_5_0 150 /* GC 11.5.0 */ #define AMDGPU_FAMILY_GC_12_0_0 152 /* GC 12.0.0 */ -/* FIXME wrong namespace! */ -struct drm_color_ctm_3x4 { - /* - * Conversion matrix with 3x4 dimensions in S31.32 sign-magnitude - * (not two's complement!) format. - */ - __u64 matrix[12]; -}; - #if defined(__cplusplus) } #endif diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index 3dd89ae6515a..da2be67609c8 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -847,6 +847,20 @@ struct drm_color_ctm { __u64 matrix[9]; }; +struct drm_color_ctm_3x4 { + /* + * Conversion matrix with 3x4 dimensions in S31.32 sign-magnitude + * (not two's complement!) format. + * + * out matrix in + * |R| |0 1 2 3 | | R | + * |G| = |4 5 6 7 | x | G | + * |B| |8 9 10 11| | B | + * |1.0| + */ + __u64 matrix[12]; +}; + struct drm_color_lut { /* * Values are mapped linearly to 0.0 - 1.0 range, with 0x0 == 0.0 and @@ -861,16 +875,27 @@ struct drm_color_lut { /** * enum drm_colorop_type - Type of color operation * - * @DRM_COLOROP_1D_CURVE: A 1D curve that is being applied to all color channels. - * The curve is specified via tha CURVE_1D_TYPE colorop - * property. * * drm_colorops can be of many different types. Each type behaves differently * and defines a different set of properties. This enum defines all types and * gives a high-level description. */ enum drm_colorop_type { - DRM_COLOROP_1D_CURVE + /** + * @DRM_COLOROP_1D_CURVE: + * + * A 1D curve that is being applied to all color channels. The + * curve is specified via tha CURVE_1D_TYPE colorop property. + */ + DRM_COLOROP_1D_CURVE, + + /** + * @DRM_COLOROP_CTM_3X4: + * + * A 3x4 matrix. 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Mon, 19 Aug 2024 15:57:29 -0500 Received: from localhost.localdomain (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Mon, 19 Aug 2024 15:57:29 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 18/44] drm/vkms: Use s32 for internal color pipeline precision Date: Mon, 19 Aug 2024 16:56:45 -0400 Message-ID: <20240819205714.316380-19-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD9:EE_|DM4PR12MB8559:EE_ X-MS-Office365-Filtering-Correlation-Id: 378d7ba3-eb56-4d6f-3c0a-08dcc0918bc4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:32.6670 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 378d7ba3-eb56-4d6f-3c0a-08dcc0918bc4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8559 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Certain operations require us to preserve values below 0.0 and above 1.0 (0x0 and 0xffff respectively in 16 bpc unorm). One such operation is a BT709 encoding operation followed by its decoding operation, or the reverse. We'll use s32 values as intermediate in and outputs of our color operations, for the operations where it matters. For now this won't apply to LUT operations. We might want to update those to work on s32 as well, but it's unclear how that should work for unorm LUT definitions. We'll revisit that once we add LUT + CTM tests. In order to allow for this we'll also invert the nesting of our colorop processing loops. We now use the pixel iteration loop on the outside and the colorop iteration on the inside. v4: - Clarify that we're packing 16-bit UNORM into s32, not converting values to a different representation (Pekka) v3: - Use new colorop->next pointer Signed-off-by: Harry Wentland --- drivers/gpu/drm/vkms/vkms_composer.c | 55 ++++++++++++++++++++++------ drivers/gpu/drm/vkms/vkms_drv.h | 4 ++ 2 files changed, 47 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/vkms/vkms_composer.c b/drivers/gpu/drm/vkms/vkms_composer.c index bc116d16e378..6e939d3a6d5c 100644 --- a/drivers/gpu/drm/vkms/vkms_composer.c +++ b/drivers/gpu/drm/vkms/vkms_composer.c @@ -164,7 +164,7 @@ static void apply_lut(const struct vkms_crtc_state *crtc_state, struct line_buff } } -static void apply_colorop(struct pixel_argb_u16 *pixel, struct drm_colorop *colorop) +static void apply_colorop(struct pixel_argb_s32 *pixel, struct drm_colorop *colorop) { struct drm_colorop_state *colorop_state = colorop->state; @@ -190,24 +190,55 @@ static void apply_colorop(struct pixel_argb_u16 *pixel, struct drm_colorop *colo static void pre_blend_color_transform(const struct vkms_plane_state *plane_state, struct line_buffer *output_buffer) { - struct drm_colorop *colorop = plane_state->base.base.color_pipeline; + struct drm_colorop *colorop; + struct pixel_argb_s32 pixel; - while (colorop) { - struct drm_colorop_state *colorop_state; + for (size_t x = 0; x < output_buffer->n_pixels; x++) { - if (!colorop) - return; + /* + * Some operations, such as applying a BT709 encoding matrix, + * followed by a decoding matrix, require that we preserve + * values above 1.0 and below 0.0 until the end of the pipeline. + * + * Pack the 16-bit UNORM values into s32 to give us head-room to + * avoid clipping until we're at the end of the pipeline. Clip + * intentionally at the end of the pipeline before packing + * UNORM values back into u16. + */ + pixel.a = output_buffer->pixels[x].a; + pixel.r = output_buffer->pixels[x].r; + pixel.g = output_buffer->pixels[x].g; + pixel.b = output_buffer->pixels[x].b; - colorop_state = colorop->state; + colorop = plane_state->base.base.color_pipeline; + while (colorop) { + struct drm_colorop_state *colorop_state; - if (!colorop_state) - return; + if (!colorop) + return; + + colorop_state = colorop->state; + + if (!colorop_state) + return; - for (size_t x = 0; x < output_buffer->n_pixels; x++) if (!colorop_state->bypass) - apply_colorop(&output_buffer->pixels[x], colorop); + apply_colorop(&pixel, colorop); - colorop = colorop->next; + colorop = colorop->next; + } + + /* clamp pixel */ + pixel.a = max(min(pixel.a, 0xffff), 0x0); + pixel.r = max(min(pixel.r, 0xffff), 0x0); + pixel.g = max(min(pixel.g, 0xffff), 0x0); + pixel.b = max(min(pixel.b, 0xffff), 0x0); + + /* put back to output_buffer */ + output_buffer->pixels[x].a = pixel.a; + output_buffer->pixels[x].r = pixel.r; + output_buffer->pixels[x].g = pixel.g; + output_buffer->pixels[x].b = pixel.b; } } diff --git a/drivers/gpu/drm/vkms/vkms_drv.h b/drivers/gpu/drm/vkms/vkms_drv.h index 278cf3533f58..b78bc2611746 100644 --- a/drivers/gpu/drm/vkms/vkms_drv.h +++ b/drivers/gpu/drm/vkms/vkms_drv.h @@ -36,6 +36,10 @@ struct vkms_frame_info { unsigned int cpp; }; +struct pixel_argb_s32 { + s32 a, r, g, b; +}; + struct pixel_argb_u16 { u16 a, r, g, b; }; From patchwork Mon Aug 19 20:56:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768981 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B193C5320E for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN2PEPF00004FBC.mail.protection.outlook.com (10.167.243.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7897.11 via Frontend Transport; Mon, 19 Aug 2024 20:57:30 +0000 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 19 Aug 2024 15:57:30 -0500 Received: from localhost.localdomain (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Mon, 19 Aug 2024 15:57:30 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 19/44] drm/vkms: add 3x4 matrix in color pipeline Date: Mon, 19 Aug 2024 16:56:46 -0400 Message-ID: <20240819205714.316380-20-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBC:EE_|DS7PR12MB8229:EE_ X-MS-Office365-Filtering-Correlation-Id: 3dd68ebf-d18a-4bb0-ef83-08dcc0918ac1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:30.9743 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3dd68ebf-d18a-4bb0-ef83-08dcc0918ac1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBC.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8229 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We add two 3x4 matrices into the VKMS color pipeline. The reason we're adding matrices is so that we can test that application of a matrix and its inverse yields an output equal to the input image. One complication with the matrix implementation has to do with the fact that the matrix entries are in signed-magnitude fixed point, whereas the drm_fixed.h implementation uses 2s-complement. The latter one is the one that we want for easy addition and subtraction, so we convert all entries to 2s-complement. Signed-off-by: Harry Wentland --- drivers/gpu/drm/vkms/vkms_colorop.c | 32 +++++++++++++++++++++++++++- drivers/gpu/drm/vkms/vkms_composer.c | 27 +++++++++++++++++++++++ 2 files changed, 58 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vkms/vkms_colorop.c b/drivers/gpu/drm/vkms/vkms_colorop.c index f61dfde47156..adcb08153a09 100644 --- a/drivers/gpu/drm/vkms/vkms_colorop.c +++ b/drivers/gpu/drm/vkms/vkms_colorop.c @@ -37,7 +37,37 @@ static int vkms_initialize_color_pipeline(struct drm_plane *plane, struct drm_pr prev_op = op; - /* 2nd op: 1d curve */ + /* 2nd op: 3x4 matrix */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_ctm_3x4_init(dev, op, plane); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, op); + + prev_op = op; + + /* 3rd op: 3x4 matrix */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_ctm_3x4_init(dev, op, plane); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, op); + + prev_op = op; + + /* 4th op: 1d curve */ op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); if (!op) { DRM_ERROR("KMS: Failed to allocate colorop\n"); diff --git a/drivers/gpu/drm/vkms/vkms_composer.c b/drivers/gpu/drm/vkms/vkms_composer.c index 6e939d3a6d5c..bd1df06ced85 100644 --- a/drivers/gpu/drm/vkms/vkms_composer.c +++ b/drivers/gpu/drm/vkms/vkms_composer.c @@ -164,6 +164,30 @@ static void apply_lut(const struct vkms_crtc_state *crtc_state, struct line_buff } } +static void apply_3x4_matrix(struct pixel_argb_s32 *pixel, const struct drm_color_ctm_3x4 *matrix) +{ + s64 rf, gf, bf; + + rf = drm_fixp_mul(drm_sm2fixp(matrix->matrix[0]), drm_int2fixp(pixel->r)) + + drm_fixp_mul(drm_sm2fixp(matrix->matrix[1]), drm_int2fixp(pixel->g)) + + drm_fixp_mul(drm_sm2fixp(matrix->matrix[2]), drm_int2fixp(pixel->b)) + + drm_sm2fixp(matrix->matrix[3]); + + gf = drm_fixp_mul(drm_sm2fixp(matrix->matrix[4]), drm_int2fixp(pixel->r)) + + drm_fixp_mul(drm_sm2fixp(matrix->matrix[5]), drm_int2fixp(pixel->g)) + + drm_fixp_mul(drm_sm2fixp(matrix->matrix[6]), drm_int2fixp(pixel->b)) + + drm_sm2fixp(matrix->matrix[7]); + + bf = drm_fixp_mul(drm_sm2fixp(matrix->matrix[8]), drm_int2fixp(pixel->r)) + + drm_fixp_mul(drm_sm2fixp(matrix->matrix[9]), drm_int2fixp(pixel->g)) + + drm_fixp_mul(drm_sm2fixp(matrix->matrix[10]), drm_int2fixp(pixel->b)) + + drm_sm2fixp(matrix->matrix[11]); + + pixel->r = drm_fixp2int(rf); + pixel->g = drm_fixp2int(gf); + pixel->b = drm_fixp2int(bf); +} + static void apply_colorop(struct pixel_argb_s32 *pixel, struct drm_colorop *colorop) { struct drm_colorop_state *colorop_state = colorop->state; @@ -184,6 +208,9 @@ static void apply_colorop(struct pixel_argb_s32 *pixel, struct drm_colorop *colo DRM_DEBUG_DRIVER("unkown colorop 1D curve type %d\n", colorop_state->curve_1d_type); break; } + } else if (colorop->type == DRM_COLOROP_CTM_3X4) { + if (colorop_state->data) + apply_3x4_matrix(pixel, (struct drm_color_ctm_3x4 *) colorop_state->data->data); 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:31.6774 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fa372589-6275-4671-d6fc-08dcc0918b2a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBC.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6335 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" While working on the CTM implementation of VKMS I had to ascertain myself of a few assumptions. One of those is whether drm_fixed.h treats its numbers using signed-magnitude or twos-complement. It is twos-complement. In order to make someone else's day easier I am adding the drm_test_int2fixp test that validates the above assumption. I am also adding a test for the new sm2fixp function that converts from a signed-magnitude fixed point to the twos-complement fixed point. Signed-off-by: Harry Wentland --- drivers/gpu/drm/tests/Makefile | 3 +- drivers/gpu/drm/tests/drm_fixp_test.c | 69 +++++++++++++++++++++++++++ 2 files changed, 71 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/tests/drm_fixp_test.c diff --git a/drivers/gpu/drm/tests/Makefile b/drivers/gpu/drm/tests/Makefile index 56dab563abd7..bd69df0eee33 100644 --- a/drivers/gpu/drm/tests/Makefile +++ b/drivers/gpu/drm/tests/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_DRM_KUNIT_TEST) += \ drm_modes_test.o \ drm_plane_helper_test.o \ drm_probe_helper_test.o \ - drm_rect_test.o + drm_rect_test.o \ + drm_fixp_test.o CFLAGS_drm_mm_test.o := $(DISABLE_STRUCTLEAK_PLUGIN) diff --git a/drivers/gpu/drm/tests/drm_fixp_test.c b/drivers/gpu/drm/tests/drm_fixp_test.c new file mode 100644 index 000000000000..f420f173ff66 --- /dev/null +++ b/drivers/gpu/drm/tests/drm_fixp_test.c @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright 2022 Advanced Micro Devices, Inc. + */ + +#include +#include + +static void drm_test_sm2fixp(struct kunit *test) +{ + KUNIT_EXPECT_EQ(test, 0x7fffffffffffffffll, ((1LL << 63) - 1)); + + /* 1 */ + KUNIT_EXPECT_EQ(test, drm_int2fixp(1), drm_sm2fixp(1ull << DRM_FIXED_POINT)); + + /* -1 */ + KUNIT_EXPECT_EQ(test, drm_int2fixp(-1), drm_sm2fixp((1ull << 63) | (1ull << DRM_FIXED_POINT))); + + /* 0.5 */ + KUNIT_EXPECT_EQ(test, drm_fixp_from_fraction(1, 2), drm_sm2fixp(1ull << (DRM_FIXED_POINT - 1))); + + /* -0.5 */ + KUNIT_EXPECT_EQ(test, drm_fixp_from_fraction(-1, 2), drm_sm2fixp((1ull << 63) | (1ull << (DRM_FIXED_POINT - 1)))); + +} + +static void drm_test_int2fixp(struct kunit *test) +{ + /* 1 */ + KUNIT_EXPECT_EQ(test, 1ll << 32, drm_int2fixp(1)); + + /* -1 */ + KUNIT_EXPECT_EQ(test, -(1ll << 32), drm_int2fixp(-1)); + + /* 1 + (-1) = 0 */ + KUNIT_EXPECT_EQ(test, 0, drm_int2fixp(1) + drm_int2fixp(-1)); + + /* 1 / 2 */ + KUNIT_EXPECT_EQ(test, 1ll << 31, drm_fixp_from_fraction(1, 2)); + + /* -0.5 */ + KUNIT_EXPECT_EQ(test, -(1ll << 31), drm_fixp_from_fraction(-1, 2)); + + /* (1 / 2) + (-1) = 0.5 */ + KUNIT_EXPECT_EQ(test, 1ll << 31, drm_fixp_from_fraction(-1, 2) + drm_int2fixp(1)); + + /* (1 / 2) - 1) = 0.5 */ + KUNIT_EXPECT_EQ(test, -(1ll << 31), drm_fixp_from_fraction(1, 2) + drm_int2fixp(-1)); + + /* (1 / 2) - 1) = 0.5 */ + KUNIT_EXPECT_EQ(test, -(1ll << 31), drm_fixp_from_fraction(1, 2) - drm_int2fixp(1)); + +} + +static struct kunit_case drm_fixp_tests[] = { + KUNIT_CASE(drm_test_int2fixp), + KUNIT_CASE(drm_test_sm2fixp), + { } +}; + +static struct kunit_suite drm_rect_test_suite = { + .name = "drm_fixp", + .test_cases = drm_fixp_tests, +}; + +kunit_test_suite(drm_rect_test_suite); + +MODULE_AUTHOR("AMD"); +MODULE_LICENSE("GPL and additional rights"); \ No newline at end of file From patchwork Mon Aug 19 20:56:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768985 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A7EA8C54722 for ; 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Mon, 19 Aug 2024 15:57:31 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 21/44] drm/vkms: Add tests for CTM handling Date: Mon, 19 Aug 2024 16:56:48 -0400 Message-ID: <20240819205714.316380-22-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD9:EE_|CH3PR12MB8236:EE_ X-MS-Office365-Filtering-Correlation-Id: 5b78ad3a-c72c-4ae4-c298-08dcc0918c0b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|82310400026|1800799024|376014; X-Microsoft-Antispam-Message-Info: WQGXR5j0HBhcEnVYXan2gbvSkg9QKwaPvS5piSaQ4+qr+21VlCzVUM9dR+d5dznrb4Dj8xn4F/x5/8LSPWXqUdHKJuCA5c2y9T8l78+sW93GnciROQhM2lvS0EAAN0oHT6SRBmT0tjY/IX6nmi1dQbaAirLSYiHZeVWUDTC7UdmsHXCu/6AVSgJwtzz9qAdlCMVlStNli22nCy7hYxNhkiSPpRMvKbpvkWXnsyepDjWjrVoZ1Z4xc1h7B2IDJVt8bl57jgqXeToNkLBRZJUy1ra83zQTUZQyV8bX1XuDu3nPHWn4KkwpaoOXG1tTmZRjPybLNyhh9YOEE7rnVYo17Tr7VFIvdJf7ExQubUcgc9ooCowBcVydy9DhJG3VFhS3mH3jpWZ58vxXOVHndfKxMKSJC3YLYo2zgOaMDEaj8qB1qfAiIOzDTe7yKpnXwIFY223JWxz36et5IOE1PBbiW9nhM+ccqgEQ4gKJ34AWCRq5+dXhjtnYIv8L9VV2xmwvokkOqv2FsypUy4H+i3vf05J4JsUZZzfXXjcTwwOlKNIalHhyoKXnxM9m2l4W6EnBnK3U4qJGsz/OP1qHuHiI64q7NKUzf91tmuy27QhWhfo9QtHu28+CrkFhgvPcNrL2+kVlAcmmoxuC3KEGUoBEQVZs33ENGe0FDGyEqGEtBEl4rUgwh+ZcqyMeQUK2HrXHe4WR5nM/KR8BLjUNh8WkYgiR4tKQnhNX/qaeI+4m+Fg9bimV931/nVo6UYw6RUSlGAgjQXWtm7iAnXj4VCVqxdjeh3yucRD8rPibcOAbNBioC6NClc2KLh48XO2OF0locwZ8XCrXsXyVR1Rb+Xs7s2z2WJe39ggutlWlIBV4ULI9Bn27sY8T2Q9W2jGyRPbg8fDLeint3kLZZJ63oBewGSbejkRXsWyW4vUjm+eOQMS4ZpiiGZRfAxavMmzey0U/GwA05BOnYavjjrsnblhkFdZFSeh4oDgPpYCX5YilpDaR38QSKwYrJjwAq0b2NrkZWDrML8pwmMt22B8/l0HWJ3HlJghw7imtV9uv4tIHkvGMCF5CjuBnXmHt7rPzu0/54NEIYTYJLM2js/y2FRoCPC1Fozx0cODGl4CwvjtQCLrXVWziD+zJT2lL2SptUMWOyyeOA1JZyR9VkXquFTCbQsmZvtLkLHOOXB0fH9Rf2aOuCM/mNKE3mC9/a/144viVBkGp3TLgCiMJrdkQivfK4yXqhFtN3M6RWPZveV2OdXTNPEqDnwOi6fA/rU4fD+rmj8n6C/VtU9u4QwUoaiH/mkIRYbgLnTmdd6NPVB/f18DMdSNHvx3YidYin96Mfkx93ZlTtqJ4kyLuLf5tmdyeZhQTu3I5cUmmERrIWmyquZ5uCh9KLN4bWdXzRbC4Xe0kThpblPgeGEnow3yiYLRCBT36zZPr+Q3EyAYXvv25YpJ0dP7y9D0BD2dnXJA3S2ZY X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:33.1514 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5b78ad3a-c72c-4ae4-c298-08dcc0918c0b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8236 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" A whole slew of tests for CTM handling that greatly helped in debugging the CTM code. The extent of tests might seem a bit silly but they're fast and might someday help save someone else's day when debugging this. v5: - Make apply_3x4_matrix static v4: - Comment on origin of bt709_enc matrix (Pekka) - Use full opaque alpha (Pekka) - Add additional check for Y < 0xffff (Pekka) - Remove unused code (Pekka) - Rename red, green, blue to Y, U, V where applicable Signed-off-by: Harry Wentland --- drivers/gpu/drm/vkms/tests/vkms_color_tests.c | 251 ++++++++++++++++++ 1 file changed, 251 insertions(+) diff --git a/drivers/gpu/drm/vkms/tests/vkms_color_tests.c b/drivers/gpu/drm/vkms/tests/vkms_color_tests.c index e6ac01dee830..83d07f7bae37 100644 --- a/drivers/gpu/drm/vkms/tests/vkms_color_tests.c +++ b/drivers/gpu/drm/vkms/tests/vkms_color_tests.c @@ -3,6 +3,7 @@ #include #include +#include #define TEST_LUT_SIZE 16 @@ -181,11 +182,261 @@ static void vkms_color_srgb_inv_srgb(struct kunit *test) } } +#define FIXPT_HALF (DRM_FIXED_ONE >> 1) +#define FIXPT_QUARTER (DRM_FIXED_ONE >> 2) + +const struct drm_color_ctm_3x4 test_matrix_3x4_50_desat = { { + FIXPT_HALF, FIXPT_QUARTER, FIXPT_QUARTER, 0, + FIXPT_QUARTER, FIXPT_HALF, FIXPT_QUARTER, 0, + FIXPT_QUARTER, FIXPT_QUARTER, FIXPT_HALF, 0 +} }; + +static void vkms_color_ctm_3x4_50_desat(struct kunit *test) +{ + struct pixel_argb_s32 ref, out; + + /* full white */ + ref.a = 0xffff; + ref.r = 0xffff; + ref.g = 0xffff; + ref.b = 0xffff; + + memcpy(&out, &ref, sizeof(out)); + apply_3x4_matrix(&out, &test_matrix_3x4_50_desat); + + KUNIT_EXPECT_MEMEQ(test, &ref, &out, sizeof(out)); + + /* full black */ + ref.a = 0xffff; + ref.r = 0x0; + ref.g = 0x0; + ref.b = 0x0; + + memcpy(&out, &ref, sizeof(out)); + apply_3x4_matrix(&out, &test_matrix_3x4_50_desat); + + KUNIT_EXPECT_MEMEQ(test, &ref, &out, sizeof(out)); + + /* 50% grey */ + ref.a = 0xffff; + ref.r = 0x8000; + ref.g = 0x8000; + ref.b = 0x8000; + + memcpy(&out, &ref, sizeof(out)); + apply_3x4_matrix(&out, &test_matrix_3x4_50_desat); + + KUNIT_EXPECT_MEMEQ(test, &ref, &out, sizeof(out)); + + /* full red to 50% desat */ + ref.a = 0xffff; + ref.r = 0x7fff; + ref.g = 0x3fff; + ref.b = 0x3fff; + + out.a = 0xffff; + out.r = 0xffff; + out.g = 0x0; + out.b = 0x0; + + apply_3x4_matrix(&out, &test_matrix_3x4_50_desat); + + KUNIT_EXPECT_MEMEQ(test, &ref, &out, sizeof(out)); +} + +/* + * BT.709 encoding matrix + * + * Values printed from within IGT when converting + * igt_matrix_3x4_bt709_enc to the fixed-point format expected + * by DRM/KMS. + */ +const struct drm_color_ctm_3x4 test_matrix_3x4_bt709_enc = { { + 0x00000000366cf400ull, 0x00000000b7175900ull, 0x0000000127bb300ull, 0, + 0x800000001993b3a0ull, 0x800000005609fe80ull, 0x000000006f9db200ull, 0, + 0x000000009d70a400ull, 0x800000008f011100ull, 0x800000000e6f9330ull, 0 +} }; + +static void vkms_color_ctm_3x4_bt709(struct kunit *test) +{ + struct pixel_argb_s32 out; + + /* full white to bt709 */ + out.a = 0xffff; + out.r = 0xffff; + out.g = 0xffff; + out.b = 0xffff; + + apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc); + + /* Y 255 */ + KUNIT_EXPECT_GT(test, out.r, 0xfe00); + KUNIT_EXPECT_LT(test, out.r, 0x10000); + + /* U 0 */ + KUNIT_EXPECT_LT(test, out.g, 0x0100); + + /* V 0 */ + KUNIT_EXPECT_LT(test, out.b, 0x0100); + + /* full black to bt709 */ + out.a = 0xffff; + out.r = 0x0; + out.g = 0x0; + out.b = 0x0; + + apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc); + + /* Y 0 */ + KUNIT_EXPECT_LT(test, out.r, 0x100); + + /* U 0 */ + KUNIT_EXPECT_LT(test, out.g, 0x0100); + + /* V 0 */ + KUNIT_EXPECT_LT(test, out.b, 0x0100); + + /* gray to bt709 */ + out.a = 0xffff; + out.r = 0x7fff; + out.g = 0x7fff; + out.b = 0x7fff; + + apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc); + + /* Y 127 */ + KUNIT_EXPECT_GT(test, out.r, 0x7e00); + KUNIT_EXPECT_LT(test, out.r, 0x8000); + + /* U 0 */ + KUNIT_EXPECT_LT(test, out.g, 0x0100); + + /* V 0 */ + KUNIT_EXPECT_LT(test, out.b, 0x0100); + + /* == red 255 - bt709 enc == */ + out.a = 0xffff; + out.r = 0xffff; + out.g = 0x0; + out.b = 0x0; + + apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc); + + /* Y 54 */ + KUNIT_EXPECT_GT(test, out.r, 0x3500); + KUNIT_EXPECT_LT(test, out.r, 0x3700); + + /* U 0 */ + KUNIT_EXPECT_LT(test, out.g, 0x0100); + + /* V 157 */ + KUNIT_EXPECT_GT(test, out.b, 0x9C00); + KUNIT_EXPECT_LT(test, out.b, 0x9E00); + + + /* == green 255 - bt709 enc == */ + out.a = 0xffff; + out.r = 0x0; + out.g = 0xffff; + out.b = 0x0; + + apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc); + + /* Y 182 */ + KUNIT_EXPECT_GT(test, out.r, 0xB500); + KUNIT_EXPECT_LT(test, out.r, 0xB780); /* laxed by half*/ + + /* U 0 */ + KUNIT_EXPECT_LT(test, out.g, 0x0100); + + /* V 0 */ + KUNIT_EXPECT_LT(test, out.b, 0x0100); + + /* == blue 255 - bt709 enc == */ + out.a = 0xffff; + out.r = 0x0; + out.g = 0x0; + out.b = 0xffff; + + apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc); + + /* Y 18 */ + KUNIT_EXPECT_GT(test, out.r, 0x1100); + KUNIT_EXPECT_LT(test, out.r, 0x1300); + + /* U 111 */ + KUNIT_EXPECT_GT(test, out.g, 0x6E00); + KUNIT_EXPECT_LT(test, out.g, 0x7000); + + /* V 0 */ + KUNIT_EXPECT_LT(test, out.b, 0x0100); + + /* == red 140 - bt709 enc == */ + out.a = 0xffff; + out.r = 0x8c8c; + out.g = 0x0; + out.b = 0x0; + + apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc); + + /* Y 30 */ + KUNIT_EXPECT_GT(test, out.r, 0x1D00); + KUNIT_EXPECT_LT(test, out.r, 0x1F00); + + /* U 0 */ + KUNIT_EXPECT_LT(test, out.g, 0x100); + + /* V 87 */ + KUNIT_EXPECT_GT(test, out.b, 0x5600); + KUNIT_EXPECT_LT(test, out.b, 0x5800); + + /* == green 140 - bt709 enc == */ + out.a = 0xffff; + out.r = 0x0; + out.g = 0x8c8c; + out.b = 0x0; + + apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc); + + /* Y 30 */ + KUNIT_EXPECT_GT(test, out.r, 0x6400); + KUNIT_EXPECT_LT(test, out.r, 0x6600); + + /* U 0 */ + KUNIT_EXPECT_LT(test, out.g, 0x100); + + /* V 0 */ + KUNIT_EXPECT_LT(test, out.b, 0x100); + + + /* == blue 140 - bt709 enc == */ + out.a = 0xffff; + out.r = 0x0; + out.g = 0x0; + out.b = 0x8c8c; + + apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc); + + /* Y 30 */ + KUNIT_EXPECT_GT(test, out.r, 0x900); + KUNIT_EXPECT_LT(test, out.r, 0xB00); + + /* U 61 */ + KUNIT_EXPECT_GT(test, out.g, 0x3C00); + KUNIT_EXPECT_LT(test, out.g, 0x3E00); + + /* V 0 */ + KUNIT_EXPECT_LT(test, out.b, 0x100); + +} + static struct kunit_case vkms_color_test_cases[] = { KUNIT_CASE(vkms_color_test_get_lut_index), KUNIT_CASE(vkms_color_test_lerp), KUNIT_CASE(vkms_color_test_linear), KUNIT_CASE(vkms_color_srgb_inv_srgb), + KUNIT_CASE(vkms_color_ctm_3x4_50_desat), + KUNIT_CASE(vkms_color_ctm_3x4_bt709), {} }; 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Pass the plane_color_pipeline bit to drm_atomic_state. v5: - Fix kernel docs Signed-off-by: Harry Wentland --- drivers/gpu/drm/drm_atomic_uapi.c | 1 + include/drm/drm_atomic.h | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 4a9cb1f7dbf7..39805f822d44 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -1578,6 +1578,7 @@ int drm_mode_atomic_ioctl(struct drm_device *dev, drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); state->acquire_ctx = &ctx; state->allow_modeset = !!(arg->flags & DRM_MODE_ATOMIC_ALLOW_MODESET); + state->plane_color_pipeline = file_priv->plane_color_pipeline; retry: copied_objs = 0; diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h index d8232fbb002b..c908ad75b95a 100644 --- a/include/drm/drm_atomic.h +++ b/include/drm/drm_atomic.h @@ -414,6 +414,24 @@ struct drm_atomic_state { */ bool duplicated : 1; + /** + * @plane_color_pipeline: + * + * Indicates whether this atomic state originated with a client that + * set the DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE. + * + * Drivers and helper functions should use this to ignore legacy + * properties that are incompatible with the drm_plane COLOR_PIPELINE + * behavior, such as: + * + * - COLOR_RANGE + * - COLOR_ENCODING + * + * or any other driver-specific properties that might affect pixel + * values. + */ + bool plane_color_pipeline : 1; + /** * @colorops: * From patchwork Mon Aug 19 20:56:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768980 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 366E1C3DA4A for ; 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Mon, 19 Aug 2024 15:57:33 -0500 From: Harry Wentland To: , CC: , Alex Hung Subject: [PATCH v5 23/44] drm/colorop: define a new macro for_each_new_colorop_in_state Date: Mon, 19 Aug 2024 16:56:50 -0400 Message-ID: <20240819205714.316380-24-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD7:EE_|DM4PR12MB8474:EE_ X-MS-Office365-Filtering-Correlation-Id: 6ee0288f-ed24-45e9-c236-08dcc0918cd7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|82310400026|1800799024|376014; X-Microsoft-Antispam-Message-Info: tYVC9Kn76xkxI+GbQQDP3j1ME6mw6nwnpvzeJld3ssS6JwUWMbJapK0/8asPFvWMPpOg89Ptso20g6ccz9NWV08BfbhQzTyXGSvhbx3P+ocCWRSZdiSnIUEqw4uAHIzzMmVoN8Y9P3eJDge+4nguoUS6SnrMK8RieECGhWAOXMpLHVzmJHH1R7t5ZboRlxxjok5ZEhEX/kNsutuz5QoIb10/fMHZZT5wXKJMFs+WcJlhtR65IYL2w/2bgxTIvwwQGTFkiYcA12NqzFYtoAtNaPlSHFYT7cFcN9uqB3TGIgb55mAde0a3IYWe29B/dQgdD/dKZN3lpMAjrK9WWHmzQV/t7ajKcUqDuVQbvwueMUfleBexEBlwZByX9ScoO/x+un523u3KGI9VL3FdkTLmhqFqIfIQl/lv2kKDRK75iHg8sMiBn+3Y+CbFv1NwZ9A8wP77Ak0iuYA76Otc+Ao79Qgxjhyto5myhiBNAjb7/yPIVJhfyh5UZ+63rTfsCe2YMQwW0rIg3uJJ4zUaKkp+bv5SUB7BsIimtfO+pC+4dkeYUuA70x1QQx/ELLmNwYv0FjIRWR8kid+Qtjf67pV/EodKR4LJT+yCc0HJht/oz6ZgYnndhCNca5fE8J0wtsZHXlmdaBOiGlKqywQqE3Og8wzOHDuSmSs2hKDFiKlclpeoiFipTtZZAYCqdT/QPftBnvQfIrBRy+pWM2R8kA7y26Ioj5DpLb7727N7RBM2Odd9dI7xKn+lrwZgpQmN3cYm2rq2TCuWMXWsjo9m5/KlFoJOfUFZxa7THZ5dIdCiOEYi/AI26PTXPWasI4EkFfzBqPmzrwhqVecyaI5eNLrvJM/UF5aV4gJ4nbn9aeS+5RjlRJSfbIHr0aLInmRuFcGBmjV+r9cPPIMGMAQyAtbYQys0oE4MaWR0FtGwodV0EJbhOVj1Apc9hpJxw69rxq7twybtqw/kWWPmFD3ROkL49fG1yvifvnHHy4iVlliH0vKM/Qvf6ENGDzS4deoLYN28x8HnVCvYghKx3xXQL0gDx+1Dntn3t1JFeUg072MhBS7aCUb+318Nfz2CiWN6kEpPbeKs+dnUkJGklSqlofq79owGE+5oF0lsOF4ZHeDHdNwM/nDqmK+dh8eOKkQsLmwNNcJGwkzDv11OerxSeeT/QOYEKxhPe7V4/BwBdDQgup99/vjcMTB5GMKCjssoc649JIuHr8kAReZ7bpS76hFbowqTGJwWg/tfeg7jmvRmYRaN399ajnUicmnZgUuSZX40UMsOrMBRTw+tUjf135sLwylyY0Gw3gsGZcYQJV9qzVe+NqY5OTjESiPta5tBy5/+Iz1zGbcQ3WqIa/Q/U3WyMuc0G884WlvsQsiQGTn0gGn/8A65iFwRO61LdjBTIrMegxWU3q9k8arQBoD/hVLfNycJKgc7SMyD1w1XPVW6PODi204Ksj5QnXl7KMiZRFkt X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:34.4727 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6ee0288f-ed24-45e9-c236-08dcc0918cd7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD7.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8474 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung Create a new macro for_each_new_colorop_in_state to access new drm_colorop_state updated from uapi. Signed-off-by: Alex Hung --- include/drm/drm_atomic.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h index c908ad75b95a..ed767cb7a55b 100644 --- a/include/drm/drm_atomic.h +++ b/include/drm/drm_atomic.h @@ -1035,6 +1035,26 @@ void drm_state_dump(struct drm_device *dev, struct drm_printer *p); (new_colorop_state) = (__state)->colorops[__i].new_state, 1)) +/** + * for_each_new_colorop_in_state - iterate over all colorops in an atomic update + * @__state: &struct drm_atomic_state pointer + * @colorop: &struct drm_colorop iteration cursor + * @new_colorop_state: &struct drm_colorop_state iteration cursor for the new state + * @__i: int iteration cursor, for macro-internal use + * + * This iterates over all colorops in an atomic update, tracking new state. This is + * useful is useful in places where the state delta needs to be considered, for + * example in atomic check functions. + */ +#define for_each_new_colorop_in_state(__state, colorop, new_colorop_state, __i) \ + for ((__i) = 0; \ + (__i) < (__state)->dev->mode_config.num_colorop; \ + (__i)++) \ + for_each_if ((__state)->colorops[__i].ptr && \ + ((colorop) = (__state)->colorops[__i].ptr, \ + (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \ + (new_colorop_state) = (__state)->colorops[__i].new_state, 1)) + /** * for_each_oldnew_plane_in_state - iterate over all planes in an atomic update * @__state: &struct drm_atomic_state pointer From patchwork Mon Aug 19 20:56:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768995 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5984EC52D7C for ; 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Signed-off-by: Harry Wentland --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 7e7929f24ae4..3257bd22bf6b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -5319,6 +5319,10 @@ fill_plane_color_attributes(const struct drm_plane_state *plane_state, *color_space = COLOR_SPACE_SRGB; + /* Ignore properties when DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE is set */ + if (plane_state->state && plane_state->state->plane_color_pipeline) + return 0; + /* DRM color properties only affect non-RGB formats. */ if (format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) return 0; From patchwork Mon Aug 19 20:56:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9876FC5321D for ; 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Signed-off-by: Harry Wentland --- .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index a83bd0331c3b..d260db42d407 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -1746,6 +1746,20 @@ dm_atomic_plane_get_property(struct drm_plane *plane, } #endif +#define MAX_COLOR_PIPELINES 5 + +static int +dm_plane_init_colorops(struct drm_plane *plane) +{ + struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES]; + int len = 0; + + /* Create COLOR_PIPELINE property and attach */ + drm_plane_create_color_pipeline_property(plane, pipelines, len); + + return 0; +} + static const struct drm_plane_funcs dm_plane_funcs = { .update_plane = drm_atomic_helper_update_plane, .disable_plane = drm_atomic_helper_disable_plane, @@ -1849,7 +1863,12 @@ int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm, #ifdef AMD_PRIVATE_COLOR dm_atomic_plane_attach_color_mgmt_properties(dm, plane); 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:36.8325 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cc9b382e-e94b-4e16-d5d4-08dcc0918e3f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FC1.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8801 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung Expose one 1D curve colorop with support for DRM_COLOROP_1D_CURVE_SRGB_EOTF and program HW to perform the sRGB transform when the colorop is not in bypass. With this change the following IGT test passes: kms_colorop --run plane-XR30-XR30-srgb_eotf The color pipeline now consists of a single colorop: 1. 1D curve colorop w/ sRGB EOTF Signed-off-by: Alex Hung Signed-off-by: Harry Wentland Co-developed-by: Harry Wentland --- .../gpu/drm/amd/display/amdgpu_dm/Makefile | 3 +- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 88 +++++++++++++++++++ .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 58 ++++++++++++ .../amd/display/amdgpu_dm/amdgpu_dm_colorop.h | 34 +++++++ .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 10 +++ 5 files changed, 192 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile b/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile index ab2a97e354da..46158d67ab12 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile @@ -38,7 +38,8 @@ AMDGPUDM = \ amdgpu_dm_pp_smu.o \ amdgpu_dm_psr.o \ amdgpu_dm_replay.o \ - amdgpu_dm_wb.o + amdgpu_dm_wb.o \ + amdgpu_dm_colorop.o ifdef CONFIG_DRM_AMD_DC_FP AMDGPUDM += dc_fpu.o diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index ebabfe3a512f..adb1e4b3522d 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -668,6 +668,19 @@ amdgpu_tf_to_dc_tf(enum amdgpu_transfer_function tf) } } +static enum dc_transfer_func_predefined +amdgpu_colorop_tf_to_dc_tf(enum drm_colorop_curve_1d_type tf) +{ + switch (tf) + { + case DRM_COLOROP_1D_CURVE_SRGB_EOTF: + case DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF: + return TRANSFER_FUNCTION_SRGB; + default: + return TRANSFER_FUNCTION_LINEAR;; + } +} + static void __to_dc_lut3d_color(struct dc_rgb *rgb, const struct drm_color_lut lut, int bit_precision) @@ -1137,6 +1150,59 @@ __set_dm_plane_degamma(struct drm_plane_state *plane_state, return 0; } +static int +__set_colorop_in_tf_1d_curve(struct dc_plane_state *dc_plane_state, + struct drm_colorop_state *colorop_state) +{ + struct dc_transfer_func *tf = &dc_plane_state->in_transfer_func; + struct drm_colorop *colorop = colorop_state->colorop; + struct drm_device *drm = colorop->dev; + + if (colorop->type != DRM_COLOROP_1D_CURVE && + colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_EOTF) + return -EINVAL; + + if (colorop_state->bypass) { + tf->type = TF_TYPE_BYPASS; + tf->tf = TRANSFER_FUNCTION_LINEAR; + return 0; + } + + drm_dbg(drm, "Degamma colorop with ID: %d\n", colorop->base.id); + + tf->type = TF_TYPE_PREDEFINED; + tf->tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type); + + return 0; +} + +static int +__set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state, + struct dc_plane_state *dc_plane_state, + struct drm_colorop *colorop) +{ + struct drm_colorop *old_colorop; + struct drm_colorop_state *colorop_state = NULL, *new_colorop_state; + struct drm_atomic_state *state = plane_state->state; + int i = 0; + + old_colorop = colorop; + + /* 1st op: 1d curve - degamma */ + for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { + if (new_colorop_state->colorop == old_colorop && + new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_EOTF) { + colorop_state = new_colorop_state; + break; + } + } + + if (!colorop_state) + return -EINVAL; + + return __set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state); +} + static int amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state) @@ -1187,6 +1253,25 @@ amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state, return 0; } +static int +amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, + struct dc_plane_state *dc_plane_state) +{ + struct drm_colorop *colorop = plane_state->color_pipeline; + int ret; + + /* 1D Curve - DEGAM TF */ + if (!colorop) { + return -EINVAL; + } + + ret = __set_dm_plane_colorop_degamma(plane_state, dc_plane_state, colorop); + if (ret) + return ret; + + return 0; +} + /** * amdgpu_dm_update_plane_color_mgmt: Maps DRM color management to DC plane. * @crtc: amdgpu_dm crtc state @@ -1283,5 +1368,8 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc, dc_plane_state->input_csc_color_matrix.enable_adjustment = false; } + if (!amdgpu_dm_plane_set_colorop_properties(plane_state, dc_plane_state)) + return 0; + return amdgpu_dm_plane_set_color_properties(plane_state, dc_plane_state); } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c new file mode 100644 index 000000000000..e8b7fc8bb0f1 --- /dev/null +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright 2023 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#include +#include +#include +#include + +#include "amdgpu_dm_colorop.h" + +const u64 amdgpu_dm_supported_degam_tfs = + BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF); + +int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list) +{ + struct drm_colorop *op; + struct drm_device *dev = plane->dev; + int ret; + + /* 1D curve - DEGAM TF */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_curve_1d_init(dev, op, plane, amdgpu_dm_supported_degam_tfs); + if (ret) + return ret; + + list->type = op->base.id; + list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", op->base.id); + + return 0; +} \ No newline at end of file diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h new file mode 100644 index 000000000000..f16de6a9fbde --- /dev/null +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright 2023 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#ifndef __AMDGPU_DM_COLOROP_H__ +#define __AMDGPU_DM_COLOROP_H__ + +extern const u64 amdgpu_dm_supported_degam_tfs; + +int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list); + +#endif /* __AMDGPU_DM_COLOROP_H__*/ \ No newline at end of file diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index 8fc0f73fce33..8f950ca1f5ba 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -35,6 +35,7 @@ #include "amdgpu_display.h" #include "amdgpu_dm_trace.h" #include "amdgpu_dm_plane.h" +#include "amdgpu_dm_colorop.h" #include "gc/gc_11_0_0_offset.h" #include "gc/gc_11_0_0_sh_mask.h" @@ -1753,10 +1754,19 @@ dm_plane_init_colorops(struct drm_plane *plane) { struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES]; int len = 0; + int ret; if (plane->type == DRM_PLANE_TYPE_CURSOR) return 0; + /* initialize default pipeline */ + ret = amdgpu_dm_initialize_default_pipeline(plane, &(pipelines[len])); + if (ret) { + DRM_ERROR("Failed to create color pipeline for plane %d: %d\n", plane->base.id, ret); + return ret; + } + len++; + /* Create COLOR_PIPELINE property and attach */ drm_plane_create_color_pipeline_property(plane, pipelines, len); From patchwork Mon Aug 19 20:56:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768996 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2BA03C52D7C for ; Mon, 19 Aug 2024 20:59:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8464A10E411; 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Mon, 19 Aug 2024 15:57:36 -0500 Received: from localhost.localdomain (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Mon, 19 Aug 2024 15:57:36 -0500 From: Harry Wentland To: , CC: , Alex Hung , Harry Wentland Subject: [PATCH v5 28/44] drm/amd/display: Add support for sRGB Inverse EOTF in SHAPER block Date: Mon, 19 Aug 2024 16:56:55 -0400 Message-ID: <20240819205714.316380-29-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBF:EE_|PH8PR12MB6963:EE_ X-MS-Office365-Filtering-Correlation-Id: 96fa724b-3111-4dc7-7885-08dcc0918e9e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:37.4683 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 96fa724b-3111-4dc7-7885-08dcc0918e9e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBF.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6963 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung Expose a 2nd curve colorop with support for DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF and program HW to perform the sRGB Inverse EOTF on the shaper block when the colorop is not in bypass. With this change the follow IGT tests pass: kms_colorop --run plane-XR30-XR30-srgb_inv_eotf kms_colorop --run plane-XR30-XR30-srgb_eotf-srgb_inv_eotf The color pipeline now consists of the following colorops: 1. 1D curve colorop w/ sRGB EOTF support 2. 1D curve colorop w/ sRGB Inverse EOTF support Signed-off-by: Alex Hung Signed-off-by: Harry Wentland Co-developed-by: Harry Wentland --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 76 +++++++++++++++++++ .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 20 ++++- .../amd/display/amdgpu_dm/amdgpu_dm_colorop.h | 1 + 3 files changed, 96 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index adb1e4b3522d..58a996090509 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -1203,6 +1203,70 @@ __set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state, return __set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state); } +static int +__set_colorop_in_shaper_1d_curve(struct dc_plane_state *dc_plane_state, + struct drm_colorop_state *colorop_state) +{ + struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func; + struct drm_colorop *colorop = colorop_state->colorop; + struct drm_device *drm = colorop->dev; + const struct drm_color_lut *shaper_lut; + uint32_t shaper_size; + + if (colorop->type != DRM_COLOROP_1D_CURVE && + colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) + return -EINVAL; + + if (colorop_state->bypass) { + tf->type = TF_TYPE_BYPASS; + tf->tf = TRANSFER_FUNCTION_LINEAR; + return 0; + } + + drm_dbg(drm, "Shaper colorop with ID: %d\n", colorop->base.id); + + if (colorop->type == DRM_COLOROP_1D_CURVE) { + tf->type = TF_TYPE_DISTRIBUTED_POINTS; + tf->tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type); + tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE; + return __set_output_tf(tf, shaper_lut, shaper_size, false); + } + + return -EINVAL; +} + +static int +__set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, + struct dc_plane_state *dc_plane_state, + struct drm_colorop *colorop) +{ + struct drm_colorop *old_colorop; + struct drm_colorop_state *colorop_state = NULL, *new_colorop_state; + struct drm_atomic_state *state = plane_state->state; + int i = 0; + + old_colorop = colorop; + + /* 2nd op: 1d curve - shaper */ + for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { + if (new_colorop_state->colorop == old_colorop && + new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) { + colorop_state = new_colorop_state; + break; + } + + if (new_colorop_state->colorop == old_colorop) { + colorop_state = new_colorop_state; + break; + } + } + + if (!colorop_state) + return -EINVAL; + + return __set_colorop_in_shaper_1d_curve(dc_plane_state, colorop_state); +} + static int amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state) @@ -1258,6 +1322,7 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state) { struct drm_colorop *colorop = plane_state->color_pipeline; + struct drm_device *dev = plane_state->plane->dev; int ret; /* 1D Curve - DEGAM TF */ @@ -1269,6 +1334,17 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, if (ret) return ret; + /* 1D Curve - SHAPER TF */ + colorop = colorop->next; + if (!colorop) { + drm_dbg(dev, "no Shaper TF colorop found\n"); + return -EINVAL; + } + + ret = __set_dm_plane_colorop_shaper(plane_state, dc_plane_state, colorop); + if (ret) + return ret; + return 0; } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index e8b7fc8bb0f1..0d1626abf577 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -34,9 +34,12 @@ const u64 amdgpu_dm_supported_degam_tfs = BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF); + const u64 amdgpu_dm_supported_shaper_tfs = + BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF); + int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list) { - struct drm_colorop *op; + struct drm_colorop *op, *prev_op; struct drm_device *dev = plane->dev; int ret; @@ -54,5 +57,20 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr list->type = op->base.id; list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", op->base.id); + prev_op = op; + + /* 1D curve - SHAPER TF */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_curve_1d_init(dev, op, plane, amdgpu_dm_supported_shaper_tfs); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, op); + return 0; } \ No newline at end of file diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h index f16de6a9fbde..c4b1b187e9bf 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h @@ -28,6 +28,7 @@ #define __AMDGPU_DM_COLOROP_H__ extern const u64 amdgpu_dm_supported_degam_tfs; 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Mon, 19 Aug 2024 15:57:37 -0500 From: Harry Wentland To: , CC: , Alex Hung , Harry Wentland Subject: [PATCH v5 29/44] drm/amd/display: Add support for sRGB EOTF in BLND block Date: Mon, 19 Aug 2024 16:56:56 -0400 Message-ID: <20240819205714.316380-30-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBF:EE_|SJ1PR12MB6026:EE_ X-MS-Office365-Filtering-Correlation-Id: 9fb70e33-d5ee-43f9-10e5-08dcc0918f18 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|1800799024|82310400026|376014; X-Microsoft-Antispam-Message-Info: d/iETarhAUjec0aqDzoR0vEPwGsgS3FtOYhcB8S6D4PhVsvbzJO6fyhkrmX8hvn+NDuBVDGogItx5qUobcoRRXzO7dPmerETnOv4LOvKfsK7vs5zU7fXbBYqMP6Brfa5cuel8+RZZYc4ip/LOzUCdiv/WhPUW5wz8IAte9j7sXObv2UG770PYlY2kgKij414dc9IYqDV5uD/SgMLlfcBJ4OHfAQMxviGgSBcg0UuxH2CwIokHBPmPZYCdboC7pNx4sH7oyl+YAMoYuNz8G5g9WFvEEZFJNwf9B2Qe+xfsHIzXATfp/kkcUzHLvkXuZViT5PEWkxN/vs997ABcEaMnfHzB1MaG66dmBwUxbWC4TYTNiztJsaBgZtaSgB2EGOqrH2ME7Blbn07HoxOzyftf/hNKJhcqt55fB2FhmFpW5ZswQCe4WXFscbJIAAJ+ISXl2g2RpRtpcoHaea4gg7KMgip1zJopPynKZzn8NyN4ygxR4I8B3VOC79Lxof8KqEyQCTYBOyJ+LrRaHqzcy9bquvzZQu64hbIW4gDmLrmodBt8pLUDaymlKVb5gDT9c0RkUo1vxvpjkd/wImNhiQ93VvYzaOAoavuBku2eGM08Ygirz+hYLk5RHvdyqlhHTxlKpUN+sXpB79s6ed6oSxXE+Wg+xuBWlr0v63tpSsy8QBhnXa8a+Nh1f0/orI9T0l6ulkS4XrMurspbMT872igYpclC9+6omQWJ6Mb9Apg4lXyY9AmqxgRwqKc0w7446+89RDfXAODigECvkgAZcGyQi1C2OYsdYdlv8P0S/rdDklD6/TouXYHoIuLGGbcTHA5I3Gh20jOYVK0J6PBeOTFXszAhh0a1maXmSclFT6GboihiPp/mLXEo6/eXkzVJmK2dAOuQ0tNflntnYMdoVuJvlFWATzdmgVPrqyFHBpbWG0xKmE82zYbM6skAJB5WSsFzry/6GXgyjrspWlNXohSSHtWIvX1QRq5loPx/3exJ/8ivQssItgI3Ut0I5zMP/TI9Za38km3q3L8SECKoSZshchXk+GrtI4grAmAWHOk52ZtIdQmXcCq5uLbz6LCWHA8veRya+hh6su5OS10xIuGydVY80IoxKlY9RJQI9pV7jPZuJQzU3AvQUA6nzsBG3/P6D1vocWzmAX6VKnlSqP7D764XHyiPYBSOcJIztN2Bg9bdyXVU2llBweIjNg2wTWMR+50To2pWuPqzxQ5v/PkfAYd2MLPP6NEx64FUBoxuyyGv99xyC1wM0Ih0JtHWU0V1QAHhRcdlMBg3TRXNCV3VaTiAJgfpO4GbmAaj6itskwcmhaUqW/D40gr96bOlgGJJiN3ls77NSw8VM9tOVvI/9YGS/YArL8ZFX80j4jJpxhc8xzkwhaXOezG6pTTUE39p3j0POXQ63YRsZhOlDpowUO5kEytMvuJrWyQLNWW8gVS1km8XADO0s+BKA1TVA4D X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:38.2496 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9fb70e33-d5ee-43f9-10e5-08dcc0918f18 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBF.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6026 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung Expose a 3rd 1D curve colorop, with support for DRM_COLOROP_1D_CURVE_SRGB_EOTF and program the BLND block to perform the sRGB transform when the colorop is not in bypass With this change the following IGT test passes: kms_colorop --run plane-XR30-XR30-srgb_eotf-srgb_inv_eotf-srgb_eotf The color pipeline now consists of the following colorops: 1. 1D curve colorop w/ sRGB EOTF support 2. 1D curve colorop w/ sRGB Inverse EOTF support 3. 1D curve colorop w/ sRGB EOTF support Signed-off-by: Alex Hung Signed-off-by: Harry Wentland Co-developed-by: Harry Wentland --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 77 +++++++++++++++++++ .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 18 +++++ .../amd/display/amdgpu_dm/amdgpu_dm_colorop.h | 1 + 3 files changed, 96 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 58a996090509..4009895c3b6d 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -1267,6 +1267,72 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, return __set_colorop_in_shaper_1d_curve(dc_plane_state, colorop_state); } + +static int +__set_colorop_1d_curve_blend_tf_lut(struct dc_plane_state *dc_plane_state, + struct drm_colorop_state *colorop_state) +{ + + struct dc_transfer_func *tf = &dc_plane_state->blend_tf; + struct drm_colorop *colorop = colorop_state->colorop; + struct drm_device *drm = colorop->dev; + const struct drm_color_lut *blend_lut; + uint32_t blend_size; + + if (colorop->type != DRM_COLOROP_1D_CURVE && + colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_EOTF) + return -EINVAL; + + if (colorop_state->bypass) { + tf->type = TF_TYPE_BYPASS; + tf->tf = TRANSFER_FUNCTION_LINEAR; + return 0; + } + + drm_dbg(drm, "Blend colorop with ID: %d\n", colorop->base.id); + + if (colorop->type == DRM_COLOROP_1D_CURVE) { + tf->type = TF_TYPE_DISTRIBUTED_POINTS; + tf->tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type); + tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE; + return __set_input_tf(NULL, tf, blend_lut, blend_size); + } + + return -EINVAL; +} + +static int +__set_dm_plane_colorop_blend(struct drm_plane_state *plane_state, + struct dc_plane_state *dc_plane_state, + struct drm_colorop *colorop) +{ + struct drm_colorop *old_colorop; + struct drm_colorop_state *colorop_state = NULL, *new_colorop_state; + struct drm_atomic_state *state = plane_state->state; + int i = 0; + + old_colorop = colorop; + + /* 3nd op: 1d curve - blend */ + for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { + if (new_colorop_state->colorop == old_colorop && + new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_EOTF) { + colorop_state = new_colorop_state; + break; + } + + if (new_colorop_state->colorop == old_colorop) { + colorop_state = new_colorop_state; + break; + } + } + + if (!colorop_state) + return -EINVAL; + + return __set_colorop_1d_curve_blend_tf_lut(dc_plane_state, colorop_state); +} + static int amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state) @@ -1345,6 +1411,17 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, if (ret) return ret; + /* 1D Curve - BLND TF */ + colorop = colorop->next; + if (!colorop) { + drm_dbg(dev, "no Blend TF colorop found\n"); + return -EINVAL; + } + + ret = __set_dm_plane_colorop_blend(plane_state, dc_plane_state, colorop); + if (ret) + return ret; + return 0; } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index 0d1626abf577..449a2ad6a184 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -37,6 +37,9 @@ const u64 amdgpu_dm_supported_degam_tfs = const u64 amdgpu_dm_supported_shaper_tfs = BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF); +const u64 amdgpu_dm_supported_blnd_tfs = + BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF); + int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list) { struct drm_colorop *op, *prev_op; @@ -72,5 +75,20 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr drm_colorop_set_next_property(prev_op, op); + prev_op = op; + + /* 1D curve - BLND TF */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_curve_1d_init(dev, op, plane, amdgpu_dm_supported_blnd_tfs); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, op); + return 0; } \ No newline at end of file diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h index c4b1b187e9bf..a342c096f406 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h @@ -29,6 +29,7 @@ extern const u64 amdgpu_dm_supported_degam_tfs; extern const u64 amdgpu_dm_supported_shaper_tfs; +extern const u64 amdgpu_dm_supported_blnd_tfs; int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list); From patchwork Mon Aug 19 20:56:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768990 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3DD4C52D7C for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN2PEPF00004FBF.mail.protection.outlook.com (10.167.243.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7897.11 via Frontend Transport; Mon, 19 Aug 2024 20:57:39 +0000 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 19 Aug 2024 15:57:38 -0500 Received: from localhost.localdomain (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Mon, 19 Aug 2024 15:57:37 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 30/44] drm/colorop: Add PQ 125 EOTF and its inverse Date: Mon, 19 Aug 2024 16:56:57 -0400 Message-ID: <20240819205714.316380-31-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBF:EE_|MW4PR12MB5644:EE_ X-MS-Office365-Filtering-Correlation-Id: 20a71480-823b-4e29-6a39-08dcc0918ff3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:39.6871 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 20a71480-823b-4e29-6a39-08dcc0918ff3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBF.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB5644 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The PQ function defines a mapping of code values to nits (cd/m^2). The max code value maps to 10,000 nits. Windows DWM's canonical composition color space (CCCS) defaults to composing SDR contents to 80 nits and uses a float value of 1.0 to represent this. For this reason AMD HW hard-codes a PQ function that is scaled by 125, yielding 80 nit PQ values for 1.0 and 10,000 nits at 125.0. This patch introduces this scaled PQ EOTF and its inverse as 1D curve types. Signed-off-by: Harry Wentland --- drivers/gpu/drm/drm_colorop.c | 2 ++ include/drm/drm_colorop.h | 21 ++++++++++++++++++++- 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 73fd4b7a4ce3..f9dcc522c94d 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -69,6 +69,8 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = { static const char * const colorop_curve_1d_type_names[] = { [DRM_COLOROP_1D_CURVE_SRGB_EOTF] = "sRGB EOTF", [DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF] = "sRGB Inverse EOTF", + [DRM_COLOROP_1D_CURVE_PQ_125_EOTF] = "PQ 125 EOTF", + [DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF] = "PQ 125 Inverse EOTF", }; diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index 1566d88fd018..d953d16c32f7 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -35,7 +35,6 @@ * enum drm_colorop_curve_1d_type - type of 1D curve * * Describes a 1D curve to be applied by the DRM_COLOROP_1D_CURVE colorop. - * */ enum drm_colorop_curve_1d_type { /** @@ -55,6 +54,26 @@ enum drm_colorop_curve_1d_type { */ DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF, + /** + * @DRM_COLOROP_1D_CURVE_PQ_125_EOTF: + * + * The PQ transfer function, scaled by 125.0f, so that 10,000 + * nits correspond to 125.0f. + * + * Transfer characteristics of the PQ function as defined by + * SMPTE ST 2084 (2014) for 10-, 12-, 14-, and 16-bit systems + * and Rec. ITU-R BT.2100-2 perceptual quantization (PQ) system. + * Equivalent to H.273 TransferCharacteristics code point 16. + */ + DRM_COLOROP_1D_CURVE_PQ_125_EOTF, + + /** + * @DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF: + * + * The inverse of DRM_COLOROP_1D_CURVE_PQ_125_EOTF. + */ + DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF, + /** * @DRM_COLOROP_1D_CURVE_COUNT: * From patchwork Mon Aug 19 20:56:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768992 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62AB8C5321D for ; Mon, 19 Aug 2024 20:58:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AC0CE10E3F1; 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Mon, 19 Aug 2024 15:57:38 -0500 Received: from localhost.localdomain (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Mon, 19 Aug 2024 15:57:38 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 31/44] drm/amd/display: Enable support for PQ 125 EOTF and Inverse Date: Mon, 19 Aug 2024 16:56:58 -0400 Message-ID: <20240819205714.316380-32-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBF:EE_|DS7PR12MB6216:EE_ X-MS-Office365-Filtering-Correlation-Id: 58947d48-d3a9-4ae8-a0fe-08dcc091904b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:40.2809 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 58947d48-d3a9-4ae8-a0fe-08dcc091904b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBF.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6216 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patchset enables support for the PQ_125 EOTF and its inverse on all existing plane 1D curve colorops, i.e., on DEGAM, SHAPER, and BLND blocks. With this patchset the following IGT subtests are passing: kms_colorop --run plane-XR30-XR30-pq_125_eotf kms_colorop --run plane-XR30-XR30-pq_125_inv_eotf kms_colorop --run plane-XR30-XR30-pq_125_eotf-pq_125_inv_eotf kms_colorop --run plane-XR30-XR30-pq_125_eotf-pq_125_inv_eotf-pq_125_eotf Signed-off-by: Harry Wentland --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 20 +++++++++++++------ .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 8 +++++--- 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 4009895c3b6d..a1299ca83bac 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -25,6 +25,7 @@ #include "amdgpu.h" #include "amdgpu_mode.h" #include "amdgpu_dm.h" +#include "amdgpu_dm_colorop.h" #include "dc.h" #include "modules/color/color_gamma.h" #include "basics/conversion.h" @@ -676,6 +677,9 @@ amdgpu_colorop_tf_to_dc_tf(enum drm_colorop_curve_1d_type tf) case DRM_COLOROP_1D_CURVE_SRGB_EOTF: case DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF: return TRANSFER_FUNCTION_SRGB; + case DRM_COLOROP_1D_CURVE_PQ_125_EOTF: + case DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF: + return TRANSFER_FUNCTION_PQ; default: return TRANSFER_FUNCTION_LINEAR;; } @@ -1158,8 +1162,10 @@ __set_colorop_in_tf_1d_curve(struct dc_plane_state *dc_plane_state, struct drm_colorop *colorop = colorop_state->colorop; struct drm_device *drm = colorop->dev; - if (colorop->type != DRM_COLOROP_1D_CURVE && - colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_EOTF) + if (colorop->type != DRM_COLOROP_1D_CURVE) + return -EINVAL; + + if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_degam_tfs)) return -EINVAL; if (colorop_state->bypass) { @@ -1191,7 +1197,7 @@ __set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state, /* 1st op: 1d curve - degamma */ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { if (new_colorop_state->colorop == old_colorop && - new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_EOTF) { + (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_degam_tfs)) { colorop_state = new_colorop_state; break; } @@ -1213,8 +1219,10 @@ __set_colorop_in_shaper_1d_curve(struct dc_plane_state *dc_plane_state, const struct drm_color_lut *shaper_lut; uint32_t shaper_size; - if (colorop->type != DRM_COLOROP_1D_CURVE && - colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) + if (colorop->type != DRM_COLOROP_1D_CURVE) + return -EINVAL; + + if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_shaper_tfs)) return -EINVAL; if (colorop_state->bypass) { @@ -1250,7 +1258,7 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, /* 2nd op: 1d curve - shaper */ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { if (new_colorop_state->colorop == old_colorop && - new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) { + (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_shaper_tfs)) { colorop_state = new_colorop_state; break; } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index 449a2ad6a184..f99d8e09d89b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -32,10 +32,12 @@ #include "amdgpu_dm_colorop.h" const u64 amdgpu_dm_supported_degam_tfs = - BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF); + BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) | + BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF); - const u64 amdgpu_dm_supported_shaper_tfs = - BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF); +const u64 amdgpu_dm_supported_shaper_tfs = + BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) | + BIT(DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF); const u64 amdgpu_dm_supported_blnd_tfs = BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF); From patchwork Mon Aug 19 20:56:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768998 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10F67C5321D for ; Mon, 19 Aug 2024 20:59:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 65BFE10E3EF; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:40.7184 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b110eb70-def2-4ee9-633a-08dcc091908e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBF.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5957 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The BT.709 and BT.2020 OETFs are the same, the only difference being that the BT.2020 variant is defined with more precision for 10 and 12-bit per color encodings. Both are used as encoding functions for video content, and are therefore defined as OETF (opto-electronic transfer function) instead of as EOTF (electro-optical transfer function). v5: - Add kernel docs Signed-off-by: Harry Wentland --- drivers/gpu/drm/drm_colorop.c | 2 ++ include/drm/drm_colorop.h | 19 +++++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index f9dcc522c94d..032ca65299e5 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -69,6 +69,8 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = { static const char * const colorop_curve_1d_type_names[] = { [DRM_COLOROP_1D_CURVE_SRGB_EOTF] = "sRGB EOTF", [DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF] = "sRGB Inverse EOTF", + [DRM_COLOROP_1D_CURVE_BT2020_INV_OETF] = "BT.2020 Inverse OETF", + [DRM_COLOROP_1D_CURVE_BT2020_OETF] = "BT.2020 OETF", [DRM_COLOROP_1D_CURVE_PQ_125_EOTF] = "PQ 125 EOTF", [DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF] = "PQ 125 Inverse EOTF", }; diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index d953d16c32f7..d8d0e4b571ca 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -54,6 +54,25 @@ enum drm_colorop_curve_1d_type { */ DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF, + /** + * @DRM_COLOROP_1D_CURVE_BT2020_INV_OETF: + * + * The inverse of &DRM_COLOROP_1D_CURVE_BT2020_OETF + */ + DRM_COLOROP_1D_CURVE_BT2020_INV_OETF, + + /** + * @DRM_COLOROP_1D_CURVE_BT2020_OETF: + * + * The BT.2020/BT.709 transfer function. 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:40.7953 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 83aadf72-37b4-4032-2177-08dcc091909a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD6.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5970 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This adds support for the BT.709/BT.2020 transfer functions on all current 1D curve plane colorops, i.e., on DEGAM, SHAPER, and BLND blocks. With this change the following IGT subtests pass: kms_colorop --run plane-XR30-XR30-bt2020_inv_oetf kms_colorop --run plane-XR30-XR30-bt2020_oetf Signed-off-by: Harry Wentland --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 11 ++++++++--- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 10 +++++++--- 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index a1299ca83bac..8f1721bdc243 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -677,6 +677,9 @@ amdgpu_colorop_tf_to_dc_tf(enum drm_colorop_curve_1d_type tf) case DRM_COLOROP_1D_CURVE_SRGB_EOTF: case DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF: return TRANSFER_FUNCTION_SRGB; + case DRM_COLOROP_1D_CURVE_BT2020_INV_OETF: + case DRM_COLOROP_1D_CURVE_BT2020_OETF: + return TRANSFER_FUNCTION_BT709; case DRM_COLOROP_1D_CURVE_PQ_125_EOTF: case DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF: return TRANSFER_FUNCTION_PQ; @@ -1287,8 +1290,10 @@ __set_colorop_1d_curve_blend_tf_lut(struct dc_plane_state *dc_plane_state, const struct drm_color_lut *blend_lut; uint32_t blend_size; - if (colorop->type != DRM_COLOROP_1D_CURVE && - colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_EOTF) + if (colorop->type != DRM_COLOROP_1D_CURVE) + return -EINVAL; + + if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) return -EINVAL; if (colorop_state->bypass) { @@ -1324,7 +1329,7 @@ __set_dm_plane_colorop_blend(struct drm_plane_state *plane_state, /* 3nd op: 1d curve - blend */ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { if (new_colorop_state->colorop == old_colorop && - new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_EOTF) { + (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) { colorop_state = new_colorop_state; break; } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index f99d8e09d89b..bc66bd4f9fdd 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -33,14 +33,18 @@ const u64 amdgpu_dm_supported_degam_tfs = BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) | - BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF); 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Mon, 19 Aug 2024 15:57:40 -0500 From: Harry Wentland To: , CC: , Alex Hung , Harry Wentland Subject: [PATCH v5 34/44] drm/colorop: Add 1D Curve Custom LUT type Date: Mon, 19 Aug 2024 16:57:01 -0400 Message-ID: <20240819205714.316380-35-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBF:EE_|SA0PR12MB4463:EE_ X-MS-Office365-Filtering-Correlation-Id: b5646311-84fc-496e-3800-08dcc09190e4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|1800799024|82310400026|376014; X-Microsoft-Antispam-Message-Info: +6vCZK2+43YcGZS4kenlnPVsY5QO5T2gEFEUuZukWxkQlyZlo/a6JpiSasaWmysHar8RCOQulGkYr37BQNOO53++2E1BmgWk0W3f6yap9K9xCau7FRZ80dyMN5i/8IVjCzXBKf2/08a6ZwECIOE4GfqKzDq/pOKPpGwB5jQqC3VCG0ZSY8oJe119crt899EqlkH11tAJ1LXhO/uOp7GL6ydCY9NuhEplJfE6iyamXZQWy1n3WkksoPG1Vu/gCRuT5k2G/y6XSfgrh7UmiyQ8JBX8pODQre2uPw5dACTpluLaHV1AXH5CA9K6jcP4T3kk5pFjHN/ktaXvLSW0LTSbQEqqeFAqPF0h8+tbCh3f8M5JfR16wkLFlBVc6sCi9ElsxxzWsnJa1wDg2rVnG7AAupQb6AkUlggdAV3gJro/DY80Jb/225cpmcm1DCSFJFP/pyIT4t4IGc8EYXE2mhC6432rVc3x86svZtWQNZ7TfxZeqvcaiR5Rmx+BL6oOdn29rAi81HhozU17fqY9zCjhfEp2XumuAFbVNeFmXQcVaLQPi1TSMuonl+uZl3Op2+/DlgTThmcVuDvfaQ3V/EnAsj70vm+ZlQcGz4dLWZbEJQdv8SzXZyE+3/mwn8p5F1pMonhjF1/V5J9cptnTIZN1aJJ/0+7TfDhM6w412LdeVn2va2vYnXgN2bkylObANG/IEYbo+pxstJQe0bDoz4IgerW4l8DdFrafyDo8L8hYHwUfWIPkDax7pC4082nWYSbfiTbckuVZ52NORoF5x3atY3yPtmn3FctlrdU5rcz7wJff3/6xg4eCuzKRN4j0Vba6y7UisbdG7otecXl4q7cUjpwui0Jxkfct7GdXfq4hxxEWlSQLQaBC78kFDmBbbDtTodFYwZIQtqc+3ARkA6T+UiF1XziJZak1vnNyhBfU60cnUISEUIfrGw4hZApsIKyj/15Qyk0Ddm1lBVXaJqOqX0i1XMqnNDuPOq2ZJJrCE1zApQUKoRO/RkhodrjuzwMA3UPR8UmKiIcZRGy/MpVrTLEps+clU+XFajtSnWAI6oXSw/5NWazgXcdT/bCeiRcf8SbIpaNsWFtAJcW3leeEEJ9rv9g+nozf1eakWx2xV41D4yLJoGoSyTNoGJB1pbRORmMG/qpgA8/zaWvrCRM+PWARsCPK4de+thp3MYA4IaEhsZg3K6qM5nB7HuqEz8/VkC6stxgcKO9i4BwJNlr5qPiMkNpGCpI8gB329ykzeJ344VCD+nMTLmLTtq36ptZIaSz726jbiouokmuth1OCN9dXH2H3IUYr4V0F5lNbZkzlCjaTZHZtMJ/uVMxtPPSLmqnQmV9xocs5+7A4mAsoNhjiAB+AbSHieDz0Cow1Ape5lV2O1BzGOCfe70o1kk838s957WjGf/eVpKWacOZRsU/v5+yR0A2wCcNVd/XunJHQwf3gxpKIwnIMEFVX+LBZ X-Forefront-Antispam-Report: CIP:165.204.84.17; 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But we also have HW that supports custom curves and userspace needs the ability to pass custom curves, aka LUTs. This patch introduces a new colorop type, called DRM_COLOROP_1D_LUT that provides a SIZE property which is used by a driver to advertise the supported SIZE of the LUT, as well as a DATA property which userspace uses to set the LUT. DATA and size function in the same way as current drm_crtc GAMMA and DEGAMMA LUTs. v5: - Add kernel doc - Define SIZE in similar manner to GAMMA_SIZE on drm_crtc (Melissa) Signed-off-by: Alex Hung Signed-off-by: Harry Wentland Co-developed-by: Harry Wentland --- drivers/gpu/drm/drm_atomic.c | 4 +++ drivers/gpu/drm/drm_atomic_uapi.c | 5 ++++ drivers/gpu/drm/drm_colorop.c | 47 +++++++++++++++++++++++++++++-- include/drm/drm_colorop.h | 16 +++++++++++ include/uapi/drm/drm_mode.h | 9 ++++++ 5 files changed, 79 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index c2fcde96e218..10af940de8de 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -796,6 +796,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p, drm_printf(p, "\tcurve_1d_type=%s\n", drm_get_colorop_curve_1d_type_name(state->curve_1d_type)); break; + case DRM_COLOROP_1D_LUT: + drm_printf(p, "\tsize=%d\n", state->size); + drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0); + break; case DRM_COLOROP_CTM_3X4: drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0); break; diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 39805f822d44..5bbce7360262 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -700,6 +700,9 @@ static int drm_atomic_color_set_data_property(struct drm_colorop *colorop, bool replaced = false; switch (colorop->type) { + case DRM_COLOROP_1D_LUT: + size = state->size * sizeof(struct drm_color_lut); + break; case DRM_COLOROP_CTM_3X4: size = sizeof(struct drm_color_ctm_3x4); break; @@ -749,6 +752,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop, *val = state->bypass; } else if (property == colorop->curve_1d_type_property) { *val = state->curve_1d_type; + } else if (property == colorop->size_property) { + *val = state->size; } else if (property == colorop->data_property) { *val = (state->data) ? state->data->base.id : 0; } else { diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 032ca65299e5..e760d3301d48 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -63,6 +63,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = { { DRM_COLOROP_1D_CURVE, "1D Curve" }, + { DRM_COLOROP_1D_LUT, "1D Curve Custom LUT" }, { DRM_COLOROP_CTM_3X4, "3x4 Matrix"} }; @@ -218,12 +219,53 @@ static int drm_colorop_create_data_prop(struct drm_device *dev, struct drm_color colorop->data_property = prop; drm_object_attach_property(&colorop->base, - colorop->data_property, - 0); + colorop->data_property, + 0); return 0; } +/** + * drm_colorop_curve_1d_lut_init - Initialize a DRM_COLOROP_1D_LUT + * + * @dev: DRM device + * @colorop: The drm_colorop object to initialize + * @plane: The associated drm_plane + * @lut_size: LUT size supported by driver + * @return zero on success, -E value on failure + */ +int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *colorop, + struct drm_plane *plane, uint32_t lut_size) +{ + struct drm_property *prop; + int ret; + + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_1D_LUT); + if (ret) + return ret; + + /* initialize 1D LUT only attribute */ + /* LUT size */ + prop = drm_property_create_range(dev, DRM_MODE_PROP_IMMUTABLE, "SIZE", + 0, UINT_MAX); + if (!prop) + return -ENOMEM; + + colorop->size_property = prop; + drm_object_attach_property(&colorop->base, colorop->size_property, lut_size); + + /* data */ + ret = drm_colorop_create_data_prop(dev, colorop); + if (ret) + return ret; + + drm_colorop_reset(colorop); + colorop->state->size = lut_size; + + return 0; +} +EXPORT_SYMBOL(drm_colorop_curve_1d_lut_init); + int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop, struct drm_plane *plane) { @@ -329,6 +371,7 @@ void drm_colorop_reset(struct drm_colorop *colorop) static const char * const colorop_type_name[] = { [DRM_COLOROP_1D_CURVE] = "1D Curve", + [DRM_COLOROP_1D_LUT] = "1D Curve Custom LUT", [DRM_COLOROP_CTM_3X4] = "3x4 Matrix" }; diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index d8d0e4b571ca..6e5da057ef44 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -125,6 +125,13 @@ struct drm_colorop_state { */ enum drm_colorop_curve_1d_type curve_1d_type; + /** + * @size: + * + * Number of entries of the custom LUT. This should be read-only. + */ + uint32_t size; + /** * @data: * @@ -231,6 +238,13 @@ struct drm_colorop { */ struct drm_property *curve_1d_type_property; + /** + * @size_property: + * + * Size property for custom LUT from userspace. + */ + struct drm_property *size_property; + /** * @data_property: * @@ -277,6 +291,8 @@ static inline struct drm_colorop *drm_colorop_find(struct drm_device *dev, int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *colorop, struct drm_plane *plane, u64 supported_tfs); +int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *colorop, + struct drm_plane *plane, uint32_t lut_size); int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop, struct drm_plane *plane); diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index da2be67609c8..83bf461558b5 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -889,6 +889,15 @@ enum drm_colorop_type { */ DRM_COLOROP_1D_CURVE, + /** + * @DRM_COLOROP_1D_LUT: + * + * A simple 1D LUT of uniformly spaced &drm_color_lut entries, + * packed into a blob via the DATA property. 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:42.2016 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 46979ba3-6240-4c97-176c-08dcc0919173 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD6.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6031 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung This patch adds colorops for custom 1D LUTs in the SHAPER and BLND HW blocks. With this change the following IGT tests pass: kms_colorop --run plane-XR30-XR30-srgb_inv_eotf_lut kms_colorop --run plane-XR30-XR30-srgb_inv_eotf_lut-srgb_eotf_lut The color pipeline now consists of the following colorops: 1. 1D curve colorop 2. 1D curve colorop 3. 1D LUT 4. 1D curve colorop 5. 1D LUT The 1D curve colorops support sRGB, BT2020, and PQ scaled to 125.0. Signed-off-by: Alex Hung Signed-off-by: Harry Wentland --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 170 +++++++++--------- .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 30 ++++ 2 files changed, 119 insertions(+), 81 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 8f1721bdc243..c66f249ae70b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -1212,40 +1212,6 @@ __set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state, return __set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state); } -static int -__set_colorop_in_shaper_1d_curve(struct dc_plane_state *dc_plane_state, - struct drm_colorop_state *colorop_state) -{ - struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func; - struct drm_colorop *colorop = colorop_state->colorop; - struct drm_device *drm = colorop->dev; - const struct drm_color_lut *shaper_lut; - uint32_t shaper_size; - - if (colorop->type != DRM_COLOROP_1D_CURVE) - return -EINVAL; - - if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_shaper_tfs)) - return -EINVAL; - - if (colorop_state->bypass) { - tf->type = TF_TYPE_BYPASS; - tf->tf = TRANSFER_FUNCTION_LINEAR; - return 0; - } - - drm_dbg(drm, "Shaper colorop with ID: %d\n", colorop->base.id); - - if (colorop->type == DRM_COLOROP_1D_CURVE) { - tf->type = TF_TYPE_DISTRIBUTED_POINTS; - tf->tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type); - tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE; - return __set_output_tf(tf, shaper_lut, shaper_size, false); - } - - return -EINVAL; -} - static int __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state, @@ -1254,64 +1220,61 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, struct drm_colorop *old_colorop; struct drm_colorop_state *colorop_state = NULL, *new_colorop_state; struct drm_atomic_state *state = plane_state->state; + enum dc_transfer_func_predefined default_tf = TRANSFER_FUNCTION_LINEAR; + struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func; + const struct drm_color_lut *shaper_lut; + struct drm_device *dev = colorop->dev; + uint32_t shaper_size; int i = 0; + /* 1D Curve - SHAPER TF */ old_colorop = colorop; - - /* 2nd op: 1d curve - shaper */ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { if (new_colorop_state->colorop == old_colorop && (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_shaper_tfs)) { colorop_state = new_colorop_state; break; } + } - if (new_colorop_state->colorop == old_colorop) { + if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_CURVE) { + drm_dbg(dev, "Shaper TF colorop with ID: %d\n", colorop->base.id); + tf->type = TF_TYPE_DISTRIBUTED_POINTS; + tf->tf = default_tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type); + tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE; + __set_output_tf(tf, shaper_lut, shaper_size, false); + } + + /* 1D LUT - SHAPER LUT */ + colorop = old_colorop->next; + if (!colorop) { + drm_dbg(dev, "no Shaper LUT colorop found\n"); + return -EINVAL; + } + + old_colorop = colorop; + for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { + if (new_colorop_state->colorop == old_colorop && + new_colorop_state->colorop->type == DRM_COLOROP_1D_LUT) { colorop_state = new_colorop_state; break; } } - if (!colorop_state) - return -EINVAL; - - return __set_colorop_in_shaper_1d_curve(dc_plane_state, colorop_state); -} - - -static int -__set_colorop_1d_curve_blend_tf_lut(struct dc_plane_state *dc_plane_state, - struct drm_colorop_state *colorop_state) -{ - - struct dc_transfer_func *tf = &dc_plane_state->blend_tf; - struct drm_colorop *colorop = colorop_state->colorop; - struct drm_device *drm = colorop->dev; - const struct drm_color_lut *blend_lut; - uint32_t blend_size; - - if (colorop->type != DRM_COLOROP_1D_CURVE) - return -EINVAL; - - if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) - return -EINVAL; - - if (colorop_state->bypass) { - tf->type = TF_TYPE_BYPASS; - tf->tf = TRANSFER_FUNCTION_LINEAR; - return 0; - } - - drm_dbg(drm, "Blend colorop with ID: %d\n", colorop->base.id); - - if (colorop->type == DRM_COLOROP_1D_CURVE) { + if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_LUT) { + drm_dbg(dev, "Shaper LUT colorop with ID: %d\n", colorop->base.id); tf->type = TF_TYPE_DISTRIBUTED_POINTS; - tf->tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type); + tf->tf = default_tf; tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE; - return __set_input_tf(NULL, tf, blend_lut, blend_size); + shaper_lut = __extract_blob_lut(colorop_state->data, &shaper_size); + shaper_size = shaper_lut != NULL ? shaper_size : 0; + + /* Custom LUT size must be the same as supported size */ + if (shaper_size == colorop_state->size) + __set_output_tf(tf, shaper_lut, shaper_size, false); } - return -EINVAL; + return 0; } static int @@ -1322,28 +1285,63 @@ __set_dm_plane_colorop_blend(struct drm_plane_state *plane_state, struct drm_colorop *old_colorop; struct drm_colorop_state *colorop_state = NULL, *new_colorop_state; struct drm_atomic_state *state = plane_state->state; + enum dc_transfer_func_predefined default_tf = TRANSFER_FUNCTION_LINEAR; + struct dc_transfer_func *tf = &dc_plane_state->blend_tf; + const struct drm_color_lut *blend_lut; + struct drm_device *dev = colorop->dev; + uint32_t blend_size; int i = 0; + /* 1D Curve - BLND TF */ old_colorop = colorop; - - /* 3nd op: 1d curve - blend */ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { if (new_colorop_state->colorop == old_colorop && (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) { colorop_state = new_colorop_state; break; } + } - if (new_colorop_state->colorop == old_colorop) { + if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_CURVE && + (BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) { + drm_dbg(dev, "Blend TF colorop with ID: %d\n", colorop->base.id); + tf->type = TF_TYPE_DISTRIBUTED_POINTS; + tf->tf = default_tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type); + tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE; + __set_input_tf(NULL, tf, blend_lut, blend_size); + } + + /* 1D Curve - BLND LUT */ + colorop = old_colorop->next; + if (!colorop) { + drm_dbg(dev, "no Blend LUT colorop found\n"); + return -EINVAL; + } + + old_colorop = colorop; + for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { + if (new_colorop_state->colorop == old_colorop && + new_colorop_state->colorop->type == DRM_COLOROP_1D_LUT) { colorop_state = new_colorop_state; break; } } - if (!colorop_state) - return -EINVAL; + if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_LUT && + (BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) { + drm_dbg(dev, "Blend LUT colorop with ID: %d\n", colorop->base.id); + tf->type = TF_TYPE_DISTRIBUTED_POINTS; + tf->tf = default_tf; + tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE; + blend_lut = __extract_blob_lut(colorop_state->data, &blend_size); + blend_size = blend_lut != NULL ? blend_size : 0; - return __set_colorop_1d_curve_blend_tf_lut(dc_plane_state, colorop_state); + /* Custom LUT size must be the same as supported size */ + if (blend_size == colorop_state->size) + __set_input_tf(NULL, tf, blend_lut, blend_size); + } + + return 0; } static int @@ -1413,7 +1411,7 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, if (ret) return ret; - /* 1D Curve - SHAPER TF */ + /* 1D Curve & LUT - SHAPER TF & LUT */ colorop = colorop->next; if (!colorop) { drm_dbg(dev, "no Shaper TF colorop found\n"); @@ -1424,7 +1422,12 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, if (ret) return ret; - /* 1D Curve - BLND TF */ + /* Shaper LUT colorop is already handled, just skip here */ + colorop = colorop->next; + if (!colorop) + return -EINVAL; + + /* 1D Curve & LUT - BLND TF & LUT */ colorop = colorop->next; if (!colorop) { drm_dbg(dev, "no Blend TF colorop found\n"); @@ -1435,6 +1438,11 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, if (ret) return ret; + /* BLND LUT colorop is already handled, just skip here */ + colorop = colorop->next; + if (!colorop) + return -EINVAL; + return 0; } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index bc66bd4f9fdd..08480bf61dc5 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -29,6 +29,7 @@ #include #include +#include "amdgpu.h" #include "amdgpu_dm_colorop.h" const u64 amdgpu_dm_supported_degam_tfs = @@ -83,6 +84,21 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr prev_op = op; + /* 1D LUT - SHAPER LUT */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_curve_1d_lut_init(dev, op, plane, MAX_COLOR_LUT_ENTRIES); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, op); + + prev_op = op; + /* 1D curve - BLND TF */ op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); if (!op) { @@ -96,5 +112,19 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr drm_colorop_set_next_property(prev_op, op); + prev_op = op; + + /* 1D LUT - BLND LUT */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_curve_1d_lut_init(dev, op, plane, MAX_COLOR_LUT_ENTRIES); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, op); return 0; } \ No newline at end of file From patchwork Mon Aug 19 20:57:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13769007 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BF6DAC3DA4A for ; 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Mon, 19 Aug 2024 15:57:41 -0500 From: Harry Wentland To: , CC: , Alex Hung , Harry Wentland Subject: [PATCH v5 36/44] drm/amd/display: add 3x4 matrix colorop Date: Mon, 19 Aug 2024 16:57:03 -0400 Message-ID: <20240819205714.316380-37-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FC0:EE_|DM6PR12MB4172:EE_ X-MS-Office365-Filtering-Correlation-Id: bf5acbe2-2b9f-4640-b4ce-08dcc09191c6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|36860700013|1800799024|376014; X-Microsoft-Antispam-Message-Info: zpFjHOffUil0GEjn7m2VnrLQwPFEvMw7QUQ/xQ1mam1eBxbPpFz3SMhuhcOJYQ9h3oMW82NCeAInjdqP2RQztIWXeuQ9XHSlxkrl7ZNfucdh76GJKwGpp0c5yaKhg0H/d1KWGGww/gH4GT/jUSzgswKfF9x1bxjmyIcJyDwNoQAb6OTfBXgAF9Zls5IgWOFbAtkc7FtUBc6LKTnRijY8EzjIUto12PfJmVKH4+WQZp8R+FiXkxOb+t3Y7T/Zj7gfn4gvdp3zj2c91Kfkc4JpNbfTB0WkB+nVcLBjy2YnRcHQ3CcWs/Ddm69KUDnwCKa2z8kvRDQtgLhRrMZ1rnyJR0zzUk8KupPKEPp9Hzwgz2ftYL9HAw9KwBxD+/NBOQYn0US4XwstklC+YrvU0S+Hf147C6nIsNolXp7ty8qSZgNX752UIb1t6eMSYYeigHbv6bsF1/hdL2ojOuwh9QXd+yaaMhErFnB6/35ukgXQv9PtM0/IVvIYCJnKRmmgiglDz6WUAc5ae1J6aVSejTIYPyuMl4T3HI3Lz5grna5DoZMuhvwGAeDOZb5taJSkKK+9JrBkvEjVfMgyqYCDFNenJJUt14bWbgO0H7mMlHDoRJwv/C7JE0VlSREOUG7RizCTytf1WNgQalBUJs0Kq28HMrnO1KdpBZ7prRA6Mqwnbx8OO/R2xO7GIQrSRo4Jz+LWAWsca7cqzhlaazLSloWd5m8ueWURTOB6ysVjglYCnAoNRV/5Wk7GzH64/XOB07BTS+QBGdk/42xKabtQDe5ZO3Cke6Z0O5XOD+zRNn3Z9trDRCfgQbWPTqq67r55SecxpOUpsElUDoBzP2DKHBfAFFJKb0jM324YM+3J9aojpR54YRjcT7vzUgs5rRNWpgfkRNuxyKZZp468RfckumesOiROpWHsohyFxwyjgK7KgiAWkFpgDgLdYRYJstirM/vW+JygkIqY2ccHBaLn6MnfpaigcubTqVzJtjaQk6cY+CPHo/2Jl/1EXN/Ot6woNrAiRyhcHvlDr7uiKTNFa7c8IFMGzE0NKHl7FkSvReyHqZsfY3RvqQ1tkgyeUP8wTZNjlhvGIL5DYP5ATeGseoVZbIB3fSc/NDCU/4xbkMVKAYz4oEf2EOVSmGsO3n4Hav/7lNUYj4jXUyCASTV+wZ330JPviGluPP8fIFAjyKVMflm6GTGGDrEolaVmSUg0sFXVv7WmdbCU0FeBPk8gaWTcwDUcb2GUTLOQUsNLPgjaJrUs3A3ctL0fvWE9CYNZ43UZvAasHDER/y6l8tKeLXwBn+8oO1SJ5HEwJSdccQ24FZFLzFFWe8CS5vee3gDPMTFAtzUu96AaPBFVdYFllQ7iKNMUvXJ/YtVo68T0zzdiVWHIdmYGSTtEF4NAEseHyHg5QRdK1yqq5i7/Ay+8Bibiqlc99eGCAuVvoDDlQYsAekfCauV6bGJSPL+tDLFWEYYF X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(36860700013)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:42.7652 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bf5acbe2-2b9f-4640-b4ce-08dcc09191c6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FC0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4172 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung This adds support for a 3x4 color transformation matrix. With this change the following IGT tests pass: kms_colorop --run plane-XR30-XR30-ctm_3x4_50_desat kms_colorop --run plane-XR30-XR30-ctm_3x4_overdrive kms_colorop --run plane-XR30-XR30-ctm_3x4_oversaturate kms_colorop --run plane-XR30-XR30-ctm_3x4_bt709_enc kms_colorop --run plane-XR30-XR30-ctm_3x4_bt709_dec The color pipeline now consists of the following colorops: 1. 1D curve colorop 2. 3x4 CTM 3. 1D curve colorop 4. 1D LUT 5. 1D curve colorop 6. 1D LUT Signed-off-by: Alex Hung Signed-off-by: Harry Wentland --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 50 +++++++++++++++++++ .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 15 ++++++ 2 files changed, 65 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index c66f249ae70b..ea9bd287cddd 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -1212,6 +1212,45 @@ __set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state, return __set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state); } +static int +__set_dm_plane_colorop_3x4_matrix(struct drm_plane_state *plane_state, + struct dc_plane_state *dc_plane_state, + struct drm_colorop *colorop) +{ + struct drm_colorop *old_colorop; + struct drm_colorop_state *colorop_state = NULL, *new_colorop_state; + struct drm_atomic_state *state = plane_state->state; + const struct drm_device *dev = colorop->dev; + const struct drm_property_blob *blob; + struct drm_color_ctm_3x4 *ctm = NULL; + int i = 0; + + /* 3x4 matrix */ + old_colorop = colorop; + for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { + if (new_colorop_state->colorop == old_colorop && + new_colorop_state->colorop->type == DRM_COLOROP_CTM_3X4) { + colorop_state = new_colorop_state; + break; + } + } + + if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_CTM_3X4) { + drm_dbg(dev, "3x4 matrix colorop with ID: %d\n", colorop->base.id); + blob = colorop_state->data; + if (blob->length == sizeof(struct drm_color_ctm_3x4)) { + ctm = blob ? (struct drm_color_ctm_3x4 *) blob->data : NULL; + __drm_ctm_3x4_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix); + dc_plane_state->gamut_remap_matrix.enable_remap = true; + dc_plane_state->input_csc_color_matrix.enable_adjustment = false; + } else + drm_warn(dev, "blob->length (%ld) isn't equal to drm_color_ctm_3x4 (%ld)\n", + blob->length, sizeof(struct drm_color_ctm_3x4)); + } + + return 0; +} + static int __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state, @@ -1411,6 +1450,17 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, if (ret) return ret; + /* 3x4 matrix */ + colorop = colorop->next; + if (!colorop) { + drm_dbg(dev, "no 3x4 matrix colorop found\n"); + return -EINVAL; + } + + ret = __set_dm_plane_colorop_3x4_matrix(plane_state, dc_plane_state, colorop); + if (ret) + return ret; + /* 1D Curve & LUT - SHAPER TF & LUT */ colorop = colorop->next; if (!colorop) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index 08480bf61dc5..ba42f1f6b620 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -69,6 +69,21 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr prev_op = op; + /* 3x4 matrix */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_ctm_3x4_init(dev, op, plane); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, op); + + prev_op = op; + /* 1D curve - SHAPER TF */ op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); if (!op) { From patchwork Mon Aug 19 20:57:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13769002 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 53632C5320E for ; Mon, 19 Aug 2024 20:59:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B9BC410E42F; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:43.4360 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5a2fa0bc-9983-442d-0f25-08dcc091922d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD6.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6165 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung This introduces a new drm_colorop_type: DRM_COLOROP_MULTIPLIER. It's a simple multiplier to all pixel values. The value is specified via a S31.32 fixed point provided via the "MULTIPLIER" property. v5: - Fix atomic state print - Add kernel doc Signed-off-by: Alex Hung --- drivers/gpu/drm/drm_atomic.c | 3 +++ drivers/gpu/drm/drm_atomic_uapi.c | 4 ++++ drivers/gpu/drm/drm_colorop.c | 37 +++++++++++++++++++++++++++++-- include/drm/drm_colorop.h | 16 +++++++++++++ include/uapi/drm/drm_mode.h | 9 ++++++++ 5 files changed, 67 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index 10af940de8de..2ab797e9d946 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -803,6 +803,9 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p, case DRM_COLOROP_CTM_3X4: drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0); break; + case DRM_COLOROP_MULTIPLIER: + drm_printf(p, "\tmultiplier=%llu\n", state->multiplier); + break; default: break; } diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 5bbce7360262..142824de33ca 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -727,6 +727,8 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop, state->bypass = val; } else if (property == colorop->curve_1d_type_property) { state->curve_1d_type = val; + } else if (property == colorop->multiplier_property) { + state->multiplier = val; } else if (property == colorop->data_property) { return drm_atomic_color_set_data_property(colorop, state, property, val); @@ -752,6 +754,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop, *val = state->bypass; } else if (property == colorop->curve_1d_type_property) { *val = state->curve_1d_type; + } else if (property == colorop->multiplier_property) { + *val = state->multiplier; } else if (property == colorop->size_property) { *val = state->size; } else if (property == colorop->data_property) { diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index e760d3301d48..9634effab73a 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -64,7 +64,8 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = { { DRM_COLOROP_1D_CURVE, "1D Curve" }, { DRM_COLOROP_1D_LUT, "1D Curve Custom LUT" }, - { DRM_COLOROP_CTM_3X4, "3x4 Matrix"} + { DRM_COLOROP_CTM_3X4, "3x4 Matrix"}, + { DRM_COLOROP_MULTIPLIER, "Multiplier"}, }; static const char * const colorop_curve_1d_type_names[] = { @@ -285,6 +286,37 @@ int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop } EXPORT_SYMBOL(drm_colorop_ctm_3x4_init); +/** + * drm_colorop_mult_init - Initialize a DRM_COLOROP_MULTIPLIER + * + * @dev: DRM device + * @colorop: The drm_colorop object to initialize + * @plane: The associated drm_plane + * @return zero on success, -E value on failure + */ +int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop, + struct drm_plane *plane) +{ + struct drm_property *prop; + int ret; + + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_MULTIPLIER); + if (ret) + return ret; + + prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC, "MULTIPLIER", 0, U64_MAX); + if (!prop) + return -ENOMEM; + + colorop->multiplier_property = prop; + drm_object_attach_property(&colorop->base, colorop->multiplier_property, 0); + + drm_colorop_reset(colorop); + + return 0; +} +EXPORT_SYMBOL(drm_colorop_mult_init); + static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop, struct drm_colorop_state *state) { @@ -372,7 +404,8 @@ void drm_colorop_reset(struct drm_colorop *colorop) static const char * const colorop_type_name[] = { [DRM_COLOROP_1D_CURVE] = "1D Curve", [DRM_COLOROP_1D_LUT] = "1D Curve Custom LUT", - [DRM_COLOROP_CTM_3X4] = "3x4 Matrix" + [DRM_COLOROP_CTM_3X4] = "3x4 Matrix", + [DRM_COLOROP_MULTIPLIER] = "Multiplier", }; const char *drm_get_colorop_type_name(enum drm_colorop_type type) diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index 6e5da057ef44..09e96b9a8eff 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -125,6 +125,13 @@ struct drm_colorop_state { */ enum drm_colorop_curve_1d_type curve_1d_type; + /** + * @multiplier: + * + * Multiplier to 'gain' the plane. Format is S31.32 sign-magnitude. + */ + uint64_t multiplier; + /** * @size: * @@ -238,6 +245,13 @@ struct drm_colorop { */ struct drm_property *curve_1d_type_property; + /** + * @multiplier_property: + * + * Multiplier property for plane gain + */ + struct drm_property *multiplier_property; + /** * @size_property: * @@ -295,6 +309,8 @@ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *co struct drm_plane *plane, uint32_t lut_size); int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop, struct drm_plane *plane); +int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop, + struct drm_plane *plane); struct drm_colorop_state * drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop); diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index 83bf461558b5..8e9886200f4d 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -905,6 +905,15 @@ enum drm_colorop_type { * &drm_color_ctm_3x4 struct provided via the DATA property. */ DRM_COLOROP_CTM_3X4, + + /** + * @DRM_COLOROP_MULTIPLIER: + * + * A simple multiplier, applied to all color values. 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:43.9605 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2241e0e7-b803-48a1-18f5-08dcc091927d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBA.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9429 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung This adds support for a multiplier. This multiplier is programmed via the HDR Multiplier in DCN. With this change the following IGT tests pass: kms_colorop --run plane-XR30-XR30-multiply_125 kms_colorop --run plane-XR30-XR30-multiply_inv_125 The color pipeline now consists of the following colorops: 1. 1D curve colorop 2. 3x4 CTM 3. Multiplier 4. 1D curve colorop 5. 1D LUT 6. 1D curve colorop 7. 1D LUT Signed-off-by: Alex Hung --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 40 +++++++++++++++++++ .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 15 +++++++ 2 files changed, 55 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index ea9bd287cddd..a14dc67dbbdf 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -1251,6 +1251,35 @@ __set_dm_plane_colorop_3x4_matrix(struct drm_plane_state *plane_state, return 0; } +static int +__set_dm_plane_colorop_multiplier(struct drm_plane_state *plane_state, + struct dc_plane_state *dc_plane_state, + struct drm_colorop *colorop) +{ + struct drm_colorop *old_colorop; + struct drm_colorop_state *colorop_state = NULL, *new_colorop_state; + struct drm_atomic_state *state = plane_state->state; + const struct drm_device *dev = colorop->dev; + int i = 0; + + /* Multiplier */ + old_colorop = colorop; + for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { + if (new_colorop_state->colorop == old_colorop && + new_colorop_state->colorop->type == DRM_COLOROP_MULTIPLIER) { + colorop_state = new_colorop_state; + break; + } + } + + if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_MULTIPLIER) { + drm_dbg(dev, "Multiplier colorop with ID: %d\n", colorop->base.id); + dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(colorop_state->multiplier); + } + + return 0; +} + static int __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state, @@ -1461,6 +1490,17 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, if (ret) return ret; + /* Multiplier */ + colorop = colorop->next; + if (!colorop) { + drm_dbg(dev, "no multiplier colorop found\n"); + return -EINVAL; + } + + ret = __set_dm_plane_colorop_multiplier(plane_state, dc_plane_state, colorop); + if (ret) + return ret; + /* 1D Curve & LUT - SHAPER TF & LUT */ colorop = colorop->next; if (!colorop) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index ba42f1f6b620..b739d6cb3e6b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -84,6 +84,21 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr prev_op = op; + /* Multiplier */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_mult_init(dev, op, plane); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, op); + + prev_op = op; + /* 1D curve - SHAPER TF */ op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); if (!op) { From patchwork Mon Aug 19 20:57:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13769000 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A9996C5321D for ; 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Mon, 19 Aug 2024 15:57:43 -0500 From: Harry Wentland To: , CC: , Alex Hung Subject: [PATCH v5 39/44] drm/amd/display: Swap matrix and multiplier Date: Mon, 19 Aug 2024 16:57:06 -0400 Message-ID: <20240819205714.316380-40-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBA:EE_|PH7PR12MB7211:EE_ X-MS-Office365-Filtering-Correlation-Id: 0058158f-2bfa-44c0-afdd-08dcc0919315 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|376014|36860700013; X-Microsoft-Antispam-Message-Info: DvZ7hfruCXp2E0FCme9LG4lsWtw8kyC+Cbq2w0UnVDMjrN9WbfVg3MtTW3MWHBGQK+nfrGfCJ/Uy5iEsMHbQSDFqXITSqlniZo5ct4XmBnieyv9Bg2idZ6necdNWd9y+7v4G6wlKP4PVxAr3H/qpZU/LmHywBAVNR+N2Kf5fZWF7WD72yqbqUFwedKd2rfsnU/MEVd0Y7dIC4BYDe1d8Y5r5oZbv1PNinECmMFcGD4FcImhZ+FoYlnSkwxtmqokFuJn3rc1AbJDgdSSOyDgCk6ALV+/pqBONzNLnNZ6WZHzZM3fDYLOuhAUxYkxri523ZujnQWomWttt2lIhbOgczLte158ac60WxJ3FGSLSL4hmF9gk2XDmaTuTcglHK/CJcBtPr94tYcVuCchKI5nelsT4ediNlOwZWreERPM1t4FQUzHWl+SEcy17MmTy5IMg9rK1rD6fWjIh7lDllNpjnuj/fYqFqJYzkcWntbYeAjyYc1IJ8Sn1WVj0H8b081WpxC0hmgomen1+/1/ktjVIKAp/rWMuxTQ03vltQi9Tunk2RlUMYpwoBnK0HlkGkvyBi+nGZkVuzTKd2g2pQc7NxXAFrikomB6egE96n7EP9eD0E41iLvcOzlpP6gzrIA1Y3MS/WiQvcH2eTN6lIL6IXED7/Q/th5ygPsEID2Ea5HIDzocODefwf6NxIaVf8xvvCktNHdGGoV4eUtXGpSjPP1fokRlJMXwTULrEMSOq0I2o51F5YdhFW6BPXJHayrEbhHnYo23y2LfGYq78RiKosQ3HT/AWutQXOyTLYj6deZnuVHjDpJZ0XVptGHEhu1hC4QvUAZWT853fbS3ju59o/pL1E/kngQZr8iN98mc2FNNCnmCac5d11mP+/vloQ9CFTfcomS6QnRWJrNpXO3BP2AnvR3wcZN7YmrM0/rJaPNlAUl/wGgkHKmbpeOfUbs7EaSW9JTOsqqoxJy705k94G1e4ibndjpLll+yLoyXB7vaJcsCvdISFbFQ2oivZo0SQ1pmIHUGSSROlT6pMNGZuCpot4wCMWI/zLIoVRlmuzNyuQvp6ybM8a2MndXilQCHADnN380W9ng6qgbezrLWJVR/tY7uC9uT/hhqew7aChjHQpy55R38LXWvB2dhb808hT97kivOiozSBtS2o8YGoOCXUKS5yJWUuD4qZsdfrk0XkZBq88bVMyiGIaoQziqi9wwNH9PHhtig0YghD30VTueuSluy/+XJfH+Pw3pE7dCS/j1fNNpQMHqRG9m1SMArshwT0mYoBrnZLX4TGa9kBFRi1idqKLi1X/rmpVwtMg8+L1UvSoVuej9OsHLK3yto1Lrvb/iS32VhmwJMu7U4MgajEv2Na8VeLmI1R4NaeQ/Ku4XL1fnhlTwxhS2/9zjGYSDmyTxr4t3DUN4VGis9I6q9H6gOrzd+lqBl/Kh5DFYZrzUaxT+2tJbxLyo0q6OXx X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:44.9605 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0058158f-2bfa-44c0-afdd-08dcc0919315 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBA.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7211 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung Swap the order of matrix and multiplier as designed in hardware. Signed-off-by: Alex Hung --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 22 +++++++------- .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 30 +++++++++---------- 2 files changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index a14dc67dbbdf..2f0b06fb5f81 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -1479,17 +1479,6 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, if (ret) return ret; - /* 3x4 matrix */ - colorop = colorop->next; - if (!colorop) { - drm_dbg(dev, "no 3x4 matrix colorop found\n"); - return -EINVAL; - } - - ret = __set_dm_plane_colorop_3x4_matrix(plane_state, dc_plane_state, colorop); - if (ret) - return ret; - /* Multiplier */ colorop = colorop->next; if (!colorop) { @@ -1501,6 +1490,17 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, if (ret) return ret; + /* 3x4 matrix */ + colorop = colorop->next; + if (!colorop) { + drm_dbg(dev, "no 3x4 matrix colorop found\n"); + return -EINVAL; + } + + ret = __set_dm_plane_colorop_3x4_matrix(plane_state, dc_plane_state, colorop); + if (ret) + return ret; + /* 1D Curve & LUT - SHAPER TF & LUT */ colorop = colorop->next; if (!colorop) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index b739d6cb3e6b..8a86849e1529 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -69,21 +69,6 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr prev_op = op; - /* 3x4 matrix */ - op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); - if (!op) { - DRM_ERROR("KMS: Failed to allocate colorop\n"); - return -ENOMEM; - } - - ret = drm_colorop_ctm_3x4_init(dev, op, plane); - if (ret) - return ret; - - drm_colorop_set_next_property(prev_op, op); - - prev_op = op; - /* Multiplier */ op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); if (!op) { @@ -99,6 +84,21 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr prev_op = op; + /* 3x4 matrix */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_ctm_3x4_init(dev, op, plane); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, op); + + prev_op = op; + /* 1D curve - SHAPER TF */ op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); if (!op) { From patchwork Mon Aug 19 20:57:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13769001 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3C079C54722 for ; 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Mon, 19 Aug 2024 15:57:44 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 40/44] drm/colorop: Define LUT_1D interpolation Date: Mon, 19 Aug 2024 16:57:07 -0400 Message-ID: <20240819205714.316380-41-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD5:EE_|PH7PR12MB5806:EE_ X-MS-Office365-Filtering-Correlation-Id: e8819b01-d485-4b9d-a6ec-08dcc09193e0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|376014|36860700013; X-Microsoft-Antispam-Message-Info: V+nCeEFB/9eflWhlUsoXuedHIDKhK/gD7LHPng3OhwDQ3l82JUHrtfCcCs615Y+YTnN1Bqwv+gdGHEAWSSnSqMqPWVTaAx4zidB0lQ97ODfBmw4Fdc5wQwNgjsn+6owxszJdUOu6lsrva+hp9ujUQAE472h6RcUeppLebmIQqfx3cc6Td4Ib+x5naxtL0Fn5pgRr95eUmbJvwlUDvBryTpmInuFxdHPW3mR4cvaALnYIv3EAU4p+t8zqN+w6mYUnSNQhDrJhrq8WcX3t+A905CDgukG/Bh/+YasZE36YCaiTAhzG+ufuwNFQmm/inqPAZY0xs9502JEZt1zaODP2/2gA2e57yyalXw40SoseY561VINNFDubx90F/E3xUEAnfFfxDisQ2/ai1B8TkPO+IoV5C8q4NPBlofJQ8tGGfRa1pKa8cCWPDdigkWiEHPVCJEtz9IKAfh0Alx+mKTThCJXWtzjt/kg0zf9tTMUdNTVxMycm2Lq3/8TtlXJMjDJy4qznFqJcANrcDsiw6piwSybMCT6epyuNV9cD4S/099KaKJjafdVnGhklJrRUcHju7I2K8TgAtYr92fNHtRUfv2FPCeS9T2S4JKHKdv+dGEVXmwPUSMZEhK4R1ufd3Iq2x4609pMjMtRC5QeSDBo/We8QcMvT3YPing+m0XeG+4nd1PLubFdffKOo/rVXaUMxAVPGuJnP1J3dfKwFJwm5LLULO9f+FczpcbQGYbL9ZcD/yRS3aczyB78b/4BgVcY62U3ETRp0LGS0CHI9cPplw33UJjNYnDsOKqMebfEPsXv2dyZEdcxGbRwrrV8OEjaHU+gURAyjmOzW0WofWKv3sJ6h9pvtvrrtbjjV2CpQ3XuUDoOAdx3CTF5xpnuSP0XH/zTzCIMHeSibivTF8C3MjxbceLOaujcQRE2hzT4stYap+1ufAuPS2wwkY5gLeHl3OAWCXhKOqKBCCKKOWI57PFOVnDxTqcNFz7O9dqVFn/uSLWB/ncpubVsulgmvHqF8QryoS85ciSc4dAVElkF2+DnUwizqvhFI3lol+btIfRohC1IU5EySCtjTN1mV5ryt64JDcZIM+oTZCMOq3Qo0vRzf8fQGuU6E1cMa1+498hn+n3GHZ28aJXjQ+P+uaS9AQv2Gwl/roUxbVzQx7j2shZUXKDVho2eyNVmdSJqu87C/YSbd+wA3zOALQoSqAD7CZqLu+BZx2bLzgrK9vDpw69kBJURcmG/iEgaRetBwj6v8C87cu6gpG+CdosnHbwJA+tptRbZqRafJgDnzTqdMjcLe7Z6RUcKLu5x4ZbCSR+1GXu6kRSxvT4uqq26uWFqPexN7z9y4vvt8bt+ZHBc2Qxyy3DbW3IuyICjv8chaXRzP6tnDYAcSLJTHrDXJKerBxqg9XIXpaiw80ysoQOXbmG5HaO8e6cvlhdc4y6C95IuJkPhLeCE7lNppIGywm281 X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:46.2751 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e8819b01-d485-4b9d-a6ec-08dcc09193e0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5806 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We want to make sure userspace is aware of the 1D LUT interpolation. While linear interpolation is common it might not be supported on all HW. Give driver implementers a way to specify their interpolation. Signed-off-by: Harry Wentland --- .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 6 ++-- drivers/gpu/drm/drm_atomic.c | 1 + drivers/gpu/drm/drm_colorop.c | 36 ++++++++++++++++++- include/drm/drm_colorop.h | 19 +++++++++- include/uapi/drm/drm_mode.h | 13 +++++++ 5 files changed, 71 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index 8a86849e1529..c85e344eaccb 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -121,7 +121,8 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr return -ENOMEM; } - ret = drm_colorop_curve_1d_lut_init(dev, op, plane, MAX_COLOR_LUT_ENTRIES); + ret = drm_colorop_curve_1d_lut_init(dev, op, plane, MAX_COLOR_LUT_ENTRIES, + DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR); if (ret) return ret; @@ -151,7 +152,8 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr return -ENOMEM; } - ret = drm_colorop_curve_1d_lut_init(dev, op, plane, MAX_COLOR_LUT_ENTRIES); + ret = drm_colorop_curve_1d_lut_init(dev, op, plane, MAX_COLOR_LUT_ENTRIES, + DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR); if (ret) return ret; diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index 2ab797e9d946..dbb8776ae433 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -798,6 +798,7 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p, break; case DRM_COLOROP_1D_LUT: drm_printf(p, "\tsize=%d\n", state->size); + drm_printf(p, "\tinterpolation=%s\n", drm_get_colorop_lut1d_interpolation_name(colorop->lut1d_interpolation)); drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0); break; case DRM_COLOROP_CTM_3X4: diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 9634effab73a..47a9877099c3 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -77,6 +77,9 @@ static const char * const colorop_curve_1d_type_names[] = { [DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF] = "PQ 125 Inverse EOTF", }; +static const struct drm_prop_enum_list drm_colorop_lut1d_interpolation_list[] = { + { DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR, "Linear" }, +}; /* Init Helpers */ @@ -233,10 +236,12 @@ static int drm_colorop_create_data_prop(struct drm_device *dev, struct drm_color * @colorop: The drm_colorop object to initialize * @plane: The associated drm_plane * @lut_size: LUT size supported by driver + * @lut1d_interpolation: 1D LUT interpolation type * @return zero on success, -E value on failure */ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *colorop, - struct drm_plane *plane, uint32_t lut_size) + struct drm_plane *plane, uint32_t lut_size, + enum drm_colorop_lut1d_interpolation_type lut1d_interpolation) { struct drm_property *prop; int ret; @@ -255,6 +260,17 @@ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *co colorop->size_property = prop; drm_object_attach_property(&colorop->base, colorop->size_property, lut_size); + /* Interpolation */ + prop = drm_property_create_enum(dev, DRM_MODE_PROP_IMMUTABLE, "LUT1D_INTERPOLATION", + drm_colorop_lut1d_interpolation_list, + ARRAY_SIZE(drm_colorop_lut1d_interpolation_list)); + if (!prop) + return -ENOMEM; + + colorop->lut1d_interpolation_property = prop; + drm_object_attach_property(&colorop->base, prop, lut1d_interpolation); + colorop->lut1d_interpolation = lut1d_interpolation; + /* data */ ret = drm_colorop_create_data_prop(dev, colorop); if (ret) @@ -407,6 +423,9 @@ static const char * const colorop_type_name[] = { [DRM_COLOROP_CTM_3X4] = "3x4 Matrix", [DRM_COLOROP_MULTIPLIER] = "Multiplier", }; +static const char * const colorop_lut1d_interpolation_name[] = { + [DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR] = "Linear", +}; const char *drm_get_colorop_type_name(enum drm_colorop_type type) { @@ -424,6 +443,21 @@ const char *drm_get_colorop_curve_1d_type_name(enum drm_colorop_curve_1d_type ty return colorop_curve_1d_type_names[type]; } +/** + * drm_get_colorop_lut1d_interpolation_name: return a string for interpolation type + * @type: interpolation type to compute name of + * + * In contrast to the other drm_get_*_name functions this one here returns a + * const pointer and hence is threadsafe. + */ +const char *drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_type type) +{ + if (WARN_ON(type >= ARRAY_SIZE(colorop_lut1d_interpolation_name))) + return "unknown"; + + return colorop_lut1d_interpolation_name[type]; +} + /** * drm_colorop_set_next_property - sets the next pointer * @colorop: drm colorop diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index 09e96b9a8eff..1304b19c96b5 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -238,6 +238,21 @@ struct drm_colorop { */ struct drm_property *bypass_property; + /** + * @lut1d_interpolation: + * + * Read-only + * Interpolation for DRM_COLOROP_1D_LUT + */ + enum drm_colorop_lut1d_interpolation_type lut1d_interpolation; + + /** + * @lut1d_interpolation_property: + * + * Read-only property for DRM_COLOROP_1D_LUT interpolation + */ + struct drm_property *lut1d_interpolation_property; + /** * @curve_1d_type_property: * @@ -306,7 +321,8 @@ static inline struct drm_colorop *drm_colorop_find(struct drm_device *dev, int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *colorop, struct drm_plane *plane, u64 supported_tfs); int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *colorop, - struct drm_plane *plane, uint32_t lut_size); + struct drm_plane *plane, uint32_t lut_size, + enum drm_colorop_lut1d_interpolation_type lut1d_interpolation); int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop, struct drm_plane *plane); int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop, @@ -360,6 +376,7 @@ const char *drm_get_colorop_type_name(enum drm_colorop_type type); * const pointer and hence is threadsafe. */ const char *drm_get_colorop_curve_1d_type_name(enum drm_colorop_curve_1d_type type); +const char *drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_type type); void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next); diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index 8e9886200f4d..b64f9515bd0a 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -916,6 +916,19 @@ enum drm_colorop_type { DRM_COLOROP_MULTIPLIER, }; +/** + * enum drm_colorop_lut1d_interpolation_type - type of interpolation for 1D LUTs + */ +enum drm_colorop_lut1d_interpolation_type { + /** + * @DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR: + * + * Linear interpolation. Values between points of the LUT will be + * linearly interpolated. + */ + DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR, +}; + /** * struct drm_plane_size_hint - Plane size hints * From patchwork Mon Aug 19 20:57:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13769009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 851ABC3DA4A for ; Mon, 19 Aug 2024 20:59:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 898A210E45E; Mon, 19 Aug 2024 20:58:03 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:45.9918 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 57a35e8a-6444-4f1e-6d83-08dcc09193b5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBA.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5982 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Not all HW will be able to do bypass on all color operations. Introduce an 'allow_bypass' boolean for all colorop init functions and only create the BYPASS property when it's true. Signed-off-by: Harry Wentland --- .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 22 +++++--- drivers/gpu/drm/drm_atomic.c | 3 +- drivers/gpu/drm/drm_colorop.c | 51 ++++++++++++------- drivers/gpu/drm/vkms/vkms_colorop.c | 8 +-- include/drm/drm_colorop.h | 10 ++-- 5 files changed, 60 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index c85e344eaccb..05fdec7c28ad 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -60,7 +60,9 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr return -ENOMEM; } - ret = drm_colorop_curve_1d_init(dev, op, plane, amdgpu_dm_supported_degam_tfs); + ret = drm_colorop_curve_1d_init(dev, op, plane, + amdgpu_dm_supported_degam_tfs, + true); if (ret) return ret; @@ -76,7 +78,7 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr return -ENOMEM; } - ret = drm_colorop_mult_init(dev, op, plane); + ret = drm_colorop_mult_init(dev, op, plane, true); if (ret) return ret; @@ -91,7 +93,7 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr return -ENOMEM; } - ret = drm_colorop_ctm_3x4_init(dev, op, plane); + ret = drm_colorop_ctm_3x4_init(dev, op, plane, true); if (ret) return ret; @@ -106,7 +108,9 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr return -ENOMEM; } - ret = drm_colorop_curve_1d_init(dev, op, plane, amdgpu_dm_supported_shaper_tfs); + ret = drm_colorop_curve_1d_init(dev, op, plane, + amdgpu_dm_supported_shaper_tfs, + true); if (ret) return ret; @@ -122,7 +126,8 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr } ret = drm_colorop_curve_1d_lut_init(dev, op, plane, MAX_COLOR_LUT_ENTRIES, - DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR); + DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR, + true); if (ret) return ret; @@ -137,7 +142,9 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr return -ENOMEM; } - ret = drm_colorop_curve_1d_init(dev, op, plane, amdgpu_dm_supported_blnd_tfs); + ret = drm_colorop_curve_1d_init(dev, op, plane, + amdgpu_dm_supported_blnd_tfs, + true); if (ret) return ret; @@ -153,7 +160,8 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr } ret = drm_colorop_curve_1d_lut_init(dev, op, plane, MAX_COLOR_LUT_ENTRIES, - DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR); + DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR, + true); if (ret) return ret; diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index dbb8776ae433..02ff576aa7a9 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -789,7 +789,8 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p, drm_printf(p, "colorop[%u]:\n", colorop->base.id); drm_printf(p, "\ttype=%s\n", drm_get_colorop_type_name(colorop->type)); - drm_printf(p, "\tbypass=%u\n", state->bypass); + if (colorop->bypass_property) + drm_printf(p, "\tbypass=%u\n", state->bypass); switch (colorop->type) { case DRM_COLOROP_1D_CURVE: diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 47a9877099c3..2b7526c9608e 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -84,7 +84,8 @@ static const struct drm_prop_enum_list drm_colorop_lut1d_interpolation_list[] = /* Init Helpers */ static int drm_colorop_init(struct drm_device *dev, struct drm_colorop *colorop, - struct drm_plane *plane, enum drm_colorop_type type) + struct drm_plane *plane, enum drm_colorop_type type, + bool allow_bypass) { struct drm_mode_config *config = &dev->mode_config; struct drm_property *prop; @@ -120,16 +121,18 @@ static int drm_colorop_init(struct drm_device *dev, struct drm_colorop *colorop, colorop->type_property, colorop->type); - /* bypass */ - prop = drm_property_create_bool(dev, DRM_MODE_PROP_ATOMIC, - "BYPASS"); - if (!prop) - return -ENOMEM; + if (allow_bypass) { + /* bypass */ + prop = drm_property_create_bool(dev, DRM_MODE_PROP_ATOMIC, + "BYPASS"); + if (!prop) + return -ENOMEM; - colorop->bypass_property = prop; - drm_object_attach_property(&colorop->base, - colorop->bypass_property, - 1); + colorop->bypass_property = prop; + drm_object_attach_property(&colorop->base, + colorop->bypass_property, + 1); + } /* next */ prop = drm_property_create_object(dev, DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_ATOMIC, @@ -153,10 +156,13 @@ static int drm_colorop_init(struct drm_device *dev, struct drm_colorop *colorop, * @supported_tfs: A bitfield of supported drm_colorop_curve_1d_init enum values, * created using BIT(curve_type) and combined with the OR '|' * operator. + * @allow_bypass: true if BYPASS property should be created, false if bypass of + * this colorop is not possible * @return zero on success, -E value on failure */ int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *colorop, - struct drm_plane *plane, u64 supported_tfs) + struct drm_plane *plane, u64 supported_tfs, + bool allow_bypass) { struct drm_prop_enum_list enum_list[DRM_COLOROP_1D_CURVE_COUNT]; int i, len; @@ -177,7 +183,8 @@ int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *coloro return -EINVAL; } - ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_1D_CURVE); + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_1D_CURVE, + allow_bypass); if (ret) return ret; @@ -237,16 +244,20 @@ static int drm_colorop_create_data_prop(struct drm_device *dev, struct drm_color * @plane: The associated drm_plane * @lut_size: LUT size supported by driver * @lut1d_interpolation: 1D LUT interpolation type + * @allow_bypass: true if BYPASS property should be created, false if bypass of + * this colorop is not possible * @return zero on success, -E value on failure */ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *colorop, struct drm_plane *plane, uint32_t lut_size, - enum drm_colorop_lut1d_interpolation_type lut1d_interpolation) + enum drm_colorop_lut1d_interpolation_type lut1d_interpolation, + bool allow_bypass) { struct drm_property *prop; int ret; - ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_1D_LUT); + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_1D_LUT, + allow_bypass); if (ret) return ret; @@ -284,11 +295,12 @@ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *co EXPORT_SYMBOL(drm_colorop_curve_1d_lut_init); int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop, - struct drm_plane *plane) + struct drm_plane *plane, bool allow_bypass) { int ret; - ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_CTM_3X4); + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_CTM_3X4, + allow_bypass); if (ret) return ret; @@ -308,15 +320,18 @@ EXPORT_SYMBOL(drm_colorop_ctm_3x4_init); * @dev: DRM device * @colorop: The drm_colorop object to initialize * @plane: The associated drm_plane + * @allow_bypass: true if BYPASS property should be created, false if bypass of + * this colorop is not possible * @return zero on success, -E value on failure */ int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop, - struct drm_plane *plane) + struct drm_plane *plane, bool allow_bypass) { struct drm_property *prop; int ret; - ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_MULTIPLIER); + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_MULTIPLIER, + allow_bypass); if (ret) return ret; diff --git a/drivers/gpu/drm/vkms/vkms_colorop.c b/drivers/gpu/drm/vkms/vkms_colorop.c index adcb08153a09..0a87cb14b8e6 100644 --- a/drivers/gpu/drm/vkms/vkms_colorop.c +++ b/drivers/gpu/drm/vkms/vkms_colorop.c @@ -28,7 +28,7 @@ static int vkms_initialize_color_pipeline(struct drm_plane *plane, struct drm_pr return -ENOMEM; } - ret = drm_colorop_curve_1d_init(dev, op, plane, supported_tfs); + ret = drm_colorop_curve_1d_init(dev, op, plane, supported_tfs, true); if (ret) return ret; @@ -44,7 +44,7 @@ static int vkms_initialize_color_pipeline(struct drm_plane *plane, struct drm_pr return -ENOMEM; } - ret = drm_colorop_ctm_3x4_init(dev, op, plane); + ret = drm_colorop_ctm_3x4_init(dev, op, plane, true); if (ret) return ret; @@ -59,7 +59,7 @@ static int vkms_initialize_color_pipeline(struct drm_plane *plane, struct drm_pr return -ENOMEM; } - ret = drm_colorop_ctm_3x4_init(dev, op, plane); + ret = drm_colorop_ctm_3x4_init(dev, op, plane, true); if (ret) return ret; @@ -74,7 +74,7 @@ static int vkms_initialize_color_pipeline(struct drm_plane *plane, struct drm_pr return -ENOMEM; } - ret = drm_colorop_curve_1d_init(dev, op, plane, supported_tfs); + ret = drm_colorop_curve_1d_init(dev, op, plane, supported_tfs, true); if (ret) return ret; diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index 1304b19c96b5..044294b498e4 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -319,14 +319,16 @@ static inline struct drm_colorop *drm_colorop_find(struct drm_device *dev, } int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *colorop, - struct drm_plane *plane, u64 supported_tfs); + struct drm_plane *plane, u64 supported_tfs, + bool allow_bypass); int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *colorop, struct drm_plane *plane, uint32_t lut_size, - enum drm_colorop_lut1d_interpolation_type lut1d_interpolation); + enum drm_colorop_lut1d_interpolation_type lut1d_interpolation, + bool allow_bypass); int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop, - struct drm_plane *plane); + struct drm_plane *plane, bool allow_bypass); int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop, - struct drm_plane *plane); + struct drm_plane *plane, bool allow_bypass); struct drm_colorop_state * drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop); From patchwork Mon Aug 19 20:57:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13768999 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 61BB5C3DA4A for ; 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Mon, 19 Aug 2024 15:57:45 -0500 From: Harry Wentland To: , CC: , Alex Hung Subject: [PATCH v5 42/44] drm/colorop: Add 3D LUT supports to color pipeline Date: Mon, 19 Aug 2024 16:57:09 -0400 Message-ID: <20240819205714.316380-43-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD5:EE_|SA0PR12MB4480:EE_ X-MS-Office365-Filtering-Correlation-Id: 400cde9a-32bc-4129-ae92-08dcc09194eb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|376014|1800799024|36860700013; X-Microsoft-Antispam-Message-Info: vvlkdap8biY1Jcbd5RWsFGyEvrPTPbzvWpII0RytPf5rvXNt2NAdF7llzjjepb2m1IT6mW87zHwfcRWBh/kTEmThUJA/aK8bCOpnReIEio/A9FJzNFWVbvHNDCTWLxqM82ZgINRXQQFaW8FcDfg6BTj2M3Rab+8L5QEXs7V1IOXryYyxxrxuj2a0CHVGiwPzfVzs8Ex9yQNqN4ptc09PkheIMMyBX+hdcWDFimj91m1yOo1RI+5PjkMDIOhTGowksSEcNKgwj2S4JzovNXGz+Qp9QXV0K3VFrQSMqZS4KVvnsGs+tOaEDgLcY+HHQyvoZXMQjHn+OZ9gIrbUIXDeJHEOHhTknHLWE4Kaj7nFA4xxY81Pp1+t3PsJHz313fwNTVsByPyM2HmTNFmR4rWpPMGHDT74kkHliGlgxrgNSQMtitCZakwZPJGxFhcRrTkwAsB4NX9MqLlBSQuSrXI13/nMaPI9cS911yZZk9R8NiIxq6GFnisI0Op4QyGVRDxt47+syHR2CSXd8IiNhHq7TDzXLsFHHMp1/hjjvwNwsnVedKlWLRkzTJUKrLjZ3r8Jhtka5VvCcI0XW43bXJLXGavFp0QksOSzBQ6dWZXFFdjopMQYK4I6UwOAaNh/1tIAkruNlv1QfeMezI1i9Tvxm7T41Um3T+5wttNsx/ZlMjTbXcUd6LyehIiTrk2TNhst0gZia68oTR/qV2neg13Q03QXXn2GHI2dsd1rwn6vuafG9iyBswG4pYoe4x+yh8LTK7SLoE3pCkLXD10eGgW3XHxSx9ksKMtj7+i3qIlqC9eKJO5fDKLNJ0JCkj4mkunx1oaBEVo6YfmrHwfPwMMjFxeNSGIZ0FQ5H9O0CKF3ru/uv2+hPWUD8pTMyvDc8ubIdtzfclTO5pke+eerZRq5dqUT1UGtGRURKOx6qFrSsehAmHC4C31YrGLeQeCh/YJuDWesdyVyiT07MLAavixLXZ4/fNL014dZ2obqHtFWkB6+YBAQ1wjFSFjIM0JymMPpAHYe17ZOQT55VAHDwWMv8DsENCpW6htB8WBH8kJ0SKiERcKzdlx7rO7jyN7XopDFmwFJqdCZ8cmCtWdGF+j41usQpaHrzbgLQjWrUe3NVGKN0LGNb0tt0X5rWmnKKTosLTMnAErogwbirO5OVWxj7ndo8c+64pplIDAJMZgHzW08HtDrWyUPx1ihwI9aVSJgTaebGUGi3RXa6GoEK3NU0CaFoz59pPqJlAPg78xnytk9yowKOWtevlIZCDD/H9nx/uoknu1hPX6lkmZuDBdJZm8i0EvhyXWHOwVKwFWbwoAy9UhMII0dqAc1UKRvANKJ/qCmxBwoeNaRR0IfWvX8C5fHsAdEk7KkR7jWmvvF/HY1JM/MM2Qq07m48qn5f0C0hzDnhKeG6YiZN5IfeLHzywMzaIVhjHQUO6M/9ZlEo8dTHkRFGMvL3IKGyqPgyW/+ X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(376014)(1800799024)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:48.0407 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 400cde9a-32bc-4129-ae92-08dcc09194eb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4480 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung It is to be used to enable HDR by allowing userpace to create and pass 3D LUTs to kernel and hardware. 1. new drm_colorop_type: DRM_COLOROP_3D_LUT. 2. 3D LUT modes define hardware capabilities to userspace applications. 3. mode index points to current 3D LUT mode in lut_3d_modes. Signed-off-by: Alex Hung --- drivers/gpu/drm/drm_atomic.c | 21 ++++++++ drivers/gpu/drm/drm_atomic_uapi.c | 17 +++++++ drivers/gpu/drm/drm_colorop.c | 69 +++++++++++++++++++++++++ include/drm/drm_colorop.h | 42 ++++++++++++++++ include/uapi/drm/drm_mode.h | 84 +++++++++++++++++++++++++++++++ 5 files changed, 233 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index 02ff576aa7a9..1d080c367f4b 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -786,6 +786,9 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p, const struct drm_colorop_state *state) { struct drm_colorop *colorop = state->colorop; + struct drm_property_blob *modes = state->lut_3d_modes; + struct drm_mode_3dlut_mode *mode_3dlut; + int i; drm_printf(p, "colorop[%u]:\n", colorop->base.id); drm_printf(p, "\ttype=%s\n", drm_get_colorop_type_name(colorop->type)); @@ -808,6 +811,24 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p, case DRM_COLOROP_MULTIPLIER: drm_printf(p, "\tmultiplier=%llu\n", state->multiplier); break; + case DRM_COLOROP_3D_LUT: + mode_3dlut = (struct drm_mode_3dlut_mode *) modes->data; + + drm_printf(p, "\tlut_3d_modes blob id=%d\n", modes ? modes->base.id : 0); + for (i = 0; i < modes->length / sizeof(struct drm_mode_3dlut_mode); i++) { + drm_printf(p, "\t lut_size=%d\n", mode_3dlut[i].lut_size); + drm_printf(p, "\t lut_strides=%d %d %d\n", mode_3dlut[i].lut_stride[0], + mode_3dlut[i].lut_stride[1], + mode_3dlut[i].lut_stride[2]); + drm_printf(p, "\t interpolation=%s\n", + drm_get_colorop_lut3d_interpolation_name(mode_3dlut[i].interpolation)); + drm_printf(p, "\t color_depth=%d\n", mode_3dlut[i].color_depth); + drm_printf(p, "\t color_format=%X\n", mode_3dlut[i].color_format); + drm_printf(p, "\t traversal_order=%X\n", mode_3dlut[i].traversal_order); + } + drm_printf(p, "\tlut_3d_mode_index=%d\n", state->lut_3d_mode_index); + drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0); + break; default: break; } diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 142824de33ca..50212eeba272 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -695,9 +695,11 @@ static int drm_atomic_color_set_data_property(struct drm_colorop *colorop, struct drm_colorop_state *state, struct drm_property *property, uint64_t val) { + struct drm_mode_3dlut_mode *modes; ssize_t elem_size = -1; ssize_t size = -1; bool replaced = false; + uint32_t index; switch (colorop->type) { case DRM_COLOROP_1D_LUT: @@ -706,6 +708,15 @@ static int drm_atomic_color_set_data_property(struct drm_colorop *colorop, case DRM_COLOROP_CTM_3X4: size = sizeof(struct drm_color_ctm_3x4); break; + case DRM_COLOROP_3D_LUT: + index = state->lut_3d_mode_index; + if (index >= (state->lut_3d_modes->length / sizeof(struct drm_mode_3dlut_mode))) + return -EINVAL; + + modes = (struct drm_mode_3dlut_mode *) state->lut_3d_modes->data; + size = modes[index].lut_stride[0] * modes[index].lut_stride[1] * modes[index].lut_stride[2] * + sizeof(struct drm_color_lut); + break; default: /* should never get here */ return -EINVAL; @@ -729,6 +740,8 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop, state->curve_1d_type = val; } else if (property == colorop->multiplier_property) { state->multiplier = val; + } else if (property == colorop->lut_3d_mode_index_property) { + state->lut_3d_mode_index = val; } else if (property == colorop->data_property) { return drm_atomic_color_set_data_property(colorop, state, property, val); @@ -756,6 +769,10 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop, *val = state->curve_1d_type; } else if (property == colorop->multiplier_property) { *val = state->multiplier; + } else if (property == colorop->lut_3d_modes_property) { + *val = (state->lut_3d_modes) ? state->lut_3d_modes->base.id : 0; + } else if (property == colorop->lut_3d_mode_index_property) { + *val = state->lut_3d_mode_index; } else if (property == colorop->size_property) { *val = state->size; } else if (property == colorop->data_property) { diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 2b7526c9608e..86f7f084a73f 100644 --- a/drivers/gpu/drm/drm_colorop.c +++ b/drivers/gpu/drm/drm_colorop.c @@ -66,6 +66,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = { { DRM_COLOROP_1D_LUT, "1D Curve Custom LUT" }, { DRM_COLOROP_CTM_3X4, "3x4 Matrix"}, { DRM_COLOROP_MULTIPLIER, "Multiplier"}, + { DRM_COLOROP_3D_LUT, "3D LUT"}, }; static const char * const colorop_curve_1d_type_names[] = { @@ -348,6 +349,53 @@ int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop, } EXPORT_SYMBOL(drm_colorop_mult_init); +int drm_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *colorop, + struct drm_plane *plane, struct drm_mode_3dlut_mode *mode_3dlut, + size_t num, bool allow_bypass) +{ + struct drm_property_blob *blob; + struct drm_property *prop; + int ret; + + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_3D_LUT, allow_bypass); + if (ret) + return ret; + + /* lut_3d_modes */ + prop = drm_property_create(dev, DRM_MODE_PROP_BLOB | DRM_MODE_PROP_IMMUTABLE, "3DLUT_MODES", 0); + if (!prop) + return -ENOMEM; + + colorop->lut_3d_modes_property = prop; + + + blob = drm_property_create_blob(colorop->dev, num * sizeof(struct drm_mode_3dlut_mode), + mode_3dlut); + if (IS_ERR(blob)) + return PTR_ERR(blob); + + drm_object_attach_property(&colorop->base, colorop->lut_3d_modes_property, blob ? blob->base.id : 0); + drm_colorop_reset(colorop); + + drm_property_replace_blob(&colorop->state->lut_3d_modes, blob); + + /* lut_3d_modes index */ + prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC, "3DLUT_MODE_INDEX", 0, num - 1); + if (!prop) + return -ENOMEM; + + colorop->lut_3d_mode_index_property = prop; + drm_object_attach_property(&colorop->base, colorop->lut_3d_mode_index_property, 0); + + /* data */ + ret = drm_colorop_create_data_prop(dev, colorop); + if (ret) + return ret; + + return 0; +} +EXPORT_SYMBOL(drm_colorop_3dlut_init); + static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop, struct drm_colorop_state *state) { @@ -437,7 +485,13 @@ static const char * const colorop_type_name[] = { [DRM_COLOROP_1D_LUT] = "1D Curve Custom LUT", [DRM_COLOROP_CTM_3X4] = "3x4 Matrix", [DRM_COLOROP_MULTIPLIER] = "Multiplier", + [DRM_COLOROP_3D_LUT] = "3D LUT", }; + +static const char * const colorop_lu3d_interpolation_name[] = { + [DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL] = "Tetrahedral", +}; + static const char * const colorop_lut1d_interpolation_name[] = { [DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR] = "Linear", }; @@ -473,6 +527,21 @@ const char *drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_inte return colorop_lut1d_interpolation_name[type]; } +/** + * drm_get_colorop_lut3d_interpolation_name - return a string for interpolation type + * @type: interpolation type to compute name of + * + * In contrast to the other drm_get_*_name functions this one here returns a + * const pointer and hence is threadsafe. + */ +const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type) +{ + if (WARN_ON(type >= ARRAY_SIZE(colorop_lu3d_interpolation_name))) + return "unknown"; + + return colorop_lu3d_interpolation_name[type]; +} + /** * drm_colorop_set_next_property - sets the next pointer * @colorop: drm colorop diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index 044294b498e4..285ab8cc12f0 100644 --- a/include/drm/drm_colorop.h +++ b/include/drm/drm_colorop.h @@ -139,6 +139,29 @@ struct drm_colorop_state { */ uint32_t size; + /** + * @lut_3d_modes: + * + * Mode blob for displaying a list of supported 3dlut modes. + * + * To setup a 3D LUT, lut_3d_modes, lut_3d_modes and data are expected + * to be used in the following sequence: + * + * 1. device driver sets a list of supported drm_mode_3dlut_mode in "lut_3d_modes". + * 2. userspace reads "lut_3d_modes" to determines an appropriate mode. + * 3. userspace sets "lut_3d_mode_index" pointing the selected mode. + * 4. userspace passes a 3D LUT via "data" + * 5. usersapce commits to device driver + */ + struct drm_property_blob *lut_3d_modes; + + /** + * @lut_3d_mode_index: + * + * A zero-based index pointing to current lut_3d_mode. + */ + uint16_t lut_3d_mode_index; + /** * @data: * @@ -274,6 +297,21 @@ struct drm_colorop { */ struct drm_property *size_property; + /** + * @lut_3d_modes_property: + * + * 3DLUT mode property used to convert the framebuffer's colors + * to non-linear gamma. + */ + struct drm_property *lut_3d_modes_property; + + /** + * @lut_3d_mode_index_property: + * + * 3DLUT mode index property for choosing 3D LUT mode. + */ + struct drm_property *lut_3d_mode_index_property; + /** * @data_property: * @@ -329,6 +367,9 @@ int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop struct drm_plane *plane, bool allow_bypass); int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop, struct drm_plane *plane, bool allow_bypass); +int drm_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *colorop, + struct drm_plane *plane, struct drm_mode_3dlut_mode *mode_3dlut, + size_t num, bool allow_bypass); struct drm_colorop_state * drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop); @@ -379,6 +420,7 @@ const char *drm_get_colorop_type_name(enum drm_colorop_type type); */ const char *drm_get_colorop_curve_1d_type_name(enum drm_colorop_curve_1d_type type); const char *drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_type type); +const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type); void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next); diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index b64f9515bd0a..ab807045003f 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -914,6 +914,90 @@ enum drm_colorop_type { * property. */ DRM_COLOROP_MULTIPLIER, + /** + * @DRM_COLOROP_3D_LUT: + * + * A 3D LUT of &drm_color_lut entries, + * packed into a blob via the DATA property. The driver's expected + * LUT size is advertised via the SIZE property. + */ + DRM_COLOROP_3D_LUT, +}; + +/** + * enum drm_colorop_lut3d_interpolation_type - type of 3DLUT interpolation + * + */ +enum drm_colorop_lut3d_interpolation_type { + /** + * @DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL: + * + * Tetrahedral 3DLUT interpolation + */ + DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, +}; + +/** + * enum drm_colorop_lut3d_traversal_order - traversal order of the 3D LUT + * + * This enum describes the order of traversal of 3DLUT elements. + */ +enum drm_colorop_lut3d_traversal_order { + /** + * @DRM_COLOROP_LUT3D_TRAVERSAL_RGB: + * + * the LUT elements are traversed like so: + * for R in range 0..n + * for G in range 0..n + * for B in range 0..n + * color = lut3d[R][G][B] + */ + DRM_COLOROP_LUT3D_TRAVERSAL_RGB, + /** + * @DRM_COLOROP_LUT3D_TRAVERSAL_BGR: + * + * the LUT elements are traversed like so: + * for R in range 0..n + * for G in range 0..n + * for B in range 0..n + * color = lut3d[B][G][R] + */ + DRM_COLOROP_LUT3D_TRAVERSAL_BGR, +}; + +/** + * struct drm_mode_3dlut_mode - 3D LUT mode + * + * The mode describes the supported and selected format of a 3DLUT. + */ +struct drm_mode_3dlut_mode { + /** + * @lut_size: 3D LUT size - can be 9, 17 or 33 + */ + __u16 lut_size; + /** + * @lut_stride: dimensions of 3D LUT. Must be larger than lut_size + */ + __u16 lut_stride[3]; + /** + * @interpolation: interpolation algorithm for 3D LUT. See drm_colorop_lut3d_interpolation_type + */ + __u16 interpolation; + /** + * @color_depth: color depth - can be 8, 10 or 12 + */ + __u16 color_depth; + /** + * @color_format: color format specified by fourcc values + * ex. DRM_FORMAT_XRGB16161616 - color in order of RGB, each is 16bit. + */ + __u32 color_format; + /** + * @traversal_order: + * + * Traversal order when parsing/writing the 3D LUT. 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(36860700013)(376014)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:47.0153 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4c3b6066-34e9-40a4-3a4c-08dcc091944f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBF.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW5PR12MB5599 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung This adds support for a 3D LUT. The color pipeline now consists of the following colorops: 1. 1D curve colorop 2. Multiplier 3. 3x4 CTM 4. 1D curve colorop 5. 1D LUT 6. 3D LUT 7. 1D curve colorop 8. 1D LUT Signed-off-by: Alex Hung --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 113 +++++++++++++++++- .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 26 ++++ 2 files changed, 136 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 2f0b06fb5f81..cc3d68d1386f 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -1283,7 +1283,8 @@ __set_dm_plane_colorop_multiplier(struct drm_plane_state *plane_state, static int __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state, - struct drm_colorop *colorop) + struct drm_colorop *colorop, + bool *enabled) { struct drm_colorop *old_colorop; struct drm_colorop_state *colorop_state = NULL, *new_colorop_state; @@ -1311,6 +1312,7 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, tf->tf = default_tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type); tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE; __set_output_tf(tf, shaper_lut, shaper_size, false); + *enabled = true; } /* 1D LUT - SHAPER LUT */ @@ -1338,8 +1340,101 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, shaper_size = shaper_lut != NULL ? shaper_size : 0; /* Custom LUT size must be the same as supported size */ - if (shaper_size == colorop_state->size) + if (shaper_size == colorop_state->size) { __set_output_tf(tf, shaper_lut, shaper_size, false); + *enabled = true; + } + } + + return 0; +} + +/* __set_colorop_3dlut - set DRM 3D LUT to DC stream + * @drm_lut3d: user 3D LUT + * @drm_lut3d_size: size of 3D LUT + * @drm_mode_3dlut: drm_mode selected by userspace + * @lut3d: DC 3D LUT + * + * Map user 3D LUT data to DC 3D LUT and all necessary bits to program it + * on DCN accordingly. + */ +static void __set_colorop_3dlut(const struct drm_color_lut *drm_lut3d, + uint32_t drm_lut3d_size, + struct drm_mode_3dlut_mode *drm_mode_3dlut, + struct dc_3dlut *lut) +{ + if (!drm_lut3d_size) + return; + + lut->state.bits.initialized = 0; + + /* Only supports 17x17x17 3D LUT (12-bit) now */ + if (drm_mode_3dlut->color_depth == 12) + lut->lut_3d.use_12bits = true; + else + return; + + if (drm_mode_3dlut->lut_size == 17) + lut->lut_3d.use_tetrahedral_9 = false; + else + return; + + lut->state.bits.initialized = 1; + __drm_3dlut_to_dc_3dlut(drm_lut3d, drm_lut3d_size, &lut->lut_3d, + lut->lut_3d.use_tetrahedral_9, + drm_mode_3dlut->color_depth); + +} + +static int +__set_dm_plane_colorop_3dlut(struct drm_plane_state *plane_state, + struct dc_plane_state *dc_plane_state, + struct drm_colorop *colorop, + bool shaper_enabled) +{ + struct drm_colorop *old_colorop; + struct drm_colorop_state *colorop_state = NULL, *new_colorop_state; + struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func; + struct drm_atomic_state *state = plane_state->state; + const struct amdgpu_device *adev = drm_to_adev(colorop->dev); + const struct drm_device *dev = colorop->dev; + struct drm_mode_3dlut_mode *mode; + const struct drm_color_lut *lut3d; + uint32_t lut3d_size, index; + int i = 0; + + /* 3D LUT */ + old_colorop = colorop; + for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { + if (new_colorop_state->colorop == old_colorop && + new_colorop_state->colorop->type == DRM_COLOROP_3D_LUT) { + colorop_state = new_colorop_state; + break; + } + } + + if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_3D_LUT) { + if (!adev->dm.dc->caps.color.dpp.hw_3d_lut) { + drm_dbg(dev, "3D LUT is not supported by hardware\n"); + return 0; + } + + drm_dbg(dev, "3D LUT colorop with ID: %d\n", colorop->base.id); + mode = (struct drm_mode_3dlut_mode *) colorop_state->lut_3d_modes->data; + index = colorop_state->lut_3d_mode_index; + lut3d = __extract_blob_lut(colorop_state->data, &lut3d_size); + lut3d_size = lut3d != NULL ? lut3d_size : 0; + __set_colorop_3dlut(lut3d, lut3d_size, &mode[index], &dc_plane_state->lut3d_func); + + /* 3D LUT requires shaper. If shaper colorop is bypassed, enable shaper curve + * with TRANSFER_FUNCTION_LINEAR + */ + if (!shaper_enabled) { + tf->type = TF_TYPE_DISTRIBUTED_POINTS; + tf->tf = TRANSFER_FUNCTION_LINEAR; + tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE; + __set_output_tf(tf, NULL, 0, false); + } } return 0; @@ -1468,6 +1563,7 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, { struct drm_colorop *colorop = plane_state->color_pipeline; struct drm_device *dev = plane_state->plane->dev; + bool shaper_enabled = false; int ret; /* 1D Curve - DEGAM TF */ @@ -1508,7 +1604,7 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, return -EINVAL; } - ret = __set_dm_plane_colorop_shaper(plane_state, dc_plane_state, colorop); + ret = __set_dm_plane_colorop_shaper(plane_state, dc_plane_state, colorop, &shaper_enabled); if (ret) return ret; @@ -1517,6 +1613,17 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, if (!colorop) return -EINVAL; + /* 3D LUT */ + colorop = colorop->next; + if (!colorop) { + drm_dbg(dev, "no 3D LUT colorop found\n"); + return -EINVAL; + } + + ret = __set_dm_plane_colorop_3dlut(plane_state, dc_plane_state, colorop, shaper_enabled); + if (ret) + return ret; + /* 1D Curve & LUT - BLND TF & LUT */ colorop = colorop->next; if (!colorop) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index 05fdec7c28ad..a81f81240341 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -47,6 +47,17 @@ const u64 amdgpu_dm_supported_blnd_tfs = BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) | BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF); +struct drm_mode_3dlut_mode lut3d_modes[] = { + { + .lut_size = 17, + .lut_stride = {17, 17, 17}, + .interpolation = DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, + .color_depth = 12, + .color_format = DRM_FORMAT_XRGB16161616, + .traversal_order = DRM_COLOROP_LUT3D_TRAVERSAL_RGB, + }, +}; + int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list) { struct drm_colorop *op, *prev_op; @@ -135,6 +146,21 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr prev_op = op; + /* 3D LUT */ + op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!op) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + return -ENOMEM; + } + + ret = drm_colorop_3dlut_init(dev, op, plane, lut3d_modes, ARRAY_SIZE(lut3d_modes), true); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, op); + + prev_op = op; + /* 1D curve - BLND TF */ op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); if (!op) { From patchwork Mon Aug 19 20:57:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Wentland X-Patchwork-Id: 13769006 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 974BBC3DA4A for ; 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Mon, 19 Aug 2024 15:57:46 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v5 44/44] drm/amd/display: Add AMD color pipeline doc Date: Mon, 19 Aug 2024 16:57:11 -0400 Message-ID: <20240819205714.316380-45-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819205714.316380-1-harry.wentland@amd.com> References: <20240819205714.316380-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD5:EE_|PH0PR12MB8800:EE_ X-MS-Office365-Filtering-Correlation-Id: 586eca51-4987-4679-abb3-08dcc0919529 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|376014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: NZpgiKP5SURnnwBMhTcKM5TXWTGfSs+hFWilAdx50kTCVQ2433mg7eB+X6I+2oJwZW9qxchiDzqkX3ffmgnOM2RPcuh9f4Me9ftyC4HcLXaMLmzW2tYV5LSIKvegTURIziJoaML4y+Hu0ondlLX/SSaI7zZdPQJ66x08lMo/20LOb7WqV4zNaBjNeb3CZTG+aCh8rzZI5Rq7IOeDj8vW/gAwBDyTDm7NV5rHEW75PYb8+hoB8f7mK3D4XYffYNTvGul6XYTG+c1SmIhzLlZlvlHZHAQQ+SZCuqWooYpMBdolL1moB7h3HYbTB+eo7mtxITbEoIJFCoHUSGXTZS1WC+X0CkEjykVSgyT0hmNFS2czVv0iB4cPneTjZGVO1BDgpvEAhofik7EwuQtNs6eGl+18hTxN+u1rRulWHx9EGHydtshd3pS2cWBe6gcMnxPmSZ21Dwl+6x6Ow5ZzRTN9OBGZOpIElATS3yA0CZaVm74y2a0XHTbbPCeRNpAwCFCN2lKzymdxNjMd9sIgLUvoMk0oOwkW2h3iVARggmBg1qV0rajo5sB7DNG7LaflWOok08+Woy0dAW6i9+LFYLipt0Mbn04flwg3IbAuRaxSw/uz42SwmTvOo+5Q0MR9TvjxgxMRipBpKMvvkkqBQcBbF8ptEaUI8ZpoLV6IPWvLONHdF4ObbksnwJQ5P0coE5tfW50TwSN6Fl9845Gt0vuA491RQYxsGBpbT6s7ctVBTpGeOZ5JNtduBSjZUxmDw8yOYZ4gDO6GlnK6nNAlIxxtiXXzEDsSUS2+VsFpIYSaRDNiTpk9BDorsGogLdghRNS9XUPRzchABwwQuXPGv7QAiOQ4LBbSTZL+8/2urFswc72CVLujiCIOKw9qQ2R9D7Kgxmu1qTi8Z9Uf6QL1cmfH81AwzxFwc0ePLqf5UmjNg8W6X25SMqBHuX731IMy+MsXhJ96wQl0lEn60bkSO8J0puNDwnzj7SeJuScfmUoiwJWlUCoPJeAc3+EYvJAKLXgwoNzJa3D49qouMzmvsZSkH5AWVlL6HiBzzNzVmBXxngrFxw6yTzTyRtRDo4DjQJJ1KHgADN50Iv+blMvqFVDQE5TMBmFyj4L7TEPAIhtONwYMGyb6LUVM34MbSuLUKUTlrqfQ7mQUW3hV9NxLMXh6vyRfQJeVBjEdguyBzmv53pB7Uf0g4ckKQokK9UK4pjWHAmlTjhewAsEPiFrQCMYsXoiPusrsaes9qvDnjjpGW9lHDFrni4iiGr4Y5CZM2onrYGxlqWbWYjM+m+2ZsQvl3/ZxPA7W0xtcstFXwUWq3b1KT3Jo4GHQgC/K3yGWyk2GtcMS5Odmr8XCLYVHHrILy2NsV6kmOEH56IiA7QwYowizSCD15Uc+ptdzI/X9rp8xaaxviwn6Wob40mTXB5qq302Zk8sPGibOsChaaDqs3EPOMXxH6MentDnkuffecJbe X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(376014)(82310400026)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 20:57:48.4314 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 586eca51-4987-4679-abb3-08dcc0919529 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB8800 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" A short description about the AMD color pipeline. Signed-off-by: Harry Wentland --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 122 +++++++++++++++--- 1 file changed, 102 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index cc3d68d1386f..d48dcaee9e2e 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -33,6 +33,32 @@ /** * DOC: overview * + * We have three types of color management in the AMD display driver. + * 1. the legacy &drm_crtc DEGAMMA, CTM, and GAMMA properties + * 2. AMD driver private color management on &drm_plane and &drm_crtc + * 3. AMD plane color pipeline + * + * The CRTC properties are the original color management. When they were + * implemented per-plane color management was not a thing yet. Because + * of that we could get away with plumbing the DEGAMMA and CTM + * properties to pre-blending HW functions. This is incompatible with + * per-plane color management, such as via the AMD private properties or + * the new drm_plane color pipeline. The only compatible CRTC property + * with per-plane color management is the GAMMA property as it is + * applied post-blending. + * + * The AMD driver private color management properties are only exposed + * when the kernel is built explicitly with -DAMD_PRIVATE_COLOR. They + * are temporary building blocks on the path to full-fledged &drm_plane + * and &drm_crtc color pipelines and lay the driver's groundwork for the + * color pipelines. + * + * The AMD plane color pipeline describes AMD's &drm_colorops via the + * &drm_plane's COLOR_PIPELINE property. + * + * drm_crtc Properties + * ------------------- + * * The DC interface to HW gives us the following color management blocks * per pipe (surface): * @@ -43,33 +69,89 @@ * - Surface regamma LUT (normalized) * - Output CSC (normalized) * - * But these aren't a direct mapping to DRM color properties. The current DRM - * interface exposes CRTC degamma, CRTC CTM and CRTC regamma while our hardware - * is essentially giving: + * But these aren't a direct mapping to DRM color properties. The + * current DRM interface exposes CRTC degamma, CRTC CTM and CRTC regamma + * while our hardware is essentially giving: * * Plane CTM -> Plane degamma -> Plane CTM -> Plane regamma -> Plane CTM * - * The input gamma LUT block isn't really applicable here since it operates - * on the actual input data itself rather than the HW fp representation. The - * input and output CSC blocks are technically available to use as part of - * the DC interface but are typically used internally by DC for conversions - * between color spaces. These could be blended together with user - * adjustments in the future but for now these should remain untouched. + * The input gamma LUT block isn't really applicable here since it + * operates on the actual input data itself rather than the HW fp + * representation. The input and output CSC blocks are technically + * available to use as part of the DC interface but are typically used + * internally by DC for conversions between color spaces. These could be + * blended together with user adjustments in the future but for now + * these should remain untouched. * - * The pipe blending also happens after these blocks so we don't actually - * support any CRTC props with correct blending with multiple planes - but we - * can still support CRTC color management properties in DM in most single - * plane cases correctly with clever management of the DC interface in DM. + * The pipe blending also happens after these blocks so we don't + * actually support any CRTC props with correct blending with multiple + * planes - but we can still support CRTC color management properties in + * DM in most single plane cases correctly with clever management of the + * DC interface in DM. * - * As per DRM documentation, blocks should be in hardware bypass when their - * respective property is set to NULL. A linear DGM/RGM LUT should also - * considered as putting the respective block into bypass mode. + * As per DRM documentation, blocks should be in hardware bypass when + * their respective property is set to NULL. A linear DGM/RGM LUT should + * also considered as putting the respective block into bypass mode. * - * This means that the following - * configuration is assumed to be the default: + * This means that the following configuration is assumed to be the + * default: + * + * Plane DGM Bypass -> Plane CTM Bypass -> Plane RGM Bypass -> ... CRTC + * DGM Bypass -> CRTC CTM Bypass -> CRTC RGM Bypass + * + * AMD Private Color Management on drm_plane + * ----------------------------------------- + * + * The AMD private color management properties on a &drm_plane are: + * + * - AMD_PLANE_DEGAMMA_LUT + * - AMD_PLANE_DEGAMMA_LUT_SIZE + * - AMD_PLANE_DEGAMMA_TF + * - AMD_PLANE_HDR_MULT + * - AMD_PLANE_CTM + * - AMD_PLANE_SHAPER_LUT + * - AMD_PLANE_SHAPER_LUT_SIZE + * - AMD_PLANE_SHAPER_TF + * - AMD_PLANE_LUT3D + * - AMD_PLANE_LUT3D_SIZE + * - AMD_PLANE_BLEND_LUT + * - AMD_PLANE_BLEND_LUT_SIZE + * - AMD_PLANE_BLEND_TF + * + * The AMD private color management property on a &drm_crtc is: + * + * - AMD_CRTC_REGAMMA_TF + * + * Use of these properties is discouraged. + * + * AMD plane color pipeline + * ------------------------ + * + * The AMD &drm_plane color pipeline is advertised for DCN generations + * 3.0 and newer. It exposes these elements in this order: + * + * 1. 1D curve colorop + * 2. Multiplier + * 3. 3x4 CTM + * 4. 1D curve colorop + * 5. 1D LUT + * 6. 3D LUT + * 7. 1D curve colorop + * 8. 1D LUT + * + * The multiplier (#2) is a simple multiplier that is applied to all + * channels. + * + * The 3x4 CTM (#3) is a simple 3x4 matrix. + * + * #1, and #7 are non-linear to linear curves. #4 is a linear to + * non-linear curve. They support sRGB, PQ, and BT.709/BT.2020 EOTFs or + * their inverse. + * + * The 1D LUTs (#5 and #8) are plain 4096 entry LUTs. + * + * The 3DLUT (#6) is a tetrahedrally interpolated 17 cube LUT. * - * Plane DGM Bypass -> Plane CTM Bypass -> Plane RGM Bypass -> ... - * CRTC DGM Bypass -> CRTC CTM Bypass -> CRTC RGM Bypass */ #define MAX_DRM_LUT_VALUE 0xFFFF