From patchwork Tue Aug 20 07:06:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhavya Kapoor X-Patchwork-Id: 13769493 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10F56C3DA4A for ; Tue, 20 Aug 2024 07:07:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=+4l8TGmHjp7lAUWWLu9C17ULqkfasvc5VTXMnL3774s=; b=04CEnjd3k8xtsGbyMZ0tuAhGTK 5HFGkcceXoY8UCCGok6+5BEPGNjaq62BuCsIjhZvmq4NNNQZyKIoffZwvILrNyWbf9N1nwbmBhhNH B1svbRbK9YJpAj55tdW1bPgJI5/xk9jC4Xm77Y3IopcrUxZWTuknQmIdQv+cFF0F+80WS4a41xzz0 40xRfTzMR2HnUyt46yIxdx2vjpEES+VXRzLYprHrvFX3V2WHdCVxJaP3Mhx/kMDKhEss/2HRcQI/B bzlDRVTpk/7ZkOeDYflo4/C6HakyPcn/Unzu4vGP4Nmx0Dwhv3QNImIaQJfL4sLBxw68JBnp5J3tA jnAKLBwQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sgIxJ-000000048Pm-1BnW; Tue, 20 Aug 2024 07:07:01 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sgIwZ-000000048Ab-24aY for linux-arm-kernel@lists.infradead.org; Tue, 20 Aug 2024 07:06:18 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 47K76AbS045227; Tue, 20 Aug 2024 02:06:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1724137570; bh=+4l8TGmHjp7lAUWWLu9C17ULqkfasvc5VTXMnL3774s=; h=From:To:CC:Subject:Date; b=vNPXR8EqzK/77Xw/Ks33BZLI/Xsb5ZXnoPhdd47Lf9uwDGu8jyPTVyvv2yq6uxYld NHcF6m3I/4L4ZkM5HZalJjUC4D4jOMo94n3vKubY/k3d7s7ApFSiodyAJ3UEbwxqn1 D2yfnX7C0L3tiY3x1Cas8t4X0qAJr+TvZ7HVsjP8= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 47K76AoZ022563 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 20 Aug 2024 02:06:10 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 20 Aug 2024 02:06:10 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 20 Aug 2024 02:06:10 -0500 Received: from localhost ([10.249.128.135]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47K7681C015213; Tue, 20 Aug 2024 02:06:09 -0500 From: Bhavya Kapoor To: , CC: , , , , , , , Subject: [PATCH] arm64: dts: ti: Add PWM and ECAP overlay for J722S-EVM Date: Tue, 20 Aug 2024 12:36:07 +0530 Message-ID: <20240820070607.30628-1-b-kapoor@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240820_000615_833372_06267128 X-CRM114-Status: GOOD ( 14.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The J722S-EVM has 3 PWM outputs and 1 ECAP output routed to the J28 connector. This overlay will set the appropriate pinmux and enable PWM and ECAP on the pins. Currently enabled PWM output on J28: 29, 31, 33 pins and ECAP output on J28: 32 pin Signed-off-by: Bhavya Kapoor --- arch/arm64/boot/dts/ti/Makefile | 1 + arch/arm64/boot/dts/ti/k3-j722s-evm-pwm.dtso | 53 ++++++++++++++++++++ 2 files changed, 54 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-pwm.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index e20b27ddf901..61d51284dcba 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -111,6 +111,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo # Boards with J722s SoC dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb +dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-pwm.dtbo # Boards with J784s4 SoC dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-pwm.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-pwm.dtso new file mode 100644 index 000000000000..f6d1f072b140 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm-pwm.dtso @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * DT Overlay for enabling PWM output on User Expansion header on J722S-EVM + * + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include +#include "k3-pinctrl.h" + +&main_pmx0 { + + main_epwm0_pins_default: main-epwm0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x01b4, PIN_OUTPUT, 2) /* (B20) EHRPWM0_A */ + >; + }; + + main_epwm1_pins_default: main-epwm1-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x01bc, PIN_OUTPUT, 2) /* (D20) EHRPWM1_A */ + J722S_IOPAD(0x01c0, PIN_OUTPUT, 2) /* (E19) EHRPWM1_B */ + >; + }; + + main_ecap0_pins_default: main-ecap0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x01b8, PIN_OUTPUT, 3) /* (C20) ECAP0_IN_APWM_OUT */ + >; + }; +}; + +&epwm0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_epwm0_pins_default>; + status = "okay"; +}; + +&epwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_epwm1_pins_default>; + status = "okay"; +}; + +&ecap0 { + /* ECAP in APWM mode */ + pinctrl-names = "default"; + pinctrl-0 = <&main_ecap0_pins_default>; + status = "okay"; +};