From patchwork Wed Aug 21 10:10:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 13771189 Received: from mail-m49197.qiye.163.com (mail-m49197.qiye.163.com [45.254.49.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E51B020FDE9; Wed, 21 Aug 2024 10:10:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724235053; cv=none; b=LTU3bS27EnCcswi223pMaAq2o47Z1h0RoEDontByFsN+fgfkoiIUxE397HAojDvF87hlbjGz8necudoH6iZmCY8fFv6pI0FMenH2W/eXW5m1JTw0P7l/QUpCPFcgKrMqZ9HOrbLEWtIkngXeFRAzCgD2a+JSIUELefl4Un5WWrg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724235053; c=relaxed/simple; bh=VrdJvXm2sC9xmYQzGLd2CrG3SKsFp+2orO2ikPyeeuQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=rXT8fmnqF13q0SRShmCVPxJVNmyD1Q7GRs1MLMgLYfMKA9AmTBQ2QwgNHSjepuL3v783hi1oxZtpX2cAInW9YCxqc6gVnWFeJzwjnDDXofzlQ3iTvLxIxXVBQI4vUCPCuXCuWwxEysY5nebAQzQb0aYMBkyTPRi+YqhUqC+sTg4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=45.254.49.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from amadeus-Vostro-3710.lan (unknown [IPV6:240e:3b3:2c00:ac20::1]) by smtp.qiye.163.com (Hmail) with ESMTPA id CAD6C7E01BD; Wed, 21 Aug 2024 18:10:40 +0800 (CST) From: Chukun Pan To: Bjorn Andersson Cc: Konrad Dybcio , Krzysztof Kozlowski , Conor Dooley , Rob Herring , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH v3 1/4] arm64: dts: qcom: ipq6018: add 1.2GHz CPU Frequency Date: Wed, 21 Aug 2024 18:10:22 +0800 Message-Id: <20240821101025.858961-2-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240821101025.858961-1-amadeus@jmu.edu.cn> References: <20240821101025.858961-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkZT0ofVkMZTx5MTU0fGUMZSFYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlJT0seQUgZSEFJGEtLQRoYSUtBQUpZV1kWGg8SFR0UWUFZT0tIVUpLSUJDQ0 xVSktLVUtZBg++ X-HM-Tid: 0a91746ac91003a2kunmcad6c7e01bd X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6ORQ6Vhw4SDIyDipMQz8sIh9I LAkKCSFVSlVKTElPSUhOS09KTktLVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUlP Sx5BSBlIQUkYS0tBGhhJS0FBSllXWQgBWUFJSUpDNwY+ Some IPQ6000 SoCs (fused)[1] have CPU frequencies up to 1.2GHz, so add this frequency. [1] Usually the SBL version is BOOT.XF.0.3-00086-IPQ60xxLZB-1 Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 8edd535a188f..1b584d9aadd1 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -119,6 +119,13 @@ opp-1056000000 { clock-latency-ns = <200000>; }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x4>; + clock-latency-ns = <200000>; + }; + opp-1320000000 { opp-hz = /bits/ 64 <1320000000>; opp-microvolt = <862500>; From patchwork Wed Aug 21 10:10:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 13771190 Received: from mail-m49197.qiye.163.com (mail-m49197.qiye.163.com [45.254.49.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0C4F20FDE8; Wed, 21 Aug 2024 10:10:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724235055; cv=none; b=l0MgYK/zcwoe+MSChKhJC6q+5Iwh3eu91ycp8Ht7CeOgMjDjWsyH8e6bovV6N+i9R6aEeXU2Vv5KCViDH4JlDXdqro90XMyRuuwwOUNmO9w+ZVBzdQz/6pVEFUrSP97ChSypj0vIOmyoTt3TW1RVB17/09OFKUd3QFcYwI46a0I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724235055; c=relaxed/simple; bh=5tZNRdi7myZwfM3ZyuwR8WF07FpBf5+4BM1031nEkBw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=gOk+tOFOeOVi9O9+lOZRTEAI25WdoQLmRpDsDp3fFtQHiLC5xAC+AgwIUbWWWBR/rRO0vQeIrrDIQ8zl9SB7TNr8zDIv6jXS9c9lcPo9zpk1ep0QUa5DSX2DAbibcrnrkvL+H/CEZZMPA6EJW34+LX5OxWXaQSdxs3Jp2Wa/1+Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=45.254.49.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from amadeus-Vostro-3710.lan (unknown [IPV6:240e:3b3:2c00:ac20::1]) by smtp.qiye.163.com (Hmail) with ESMTPA id 236477E01CF; Wed, 21 Aug 2024 18:10:44 +0800 (CST) From: Chukun Pan To: Bjorn Andersson Cc: Konrad Dybcio , Krzysztof Kozlowski , Conor Dooley , Rob Herring , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH v3 2/4] arm64: dts: qcom: ipq6018: add 1.5GHz CPU Frequency Date: Wed, 21 Aug 2024 18:10:23 +0800 Message-Id: <20240821101025.858961-3-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240821101025.858961-1-amadeus@jmu.edu.cn> References: <20240821101025.858961-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlDHRhLVh0aTE5NTUxIQ0lOHVYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlJT0seQUgZSEFJGEtLQRoYSUtBQUpZV1kWGg8SFR0UWUFZT0tIVUpLSUJDQ0 xVSktLVUtZBg++ X-HM-Tid: 0a91746ad60703a2kunm236477e01cf X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6NjI6FCo6GTI1LCo5Hjk2IioD IToaC0NVSlVKTElPSUhOS09PTE1DVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUlP Sx5BSBlIQUkYS0tBGhhJS0FBSllXWQgBWUFJSExKNwY+ The IPQ6005 SoCs and some IPQ6000 SoCs (with PMIC, no fused)[1] have CPU frequencies up to 1.5GHz, so add this frequency. [1] Usually the SBL version is BOOT.XF.0.3-00077-IPQ60xxLZB-2 The old version of IPQ6000 did not explicitly fused the SoC to be 'IPQ6000', and fused the CPU frequency to 1.5GHz. Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 1b584d9aadd1..33062417781a 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -140,6 +140,13 @@ opp-1440000000 { clock-latency-ns = <200000>; }; + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <937500>; + opp-supported-hw = <0x2>; + clock-latency-ns = <200000>; + }; + opp-1608000000 { opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <987500>; From patchwork Wed Aug 21 10:10:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 13771199 Received: from mail-m155101.qiye.163.com (mail-m155101.qiye.163.com [101.71.155.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 32B58192D78; Wed, 21 Aug 2024 10:17:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=101.71.155.101 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724235460; cv=none; b=LjAg8wy51VLmIYSnOFuELAXs1bn10qFdKVtmdjpSrt6TUQqwBxtt7Uk7kqqMA2CjAswNBsYcKTR8XxE/LOxxVMCUNy8cD4gfVnmLNAf3vkB5ELLh5cbTbz5Sx3FiW4RnVG6aZBYKnoc9H5oIH2xdoYGuRdegorRKyydy6fJ9cdc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724235460; c=relaxed/simple; bh=WXpWpDj6u1kbFSTz0P97O4IsgFpnj592RVxhfybBcOw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=bnwQUV9OlIA1RvY/gL1FxRqQ6f1NHtXmhruZBG1Hhm4mNwY7Av1VF6FWTyZ4l4D6+2Qf2JnrS/SiHl6friJF8qoaaYgIeIusam4VCALTXiCFleRlyitOvR9gDMV8/TaOxUectDXZB6CPz8UZcwkxmsJguNNvHnlPhTOTimD58oY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=101.71.155.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from amadeus-Vostro-3710.lan (unknown [IPV6:240e:3b3:2c00:ac20::1]) by smtp.qiye.163.com (Hmail) with ESMTPA id E8AC47E01D8; Wed, 21 Aug 2024 18:10:50 +0800 (CST) From: Chukun Pan To: Bjorn Andersson Cc: Konrad Dybcio , Krzysztof Kozlowski , Conor Dooley , Rob Herring , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH v3 3/4] arm64: dts: qcom: ipq6018: move mp5496 regulator out of soc dtsi Date: Wed, 21 Aug 2024 18:10:24 +0800 Message-Id: <20240821101025.858961-4-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240821101025.858961-1-amadeus@jmu.edu.cn> References: <20240821101025.858961-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkaGEtKVktOQk1CSE4ZQ0tMTlYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlJT0seQUgZSEFJGEtLQRoYSUtBQUpZV1kWGg8SFR0UWUFZS1VLVUtVS1kG X-HM-Tid: 0a91746af0a203a2kunme8ac47e01d8 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6OlE6Azo4CzI4GioxNDgtIik9 GTQwC0hVSlVKTElPSUhOS05KQkNLVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUlP Sx5BSBlIQUkYS0tBGhhJS0FBSllXWQgBWUFPTUhMNwY+ Some IPQ60xx SoCs don't come with the mp5496 pmic chip. The mp5496 pmic was never part of the IPQ60xx SoC, it's optional, so we moved it out of the soc dtsi. Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 1 + arch/arm64/boot/dts/qcom/ipq6018-rdp.dtsi | 32 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/ipq6018.dtsi | 14 --------- 3 files changed, 33 insertions(+), 14 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/ipq6018-rdp.dtsi diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts index f5f4827c0e17..e71e8c851246 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts +++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "ipq6018.dtsi" +#include "ipq6018-rdp.dtsi" / { model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1"; diff --git a/arch/arm64/boot/dts/qcom/ipq6018-rdp.dtsi b/arch/arm64/boot/dts/qcom/ipq6018-rdp.dtsi new file mode 100644 index 000000000000..bb56c1245f92 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq6018-rdp.dtsi @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * IPQ6018 RDP board common device tree source + */ + +&rpm_requests { + regulators { + compatible = "qcom,rpm-mp5496-regulators"; + + ipq6018_s2: s2 { + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1062500>; + regulator-always-on; + }; + }; +}; + +&CPU0 { + cpu-supply = <&ipq6018_s2>; +}; + +&CPU1 { + cpu-supply = <&ipq6018_s2>; +}; + +&CPU2 { + cpu-supply = <&ipq6018_s2>; +}; + +&CPU3 { + cpu-supply = <&ipq6018_s2>; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 33062417781a..6f365705e2d8 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -43,7 +43,6 @@ CPU0: cpu@0 { clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; #cooling-cells = <2>; }; @@ -56,7 +55,6 @@ CPU1: cpu@1 { clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; #cooling-cells = <2>; }; @@ -69,7 +67,6 @@ CPU2: cpu@2 { clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; #cooling-cells = <2>; }; @@ -82,7 +79,6 @@ CPU3: cpu@3 { clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; #cooling-cells = <2>; }; @@ -184,16 +180,6 @@ glink-edge { rpm_requests: rpm-requests { compatible = "qcom,rpm-ipq6018", "qcom,glink-smd-rpm"; qcom,glink-channels = "rpm_requests"; - - regulators { - compatible = "qcom,rpm-mp5496-regulators"; - - ipq6018_s2: s2 { - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1062500>; - regulator-always-on; - }; - }; }; }; }; From patchwork Wed Aug 21 10:10:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 13771198 Received: from mail-m155101.qiye.163.com (mail-m155101.qiye.163.com [101.71.155.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 32BAE199FB4; Wed, 21 Aug 2024 10:17:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=101.71.155.101 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724235460; cv=none; b=h1Qm4D3d+HGwDjBGH+HzS14Wy2nI4mfJnhTw0O+6hPlbs/suqc8vLTlOhI3ye4CXlSSqhpTUaVd78gNIQMHneJw0BKSSZz9gsNs6FmhaU2udX2Ni4e4FRG5y+xxk3Ma3umTJOp4smT/dg+w8QEKZL4RlpcQsHccJaVmMLTqvJgM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724235460; c=relaxed/simple; bh=0RhVFhYoPwHMcp9xML/40dBV4iPibyeBgl8/kuvVXYc=; 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Suggested-by: Robert Marko Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/qcom/ipq6018-rdp.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq6018-rdp.dtsi b/arch/arm64/boot/dts/qcom/ipq6018-rdp.dtsi index bb56c1245f92..4aa17ed8235c 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018-rdp.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018-rdp.dtsi @@ -12,9 +12,18 @@ ipq6018_s2: s2 { regulator-max-microvolt = <1062500>; regulator-always-on; }; + + ipq6018_l2: l2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; }; }; +&sdhc { + vqmmc-supply = <&ipq6018_l2>; +}; + &CPU0 { cpu-supply = <&ipq6018_s2>; };