From patchwork Thu Aug 22 05:35:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhavya Kapoor X-Patchwork-Id: 13772666 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3EF0C531DF for ; Thu, 22 Aug 2024 05:36:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=3G/831VZMPg/EVxycyligIipdeBJkvkoKP5/tNrzULg=; b=ahfr9/c+H609oRQACp2EJlCJI+ dgwOG6BGR6BPJ+BOUXTP8oLbdKHMpbZyVxYPGNrO1UFlyf31N1f12sU9dGMtHhpPb8glxz5ur1hTe IzQoSIEzGL0/UlAiRZ0+1DwObn0Z0NChIG0wbyOGa3TUbJaMqFM/HgZsOXEpZpQTWWWhKhJfKLwQe cir47Jyr1QexNPREUXusO4zCURTqlpScbSNnlL86DESqr/pcVPWcaQ8bvo4w+UE19V8zTbntD6AhG eDXAex7cdQ1IKaqnCOJGjDJp8yiSNHbc8qB66lD1EWMyABOPj6SRabd2PQ2Jn4eahpE9Tqj5UF1Oh 3wFwv8jg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sh0Uv-0000000BUMs-2rLD; Thu, 22 Aug 2024 05:36:37 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sh0UD-0000000BUEH-2odu for linux-arm-kernel@bombadil.infradead.org; Thu, 22 Aug 2024 05:35:53 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Type:Content-Transfer-Encoding :MIME-Version:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To:Content-ID: Content-Description:In-Reply-To:References; bh=3G/831VZMPg/EVxycyligIipdeBJkvkoKP5/tNrzULg=; b=ZQ1k7KCA+giJ2E/IRqXh1P07xC h1bqSJxjj3DUAM4e+siqGmAVCrVcRcLQstTchpU22/yKl/6tQpNLI7txb5rEBHmD/rlGx/HntMn3u 4L7FmpKAQ0aIg9ZSuE65oAnx7j3YCe/v+QOMzjajfb3HUhICvpOcEpsDaUoosyGLotz5PfgWENPDM umpqy3VARUNaKpJv2V8Rx67x6g8yz8rFl1nt8WBnTeJ1I+Tyz9a1ETXflvIobpQupo+PdwrDBXPek eGBy8vwgUrhiv2sMhZUT1WdcNrOYjabf/fuKRV3ypngTSR2lhTzpBqGkDRyFRAZJJmgiUDfzxIOOs rZ4do3/Q==; Received: from lelv0143.ext.ti.com ([198.47.23.248]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sh0U9-00000009rCu-3J65 for linux-arm-kernel@lists.infradead.org; Thu, 22 Aug 2024 05:35:52 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 47M5Ze9Z120376; Thu, 22 Aug 2024 00:35:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1724304940; bh=3G/831VZMPg/EVxycyligIipdeBJkvkoKP5/tNrzULg=; h=From:To:CC:Subject:Date; b=UwJGGL/VSqUVmoz8nyp0T6sEhyc10NVwUCYcbEt9lrbSf6ZjnHpmR+hpCjA3oVUsh Kb0ry/0UX7qfTfA7/Y05LvQ2NQG5fmjFBKn+jsrM8p7i3ljRVxNYWRZhlVPonb/EI4 NVgbDBoU3YWyjaMsQeil7CaBHFfv8xNBiTZwvZS4= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 47M5ZeLq002632 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 22 Aug 2024 00:35:40 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 22 Aug 2024 00:35:40 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 22 Aug 2024 00:35:40 -0500 Received: from localhost ([10.249.128.135]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47M5ZcHY042740; Thu, 22 Aug 2024 00:35:39 -0500 From: Bhavya Kapoor To: , CC: , , , , , , , Subject: [PATCH] arm64: dts: ti: k3-j722s-evm: Describe main_uart5 Date: Thu, 22 Aug 2024 11:05:38 +0530 Message-ID: <20240822053538.10475-1-b-kapoor@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240822_063550_305866_E0F71DB2 X-CRM114-Status: GOOD ( 10.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org main_uart5 in J722S platform is used by the firmware. Thus, describe it for completeness, adding the pinmux and mark it as reserved. Signed-off-by: Bhavya Kapoor --- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index 24e9f2ea509b..5addf1c0afc2 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -20,6 +20,7 @@ / { aliases { serial0 = &wkup_uart0; serial2 = &main_uart0; + serial3 = &main_uart5; mmc0 = &sdhci0; mmc1 = &sdhci1; }; @@ -211,6 +212,13 @@ J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ bootph-all; }; + main_uart5_pins_default: main-uart5-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0108, PIN_INPUT, 3) /* (J27) UART5_RXD */ + J722S_IOPAD(0x010c, PIN_OUTPUT, 3) /* (H27) UART5_TXD */ + >; + }; + vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { pinctrl-single,pins = < J722S_IOPAD(0x0120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */ @@ -330,6 +338,12 @@ &main_uart0 { bootph-all; }; +&main_uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart5_pins_default>; + status = "reserved"; +}; + &mcu_pmx0 { mcu_mcan0_pins_default: mcu-mcan0-default-pins {