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Wed, 6 Mar 2019 10:32:06 +0000 Received: from VI1PR10MB2672.EURPRD10.PROD.OUTLOOK.COM ([fe80::51c2:2f6a:3148:4a1f]) by VI1PR10MB2672.EURPRD10.PROD.OUTLOOK.COM ([fe80::51c2:2f6a:3148:4a1f%3]) with mapi id 15.20.1686.018; Wed, 6 Mar 2019 10:32:06 +0000 From: Rasmus Villemoes To: Mark Brown , Rob Herring , Mark Rutland CC: Esben Haabendal , Fabio Estevam , Per Christensen , Rasmus Villemoes , "linux-spi@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: [PATCH] spi: spi-fsl-spi: support use of the SPISEL_BOOT signal on MPC8309 Thread-Topic: [PATCH] spi: spi-fsl-spi: support use of the SPISEL_BOOT signal on MPC8309 Thread-Index: AQHU1AfYCEu+DVoJHESVruGnCokNwQ== Date: Wed, 6 Mar 2019 10:32:05 +0000 Message-ID: <20190306103156.19897-1-rasmus.villemoes@prevas.dk> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HE1PR0802CA0019.eurprd08.prod.outlook.com (2603:10a6:3:bd::29) To VI1PR10MB2672.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:803:e3::20) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Rasmus.Villemoes@prevas.se; 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received-spf: None (protection.outlook.com: prevas.se does not designate permitted sender hosts) x-microsoft-exchange-diagnostics: =?iso-8859-1?q?1=3BVI1PR10MB2367=3B23=3ADl?= =?iso-8859-1?q?ASuMGxdB6rpvrOYrFxxR5vDhMjIYf7XR/R/OOdjxj140vN+UjpQosnLkmCmM?= =?iso-8859-1?q?dx3cFmWCWGjc3byag3ORXda471n5pfD83Jf9kbG7RTThMaCVqI3EPw1eRAFS?= =?iso-8859-1?q?J3Gxk0HiFsV/ApF2E3bTVmfYiUaBsco23qZfR+3CYz+Moi6z8nRwmmC0irry?= =?iso-8859-1?q?rmXCBc6/i+iYf6Uq5qgS1mO1Pg1bmiqasLt6HBgHprxXiY3mshW62Nbgza1k?= =?iso-8859-1?q?uscSeaIvvUdpS0L+wJZK7p7I2IACaeYE4wtmMn9OwD1102kByaivmroJoBLt?= =?iso-8859-1?q?KOJMrEx1/LnQxtM5w1WEOISwQorlmcqW4tJiCtgIGpd0ZPIPnFBIMXbBeM0E?= =?iso-8859-1?q?uBZ4QS/geMjZzPJbGtokmnssIcebKP01/3NToa5TovWh5ve0CklotgKx9PZi?= =?iso-8859-1?q?2zOB4oIXpqQxxfX5ul3ladfU/9llqwNzfIc0562hvBOI5SkUVprTJIWa6W9v?= =?iso-8859-1?q?DlXYfDKF2w+ItxvtYUrIA7+iFLuF/0D/gRPNBlIuT36u3C/binqB0VaE4fX9?= =?iso-8859-1?q?Y8BHn506ftBnAh/ni43L90BqImAPJTJ/8LkWHGvfcHnTWwmuPo6iDnwM1LWG?= =?iso-8859-1?q?uxkjYirXI0KVA+kgy9iLTRHUQXFDe0gRgWMm0+cGlvjD0rcahveqr8J55tAC?= =?iso-8859-1?q?lMhtbIuRzX5i1Kng23JHFDSwJ7fhaU5cQ8SXOyo4cSG2ghh8D6PqWbx1O2V3?= =?iso-8859-1?q?o0WOgiHeu9ZkyltTLpiMw13+/Lr7VPxBmMxd7jWKOGnwCHmXgoJJi8HJa9Tw?= =?iso-8859-1?q?VXDuvwCs0cY9GLQ8qT7bYlPcORXlpIRZqZqb6uajWEL+jQcE360iED8DWdRz?= =?iso-8859-1?q?wtPoSjfXu4Ns3/+0L18jsAIZiGgKtGB7YiLFDs0wpkd5z/e8JOlwnzvJqQew?= =?iso-8859-1?q?R/Ulu1oGpiYeUgAqp5LA0N55DJILlXprYyW7JRmTI/vwKhF+l4CPMXwlD8+x?= =?iso-8859-1?q?vq7GF5nWj46yxdlMaWq4ia+mLSHa4J0/iuBm3+XneNz+5hg3g1+qJ7FBS8VV?= =?iso-8859-1?q?6ZxZLsdwP1mUB3eJ2sP94ylqlLGcVbR6OUi/l32KsnbJRWsQ4uScSKfNHCfx?= =?iso-8859-1?q?BInxdlhSv9xCoLBbBt0Nk+LTWVb7/XgnfKTPlDwi0jdXZKSA267Zlka2fe72?= =?iso-8859-1?q?/Px4N9TMXpZgq4yu4rhiyyTzHCMQ0Nn+9+WyAFEm3w8u6oRAvnDcSgpg+qui?= =?iso-8859-1?q?Zgnsz8uorCiMVeiPL3GNfLxeNp9GyKjrysRg=3D=3D?= x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: aT+UzObiNeyHh2mGtgZ+MmRaTb7ICrf/dSgh6QEI5ykaR1c+zA7njDYWJ20PKcgTuZYUCEuoc68m+30/tG3XPLfGWgKHUMOTurm3ymNdzSs4lVKZcEdzyhMi6Ojv+TFSQqxilbocz81Lj9p94APrPZXXg2K0YRS4dMnYEvfY90BMIpauImq8/+lgb0QsMSCnCRT/D3zzZQQX7Wg3bQmqKiqDLEvSE2yYz9t7esW7mB0HqTpUXfDPbHIM92wnhFi7UZZ/9BrOUISN6P/xh8H5AuNMl6VeQproRcM+YEW0Sy304MZVOO7g80JeEinCJ9id5TLYz9Q/tROmd8uyK4w8MsWyLYMJK9iWW6oBlV9sE7sbDlyVPAEP6ZpL8tqqdy6UFRvcIswhOmNtehkpQ7gZiFxG6tQneL+DQxi+AvjFCjA= MIME-Version: 1.0 X-OriginatorOrg: prevas.dk X-MS-Exchange-CrossTenant-Network-Message-Id: 89f4a557-2589-43ca-e563-08d6a21efa8d X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Mar 2019 10:32:05.8807 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: d350cf71-778d-4780-88f5-071a4cb1ed61 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR10MB2367 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The MPC8309 has a dedicated signal, SPISEL_BOOT, usually used as chip select for the flash device from which the bootloader is loaded. It is not an ordinary gpio, but is simply controlled via the SPI_CS register in the system configuration. To allow accessing such a spi slave, we need to teach fsl_spi_cs_control() how to control the SPISEL_BOOT signal. To distinguish the gpio-controlled slaves, continue to have those use chip_select values of 0..ngpios-1, and use chip_select == ngpios for the boot flash. I'm not too happy with all the ifdeffery, but it seems to be necessary for guarding the sysdev/fsl_soc.h and use of get_immrbase() (spi-fsl-lib.c already contains similar ifdeffery). Googling suggests that the MPC8306 is similar, with the SPI_CS register at the same offset. Signed-off-by: Rasmus Villemoes --- .../devicetree/bindings/spi/fsl-spi.txt | 4 ++ drivers/spi/spi-fsl-lib.h | 2 + drivers/spi/spi-fsl-spi.c | 40 ++++++++++++++++--- 3 files changed, 41 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/fsl-spi.txt b/Documentation/devicetree/bindings/spi/fsl-spi.txt index 8854004a1d3a..411375eac54d 100644 --- a/Documentation/devicetree/bindings/spi/fsl-spi.txt +++ b/Documentation/devicetree/bindings/spi/fsl-spi.txt @@ -18,6 +18,10 @@ Optional properties: - gpios : specifies the gpio pins to be used for chipselects. The gpios will be referred to as reg = in the SPI child nodes. If unspecified, a single SPI device without a chip select can be used. +- fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the + SPISEL_BOOT signal is used as chip select for a slave device. Use + reg = in the corresponding child node, i.e. 0 if + the gpios property is not present. Example: spi@4c0 { diff --git a/drivers/spi/spi-fsl-lib.h b/drivers/spi/spi-fsl-lib.h index f303f306b38e..483734bc1b1e 100644 --- a/drivers/spi/spi-fsl-lib.h +++ b/drivers/spi/spi-fsl-lib.h @@ -95,8 +95,10 @@ static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg) struct mpc8xxx_spi_probe_info { struct fsl_spi_platform_data pdata; + int ngpios; int *gpios; bool *alow_flags; + __be32 __iomem *immr_spi_cs; }; extern u32 mpc8xxx_spi_tx_buf_u8(struct mpc8xxx_spi *mpc8xxx_spi); diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c index 8f2e97857e8b..3d7b50c65f36 100644 --- a/drivers/spi/spi-fsl-spi.c +++ b/drivers/spi/spi-fsl-spi.c @@ -39,6 +39,14 @@ #include #include +#ifdef CONFIG_FSL_SOC +#include +#endif + +/* Specific to the MPC8306/MPC8309 */ +#define IMMR_SPI_CS_OFFSET 0x14c +#define SPI_BOOT_SEL_BIT 0x80000000 + #include "spi-fsl-lib.h" #include "spi-fsl-cpm.h" #include "spi-fsl-spi.h" @@ -701,10 +709,17 @@ static void fsl_spi_cs_control(struct spi_device *spi, bool on) struct fsl_spi_platform_data *pdata = dev_get_platdata(dev); struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata); u16 cs = spi->chip_select; - int gpio = pinfo->gpios[cs]; - bool alow = pinfo->alow_flags[cs]; - gpio_set_value(gpio, on ^ alow); + if (cs < pinfo->ngpios) { + int gpio = pinfo->gpios[cs]; + bool alow = pinfo->alow_flags[cs]; + + gpio_set_value(gpio, on ^ alow); + } else { + if (WARN_ON_ONCE(cs > pinfo->ngpios || !pinfo->immr_spi_cs)) + return; + iowrite32be(on ? SPI_BOOT_SEL_BIT : 0, pinfo->immr_spi_cs); + } } static int of_fsl_spi_get_chipselects(struct device *dev) @@ -712,12 +727,15 @@ static int of_fsl_spi_get_chipselects(struct device *dev) struct device_node *np = dev->of_node; struct fsl_spi_platform_data *pdata = dev_get_platdata(dev); struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata); + bool spisel_boot = IS_ENABLED(CONFIG_FSL_SOC) && + of_property_read_bool(np, "fsl,spisel_boot"); int ngpios; int i = 0; int ret; ngpios = of_gpio_count(np); - if (ngpios <= 0) { + ngpios = max(ngpios, 0); + if (ngpios == 0 && !spisel_boot) { /* * SPI w/o chip-select line. One SPI device is still permitted * though. @@ -726,6 +744,7 @@ static int of_fsl_spi_get_chipselects(struct device *dev) return 0; } + pinfo->ngpios = ngpios; pinfo->gpios = kmalloc_array(ngpios, sizeof(*pinfo->gpios), GFP_KERNEL); if (!pinfo->gpios) @@ -769,7 +788,18 @@ static int of_fsl_spi_get_chipselects(struct device *dev) } } - pdata->max_chipselect = ngpios; +#if IS_ENABLED(CONFIG_FSL_SOC) + if (spisel_boot) { + pinfo->immr_spi_cs = ioremap(get_immrbase() + IMMR_SPI_CS_OFFSET, 4); + if (!pinfo->immr_spi_cs) { + ret = -ENOMEM; + i = ngpios - 1; + goto err_loop; + } + } +#endif + + pdata->max_chipselect = ngpios + spisel_boot; pdata->cs_control = fsl_spi_cs_control; return 0;