From patchwork Wed Mar 6 11:12:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Havelange X-Patchwork-Id: 10840873 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A99781515 for ; Wed, 6 Mar 2019 11:12:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 929712D69C for ; Wed, 6 Mar 2019 11:12:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 865C02D69E; Wed, 6 Mar 2019 11:12:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 052B52D69C for ; Wed, 6 Mar 2019 11:12:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=b9iYPmlA5N0b9vZy3/0rBpRrKZkFrzHlTRKI1ROJfds=; b=XX/aY1liahUUk3 pX1c9ozwHepn4QP0AZKCyGfRI/gfYkueFPRsucOPIAdhOwEPDpdWxDlxhWsOVZLs1W3HIdLf5SlNJ x+v8vvB+e38rEeNc0FSFFKUec8Ove1RXe8QOg5eiHoGeVKF1dEX9u0WxESIkCpsXSF3brz1F0uVBv 3WQBQ1Qjsq6kSnNddbwopTajCv5j9ceY2iTc1UgU3FSOPnr8HQgo7GkJ+Qkqrn1JF3JOsM5AXCUbK 8Co0SNo6x9BrW21bu9/b6BhUK1u8MiAFCTRYpig7ygNSAdPm65rCuUiw8xQxwGiWngO9ZKzKxPjgq OJ6aWo6ADIZdF6+0DTOA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h1UTc-0007Zp-M6; Wed, 06 Mar 2019 11:12:44 +0000 Received: from mail-ed1-x544.google.com ([2a00:1450:4864:20::544]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h1UTO-0007IA-I7 for linux-arm-kernel@lists.infradead.org; Wed, 06 Mar 2019 11:12:32 +0000 Received: by mail-ed1-x544.google.com with SMTP id h58so9995820edb.5 for ; Wed, 06 Mar 2019 03:12:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=essensium-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UDGe8T7uTF1fS0LV360+rebuvgO6XlOWuD/srOZz6kA=; b=gNltG2/vMtp0zBc3u0alXu4S7dYzB3TXOypx/r6LxjqJJJiN4Zy5NdS9fOu+ogGv9/ BKmzb0wR5oz2SEELAoJ++4XtWmXjdS96hY4iMAdhNE2FBWSGATmWcIovlZU6EeV7HKNz OEyKN0Bq+O2fW4dc63c4YMt2Akw1la+XrcoiX7X0XkLO8ybFH0fghOfyRNQTGL3BgYAC Rq8DIAxYP2c61dpatuPyaTyBuuup19Doi82hA+uC0ygQdiqgf2thoOcknujXqFxDKFDA vb4FZ2mG146hg65uqzLoRk4rYeO6HABhk/+SQmqE/otWVEXPCOM6Zi8kPfas/ZqOXWke dVjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UDGe8T7uTF1fS0LV360+rebuvgO6XlOWuD/srOZz6kA=; b=R/aJqW6og1bT3NPpTHdfuGyTG1UMN0qJMypM/V8E+Dh5rHkzPtRitbtQahijmVGY+G hIfJYWXmeDzM6WyWF6AlRiwC68dbNVjHfIkrE30w04lADXMOp/vjGh676dfKpNht3EwA 02oWqbaJG0IVg8ejDnjVl+C+yoLFV9mwVbs34O5tGlI2aALPXcyWfx+K1XR4HqtUfsD5 ca7dSHgiJEeyXSz5wt7WyaC0yKFtL/X0d7V6fUk+pAOba5mbWe3WpJm+juXwDyQHPtXw 4rfHakJaM44n/cNjzTSJyiMq1hYQt8orgZBc4lgBkD8zNbMdMwUXAVJb7uxWRaFEqVJV 8abQ== X-Gm-Message-State: APjAAAVuvgRWcvpronNEKE7+M0CSFsjo0a0ne5hz9Ufmsk9WIihBYjB7 SeQ8ZMi/yyNOmKCYfuSS19D2Zw== X-Google-Smtp-Source: APXvYqwYqCMsKkYQWZol5oxl8MNudtVNOddwqzr50VpN9hqC+6iKrexdzDbUUBdgMwFX4xiCo6Itqg== X-Received: by 2002:a50:94d6:: with SMTP id t22mr23584689eda.232.1551870749143; Wed, 06 Mar 2019 03:12:29 -0800 (PST) Received: from ph-ThinkPad-E560.local.ess-mail.com (ip-188-118-3-185.reverse.destiny.be. [188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:28 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Subject: [PATCH v2 1/7] include/fsl: add common FlexTimer #defines in a separate header. Date: Wed, 6 Mar 2019 12:12:02 +0100 Message-Id: <20190306111208.7454-2-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190306_031230_593431_3ABBE0A4 X-CRM114-Status: GOOD ( 12.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Patrick Havelange Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Several files are/will be using the same #defines to use the Flextimer module. Regroup them in a common file. Signed-off-by: Patrick Havelange Reviewed-by: Esben Haabendal --- Changes v2 - Commit message --- include/linux/fsl/ftm.h | 88 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 include/linux/fsl/ftm.h diff --git a/include/linux/fsl/ftm.h b/include/linux/fsl/ftm.h new file mode 100644 index 000000000000..d59011acf66c --- /dev/null +++ b/include/linux/fsl/ftm.h @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0 +#ifndef __FSL_FTM_H__ +#define __FSL_FTM_H__ + +#define FTM_SC 0x0 /* Status And Control */ +#define FTM_CNT 0x4 /* Counter */ +#define FTM_MOD 0x8 /* Modulo */ + +#define FTM_CNTIN 0x4C /* Counter Initial Value */ +#define FTM_STATUS 0x50 /* Capture And Compare Status */ +#define FTM_MODE 0x54 /* Features Mode Selection */ +#define FTM_SYNC 0x58 /* Synchronization */ +#define FTM_OUTINIT 0x5C /* Initial State For Channels Output */ +#define FTM_OUTMASK 0x60 /* Output Mask */ +#define FTM_COMBINE 0x64 /* Function For Linked Channels */ +#define FTM_DEADTIME 0x68 /* Deadtime Insertion Control */ +#define FTM_EXTTRIG 0x6C /* FTM External Trigger */ +#define FTM_POL 0x70 /* Channels Polarity */ +#define FTM_FMS 0x74 /* Fault Mode Status */ +#define FTM_FILTER 0x78 /* Input Capture Filter Control */ +#define FTM_FLTCTRL 0x7C /* Fault Control */ +#define FTM_QDCTRL 0x80 /* Quadrature Decoder Control And Status */ +#define FTM_CONF 0x84 /* Configuration */ +#define FTM_FLTPOL 0x88 /* FTM Fault Input Polarity */ +#define FTM_SYNCONF 0x8C /* Synchronization Configuration */ +#define FTM_INVCTRL 0x90 /* FTM Inverting Control */ +#define FTM_SWOCTRL 0x94 /* FTM Software Output Control */ +#define FTM_PWMLOAD 0x98 /* FTM PWM Load */ + +#define FTM_SC_CLK_MASK_SHIFT 3 +#define FTM_SC_CLK_MASK (3 << FTM_SC_CLK_MASK_SHIFT) +#define FTM_SC_TOF 0x80 +#define FTM_SC_TOIE 0x40 +#define FTM_SC_CPWMS 0x20 +#define FTM_SC_CLKS 0x18 +#define FTM_SC_PS_1 0x0 +#define FTM_SC_PS_2 0x1 +#define FTM_SC_PS_4 0x2 +#define FTM_SC_PS_8 0x3 +#define FTM_SC_PS_16 0x4 +#define FTM_SC_PS_32 0x5 +#define FTM_SC_PS_64 0x6 +#define FTM_SC_PS_128 0x7 +#define FTM_SC_PS_MASK 0x7 + +#define FTM_MODE_FAULTIE 0x80 +#define FTM_MODE_FAULTM 0x60 +#define FTM_MODE_CAPTEST 0x10 +#define FTM_MODE_PWMSYNC 0x8 +#define FTM_MODE_WPDIS 0x4 +#define FTM_MODE_INIT 0x2 +#define FTM_MODE_FTMEN 0x1 + +/* NXP Errata: The PHAFLTREN and PHBFLTREN bits are tide to zero internally + * and these bits cannot be set. Flextimer cannot use Filter in + * Quadrature Decoder Mode. + * https://community.nxp.com/thread/467648#comment-1010319 + */ +#define FTM_QDCTRL_PHAFLTREN 0x80 +#define FTM_QDCTRL_PHBFLTREN 0x40 +#define FTM_QDCTRL_PHAPOL 0x20 +#define FTM_QDCTRL_PHBPOL 0x10 +#define FTM_QDCTRL_QUADMODE 0x8 +#define FTM_QDCTRL_QUADDIR 0x4 +#define FTM_QDCTRL_TOFDIR 0x2 +#define FTM_QDCTRL_QUADEN 0x1 + +#define FTM_FMS_FAULTF 0x80 +#define FTM_FMS_WPEN 0x40 +#define FTM_FMS_FAULTIN 0x10 +#define FTM_FMS_FAULTF3 0x8 +#define FTM_FMS_FAULTF2 0x4 +#define FTM_FMS_FAULTF1 0x2 +#define FTM_FMS_FAULTF0 0x1 + +#define FTM_CSC_BASE 0xC +#define FTM_CSC_MSB 0x20 +#define FTM_CSC_MSA 0x10 +#define FTM_CSC_ELSB 0x8 +#define FTM_CSC_ELSA 0x4 +#define FTM_CSC(_channel) (FTM_CSC_BASE + ((_channel) * 8)) + +#define FTM_CV_BASE 0x10 +#define FTM_CV(_channel) (FTM_CV_BASE + ((_channel) * 8)) + +#define FTM_PS_MAX 7 + +#endif From patchwork Wed Mar 6 11:12:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Havelange X-Patchwork-Id: 10840889 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 02ADC17E9 for ; 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[188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:29 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Subject: [PATCH v2 2/7] drivers/pwm: pwm-fsl-ftm: use common header for FlexTimer #defines Date: Wed, 6 Mar 2019 12:12:03 +0100 Message-Id: <20190306111208.7454-3-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190306_031231_631305_7E558BB3 X-CRM114-Status: GOOD ( 11.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Patrick Havelange Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This also fixes the wrong value for the previously defined FTM_MODE_INIT macro (it was not used). Signed-off-by: Patrick Havelange Reviewed-by: Esben Haabendal --- Changes v2 - None --- drivers/pwm/pwm-fsl-ftm.c | 44 +-------------------------------------- 1 file changed, 1 insertion(+), 43 deletions(-) diff --git a/drivers/pwm/pwm-fsl-ftm.c b/drivers/pwm/pwm-fsl-ftm.c index 883378d055c6..f21ea1b97116 100644 --- a/drivers/pwm/pwm-fsl-ftm.c +++ b/drivers/pwm/pwm-fsl-ftm.c @@ -22,51 +22,9 @@ #include #include #include +#include -#define FTM_SC 0x00 -#define FTM_SC_CLK_MASK_SHIFT 3 -#define FTM_SC_CLK_MASK (3 << FTM_SC_CLK_MASK_SHIFT) #define FTM_SC_CLK(c) (((c) + 1) << FTM_SC_CLK_MASK_SHIFT) -#define FTM_SC_PS_MASK 0x7 - -#define FTM_CNT 0x04 -#define FTM_MOD 0x08 - -#define FTM_CSC_BASE 0x0C -#define FTM_CSC_MSB BIT(5) -#define FTM_CSC_MSA BIT(4) -#define FTM_CSC_ELSB BIT(3) -#define FTM_CSC_ELSA BIT(2) -#define FTM_CSC(_channel) (FTM_CSC_BASE + ((_channel) * 8)) - -#define FTM_CV_BASE 0x10 -#define FTM_CV(_channel) (FTM_CV_BASE + ((_channel) * 8)) - -#define FTM_CNTIN 0x4C -#define FTM_STATUS 0x50 - -#define FTM_MODE 0x54 -#define FTM_MODE_FTMEN BIT(0) -#define FTM_MODE_INIT BIT(2) -#define FTM_MODE_PWMSYNC BIT(3) - -#define FTM_SYNC 0x58 -#define FTM_OUTINIT 0x5C -#define FTM_OUTMASK 0x60 -#define FTM_COMBINE 0x64 -#define FTM_DEADTIME 0x68 -#define FTM_EXTTRIG 0x6C -#define FTM_POL 0x70 -#define FTM_FMS 0x74 -#define FTM_FILTER 0x78 -#define FTM_FLTCTRL 0x7C -#define FTM_QDCTRL 0x80 -#define FTM_CONF 0x84 -#define FTM_FLTPOL 0x88 -#define FTM_SYNCONF 0x8C -#define FTM_INVCTRL 0x90 -#define FTM_SWOCTRL 0x94 -#define FTM_PWMLOAD 0x98 enum fsl_pwm_clk { FSL_PWM_CLK_SYS, From patchwork Wed Mar 6 11:12:04 2019 Content-Type: text/plain; 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[188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:30 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Subject: [PATCH v2 3/7] drivers/clocksource: timer-fsl-ftm: use common header for FlexTimer #defines Date: Wed, 6 Mar 2019 12:12:04 +0100 Message-Id: <20190306111208.7454-4-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190306_031232_797562_3547BCF8 X-CRM114-Status: GOOD ( 10.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Patrick Havelange Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Common #defines have been moved to "linux/fsl/ftm.h". Thus making use of this file. Also FTM_SC_CLK_SHIFT has been renamed to FTM_SC_CLK_MASK_SHIFT. Signed-off-by: Patrick Havelange Reviewed-by: Esben Haabendal Acked-by: Daniel Lezcano --- Changes v2 - None --- drivers/clocksource/timer-fsl-ftm.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/drivers/clocksource/timer-fsl-ftm.c b/drivers/clocksource/timer-fsl-ftm.c index 846d18daf893..e1c34b2f53a5 100644 --- a/drivers/clocksource/timer-fsl-ftm.c +++ b/drivers/clocksource/timer-fsl-ftm.c @@ -19,20 +19,9 @@ #include #include #include +#include -#define FTM_SC 0x00 -#define FTM_SC_CLK_SHIFT 3 -#define FTM_SC_CLK_MASK (0x3 << FTM_SC_CLK_SHIFT) -#define FTM_SC_CLK(c) ((c) << FTM_SC_CLK_SHIFT) -#define FTM_SC_PS_MASK 0x7 -#define FTM_SC_TOIE BIT(6) -#define FTM_SC_TOF BIT(7) - -#define FTM_CNT 0x04 -#define FTM_MOD 0x08 -#define FTM_CNTIN 0x4C - -#define FTM_PS_MAX 7 +#define FTM_SC_CLK(c) ((c) << FTM_SC_CLK_MASK_SHIFT) struct ftm_clock_device { void __iomem *clksrc_base; From patchwork Wed Mar 6 11:12:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Havelange X-Patchwork-Id: 10840893 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C8F951515 for ; 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[188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:31 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Subject: [PATCH v2 4/7] dt-bindings: counter: ftm-quaddec Date: Wed, 6 Mar 2019 12:12:05 +0100 Message-Id: <20190306111208.7454-5-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190306_031234_551500_8D1AA210 X-CRM114-Status: GOOD ( 11.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Patrick Havelange Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP FlexTimer quadrature decoder driver. Signed-off-by: Patrick Havelange Reviewed-by: Esben Haabendal --- Changes v2 - None --- .../bindings/counter/ftm-quaddec.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 Documentation/devicetree/bindings/counter/ftm-quaddec.txt diff --git a/Documentation/devicetree/bindings/counter/ftm-quaddec.txt b/Documentation/devicetree/bindings/counter/ftm-quaddec.txt new file mode 100644 index 000000000000..4d18cd722074 --- /dev/null +++ b/Documentation/devicetree/bindings/counter/ftm-quaddec.txt @@ -0,0 +1,18 @@ +FlexTimer Quadrature decoder counter + +This driver exposes a simple counter for the quadrature decoder mode. + +Required properties: +- compatible: Must be "fsl,ftm-quaddec". +- reg: Must be set to the memory region of the flextimer. + +Optional property: +- big-endian: Access the device registers in big-endian mode. + +Example: + counter0: counter@29d0000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x0 0x29d0000 0x0 0x10000>; + big-endian; + status = "disabled"; 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[188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:33 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Subject: [PATCH v2 5/7] counter: add FlexTimer Module Quadrature decoder counter driver Date: Wed, 6 Mar 2019 12:12:06 +0100 Message-Id: <20190306111208.7454-6-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190306_031235_674171_56B46C2C X-CRM114-Status: GOOD ( 21.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Patrick Havelange Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This driver exposes the counter for the quadrature decoder of the FlexTimer Module, present in the LS1021A soc. Signed-off-by: Patrick Havelange Reviewed-by: Jonathan Cameron --- Changes v2 - Rebased on new counter subsystem - Cleaned up included headers - Use devm_ioremap() - Correct order of devm_ and unmanaged resources --- drivers/counter/Kconfig | 9 + drivers/counter/Makefile | 1 + drivers/counter/ftm-quaddec.c | 356 ++++++++++++++++++++++++++++++++++ 3 files changed, 366 insertions(+) create mode 100644 drivers/counter/ftm-quaddec.c diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig index 87c491a19c63..233ac305d878 100644 --- a/drivers/counter/Kconfig +++ b/drivers/counter/Kconfig @@ -48,4 +48,13 @@ config STM32_LPTIMER_CNT To compile this driver as a module, choose M here: the module will be called stm32-lptimer-cnt. +config FTM_QUADDEC + tristate "Flex Timer Module Quadrature decoder driver" + help + Select this option to enable the Flex Timer Quadrature decoder + driver. + + To compile this driver as a module, choose M here: the + module will be called ftm-quaddec. + endif # COUNTER diff --git a/drivers/counter/Makefile b/drivers/counter/Makefile index 5589976d37f8..0c9e622a6bea 100644 --- a/drivers/counter/Makefile +++ b/drivers/counter/Makefile @@ -7,3 +7,4 @@ obj-$(CONFIG_COUNTER) += counter.o obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o +obj-$(CONFIG_FTM_QUADDEC) += ftm-quaddec.o diff --git a/drivers/counter/ftm-quaddec.c b/drivers/counter/ftm-quaddec.c new file mode 100644 index 000000000000..1bc9e075a386 --- /dev/null +++ b/drivers/counter/ftm-quaddec.c @@ -0,0 +1,356 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Flex Timer Module Quadrature decoder + * + * This module implements a driver for decoding the FTM quadrature + * of ex. a LS1021A + */ + +#include +#include +#include +#include +#include +#include +#include + +struct ftm_quaddec { + struct counter_device counter; + struct platform_device *pdev; + void __iomem *ftm_base; + bool big_endian; + struct mutex ftm_quaddec_mutex; +}; + +static void ftm_read(struct ftm_quaddec *ftm, uint32_t offset, uint32_t *data) +{ + if (ftm->big_endian) + *data = ioread32be(ftm->ftm_base + offset); + else + *data = ioread32(ftm->ftm_base + offset); +} + +static void ftm_write(struct ftm_quaddec *ftm, uint32_t offset, uint32_t data) +{ + if (ftm->big_endian) + iowrite32be(data, ftm->ftm_base + offset); + else + iowrite32(data, ftm->ftm_base + offset); +} + +/* + * take mutex + * call ftm_clear_write_protection + * update settings + * call ftm_set_write_protection + * release mutex + */ +static void ftm_clear_write_protection(struct ftm_quaddec *ftm) +{ + uint32_t flag; + + /* First see if it is enabled */ + ftm_read(ftm, FTM_FMS, &flag); + + if (flag & FTM_FMS_WPEN) { + ftm_read(ftm, FTM_MODE, &flag); + ftm_write(ftm, FTM_MODE, flag | FTM_MODE_WPDIS); + } +} + +static void ftm_set_write_protection(struct ftm_quaddec *ftm) +{ + ftm_write(ftm, FTM_FMS, FTM_FMS_WPEN); +} + +static void ftm_reset_counter(struct ftm_quaddec *ftm) +{ + /* Reset hardware counter to CNTIN */ + ftm_write(ftm, FTM_CNT, 0x0); +} + +static void ftm_quaddec_init(struct ftm_quaddec *ftm) +{ + ftm_clear_write_protection(ftm); + + /* + * Do not write in the region from the CNTIN register through the + * PWMLOAD register when FTMEN = 0. + */ + ftm_write(ftm, FTM_MODE, FTM_MODE_FTMEN); + ftm_write(ftm, FTM_CNTIN, 0x0000); + ftm_write(ftm, FTM_MOD, 0xffff); + ftm_write(ftm, FTM_CNT, 0x0); + ftm_write(ftm, FTM_SC, FTM_SC_PS_1); + + /* Select quad mode */ + ftm_write(ftm, FTM_QDCTRL, FTM_QDCTRL_QUADEN); + + /* Unused features and reset to default section */ + ftm_write(ftm, FTM_POL, 0x0); + ftm_write(ftm, FTM_FLTCTRL, 0x0); + ftm_write(ftm, FTM_SYNCONF, 0x0); + ftm_write(ftm, FTM_SYNC, 0xffff); + + /* Lock the FTM */ + ftm_set_write_protection(ftm); +} + +static void ftm_quaddec_disable(struct ftm_quaddec *ftm) +{ + ftm_write(ftm, FTM_MODE, 0); +} + +static int ftm_quaddec_get_prescaler(struct counter_device *counter, + struct counter_count *count, + size_t *cnt_mode) +{ + struct ftm_quaddec *ftm = counter->priv; + uint32_t scflags; + + ftm_read(ftm, FTM_SC, &scflags); + + *cnt_mode = scflags & FTM_SC_PS_MASK; + + return 0; +} + +static int ftm_quaddec_set_prescaler(struct counter_device *counter, + struct counter_count *count, + size_t cnt_mode) +{ + struct ftm_quaddec *ftm = counter->priv; + + uint32_t scflags; + + mutex_lock(&ftm->ftm_quaddec_mutex); + + ftm_read(ftm, FTM_SC, &scflags); + + scflags &= ~FTM_SC_PS_MASK; + cnt_mode &= FTM_SC_PS_MASK; /*just to be 100% sure*/ + + scflags |= cnt_mode; + + /* Write */ + ftm_clear_write_protection(ftm); + ftm_write(ftm, FTM_SC, scflags); + ftm_set_write_protection(ftm); + + /* Also resets the counter as it is undefined anyway now */ + ftm_reset_counter(ftm); + + mutex_unlock(&ftm->ftm_quaddec_mutex); + return 0; +} + +static const char * const ftm_quaddec_prescaler[] = { + "1", "2", "4", "8", "16", "32", "64", "128" +}; + +static struct counter_count_enum_ext ftm_quaddec_prescaler_enum = { + .items = ftm_quaddec_prescaler, + .num_items = ARRAY_SIZE(ftm_quaddec_prescaler), + .get = ftm_quaddec_get_prescaler, + .set = ftm_quaddec_set_prescaler +}; + +enum ftm_quaddec_synapse_action { + FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES, +}; + +static enum counter_synapse_action ftm_quaddec_synapse_actions[] = { + [FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES] = + COUNTER_SYNAPSE_ACTION_BOTH_EDGES +}; + +enum ftm_quaddec_count_function { + FTM_QUADDEC_COUNT_ENCODER_MODE_1, +}; + +static const enum counter_count_function ftm_quaddec_count_functions[] = { + [FTM_QUADDEC_COUNT_ENCODER_MODE_1] = + COUNTER_COUNT_FUNCTION_QUADRATURE_X4 +}; + +static int ftm_quaddec_count_read(struct counter_device *counter, + struct counter_count *count, + struct counter_count_read_value *val) +{ + struct ftm_quaddec *const ftm = counter->priv; + uint32_t cntval; + + ftm_read(ftm, FTM_CNT, &cntval); + + counter_count_read_value_set(val, COUNTER_COUNT_POSITION, &cntval); + + return 0; +} + +static int ftm_quaddec_count_write(struct counter_device *counter, + struct counter_count *count, + struct counter_count_write_value *val) +{ + struct ftm_quaddec *const ftm = counter->priv; + u32 cnt; + int err; + + err = counter_count_write_value_get(&cnt, COUNTER_COUNT_POSITION, val); + if (err) + return err; + + if (cnt != 0) { + dev_warn(&ftm->pdev->dev, "Can only accept '0' as new counter value\n"); + return -EINVAL; + } + + ftm_reset_counter(ftm); + + return 0; +} + +static int ftm_quaddec_count_function_get(struct counter_device *counter, + struct counter_count *count, + size_t *function) +{ + *function = FTM_QUADDEC_COUNT_ENCODER_MODE_1; + + return 0; +} + +static int ftm_quaddec_action_get(struct counter_device *counter, + struct counter_count *count, + struct counter_synapse *synapse, + size_t *action) +{ + *action = FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES; + + return 0; +} + +static const struct counter_ops ftm_quaddec_cnt_ops = { + .count_read = ftm_quaddec_count_read, + .count_write = ftm_quaddec_count_write, + .function_get = ftm_quaddec_count_function_get, + .action_get = ftm_quaddec_action_get, +}; + +static struct counter_signal ftm_quaddec_signals[] = { + { + .id = 0, + .name = "Channel 1 Quadrature A" + }, + { + .id = 1, + .name = "Channel 1 Quadrature B" + } +}; + +static struct counter_synapse ftm_quaddec_count_synapses[] = { + { + .actions_list = ftm_quaddec_synapse_actions, + .num_actions = ARRAY_SIZE(ftm_quaddec_synapse_actions), + .signal = &ftm_quaddec_signals[0] + }, + { + .actions_list = ftm_quaddec_synapse_actions, + .num_actions = ARRAY_SIZE(ftm_quaddec_synapse_actions), + .signal = &ftm_quaddec_signals[1] + } +}; + +static const struct counter_count_ext ftm_quaddec_count_ext[] = { + COUNTER_COUNT_ENUM("prescaler", &ftm_quaddec_prescaler_enum), + COUNTER_COUNT_ENUM_AVAILABLE("prescaler", &ftm_quaddec_prescaler_enum), +}; + +static struct counter_count ftm_quaddec_counts = { + .id = 0, + .name = "Channel 1 Count", + .functions_list = ftm_quaddec_count_functions, + .num_functions = ARRAY_SIZE(ftm_quaddec_count_functions), + .synapses = ftm_quaddec_count_synapses, + .num_synapses = ARRAY_SIZE(ftm_quaddec_count_synapses), + .ext = ftm_quaddec_count_ext, + .num_ext = ARRAY_SIZE(ftm_quaddec_count_ext) +}; + +static int ftm_quaddec_probe(struct platform_device *pdev) +{ + struct ftm_quaddec *ftm; + + struct device_node *node = pdev->dev.of_node; + struct resource *io; + int ret; + + ftm = devm_kzalloc(&pdev->dev, sizeof(*ftm), GFP_KERNEL); + if (!ftm) + return -ENOMEM; + + platform_set_drvdata(pdev, ftm); + + io = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!io) { + dev_err(&pdev->dev, "Failed to get memory region\n"); + return -ENODEV; + } + + ftm->pdev = pdev; + ftm->big_endian = of_property_read_bool(node, "big-endian"); + ftm->ftm_base = devm_ioremap(&pdev->dev, io->start, resource_size(io)); + + if (!ftm->ftm_base) { + dev_err(&pdev->dev, "Failed to map memory region\n"); + return -EINVAL; + } + ftm->counter.name = dev_name(&pdev->dev); + ftm->counter.parent = &pdev->dev; + ftm->counter.ops = &ftm_quaddec_cnt_ops; + ftm->counter.counts = &ftm_quaddec_counts; + ftm->counter.num_counts = 1; + ftm->counter.signals = ftm_quaddec_signals; + ftm->counter.num_signals = ARRAY_SIZE(ftm_quaddec_signals); + ftm->counter.priv = ftm; + + mutex_init(&ftm->ftm_quaddec_mutex); + + ftm_quaddec_init(ftm); + + ret = counter_register(&ftm->counter); + if (ret) + ftm_quaddec_disable(ftm); + + return ret; +} + +static int ftm_quaddec_remove(struct platform_device *pdev) +{ + struct ftm_quaddec *ftm = platform_get_drvdata(pdev); + + counter_unregister(&ftm->counter); + + ftm_quaddec_disable(ftm); + + return 0; +} + +static const struct of_device_id ftm_quaddec_match[] = { + { .compatible = "fsl,ftm-quaddec" }, + {}, +}; + +static struct platform_driver ftm_quaddec_driver = { + .driver = { + .name = "ftm-quaddec", + .owner = THIS_MODULE, + .of_match_table = ftm_quaddec_match, + }, + .probe = ftm_quaddec_probe, + .remove = ftm_quaddec_remove, +}; + +module_platform_driver(ftm_quaddec_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Kjeld Flarup X-Patchwork-Id: 10840913 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C7DD3139A for ; Wed, 6 Mar 2019 11:26:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B05F828ACB for ; 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[188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:34 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Subject: [PATCH v2 6/7] counter: ftm-quaddec: Documentation: Add specific counter sysfs documentation Date: Wed, 6 Mar 2019 12:12:07 +0100 Message-Id: <20190306111208.7454-7-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190306_031236_281736_0CCC0867 X-CRM114-Status: GOOD ( 11.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Patrick Havelange Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This adds documentation for the specific prescaler entry. Signed-off-by: Patrick Havelange --- Changes v2 - Add doc for prescaler entry --- .../ABI/testing/sysfs-bus-counter-ftm-quaddec | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-counter-ftm-quaddec diff --git a/Documentation/ABI/testing/sysfs-bus-counter-ftm-quaddec b/Documentation/ABI/testing/sysfs-bus-counter-ftm-quaddec new file mode 100644 index 000000000000..2da629d6d485 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-counter-ftm-quaddec @@ -0,0 +1,16 @@ +What: /sys/bus/counter/devices/counterX/countY/prescaler_available +KernelVersion: 5.1 +Contact: linux-iio@vger.kernel.org +Description: + Discrete set of available values for the respective Count Y + configuration are listed in this file. Values are delimited by + newline characters. + +What: /sys/bus/counter/devices/counterX/countY/prescaler +KernelVersion: 5.1 +Contact: linux-iio@vger.kernel.org +Description: + Configure the prescaler value associated with Count Y. + On the FlexTimer, the counter clock source passes through a + prescaler that is a 7-bit counter. This acts like a clock + divider. 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[188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:35 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Subject: [PATCH v2 7/7] LS1021A: dtsi: add ftm quad decoder entries Date: Wed, 6 Mar 2019 12:12:08 +0100 Message-Id: <20190306111208.7454-8-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190306_031237_471566_DA99C30D X-CRM114-Status: UNSURE ( 9.99 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Patrick Havelange Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add the 4 Quadrature counters for this board. Signed-off-by: Patrick Havelange Reviewed-by: Esben Haabendal --- Changes v2 - None --- arch/arm/boot/dts/ls1021a.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index ed0941292172..0168fb62590a 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -433,6 +433,34 @@ status = "disabled"; }; + counter0: counter@29d0000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x0 0x29d0000 0x0 0x10000>; + big-endian; + status = "disabled"; + }; + + counter1: counter@29e0000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x0 0x29e0000 0x0 0x10000>; + big-endian; + status = "disabled"; + }; + + counter2: counter@29f0000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x0 0x29f0000 0x0 0x10000>; + big-endian; + status = "disabled"; + }; + + counter3: counter@2a00000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x0 0x2a00000 0x0 0x10000>; + big-endian; + status = "disabled"; + }; + gpio0: gpio@2300000 { compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2300000 0x0 0x10000>;