From patchwork Mon Aug 26 12:38:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13777834 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 20A6412E1E0; Mon, 26 Aug 2024 12:38:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724675905; cv=none; b=UeVBtB1alVu/FRu9egN2ZY6x3xd9GWeKMDyWf1uvlvDr0Tpgce0Jsvd/U8SPifF1vFkUlPlwHviHX65e8tJ2vFDcQyqW0rniH635XCHme3wlqQ7HmGZkuFfP1cVX+BzAMGym2lcytOXlTC1JM5oLu+mKDof1oyDqv/HcF9O8/XU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724675905; c=relaxed/simple; bh=vA7ttzRNzUV7co4ZP9nUe2rlkwBY36mRzJINsIQkvig=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=cbPzJ3IXfw3yyep1F52y3qxx+4kpW4uWaPILPkTOwdBC7MQEzr1rMRBsDKr5oUV544+IRuuE+nR2dtIVgTKqW70L68Z995hRGQdk3rGc+NzV0qFuRvt7EHwCsar25DeHj7R4oEDAkHObMKwfX5R/hPIvWrtTrMUeXpTOZ9ww2oY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com; spf=pass smtp.mailfrom=protonmail.com; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b=NiXCwmHB; arc=none smtp.client-ip=185.70.43.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=protonmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b="NiXCwmHB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1724675895; x=1724935095; bh=Ma25zZeAC2tka3gir9Q2wo3t5qDCW7ywNbcO+UVsMJA=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=NiXCwmHBXppAmUxx2Wjn+fpzSy6qNlBJ8aGtt+zp34hb1rJRUScBvUqdmXi2YVel8 MKEFykEb/+MWbH7a9LIcBS5ASzisElN+gdtzG+15Iz99G0lI0JsFdB7ozdPa3ZQVOd cE4HltaBbXgXH0aRQv6nFETOoGMYMXWWBz7QcFT6v3SiIsy3fxXiZsHSh+znBLDTIz aFQA/L0qJjhKQmBrTb7T+Y0QbwkOgMa5lu3QyyZkIQBbUuFth6yObSe2kR37lykb2z TyRSrejkfE2edtz1xX7coFQLlc1el3nTVGfwOu5u/dLjVEMOP9ytWZ2X0oxIOwNPRo mke6D84+ohCbA== Date: Mon, 26 Aug 2024 12:38:11 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek , Greg Kroah-Hartman From: Harry Austen Cc: Shubhrajyoti Datta , Dave Ertman , Ira Weiny , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen Subject: [PATCH v3 1/9] clk: clocking-wizard: simplify probe/remove with devres helpers Message-ID: <20240826123602.1872-2-hpausten@protonmail.com> In-Reply-To: <20240826123602.1872-1-hpausten@protonmail.com> References: <20240826123602.1872-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: de4a648e4edad753f1972eb015d3562bd7b9578f Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Remove need to do various operations in remove callback and error paths by utilising device managed versions of clock and notifier APIs. Signed-off-by: Harry Austen Reviewed-by: Stephen Boyd --- drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 48 ++++++---------------- 1 file changed, 13 insertions(+), 35 deletions(-) diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index 19eb3fb7ae319..0ca045849ea3e 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -1001,21 +1001,15 @@ static int clk_wzrd_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1), "clk_in1 not found\n"); - clk_wzrd->axi_clk = devm_clk_get(&pdev->dev, "s_axi_aclk"); + clk_wzrd->axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); if (IS_ERR(clk_wzrd->axi_clk)) return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk), "s_axi_aclk not found\n"); - ret = clk_prepare_enable(clk_wzrd->axi_clk); - if (ret) { - dev_err(&pdev->dev, "enabling s_axi_aclk failed\n"); - return ret; - } rate = clk_get_rate(clk_wzrd->axi_clk); if (rate > WZRD_ACLK_MAX_FREQ) { dev_err(&pdev->dev, "s_axi_aclk frequency (%lu) too high\n", rate); - ret = -EINVAL; - goto err_disable_clk; + return -EINVAL; } data = device_get_match_data(&pdev->dev); @@ -1023,16 +1017,12 @@ static int clk_wzrd_probe(struct platform_device *pdev) is_versal = data->is_versal; ret = of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs); - if (ret || nr_outputs > WZRD_NUM_OUTPUTS) { - ret = -EINVAL; - goto err_disable_clk; - } + if (ret || nr_outputs > WZRD_NUM_OUTPUTS) + return -EINVAL; clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_out0", dev_name(&pdev->dev)); - if (!clkout_name) { - ret = -ENOMEM; - goto err_disable_clk; - } + if (!clkout_name) + return -ENOMEM; if (is_versal) { if (nr_outputs == 1) { @@ -1090,18 +1080,15 @@ static int clk_wzrd_probe(struct platform_device *pdev) div = 1000; } clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul", dev_name(&pdev->dev)); - if (!clk_name) { - ret = -ENOMEM; - goto err_disable_clk; - } + if (!clk_name) + return -ENOMEM; clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor (&pdev->dev, clk_name, __clk_get_name(clk_wzrd->clk_in1), 0, mult, div); if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul])) { dev_err(&pdev->dev, "unable to register fixed-factor clock\n"); - ret = PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul]); - goto err_disable_clk; + return PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul]); } clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul_div", dev_name(&pdev->dev)); @@ -1197,13 +1184,14 @@ static int clk_wzrd_probe(struct platform_device *pdev) if (clk_wzrd->speed_grade) { clk_wzrd->nb.notifier_call = clk_wzrd_clk_notifier; - ret = clk_notifier_register(clk_wzrd->clk_in1, - &clk_wzrd->nb); + ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->clk_in1, + &clk_wzrd->nb); if (ret) dev_warn(&pdev->dev, "unable to register clock notifier\n"); - ret = clk_notifier_register(clk_wzrd->axi_clk, &clk_wzrd->nb); + ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->axi_clk, + &clk_wzrd->nb); if (ret) dev_warn(&pdev->dev, "unable to register clock notifier\n"); @@ -1215,9 +1203,6 @@ static int clk_wzrd_probe(struct platform_device *pdev) clk_unregister(clk_wzrd->clks_internal[1]); err_rm_int_clk: clk_unregister(clk_wzrd->clks_internal[0]); -err_disable_clk: - clk_disable_unprepare(clk_wzrd->axi_clk); - return ret; } @@ -1232,13 +1217,6 @@ static void clk_wzrd_remove(struct platform_device *pdev) clk_unregister(clk_wzrd->clkout[i]); for (i = 0; i < wzrd_clk_int_max; i++) clk_unregister(clk_wzrd->clks_internal[i]); - - if (clk_wzrd->speed_grade) { - clk_notifier_unregister(clk_wzrd->axi_clk, &clk_wzrd->nb); - clk_notifier_unregister(clk_wzrd->clk_in1, &clk_wzrd->nb); - } - - clk_disable_unprepare(clk_wzrd->axi_clk); } static const struct of_device_id clk_wzrd_ids[] = { From patchwork Mon Aug 26 12:38:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13777833 Received: from mail-4316.protonmail.ch (mail-4316.protonmail.ch [185.70.43.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E98816EC19; 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Signed-off-by: Harry Austen --- drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 77 +++++++++++----------- 1 file changed, 40 insertions(+), 37 deletions(-) diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index 0ca045849ea3e..cd795a4952099 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -121,26 +122,24 @@ enum clk_wzrd_int_clks { /** * struct clk_wzrd - Clock wizard private data structure * - * @clk_data: Clock data * @nb: Notifier block * @base: Memory base * @clk_in1: Handle to input clock 'clk_in1' * @axi_clk: Handle to input clock 's_axi_aclk' * @clks_internal: Internal clocks - * @clkout: Output clocks * @speed_grade: Speed grade of the device * @suspended: Flag indicating power state of the device + * @clk_data: Output clock data */ struct clk_wzrd { - struct clk_onecell_data clk_data; struct notifier_block nb; void __iomem *base; struct clk *clk_in1; struct clk *axi_clk; - struct clk *clks_internal[wzrd_clk_int_max]; - struct clk *clkout[WZRD_NUM_OUTPUTS]; + struct clk_hw *clks_internal[wzrd_clk_int_max]; unsigned int speed_grade; bool suspended; + struct clk_hw_onecell_data clk_data; }; /** @@ -765,7 +764,7 @@ static const struct clk_ops clk_wzrd_clk_divider_ops_f = { .recalc_rate = clk_wzrd_recalc_ratef, }; -static struct clk *clk_wzrd_register_divf(struct device *dev, +static struct clk_hw *clk_wzrd_register_divf(struct device *dev, const char *name, const char *parent_name, unsigned long flags, @@ -805,10 +804,10 @@ static struct clk *clk_wzrd_register_divf(struct device *dev, if (ret) return ERR_PTR(ret); - return hw->clk; + return hw; } -static struct clk *clk_wzrd_ver_register_divider(struct device *dev, +static struct clk_hw *clk_wzrd_ver_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, @@ -852,10 +851,10 @@ static struct clk *clk_wzrd_ver_register_divider(struct device *dev, if (ret) return ERR_PTR(ret); - return hw->clk; + return hw; } -static struct clk *clk_wzrd_register_divider(struct device *dev, +static struct clk_hw *clk_wzrd_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, @@ -898,7 +897,7 @@ static struct clk *clk_wzrd_register_divider(struct device *dev, if (ret) return ERR_PTR(ret); - return hw->clk; + return hw; } static int clk_wzrd_clk_notifier(struct notifier_block *nb, unsigned long event, @@ -978,7 +977,12 @@ static int clk_wzrd_probe(struct platform_device *pdev) int nr_outputs; int i, ret; - clk_wzrd = devm_kzalloc(&pdev->dev, sizeof(*clk_wzrd), GFP_KERNEL); + ret = of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs); + if (ret || nr_outputs > WZRD_NUM_OUTPUTS) + return -EINVAL; + + clk_wzrd = devm_kzalloc(&pdev->dev, struct_size(clk_wzrd, clk_data.hws, nr_outputs), + GFP_KERNEL); if (!clk_wzrd) return -ENOMEM; platform_set_drvdata(pdev, clk_wzrd); @@ -1016,17 +1020,13 @@ static int clk_wzrd_probe(struct platform_device *pdev) if (data) is_versal = data->is_versal; - ret = of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs); - if (ret || nr_outputs > WZRD_NUM_OUTPUTS) - return -EINVAL; - clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_out0", dev_name(&pdev->dev)); if (!clkout_name) return -ENOMEM; if (is_versal) { if (nr_outputs == 1) { - clk_wzrd->clkout[0] = clk_wzrd_ver_register_divider + clk_wzrd->clk_data.hws[0] = clk_wzrd_ver_register_divider (&pdev->dev, clkout_name, __clk_get_name(clk_wzrd->clk_in1), 0, clk_wzrd->base, WZRD_CLK_CFG_REG(is_versal, 3), @@ -1059,7 +1059,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) div = 64; } else { if (nr_outputs == 1) { - clk_wzrd->clkout[0] = clk_wzrd_register_divider + clk_wzrd->clk_data.hws[0] = clk_wzrd_register_divider (&pdev->dev, clkout_name, __clk_get_name(clk_wzrd->clk_in1), 0, clk_wzrd->base, WZRD_CLK_CFG_REG(is_versal, 3), @@ -1082,7 +1082,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul", dev_name(&pdev->dev)); if (!clk_name) return -ENOMEM; - clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor + clk_wzrd->clks_internal[wzrd_clk_mul] = clk_hw_register_fixed_factor (&pdev->dev, clk_name, __clk_get_name(clk_wzrd->clk_in1), 0, mult, div); @@ -1108,15 +1108,15 @@ static int clk_wzrd_probe(struct platform_device *pdev) if (!div) div = 1; - clk_mul_name = __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]); + clk_mul_name = clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]); clk_wzrd->clks_internal[wzrd_clk_mul_div] = - clk_register_fixed_factor(&pdev->dev, clk_name, - clk_mul_name, 0, 1, div); + clk_hw_register_fixed_factor(&pdev->dev, clk_name, + clk_mul_name, 0, 1, div); } else { ctrl_reg = clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0); - clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_register_divider + clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_hw_register_divider (&pdev->dev, clk_name, - __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), + clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), flags, ctrl_reg, 0, 8, CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, &clkwzrd_lock); } @@ -1136,7 +1136,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) } if (is_versal) { - clk_wzrd->clkout[i] = clk_wzrd_ver_register_divider + clk_wzrd->clk_data.hws[i] = clk_wzrd_ver_register_divider (&pdev->dev, clkout_name, clk_name, 0, clk_wzrd->base, @@ -1148,7 +1148,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) DIV_O, &clkwzrd_lock); } else { if (!i) - clk_wzrd->clkout[i] = clk_wzrd_register_divf + clk_wzrd->clk_data.hws[i] = clk_wzrd_register_divf (&pdev->dev, clkout_name, clk_name, flags, clk_wzrd->base, (WZRD_CLK_CFG_REG(is_versal, 2) + i * 12), WZRD_CLKOUT_DIVIDE_SHIFT, @@ -1156,7 +1156,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, DIV_O, &clkwzrd_lock); else - clk_wzrd->clkout[i] = clk_wzrd_register_divider + clk_wzrd->clk_data.hws[i] = clk_wzrd_register_divider (&pdev->dev, clkout_name, clk_name, 0, clk_wzrd->base, (WZRD_CLK_CFG_REG(is_versal, 2) + i * 12), WZRD_CLKOUT_DIVIDE_SHIFT, @@ -1164,22 +1164,25 @@ static int clk_wzrd_probe(struct platform_device *pdev) CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, DIV_O, &clkwzrd_lock); } - if (IS_ERR(clk_wzrd->clkout[i])) { + if (IS_ERR(clk_wzrd->clk_data.hws[i])) { int j; for (j = i + 1; j < nr_outputs; j++) - clk_unregister(clk_wzrd->clkout[j]); + clk_hw_unregister(clk_wzrd->clk_data.hws[j]); dev_err(&pdev->dev, "unable to register divider clock\n"); - ret = PTR_ERR(clk_wzrd->clkout[i]); + ret = PTR_ERR(clk_wzrd->clk_data.hws[i]); goto err_rm_int_clks; } } out: - clk_wzrd->clk_data.clks = clk_wzrd->clkout; - clk_wzrd->clk_data.clk_num = ARRAY_SIZE(clk_wzrd->clkout); - of_clk_add_provider(np, of_clk_src_onecell_get, &clk_wzrd->clk_data); + clk_wzrd->clk_data.num = nr_outputs; + ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get, &clk_wzrd->clk_data); + if (ret) { + dev_err(&pdev->dev, "unable to register clock provider\n"); + return ret; + } if (clk_wzrd->speed_grade) { clk_wzrd->nb.notifier_call = clk_wzrd_clk_notifier; @@ -1200,9 +1203,9 @@ static int clk_wzrd_probe(struct platform_device *pdev) return 0; err_rm_int_clks: - clk_unregister(clk_wzrd->clks_internal[1]); + clk_hw_unregister(clk_wzrd->clks_internal[1]); err_rm_int_clk: - clk_unregister(clk_wzrd->clks_internal[0]); + clk_hw_unregister(clk_wzrd->clks_internal[0]); return ret; } @@ -1214,9 +1217,9 @@ static void clk_wzrd_remove(struct platform_device *pdev) of_clk_del_provider(pdev->dev.of_node); for (i = 0; i < WZRD_NUM_OUTPUTS; i++) - clk_unregister(clk_wzrd->clkout[i]); + clk_hw_unregister(clk_wzrd->clk_data.hws[i]); for (i = 0; i < wzrd_clk_int_max; i++) - clk_unregister(clk_wzrd->clks_internal[i]); + clk_hw_unregister(clk_wzrd->clks_internal[i]); } static const struct of_device_id clk_wzrd_ids[] = { From patchwork Mon Aug 26 12:38:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13777835 Received: from mail-4316.protonmail.ch (mail-4316.protonmail.ch [185.70.43.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4E1717BEA5; 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Signed-off-by: Harry Austen --- drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 52 +++++----------------- 1 file changed, 11 insertions(+), 41 deletions(-) diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index cd795a4952099..f332e0eee56c8 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -1082,7 +1082,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul", dev_name(&pdev->dev)); if (!clk_name) return -ENOMEM; - clk_wzrd->clks_internal[wzrd_clk_mul] = clk_hw_register_fixed_factor + clk_wzrd->clks_internal[wzrd_clk_mul] = devm_clk_hw_register_fixed_factor (&pdev->dev, clk_name, __clk_get_name(clk_wzrd->clk_in1), 0, mult, div); @@ -1092,10 +1092,8 @@ static int clk_wzrd_probe(struct platform_device *pdev) } clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul_div", dev_name(&pdev->dev)); - if (!clk_name) { - ret = -ENOMEM; - goto err_rm_int_clk; - } + if (!clk_name) + return -ENOMEM; if (is_versal) { edged = !!(readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 20)) & @@ -1110,11 +1108,11 @@ static int clk_wzrd_probe(struct platform_device *pdev) clk_mul_name = clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]); clk_wzrd->clks_internal[wzrd_clk_mul_div] = - clk_hw_register_fixed_factor(&pdev->dev, clk_name, - clk_mul_name, 0, 1, div); + devm_clk_hw_register_fixed_factor(&pdev->dev, clk_name, + clk_mul_name, 0, 1, div); } else { ctrl_reg = clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0); - clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_hw_register_divider + clk_wzrd->clks_internal[wzrd_clk_mul_div] = devm_clk_hw_register_divider (&pdev->dev, clk_name, clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), flags, ctrl_reg, 0, 8, CLK_DIVIDER_ONE_BASED | @@ -1122,18 +1120,15 @@ static int clk_wzrd_probe(struct platform_device *pdev) } if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div])) { dev_err(&pdev->dev, "unable to register divider clock\n"); - ret = PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]); - goto err_rm_int_clk; + return PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]); } /* register div per output */ for (i = nr_outputs - 1; i >= 0 ; i--) { clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_out%d", dev_name(&pdev->dev), i); - if (!clkout_name) { - ret = -ENOMEM; - goto err_rm_int_clk; - } + if (!clkout_name) + return -ENOMEM; if (is_versal) { clk_wzrd->clk_data.hws[i] = clk_wzrd_ver_register_divider @@ -1165,20 +1160,15 @@ static int clk_wzrd_probe(struct platform_device *pdev) DIV_O, &clkwzrd_lock); } if (IS_ERR(clk_wzrd->clk_data.hws[i])) { - int j; - - for (j = i + 1; j < nr_outputs; j++) - clk_hw_unregister(clk_wzrd->clk_data.hws[j]); dev_err(&pdev->dev, "unable to register divider clock\n"); - ret = PTR_ERR(clk_wzrd->clk_data.hws[i]); - goto err_rm_int_clks; + return PTR_ERR(clk_wzrd->clk_data.hws[i]); } } out: clk_wzrd->clk_data.num = nr_outputs; - ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get, &clk_wzrd->clk_data); + ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get, &clk_wzrd->clk_data); if (ret) { dev_err(&pdev->dev, "unable to register clock provider\n"); return ret; @@ -1201,25 +1191,6 @@ static int clk_wzrd_probe(struct platform_device *pdev) } return 0; - -err_rm_int_clks: - clk_hw_unregister(clk_wzrd->clks_internal[1]); -err_rm_int_clk: - clk_hw_unregister(clk_wzrd->clks_internal[0]); - return ret; -} - -static void clk_wzrd_remove(struct platform_device *pdev) -{ - int i; - struct clk_wzrd *clk_wzrd = platform_get_drvdata(pdev); - - of_clk_del_provider(pdev->dev.of_node); - - for (i = 0; i < WZRD_NUM_OUTPUTS; i++) - clk_hw_unregister(clk_wzrd->clk_data.hws[i]); - for (i = 0; i < wzrd_clk_int_max; i++) - clk_hw_unregister(clk_wzrd->clks_internal[i]); } static const struct of_device_id clk_wzrd_ids[] = { @@ -1238,7 +1209,6 @@ static struct platform_driver clk_wzrd_driver = { .pm = &clk_wzrd_dev_pm_ops, }, .probe = clk_wzrd_probe, - .remove_new = clk_wzrd_remove, }; module_platform_driver(clk_wzrd_driver); From patchwork Mon Aug 26 12:38:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13777837 Received: from mail-40133.protonmail.ch (mail-40133.protonmail.ch [185.70.40.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56811185931; Mon, 26 Aug 2024 12:38:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.40.133 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724675918; cv=none; b=KR29KSGhwTVAaSXmGywiUVGb9OrJqN5VhLFArwcYo117uWyXuRcN/rpWAGdJVHqwhoz5gpjAKFerGLab4Sh6RRHTpfv0rAB0kKmNWjKiltWVJC818Ln3TKw5F3/M6DqXIufRM9dWX9BK46p5L84G/palPfAs2JFd3lHZjxMGy7s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724675918; c=relaxed/simple; bh=FBOWkOJ8Fv8/HjudbpS8HPnjZSATpEa1kECwdzoWEUs=; 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x=1724935108; bh=0DFY+wLkYuEWyBy/mhSUmuzkOWFdO8lFfTnXo28Nt74=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=HjEsGjgf7W37hkP1e5QLGoI0+JYT5Uf7dmKXwDzgBTfU4bV4ON5OjRMfm3IacW5BT SoYLHbxQt07XGk5rtFdPNAJO3MgtmWF2l2COlFX/pJX4PMMdQr90EiuoCQL9ARxPnE olqXL5ptOWeAmhTkLMYd1TfqIO7APF74Mo8kvkEQsR9VTyf63nsb74ztgPuf3CZBs/ VrRMzUBDslq83Av8BpZV1nMv8njthYTsBGMgNBPAd10l4dQAwSdpdlyyVazJz/3LcU aR+6uXulhQ5VE8YTViSrrqL18C05H5PaRrqQBLfa15Jp3a2fzd9DS4FcLJKNkFOMY+ 7bdqNqg8ON01A== Date: Mon, 26 Aug 2024 12:38:24 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek , Greg Kroah-Hartman From: Harry Austen Cc: Shubhrajyoti Datta , Dave Ertman , Ira Weiny , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen Subject: [PATCH v3 4/9] clk: clocking-wizard: move clock registration to separate function Message-ID: <20240826123602.1872-5-hpausten@protonmail.com> In-Reply-To: <20240826123602.1872-1-hpausten@protonmail.com> References: <20240826123602.1872-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: 45e8454da06f098c8983fadc75a227a513988076 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Provide clear separation of dynamic reconfiguration logic, by moving its setup procedure to its own dedicated function. Signed-off-by: Harry Austen --- drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 143 +++++++++++---------- 1 file changed, 75 insertions(+), 68 deletions(-) diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index f332e0eee56c8..1a65a7d153c35 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -962,72 +962,30 @@ static const struct versal_clk_data versal_data = { .is_versal = true, }; -static int clk_wzrd_probe(struct platform_device *pdev) +static int clk_wzrd_register_output_clocks(struct device *dev, int nr_outputs) { const char *clkout_name, *clk_name, *clk_mul_name; + struct clk_wzrd *clk_wzrd = dev_get_drvdata(dev); u32 regl, regh, edge, regld, reghd, edged, div; - struct device_node *np = pdev->dev.of_node; const struct versal_clk_data *data; - struct clk_wzrd *clk_wzrd; unsigned long flags = 0; + bool is_versal = false; void __iomem *ctrl_reg; u32 reg, reg_f, mult; - bool is_versal = false; - unsigned long rate; - int nr_outputs; - int i, ret; - - ret = of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs); - if (ret || nr_outputs > WZRD_NUM_OUTPUTS) - return -EINVAL; - - clk_wzrd = devm_kzalloc(&pdev->dev, struct_size(clk_wzrd, clk_data.hws, nr_outputs), - GFP_KERNEL); - if (!clk_wzrd) - return -ENOMEM; - platform_set_drvdata(pdev, clk_wzrd); - - clk_wzrd->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(clk_wzrd->base)) - return PTR_ERR(clk_wzrd->base); - - ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade); - if (!ret) { - if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) { - dev_warn(&pdev->dev, "invalid speed grade '%d'\n", - clk_wzrd->speed_grade); - clk_wzrd->speed_grade = 0; - } - } - - clk_wzrd->clk_in1 = devm_clk_get(&pdev->dev, "clk_in1"); - if (IS_ERR(clk_wzrd->clk_in1)) - return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1), - "clk_in1 not found\n"); + int i; - clk_wzrd->axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); - if (IS_ERR(clk_wzrd->axi_clk)) - return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk), - "s_axi_aclk not found\n"); - rate = clk_get_rate(clk_wzrd->axi_clk); - if (rate > WZRD_ACLK_MAX_FREQ) { - dev_err(&pdev->dev, "s_axi_aclk frequency (%lu) too high\n", - rate); - return -EINVAL; - } - - data = device_get_match_data(&pdev->dev); + data = device_get_match_data(dev); if (data) is_versal = data->is_versal; - clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_out0", dev_name(&pdev->dev)); + clkout_name = devm_kasprintf(dev, GFP_KERNEL, "%s_out0", dev_name(dev)); if (!clkout_name) return -ENOMEM; if (is_versal) { if (nr_outputs == 1) { clk_wzrd->clk_data.hws[0] = clk_wzrd_ver_register_divider - (&pdev->dev, clkout_name, + (dev, clkout_name, __clk_get_name(clk_wzrd->clk_in1), 0, clk_wzrd->base, WZRD_CLK_CFG_REG(is_versal, 3), WZRD_CLKOUT_DIVIDE_SHIFT, @@ -1035,7 +993,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, DIV_ALL, &clkwzrd_lock); - goto out; + return 0; } /* register multiplier */ edge = !!(readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0)) & @@ -1060,7 +1018,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) } else { if (nr_outputs == 1) { clk_wzrd->clk_data.hws[0] = clk_wzrd_register_divider - (&pdev->dev, clkout_name, + (dev, clkout_name, __clk_get_name(clk_wzrd->clk_in1), 0, clk_wzrd->base, WZRD_CLK_CFG_REG(is_versal, 3), WZRD_CLKOUT_DIVIDE_SHIFT, @@ -1068,7 +1026,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, DIV_ALL, &clkwzrd_lock); - goto out; + return 0; } reg = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0)); reg_f = reg & WZRD_CLKFBOUT_FRAC_MASK; @@ -1079,19 +1037,19 @@ static int clk_wzrd_probe(struct platform_device *pdev) mult = (reg * 1000) + reg_f; div = 1000; } - clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul", dev_name(&pdev->dev)); + clk_name = devm_kasprintf(dev, GFP_KERNEL, "%s_mul", dev_name(dev)); if (!clk_name) return -ENOMEM; clk_wzrd->clks_internal[wzrd_clk_mul] = devm_clk_hw_register_fixed_factor - (&pdev->dev, clk_name, + (dev, clk_name, __clk_get_name(clk_wzrd->clk_in1), 0, mult, div); if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul])) { - dev_err(&pdev->dev, "unable to register fixed-factor clock\n"); + dev_err(dev, "unable to register fixed-factor clock\n"); return PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul]); } - clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul_div", dev_name(&pdev->dev)); + clk_name = devm_kasprintf(dev, GFP_KERNEL, "%s_mul_div", dev_name(dev)); if (!clk_name) return -ENOMEM; @@ -1108,31 +1066,29 @@ static int clk_wzrd_probe(struct platform_device *pdev) clk_mul_name = clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]); clk_wzrd->clks_internal[wzrd_clk_mul_div] = - devm_clk_hw_register_fixed_factor(&pdev->dev, clk_name, - clk_mul_name, 0, 1, div); + devm_clk_hw_register_fixed_factor(dev, clk_name, clk_mul_name, 0, 1, div); } else { ctrl_reg = clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0); clk_wzrd->clks_internal[wzrd_clk_mul_div] = devm_clk_hw_register_divider - (&pdev->dev, clk_name, + (dev, clk_name, clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), flags, ctrl_reg, 0, 8, CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, &clkwzrd_lock); } if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div])) { - dev_err(&pdev->dev, "unable to register divider clock\n"); + dev_err(dev, "unable to register divider clock\n"); return PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]); } /* register div per output */ for (i = nr_outputs - 1; i >= 0 ; i--) { - clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, - "%s_out%d", dev_name(&pdev->dev), i); + clkout_name = devm_kasprintf(dev, GFP_KERNEL, "%s_out%d", dev_name(dev), i); if (!clkout_name) return -ENOMEM; if (is_versal) { clk_wzrd->clk_data.hws[i] = clk_wzrd_ver_register_divider - (&pdev->dev, + (dev, clkout_name, clk_name, 0, clk_wzrd->base, (WZRD_CLK_CFG_REG(is_versal, 3) + i * 8), @@ -1144,7 +1100,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) } else { if (!i) clk_wzrd->clk_data.hws[i] = clk_wzrd_register_divf - (&pdev->dev, clkout_name, clk_name, flags, clk_wzrd->base, + (dev, clkout_name, clk_name, flags, clk_wzrd->base, (WZRD_CLK_CFG_REG(is_versal, 2) + i * 12), WZRD_CLKOUT_DIVIDE_SHIFT, WZRD_CLKOUT_DIVIDE_WIDTH, @@ -1152,7 +1108,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) DIV_O, &clkwzrd_lock); else clk_wzrd->clk_data.hws[i] = clk_wzrd_register_divider - (&pdev->dev, clkout_name, clk_name, 0, clk_wzrd->base, + (dev, clkout_name, clk_name, 0, clk_wzrd->base, (WZRD_CLK_CFG_REG(is_versal, 2) + i * 12), WZRD_CLKOUT_DIVIDE_SHIFT, WZRD_CLKOUT_DIVIDE_WIDTH, @@ -1160,13 +1116,64 @@ static int clk_wzrd_probe(struct platform_device *pdev) DIV_O, &clkwzrd_lock); } if (IS_ERR(clk_wzrd->clk_data.hws[i])) { - dev_err(&pdev->dev, - "unable to register divider clock\n"); + dev_err(dev, "unable to register divider clock\n"); return PTR_ERR(clk_wzrd->clk_data.hws[i]); } } -out: + return 0; +} + +static int clk_wzrd_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct clk_wzrd *clk_wzrd; + unsigned long rate; + int nr_outputs; + int ret; + + ret = of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs); + if (ret || nr_outputs > WZRD_NUM_OUTPUTS) + return -EINVAL; + + clk_wzrd = devm_kzalloc(&pdev->dev, struct_size(clk_wzrd, clk_data.hws, nr_outputs), + GFP_KERNEL); + if (!clk_wzrd) + return -ENOMEM; + platform_set_drvdata(pdev, clk_wzrd); + + clk_wzrd->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(clk_wzrd->base)) + return PTR_ERR(clk_wzrd->base); + + ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade); + if (!ret) { + if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) { + dev_warn(&pdev->dev, "invalid speed grade '%d'\n", + clk_wzrd->speed_grade); + clk_wzrd->speed_grade = 0; + } + } + + clk_wzrd->clk_in1 = devm_clk_get(&pdev->dev, "clk_in1"); + if (IS_ERR(clk_wzrd->clk_in1)) + return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1), + "clk_in1 not found\n"); + + clk_wzrd->axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); + if (IS_ERR(clk_wzrd->axi_clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk), + "s_axi_aclk not found\n"); + rate = clk_get_rate(clk_wzrd->axi_clk); + if (rate > WZRD_ACLK_MAX_FREQ) { + dev_err(&pdev->dev, "s_axi_aclk frequency (%lu) too high\n", rate); + return -EINVAL; + } + + ret = clk_wzrd_register_output_clocks(&pdev->dev, nr_outputs); + if (ret) + return ret; + clk_wzrd->clk_data.num = nr_outputs; ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get, &clk_wzrd->clk_data); if (ret) { From patchwork Mon Aug 26 12:38:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13777836 Received: from mail-4316.protonmail.ch (mail-4316.protonmail.ch [185.70.43.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 79DDD1865E1; Mon, 26 Aug 2024 12:38:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724675917; cv=none; b=q5vr31RBJc1bYVwuZCdydvOC2u+Ey/64NOPkatB4QpL3zZPX/cAZqnt8L1Fi5pmk1leugnmsnQL3zxtETYMuKxRCXM+D/c0F+V27QOqvGIY/+sKS2cQcR4w7YUT5Tgzh/C3fybWLU5L5SoS9CyQ7wciUCXiIsA4XifmXc6+BKys= ARC-Message-Signature: i=1; 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a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1724675913; x=1724935113; bh=4hazs+UIzo4IgYzzXr9eJWZwi9I7AZWl/ecj0zSGZSw=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=B4Aoy6r1KdMMVkvXVXauQvAUrXot8cBURn5N3FRyS2JOY8H0IJqpFsj2G0C7+HhFi EkpeKfal4NS5+ppblAwy2pVLaYNEAgZbk/t7ZI38UY9ZIdhByRk+O50rfyrSv2AHjP y/CLjx2dW8VB9L43p2/EppmU8tD6A8KTnjqRUp8LTohwXNLrT5JoEUnyF3PMDOzM1X RGAnFsTR0LeWf9/EVBeBJ2xugOW3NfkB9UpADgNN1lhxFQGX5Hyi1eMuU6PniGVTA8 zMPYF775YQKUH3u7KzxFlLU6BJYyHB1mrTQwsSzle8CaIbFPo1YmI70iyFx4SslvCT SNPQqJtxgSceg== Date: Mon, 26 Aug 2024 12:38:28 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek , Greg Kroah-Hartman From: Harry Austen Cc: Shubhrajyoti Datta , Dave Ertman , Ira Weiny , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen , Krzysztof Kozlowski Subject: [PATCH v3 5/9] dt-bindings: clock: xilinx: add description of user monitor interrupt Message-ID: <20240826123602.1872-6-hpausten@protonmail.com> In-Reply-To: <20240826123602.1872-1-hpausten@protonmail.com> References: <20240826123602.1872-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: 47cc1d64e01b33782b1046a6e0ff752f94bb98a6 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This Xilinx clocking wizard IP core outputs this interrupt signal to indicate when one of the four optional user clock inputs is either stopped, overruns, underruns or glitches. This functionality was only added from version 6.0 onwards, so restrict it to particular compatible strings. Signed-off-by: Harry Austen Reviewed-by: Krzysztof Kozlowski --- .../bindings/clock/xlnx,clocking-wizard.yaml | 24 ++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml index 9d5324dc1027a..2b9903f05ef34 100644 --- a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml @@ -39,6 +39,13 @@ properties: - const: clk_in1 - const: s_axi_aclk + interrupts: + items: + - description: user clock monitor interrupt + + interrupt-names: + items: + - const: monitor xlnx,speed-grade: $ref: /schemas/types.yaml#/definitions/uint32 @@ -62,17 +69,32 @@ required: - xlnx,speed-grade - xlnx,nr-outputs +allOf: + - if: + properties: + compatible: + enum: + - xlnx,clocking-wizard + - xlnx,clocking-wizard-v5.2 + then: + properties: + interrupts: false + interrupt-names: false + additionalProperties: false examples: - | + #include clock-controller@b0000000 { - compatible = "xlnx,clocking-wizard"; + compatible = "xlnx,clocking-wizard-v6.0"; reg = <0xb0000000 0x10000>; #clock-cells = <1>; xlnx,speed-grade = <1>; xlnx,nr-outputs = <6>; clock-names = "clk_in1", "s_axi_aclk"; clocks = <&clkc 15>, <&clkc 15>; + interrupts-extended = <&intc 52 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "monitor"; }; ... From patchwork Mon Aug 26 12:38:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13777838 Received: from mail-40131.protonmail.ch (mail-40131.protonmail.ch [185.70.40.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8D56188586; Mon, 26 Aug 2024 12:38:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.40.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724675921; cv=none; b=XN0StyF5GtFNrOpMFh5LyXzKa1ng0LqqSsa2J2/sLy0dRQnndaezBNdZmWK5bL/zuPyUKSvYSb4y2KPpKv35rZPL7VbcO4qz8pzInwmpeIWg1s7MOJwNnyXdu90DLyVuAQShxZT4ozvsuxsjjXncynqGkSJxowrMCjJkqfdyqdQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724675921; c=relaxed/simple; bh=41srDK0MuDn8Elb7xD1mGmMH+Sw4nupfzQfp74UxsXY=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YVgTbATG6Q67s28YPT7k6EWR9YeTzfZkrT7Orvfk5I3z4A0PpXQl0K7AQWByy4UWNPKsXOqY9JEn3DRqd0ekhrMQlFb9Pq6OIR/HbamvHot4DKmNb4KeVIFmd4OBSL2tFU81yEGI8UfqQSOFteXigEkHcObDt2F9mw3MNKJf4EM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com; spf=pass smtp.mailfrom=protonmail.com; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b=kJSvPvHA; arc=none smtp.client-ip=185.70.40.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=protonmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b="kJSvPvHA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1724675917; x=1724935117; bh=h/LZjiViK1KTa6JiCSBo81f43s9SkDGG36Wi8VELnlc=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=kJSvPvHAN9W9tTPypmczzn8CP/pUIs8eoDXoR11bunadPSf/yYUWVjH5qs9ZqurMs eN8LoF5DiCDyvMGpjV23e7OSripcqbsZgUZj8h0pXLq0pfH6Y66BJml4joPJ+BVaiz oqtQDJ91WcAW8YsutLwhMcyaI3c3SBD7h+VCPoTD3ea67eqtTd/Uj4xgqtbj7jKxzw g2K5m+K54Fguhc7hNmvvukyZAZRWrYRA3uqVkp1usOsHUmT/IEIjkgTyGqKl0SsAQH lkS+0JrXP0eU4mkNFyRwejf+2j3I3XSjih+15OYbLBJcE6fVQ7JK8d8PCRhtL8yj7P 7EAvwOzLto5vg== Date: Mon, 26 Aug 2024 12:38:32 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek , Greg Kroah-Hartman From: Harry Austen Cc: Shubhrajyoti Datta , Dave Ertman , Ira Weiny , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen Subject: [PATCH v3 6/9] clk: clocking-wizard: add user clock monitor support Message-ID: <20240826123602.1872-7-hpausten@protonmail.com> In-Reply-To: <20240826123602.1872-1-hpausten@protonmail.com> References: <20240826123602.1872-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: c6c0b939de3551c63045bbf6a94385231923af91 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Xilinx clocking wizard IP core supports monitoring of up to four optional user clock inputs, with a corresponding interrupt for notification in change of clock state (stop, underrun, overrun or glitch). Give access to this monitor logic through use of an auxiliary device. Use presence of the user monitor interrupt description in devicetree to indicate whether or not the auxiliary device should be registered. Also, this functionality is only supported from v6.0 onwards, so add indication of support to the device match data, in order to be tied to the utilised compatible string. Signed-off-by: Harry Austen --- drivers/clk/xilinx/Kconfig | 1 + drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 60 ++++++++++++++++++++-- 2 files changed, 56 insertions(+), 5 deletions(-) diff --git a/drivers/clk/xilinx/Kconfig b/drivers/clk/xilinx/Kconfig index 051756953558b..87f507bd9b6f3 100644 --- a/drivers/clk/xilinx/Kconfig +++ b/drivers/clk/xilinx/Kconfig @@ -21,6 +21,7 @@ config COMMON_CLK_XLNX_CLKWZRD tristate "Xilinx Clocking Wizard" depends on OF depends on HAS_IOMEM + select AUXILIARY_BUS help Support for the Xilinx Clocking Wizard IP core clock generator. Adds support for clocking wizard and compatible. diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index 1a65a7d153c35..35dad2fda254b 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -8,6 +8,7 @@ * */ +#include #include #include #include @@ -129,6 +130,7 @@ enum clk_wzrd_int_clks { * @clks_internal: Internal clocks * @speed_grade: Speed grade of the device * @suspended: Flag indicating power state of the device + * @adev: User clock monitor auxiliary device * @clk_data: Output clock data */ struct clk_wzrd { @@ -139,6 +141,7 @@ struct clk_wzrd { struct clk_hw *clks_internal[wzrd_clk_int_max]; unsigned int speed_grade; bool suspended; + struct auxiliary_device adev; struct clk_hw_onecell_data clk_data; }; @@ -171,8 +174,9 @@ struct clk_wzrd_divider { spinlock_t *lock; /* divider lock */ }; -struct versal_clk_data { +struct clk_wzrd_data { bool is_versal; + bool supports_monitor; }; #define to_clk_wzrd(_nb) container_of(_nb, struct clk_wzrd, nb) @@ -958,16 +962,58 @@ static int __maybe_unused clk_wzrd_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(clk_wzrd_dev_pm_ops, clk_wzrd_suspend, clk_wzrd_resume); -static const struct versal_clk_data versal_data = { - .is_versal = true, +static const struct clk_wzrd_data version_6_0_data = { + .is_versal = false, + .supports_monitor = true, }; +static const struct clk_wzrd_data versal_data = { + .is_versal = true, + .supports_monitor = true, +}; + +static void clk_wzrd_unregister_adev(void *_adev) +{ + struct auxiliary_device *adev = _adev; + + auxiliary_device_delete(adev); + auxiliary_device_uninit(adev); +} + +static int clk_wzrd_setup_monitor(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + const struct clk_wzrd_data *data = device_get_match_data(dev); + struct clk_wzrd *clk_wzrd = dev_get_drvdata(dev); + struct auxiliary_device *adev = &clk_wzrd->adev; + int ret; + + if (!data || !data->supports_monitor) + return 0; + + adev->name = "clk-mon"; + adev->dev.parent = dev; + adev->dev.platform_data = (__force void *)clk_wzrd->base; + + ret = auxiliary_device_init(adev); + if (ret) + return ret; + + ret = auxiliary_device_add(adev); + if (ret) { + auxiliary_device_uninit(adev); + return ret; + } + + return devm_add_action_or_reset(dev, clk_wzrd_unregister_adev, adev); +} + static int clk_wzrd_register_output_clocks(struct device *dev, int nr_outputs) { const char *clkout_name, *clk_name, *clk_mul_name; struct clk_wzrd *clk_wzrd = dev_get_drvdata(dev); u32 regl, regh, edge, regld, reghd, edged, div; - const struct versal_clk_data *data; + const struct clk_wzrd_data *data; unsigned long flags = 0; bool is_versal = false; void __iomem *ctrl_reg; @@ -1170,6 +1216,10 @@ static int clk_wzrd_probe(struct platform_device *pdev) return -EINVAL; } + ret = clk_wzrd_setup_monitor(pdev); + if (ret) + return dev_err_probe(&pdev->dev, ret, "failed to setup monitor\n"); + ret = clk_wzrd_register_output_clocks(&pdev->dev, nr_outputs); if (ret) return ret; @@ -1204,7 +1254,7 @@ static const struct of_device_id clk_wzrd_ids[] = { { .compatible = "xlnx,versal-clk-wizard", .data = &versal_data }, { .compatible = "xlnx,clocking-wizard" }, { .compatible = "xlnx,clocking-wizard-v5.2" }, - { .compatible = "xlnx,clocking-wizard-v6.0" }, + { .compatible = "xlnx,clocking-wizard-v6.0", .data = &version_6_0_data }, { }, }; MODULE_DEVICE_TABLE(of, clk_wzrd_ids); From patchwork Mon Aug 26 12:38:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13777839 Received: from mail-40133.protonmail.ch (mail-40133.protonmail.ch [185.70.40.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D17517A5A6 for ; Mon, 26 Aug 2024 12:38:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.40.133 ARC-Seal: i=1; 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dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=protonmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b="uhm7go/h" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1724675919; x=1724935119; bh=RBOC+RDywST6N92zvalAllQSujzs0kpTlYmclip8eRc=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=uhm7go/hzA/XiJNo2AAbl0a48N/WIt8x+zhiS3fIUC7+4nXwJFvNkXu3Lrfjp0yVR 7hLeUtok2U4b1rlSCSY66zzP2cRseb2W1LjAhRGDFCJSSxeH0yFyFQocpDSixTAdHO P2f2GWyZlJgahkGWVFxusZt0aNeZSBCoj5U5aeaOu0bdak4scbpTf7LUYqbxlaHZC3 FVLicOxZvcNvubH7IbBjfCrnXxZyTgzemN4zyO6q8qA65VMGaAn6LSwaZ6FrhZ8DiD iL6wRHjaaIh5lLXnv5b8LN1AcjFDKKT2dM491dqi9de3wgRq5+tr8iyz9P/AeGnGng 2+kIPLFnCvquA== Date: Mon, 26 Aug 2024 12:38:36 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek , Greg Kroah-Hartman From: Harry Austen Cc: Shubhrajyoti Datta , Dave Ertman , Ira Weiny , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen Subject: [PATCH v3 7/9] uio: add Xilinx user clock monitor support Message-ID: <20240826123602.1872-8-hpausten@protonmail.com> In-Reply-To: <20240826123602.1872-1-hpausten@protonmail.com> References: <20240826123602.1872-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: e5939776709711e659ff91bcb8ce68658111b277 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Xilinx clocking wizard IP core supports monitoring of up to four optional user clock inputs, with a corresponding interrupt for notification in change of clock state (stop, underrun, overrun or glitch). Give userspace access to this monitor logic through use of the UIO framework. Implemented as an auxiliary_driver to avoid introducing UIO dependency to the main clock driver. Signed-off-by: Harry Austen --- drivers/uio/Kconfig | 8 ++++ drivers/uio/Makefile | 1 + drivers/uio/uio_xlnx_clk_mon.c | 71 ++++++++++++++++++++++++++++++++++ 3 files changed, 80 insertions(+) create mode 100644 drivers/uio/uio_xlnx_clk_mon.c diff --git a/drivers/uio/Kconfig b/drivers/uio/Kconfig index b060dcd7c6350..ca8a53de26a67 100644 --- a/drivers/uio/Kconfig +++ b/drivers/uio/Kconfig @@ -164,4 +164,12 @@ config UIO_DFL opae-sdk/tools/libopaeuio/ If you compile this as a module, it will be called uio_dfl. + +config UIO_XLNX_CLK_MON + tristate "Xilinx user clock monitor support" + depends on COMMON_CLK_XLNX_CLKWZRD + help + Userspace I/O interface to the user clock monitor logic within the + Xilinx Clocking Wizard IP core. + endif diff --git a/drivers/uio/Makefile b/drivers/uio/Makefile index 1c5f3b5a95cf5..1e8c242265431 100644 --- a/drivers/uio/Makefile +++ b/drivers/uio/Makefile @@ -11,3 +11,4 @@ obj-$(CONFIG_UIO_MF624) += uio_mf624.o obj-$(CONFIG_UIO_FSL_ELBC_GPCM) += uio_fsl_elbc_gpcm.o obj-$(CONFIG_UIO_HV_GENERIC) += uio_hv_generic.o obj-$(CONFIG_UIO_DFL) += uio_dfl.o +obj-$(CONFIG_UIO_XLNX_CLK_MON) += uio_xlnx_clk_mon.o diff --git a/drivers/uio/uio_xlnx_clk_mon.c b/drivers/uio/uio_xlnx_clk_mon.c new file mode 100644 index 0000000000000..afcbeae98eaaf --- /dev/null +++ b/drivers/uio/uio_xlnx_clk_mon.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Driver for user clock monitor logic within Xilinx 'Clocking Wizard' IP core + * + * Copyright (C) 2024 Harry Austen + */ + +#include +#include +#include +#include +#include +#include + +#define WZRD_INTR_ENABLE 0x10 + +static int clk_mon_irqcontrol(struct uio_info *info, s32 irq_on) +{ + if (irq_on) + iowrite32(GENMASK(15, 0), info->mem[0].internal_addr + WZRD_INTR_ENABLE); + else + iowrite32(0, info->mem[0].internal_addr + WZRD_INTR_ENABLE); + + return 0; +} + +static int probe(struct auxiliary_device *adev, const struct auxiliary_device_id *id) +{ + struct platform_device *pdev = to_platform_device(adev->dev.parent); + struct device *dev = &adev->dev; + struct uio_info *info; + int irq; + + info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return 0; + + info->name = KBUILD_MODNAME; + info->version = "0.0.1"; + + info->mem[0].name = "clock monitor"; + info->mem[0].memtype = UIO_MEM_PHYS; + info->mem[0].addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start; + info->mem[0].size = (WZRD_INTR_ENABLE + 4 + PAGE_SIZE - 1) & PAGE_MASK; + info->mem[0].internal_addr = (__force void __iomem *)dev->platform_data; + + info->irq = irq; + info->irqcontrol = clk_mon_irqcontrol; + return devm_uio_register_device(dev, info); +} + +static struct auxiliary_device_id ids[] = { + { .name = "clk_xlnx_clock_wizard.clk-mon" }, + {} +}; +MODULE_DEVICE_TABLE(auxiliary, ids); + +static struct auxiliary_driver xlnx_clk_mon_driver = { + .id_table = ids, + .probe = probe, +}; + +module_auxiliary_driver(xlnx_clk_mon_driver); + +MODULE_AUTHOR("Harry Austen "); +MODULE_DESCRIPTION("Driver for Xilinx user clock monitor logic"); +MODULE_LICENSE("GPL"); From patchwork Mon Aug 26 12:38:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13777840 Received: from mail-40134.protonmail.ch (mail-40134.protonmail.ch [185.70.40.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12FBA17A5A6; Mon, 26 Aug 2024 12:38:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.40.134 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724675927; cv=none; b=Qjpff2kNVJyqjz9lxpkhPROxQjuaguT4kEOyA6ttg8uYMOlxe8QRFM9QG1C6HaS05KLU8ZauWwSc0vVgDbrWExa2Kl3q8jFL5Q/CgpYMQRFdvhFgThq+pC3q0GhNejprSYDFlqphGIk5esoIlUGWPpLy7JGkTQ5sW/ti7IMbHg4= ARC-Message-Signature: i=1; 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Add a devicetree boolean property to describe whether the hardware supports this feature or not. Signed-off-by: Harry Austen Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/clock/xlnx,clocking-wizard.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml index 2b9903f05ef34..72dc6c586f7f5 100644 --- a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml @@ -47,6 +47,12 @@ properties: items: - const: monitor + xlnx,dynamic-reconfig: + $ref: /schemas/types.yaml#/definitions/flag + description: + Indicate whether the core has been configured with support for dynamic + runtime reconfguration of the clocking primitive MMCM/PLL. + xlnx,speed-grade: $ref: /schemas/types.yaml#/definitions/uint32 enum: [1, 2, 3] @@ -90,6 +96,7 @@ examples: compatible = "xlnx,clocking-wizard-v6.0"; reg = <0xb0000000 0x10000>; #clock-cells = <1>; + xlnx,dynamic-reconfig; xlnx,speed-grade = <1>; xlnx,nr-outputs = <6>; clock-names = "clk_in1", "s_axi_aclk"; From patchwork Mon Aug 26 12:38:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13777841 Received: from mail-4316.protonmail.ch (mail-4316.protonmail.ch [185.70.43.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC3F818CBF6; Mon, 26 Aug 2024 12:38:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724675931; cv=none; b=BKKgnOhLYfauGw01fHHNMWby1WoYJCmGxvn7+zQz3YTupocdXAHZvZt9zTvQ42oW/hlrkMKDnuIFdRE4+y/0rDb8lHCYkXCZu4QED6yvq3aT+RHx3TBqt3y7btSRewUfLD0b3UDa/iuUH+fb3z8ioypXlE7mNFmdWp3xyN2pBsw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724675931; c=relaxed/simple; bh=fexhxZ/Wj12N9dTkQwKjwCev2VJVFEceVWSjgTO2IC0=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=dXYSL7f6MHqWlIk88cgmMNhC/N7VTmL1wTV0Re8j2hlq+ppgp7a+6eeWBptAtYNvMWosXNtAOx/Hu4vf8CeTtzFR/vOau4MTUcriG+C9p3C3VZjtjUgqfIEQaXSfSrz89jzDOGQoAY5KjXEqghdETHTwuDAdV5mrMOuWKbKArK4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com; spf=pass smtp.mailfrom=protonmail.com; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b=P5fbGaqa; arc=none smtp.client-ip=185.70.43.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=protonmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b="P5fbGaqa" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1724675927; x=1724935127; bh=BMjURepHiOaapx7nusjSR8eg3pgiVBp6E6m/pDd+PKM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=P5fbGaqa1rOJypmPNzY8uDiHz2kM0cJzvVzPvgAgFPKzPlir7ee1r2uYbmTwXSJHA NjT9ziDrrRvn0EesvUUpqzR9eLbhQ2APCYHbbQHP36muo0dYd5qm3mYeqoorDfOmMU 5X0BrcElyW9LNe+RCYAd+3pmRA3ET+o9BekDEJ2Qqo3j+fEz44u+vCjRgB2YiYB2XJ FBRvgiMlHdjwhSUPsOnCMK9k7T5ltBKbC6UyVXxJ4Kxd+qwRzLn7P82NxuYlNmVLqn e/q97GwdytGozcc+nJThIfEmk9XqkXdsimeb6JrdL0sFkdefmPwOqP8bDyqLHuc0K6 PLb9LOrYqTlWg== Date: Mon, 26 Aug 2024 12:38:43 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek , Greg Kroah-Hartman From: Harry Austen Cc: Shubhrajyoti Datta , Dave Ertman , Ira Weiny , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen Subject: [PATCH v3 9/9] clk: clocking-wizard: move dynamic reconfig setup behind flag Message-ID: <20240826123602.1872-10-hpausten@protonmail.com> In-Reply-To: <20240826123602.1872-1-hpausten@protonmail.com> References: <20240826123602.1872-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: 4fbfffd3599013b558dc9f5e4809d01e0aac1b0b Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Xilinx clocking wizard IP core's dynamic reconfiguration support is optionally enabled at build time. Use the new boolean devicetree property to indicate whether the hardware supports this feature or not. Signed-off-by: Harry Austen --- drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 73 +++++++++++----------- 1 file changed, 38 insertions(+), 35 deletions(-) diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index 35dad2fda254b..b30d8106ac279 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -1192,20 +1192,6 @@ static int clk_wzrd_probe(struct platform_device *pdev) if (IS_ERR(clk_wzrd->base)) return PTR_ERR(clk_wzrd->base); - ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade); - if (!ret) { - if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) { - dev_warn(&pdev->dev, "invalid speed grade '%d'\n", - clk_wzrd->speed_grade); - clk_wzrd->speed_grade = 0; - } - } - - clk_wzrd->clk_in1 = devm_clk_get(&pdev->dev, "clk_in1"); - if (IS_ERR(clk_wzrd->clk_in1)) - return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1), - "clk_in1 not found\n"); - clk_wzrd->axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); if (IS_ERR(clk_wzrd->axi_clk)) return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk), @@ -1220,31 +1206,48 @@ static int clk_wzrd_probe(struct platform_device *pdev) if (ret) return dev_err_probe(&pdev->dev, ret, "failed to setup monitor\n"); - ret = clk_wzrd_register_output_clocks(&pdev->dev, nr_outputs); - if (ret) - return ret; - - clk_wzrd->clk_data.num = nr_outputs; - ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get, &clk_wzrd->clk_data); - if (ret) { - dev_err(&pdev->dev, "unable to register clock provider\n"); - return ret; - } + if (of_property_read_bool(np, "xlnx,dynamic-reconfig")) { + ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade); + if (!ret) { + if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) { + dev_warn(&pdev->dev, "invalid speed grade '%d'\n", + clk_wzrd->speed_grade); + clk_wzrd->speed_grade = 0; + } + } - if (clk_wzrd->speed_grade) { - clk_wzrd->nb.notifier_call = clk_wzrd_clk_notifier; + clk_wzrd->clk_in1 = devm_clk_get(&pdev->dev, "clk_in1"); + if (IS_ERR(clk_wzrd->clk_in1)) + return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1), + "clk_in1 not found\n"); - ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->clk_in1, - &clk_wzrd->nb); + ret = clk_wzrd_register_output_clocks(&pdev->dev, nr_outputs); if (ret) - dev_warn(&pdev->dev, - "unable to register clock notifier\n"); + return ret; + + clk_wzrd->clk_data.num = nr_outputs; + ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get, + &clk_wzrd->clk_data); + if (ret) { + dev_err(&pdev->dev, "unable to register clock provider\n"); + return ret; + } - ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->axi_clk, - &clk_wzrd->nb); - if (ret) - dev_warn(&pdev->dev, - "unable to register clock notifier\n"); + if (clk_wzrd->speed_grade) { + clk_wzrd->nb.notifier_call = clk_wzrd_clk_notifier; + + ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->clk_in1, + &clk_wzrd->nb); + if (ret) + dev_warn(&pdev->dev, + "unable to register clock notifier\n"); + + ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->axi_clk, + &clk_wzrd->nb); + if (ret) + dev_warn(&pdev->dev, + "unable to register clock notifier\n"); + } } return 0;