From patchwork Mon Aug 26 21:13:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13778477 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9523199E9F; Mon, 26 Aug 2024 21:14:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724706845; cv=none; b=E//+wA1YX7BtBuyNSlbjerRwwPZ1JwzW6JaYYdDd8dR5I66zByyvKPib4D/Lz86/lrYJZLdGF73uQheR0Lj48az9rtgRjHNdrbZ/3TDPVDk5/38eN90/VXEUlGw2Gtc7ZSHV9pin4FlQ97fsPu/FPHeBEk9LAG1AgI/37MAFakA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724706845; c=relaxed/simple; bh=RMDMGszvUWn5SrVGmTs7hWGKDK2jZ3EwU42B5/wG5n0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mv1JHf22L3shJlmVQemIg40M2w/Ffzbj+kCdocCbWpDB9bxZJNWt1RZl/wbDw0AFPyf8i+Fx2IW+Dd25LeLA8GxwmyyEtdVPPqudQqllVQFksVAzUlMpSNVLyFy5Nx6MlM/CPMezUztTOzm3bDGizBcvbhROXhmZwHzbTxpMhIY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VOlBUwL7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VOlBUwL7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C60AFC4AF60; Mon, 26 Aug 2024 21:14:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724706844; bh=RMDMGszvUWn5SrVGmTs7hWGKDK2jZ3EwU42B5/wG5n0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VOlBUwL7f1dxM6z96OuzKNBVtGFPmBhvOMVft2FhGjDIkdsP3XfR4+AhlM0oiStIW 967CCUDjELulh4QGAU4xlnflFGqfC2uDiWBGmsaf90J9YVoO56t0AwULzhJwyXnAFA ToDJV7BNFlZotsvjV4xDa82DIZqbatCApfhG2t2mczNfRyDtU4O+g3jkEc4WY9EeVF S8MIv4vm1cD7Kyrew0MrTNBYStsNNUTl3hTc+pQrbNXXFhOG7JQuYoJDhlYk49vifO TpX3GBNhQqjYK96hdWtsMMpb1jqRR/LvsGLPCIfi4X1JmO0WIgvwNC8H/bJX2z3WZP /bRvlYEhdz5Zg== From: Mario Limonciello To: Borislav Petkov , "Gautham R . Shenoy" , Perry Yuan Cc: x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), "Rafael J . Wysocki" , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-acpi@vger.kernel.org (open list:ACPI), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH 1/8] x86/amd: Move amd_get_highest_perf() from amd.c to cppc.c Date: Mon, 26 Aug 2024 16:13:51 -0500 Message-ID: <20240826211358.2694603-2-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240826211358.2694603-1-superm1@kernel.org> References: <20240826211358.2694603-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello To prepare to let amd_get_highest_perf() detect preferred cores it will require CPPC functions. Move amd_get_highest_perf() to cppc.c to prepare for 'preferred core detection' rework. No functional changes intended. Signed-off-by: Mario Limonciello Reviewed-by: Perry Yuan Reviewed-by: Gautham R. Shenoy --- arch/x86/kernel/acpi/cppc.c | 16 ++++++++++++++++ arch/x86/kernel/cpu/amd.c | 16 ---------------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c index ff8f25faca3dd..7ec8f2ce859c8 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -116,3 +116,19 @@ void init_freq_invariance_cppc(void) init_done = true; mutex_unlock(&freq_invariance_lock); } + +u32 amd_get_highest_perf(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + + if (c->x86 == 0x17 && ((c->x86_model >= 0x30 && c->x86_model < 0x40) || + (c->x86_model >= 0x70 && c->x86_model < 0x80))) + return 166; + + if (c->x86 == 0x19 && ((c->x86_model >= 0x20 && c->x86_model < 0x30) || + (c->x86_model >= 0x40 && c->x86_model < 0x70))) + return 166; + + return 255; +} +EXPORT_SYMBOL_GPL(amd_get_highest_perf); diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 1e0fe5f8ab84e..015971adadfc7 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -1190,22 +1190,6 @@ unsigned long amd_get_dr_addr_mask(unsigned int dr) } EXPORT_SYMBOL_GPL(amd_get_dr_addr_mask); -u32 amd_get_highest_perf(void) -{ - struct cpuinfo_x86 *c = &boot_cpu_data; - - if (c->x86 == 0x17 && ((c->x86_model >= 0x30 && c->x86_model < 0x40) || - (c->x86_model >= 0x70 && c->x86_model < 0x80))) - return 166; - - if (c->x86 == 0x19 && ((c->x86_model >= 0x20 && c->x86_model < 0x30) || - (c->x86_model >= 0x40 && c->x86_model < 0x70))) - return 166; - - return 255; -} -EXPORT_SYMBOL_GPL(amd_get_highest_perf); - static void zenbleed_check_cpu(void *unused) { struct cpuinfo_x86 *c = &cpu_data(smp_processor_id()); From patchwork Mon Aug 26 21:13:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13778478 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FCD219B3CE; Mon, 26 Aug 2024 21:14:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724706846; cv=none; b=QsUy3Vu6atqZcYxklsuqarZA8FAzSCHA+ZugVLIb4EnhfuyqHxoq7t+c8IGnMRYdcINHJyO5dK6wLQvq9D3uinMTMKxuXcjVELzOw13+inlsAWg7THjDGB54+/Q7Map8bSJMaWKlUyJe9HphpxhzsWjRhfXGpLJoFPad+70FIgA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724706846; c=relaxed/simple; bh=KVNp1G8slxA+wZy7zXLv6iv+GyN4Ap2hn6dkSBGSHck=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oXnfjpkcKDrSEDSEurCkBHNes8j+YsEt4vcfdM1omFQH9rzIayyIWLT6bewbmhtmpGg2O+rZgy0TZZFcZ4VhDdrf+NTim70HuEYjfQH+gjYsaxgtv8GKlic2QkSwTeFZjihTqwZtu6+57T54emVo+ICk0SKP4owz8r/b38n53NM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=c5RpDVXs; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="c5RpDVXs" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 03B12C4DDF0; Mon, 26 Aug 2024 21:14:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724706845; bh=KVNp1G8slxA+wZy7zXLv6iv+GyN4Ap2hn6dkSBGSHck=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c5RpDVXsj0vnb1lf1gO9G7f5ypmw26FPrDCTDgqfcyUcP1G7wWqpwsYLkZy2u5m5m he9nk0jeed1XVtANICao40uRvqw8HYxG185c4FaTrGr0DCLeYqjKYIq9nmxyquyd0o yieB4O2DI1ibKHeuYkgJKjUHPpO7vX02AZD1kExlB6oRcD5mYUuVIzFxBUwLU1k9Cu +e6L3XbNzdqV4ljMJvvwrATn1gzyqg1hf1wHF8RZaQ/+F4YrwWYZwohyeR0lS5sEXU zH5hRTtZxgCcMQOj1SYui7B3H2Ox81VbzjYlYU6o4yrK23mHZVOFbY3oyr7i+4gWLh rqfo5KvUdMrWQ== From: Mario Limonciello To: Borislav Petkov , "Gautham R . Shenoy" , Perry Yuan Cc: x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), "Rafael J . Wysocki" , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-acpi@vger.kernel.org (open list:ACPI), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH 2/8] x86/amd: Rename amd_get_highest_perf() to amd_get_boost_ratio_numerator() Date: Mon, 26 Aug 2024 16:13:52 -0500 Message-ID: <20240826211358.2694603-3-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240826211358.2694603-1-superm1@kernel.org> References: <20240826211358.2694603-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello The function name is ambiguous because it returns an intermediate value for calculating maximum frequency rather than the CPPC 'Highest Perf' register. Rename the function to clarify its use and allow the function to return errors. Adjust the consumer in acpi-cpufreq to catch errors. Signed-off-by: Mario Limonciello --- arch/x86/include/asm/processor.h | 3 --- arch/x86/kernel/acpi/cppc.c | 38 +++++++++++++++++++++++--------- drivers/cpufreq/acpi-cpufreq.c | 12 +++++++--- include/acpi/cppc_acpi.h | 6 +++++ 4 files changed, 43 insertions(+), 16 deletions(-) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index a75a07f4931fd..775acbdea1a96 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -691,8 +691,6 @@ static inline u32 per_cpu_l2c_id(unsigned int cpu) } #ifdef CONFIG_CPU_SUP_AMD -extern u32 amd_get_highest_perf(void); - /* * Issue a DIV 0/1 insn to clear any division data from previous DIV * operations. @@ -705,7 +703,6 @@ static __always_inline void amd_clear_divider(void) extern void amd_check_microcode(void); #else -static inline u32 amd_get_highest_perf(void) { return 0; } static inline void amd_clear_divider(void) { } static inline void amd_check_microcode(void) { } #endif diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c index 7ec8f2ce859c8..1d631ac5ec328 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -79,11 +79,13 @@ static void amd_set_max_freq_ratio(void) return; } - highest_perf = amd_get_highest_perf(); + rc = amd_get_boost_ratio_numerator(0, &highest_perf); + if (rc) + pr_debug("Could not retrieve highest performance\n"); nominal_perf = perf_caps.nominal_perf; - if (!highest_perf || !nominal_perf) { - pr_debug("Could not retrieve highest or nominal performance\n"); + if (!nominal_perf) { + pr_debug("Could not retrieve nominal performance\n"); return; } @@ -117,18 +119,34 @@ void init_freq_invariance_cppc(void) mutex_unlock(&freq_invariance_lock); } -u32 amd_get_highest_perf(void) +/** + * amd_get_boost_ratio_numerator: Get the numerator to use for boost ratio calculation + * @cpu: CPU to get numerator for. + * @numerator: Output variable for numerator. + * + * Determine the numerator to use for calculating the boost ratio on + * a CPU. On systems that support preferred cores, this will be a hardcoded + * value. On other systems this will the highest performance register value. + * + * Return: 0 for success, negative error code otherwise. + */ +int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator) { struct cpuinfo_x86 *c = &boot_cpu_data; if (c->x86 == 0x17 && ((c->x86_model >= 0x30 && c->x86_model < 0x40) || - (c->x86_model >= 0x70 && c->x86_model < 0x80))) - return 166; + (c->x86_model >= 0x70 && c->x86_model < 0x80))) { + *numerator = 166; + return 0; + } if (c->x86 == 0x19 && ((c->x86_model >= 0x20 && c->x86_model < 0x30) || - (c->x86_model >= 0x40 && c->x86_model < 0x70))) - return 166; + (c->x86_model >= 0x40 && c->x86_model < 0x70))) { + *numerator = 166; + return 0; + } + *numerator = 255; - return 255; + return 0; } -EXPORT_SYMBOL_GPL(amd_get_highest_perf); +EXPORT_SYMBOL_GPL(amd_get_boost_ratio_numerator); diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c index a8ca625a98b89..0f04feb6cafaf 100644 --- a/drivers/cpufreq/acpi-cpufreq.c +++ b/drivers/cpufreq/acpi-cpufreq.c @@ -642,10 +642,16 @@ static u64 get_max_boost_ratio(unsigned int cpu) return 0; } - if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) - highest_perf = amd_get_highest_perf(); - else + if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { + ret = amd_get_boost_ratio_numerator(cpu, &highest_perf); + if (ret) { + pr_debug("CPU%d: Unable to get boost ratio numerator (%d)\n", + cpu, ret); + return 0; + } + } else { highest_perf = perf_caps.highest_perf; + } nominal_perf = perf_caps.nominal_perf; diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h index 930b6afba6f4d..f25a881cd46dd 100644 --- a/include/acpi/cppc_acpi.h +++ b/include/acpi/cppc_acpi.h @@ -136,6 +136,12 @@ struct cppc_cpudata { cpumask_var_t shared_cpu_map; }; +#ifdef CONFIG_CPU_SUP_AMD +extern int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator); +#else /* !CONFIG_CPU_SUP_AMD */ +static inline int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator) { return -ENODEV; } +#endif /* !CONFIG_CPU_SUP_AMD */ + #ifdef CONFIG_ACPI_CPPC_LIB extern int cppc_get_desired_perf(int cpunum, u64 *desired_perf); extern int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf); From patchwork Mon Aug 26 21:13:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13778479 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B3AF919CCF4; Mon, 26 Aug 2024 21:14:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724706847; cv=none; b=pnjUVvEphN6vplHhm88qX6hvrAmaM1EKn5PmMdxxt8u0l9ek5MuhpeBrD1RhNdfsyqYdxUh185zZH0Qo4pIMWzty897wAUqc3b4L/+p2nJNdvumctKRTy3EWkTs/gvDlgpvmuQJOMWi1hXCpFts4NLQmb7JASOMN8zsbjUL2bZY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724706847; c=relaxed/simple; bh=8JbbZmmWdd0t2niiYJuglfiAJbNZ1lEzfLsYW1gZrg4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=otQLl0GeG2O5A8onUJWW9ArdCVtlVKkdU25xyz91qvunzZHc9jtKLtg13TPP4kn70d6aR4gl9NoiakzJ9E23oNAfsEAMS/Pj+BH0fiOKRrIVAB0wt8lQpsc4hvxTFEQUqULAEakCEyrfQwTMxxGgE8WAuyem9ofT3yTbVxu9AS8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=brrNHkBd; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="brrNHkBd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 36F68C4DE0F; Mon, 26 Aug 2024 21:14:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724706847; bh=8JbbZmmWdd0t2niiYJuglfiAJbNZ1lEzfLsYW1gZrg4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=brrNHkBdrnvs/NQ90nEZamzQ9H1sguuseFRvNknbVoZaYgxU5m1slJqcGyw1+h/43 4fxPYHlVbJbAQm38mH549G58eOaEusi39lSIRBlf2dxgWYvApA+n/edeWbq+ZSpLzb srVkYUvkUtRW36yO2r/8qcwwC8dkCY+2RWdZ1OLOyBlfM70NcZ5VxZchjFdtBnW686 QqIKjWlyPapSu+P/yPOrIeW/edYkaieaJUxsSdEe27ASWI5cmy22qMUquziSBjJobv 9whCOOQkqUt6qmvZ7/iHbGafUkmS9uV+qWt3+nlustagGPAsqNDqC3pRp1vaSrIT0L jnGfZJHs/9I+g== From: Mario Limonciello To: Borislav Petkov , "Gautham R . Shenoy" , Perry Yuan Cc: x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), "Rafael J . Wysocki" , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-acpi@vger.kernel.org (open list:ACPI), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello , Perry Yuan Subject: [PATCH 3/8] ACPI: CPPC: Adjust debug messages in amd_set_max_freq_ratio() to warn Date: Mon, 26 Aug 2024 16:13:53 -0500 Message-ID: <20240826211358.2694603-4-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240826211358.2694603-1-superm1@kernel.org> References: <20240826211358.2694603-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello If the boost ratio isn't calculated properly for the system for any reason this can cause other problems that are non-obvious. Raise all messages to warn instead. Suggested-by: Perry Yuan Signed-off-by: Mario Limonciello Reviewed-by: Perry Yuan Reviewed-by: Gautham R. Shenoy --- arch/x86/kernel/acpi/cppc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c index 1d631ac5ec328..e94507110ca24 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -75,17 +75,17 @@ static void amd_set_max_freq_ratio(void) rc = cppc_get_perf_caps(0, &perf_caps); if (rc) { - pr_debug("Could not retrieve perf counters (%d)\n", rc); + pr_warn("Could not retrieve perf counters (%d)\n", rc); return; } rc = amd_get_boost_ratio_numerator(0, &highest_perf); if (rc) - pr_debug("Could not retrieve highest performance\n"); + pr_warn("Could not retrieve highest performance\n"); nominal_perf = perf_caps.nominal_perf; if (!nominal_perf) { - pr_debug("Could not retrieve nominal performance\n"); + pr_warn("Could not retrieve nominal performance\n"); return; } @@ -93,7 +93,7 @@ static void amd_set_max_freq_ratio(void) /* midpoint between max_boost and max_P */ perf_ratio = (perf_ratio + SCHED_CAPACITY_SCALE) >> 1; if (!perf_ratio) { - pr_debug("Non-zero highest/nominal perf values led to a 0 ratio\n"); + pr_warn("Non-zero highest/nominal perf values led to a 0 ratio\n"); return; } From patchwork Mon Aug 26 21:13:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13778480 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0D9319D06A; Mon, 26 Aug 2024 21:14:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724706848; cv=none; b=HwJalZ3P35rGJn9AF8d15ZIlYyFJKGK46a9isUU4Jqu5CB0QTalib2o72kJ/nBhLKs8ng8Y8bkYqAnq6m1X1foF7ckBuP4lURFceN/q8pvcdccmmxLyKjlrdmpgSVNo8WR8XTYUd45vdM9CmkI15cILehG926GbcgIKIe7M1itA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724706848; c=relaxed/simple; bh=0K9IRUvCtBRV7Jmvx4IeBFO0vuipHE8D7dtiZfLwYqs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qc4MrFttqAVpxIaa6BuV63srlQ6lS/epve11nLu+h99jOaKSluDv12pLVTG5EujaUET+tyutec171Y0kiK2ntvcggWc1ZL+sGttfltDkoUnXREeFz+nC/m+BcALNkLgGTpRDBjfYPa3ANOKnPyCO2Cimi4HDX5scbwyqRg8rxvI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=evDp0xMY; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="evDp0xMY" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7789BC4E699; Mon, 26 Aug 2024 21:14:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724706848; bh=0K9IRUvCtBRV7Jmvx4IeBFO0vuipHE8D7dtiZfLwYqs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=evDp0xMYuBjknja+kHmGtkrSz1L7eERx9+UOpxRmwMxuREaGFDlAI9bPDebcTo3Yo /xc9y9BN10VOYpoUoRf9hQpVicSqg4p/RaY5XAE01BONGSIbF/fNc+3BMPZKq8jKRu CqcsoJ8Mk+AtaVXzg4ibZcZ0NvX2Z2QsOX7ykbnMxL3iSOD5oXx6TKb5ZNwrjefu7s G1NQPsi3foIqNJDMOWrhP6/rV6AQEgV4DzMKGG7kOVvV8m9XeMnLDduIOCiyFsigc3 Plbq5tZwWot7lZBN9uYH7G9f+uLuoXloy2vybt7x7L3vxW3f1aqaDtVu1Fad9mys02 6anmlZblovNtA== From: Mario Limonciello To: Borislav Petkov , "Gautham R . Shenoy" , Perry Yuan Cc: x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), "Rafael J . Wysocki" , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-acpi@vger.kernel.org (open list:ACPI), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH 4/8] x86/amd: Move amd_get_highest_perf() out of amd-pstate Date: Mon, 26 Aug 2024 16:13:54 -0500 Message-ID: <20240826211358.2694603-5-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240826211358.2694603-1-superm1@kernel.org> References: <20240826211358.2694603-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello amd_get_highest_perf() is a helper used to get the highest perf value on AMD systems. It's used in amd-pstate as part of preferred core handling, but applicable for acpi-cpufreq as well. Move it out to cppc handling code. Signed-off-by: Mario Limonciello Reviewed-by: Perry Yuan Reviewed-by: Gautham R. Shenoy --- arch/x86/kernel/acpi/cppc.c | 30 ++++++++++++++++++++++++++++++ drivers/cpufreq/amd-pstate.c | 34 ++-------------------------------- include/acpi/cppc_acpi.h | 2 ++ 3 files changed, 34 insertions(+), 32 deletions(-) diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c index e94507110ca24..5a6c01a1b0d95 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -119,6 +119,36 @@ void init_freq_invariance_cppc(void) mutex_unlock(&freq_invariance_lock); } +/* + * Get the highest performance register value. + * @cpu: CPU from which to get highest performance. + * @highest_perf: Return address for highest performance value. + * + * Return: 0 for success, negative error code otherwise. + */ +int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf) +{ + u64 val; + int ret; + + if (cpu_feature_enabled(X86_FEATURE_CPPC)) { + ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &val); + if (ret) + goto out; + + val = AMD_CPPC_HIGHEST_PERF(val); + } else { + ret = cppc_get_highest_perf(cpu, &val); + if (ret) + goto out; + } + + WRITE_ONCE(*highest_perf, (u32)val); +out: + return ret; +} +EXPORT_SYMBOL_GPL(amd_get_highest_perf); + /** * amd_get_boost_ratio_numerator: Get the numerator to use for boost ratio calculation * @cpu: CPU to get numerator for. diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 89bda7a2bb8d1..f470b5700db58 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -803,36 +803,6 @@ static void amd_pstste_sched_prefcore_workfn(struct work_struct *work) } static DECLARE_WORK(sched_prefcore_work, amd_pstste_sched_prefcore_workfn); -/* - * Get the highest performance register value. - * @cpu: CPU from which to get highest performance. - * @highest_perf: Return address. - * - * Return: 0 for success, -EIO otherwise. - */ -static int amd_pstate_get_highest_perf(int cpu, u32 *highest_perf) -{ - int ret; - - if (cpu_feature_enabled(X86_FEATURE_CPPC)) { - u64 cap1; - - ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &cap1); - if (ret) - return ret; - WRITE_ONCE(*highest_perf, AMD_CPPC_HIGHEST_PERF(cap1)); - } else { - u64 cppc_highest_perf; - - ret = cppc_get_highest_perf(cpu, &cppc_highest_perf); - if (ret) - return ret; - WRITE_ONCE(*highest_perf, cppc_highest_perf); - } - - return (ret); -} - #define CPPC_MAX_PERF U8_MAX static void amd_pstate_init_prefcore(struct amd_cpudata *cpudata) @@ -840,7 +810,7 @@ static void amd_pstate_init_prefcore(struct amd_cpudata *cpudata) int ret, prio; u32 highest_perf; - ret = amd_pstate_get_highest_perf(cpudata->cpu, &highest_perf); + ret = amd_get_highest_perf(cpudata->cpu, &highest_perf); if (ret) return; @@ -879,7 +849,7 @@ static void amd_pstate_update_limits(unsigned int cpu) if ((!amd_pstate_prefcore) || (!cpudata->hw_prefcore)) goto free_cpufreq_put; - ret = amd_pstate_get_highest_perf(cpu, &cur_high); + ret = amd_get_highest_perf(cpu, &cur_high); if (ret) goto free_cpufreq_put; diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h index f25a881cd46dd..2246ce0630362 100644 --- a/include/acpi/cppc_acpi.h +++ b/include/acpi/cppc_acpi.h @@ -137,8 +137,10 @@ struct cppc_cpudata { }; #ifdef CONFIG_CPU_SUP_AMD +extern int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf); extern int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator); #else /* !CONFIG_CPU_SUP_AMD */ +static inline int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf) { return -ENODEV; } static inline int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator) { return -ENODEV; } #endif /* !CONFIG_CPU_SUP_AMD */ From patchwork Mon Aug 26 21:13:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13778481 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B975E19D094; Mon, 26 Aug 2024 21:14:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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Mon, 26 Aug 2024 21:14:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724706849; bh=7FCVCgWkpaQSQF2iAAHkGBS74pIcUS41jsdPUFNTktg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qb9SpLSaVqoqUsnlNeXZ21WVQKpYip/8Uu0hCufmI5DH0Zy+9+1L35qh66KgLJwEq Tou4fQ46TZQZIVMlL/mRulH0qhWp+dndIrGFgEpnuHG+iUVBelC04vIpRv1l5WWE7S z2MxaecYv86a0oOzSEasKJW2UaGAsN+Sbf0j23zICoJf8dpqVWZzeHYHpp3XWfE9cS EqgzZ1v6xg08gXgkuxNetlMXmseaOnvsaFmVjCl4rHTJLPo3Z3kqiItYmxGBHW2obJ ZeKCB7Gem2X1kTCY4QNZlt8g4QBNntzXYbTNH9tvlyS8yfpRzJLHBotVL0azSGYscI cPE+jD4+PV0dQ== From: Mario Limonciello To: Borislav Petkov , "Gautham R . Shenoy" , Perry Yuan Cc: x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), "Rafael J . Wysocki" , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-acpi@vger.kernel.org (open list:ACPI), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH 5/8] x86/amd: Detect preferred cores in amd_get_boost_ratio_numerator() Date: Mon, 26 Aug 2024 16:13:55 -0500 Message-ID: <20240826211358.2694603-6-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240826211358.2694603-1-superm1@kernel.org> References: <20240826211358.2694603-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello AMD systems that support preferred cores will use "166" as their numerator for max frequency calculations instead of "255". Add a function for detecting preferred cores by looking at the highest perf value on all cores. If preferred cores are enabled return 166 and if disabled the value in the highest perf register. As the function will be called multiple times, cache the values for the boost numerator and if preferred cores will be enabled in global variables. Signed-off-by: Mario Limonciello Reviewed-by: Gautham R. Shenoy --- arch/x86/kernel/acpi/cppc.c | 89 ++++++++++++++++++++++++++++++++---- drivers/cpufreq/amd-pstate.c | 34 ++++++-------- include/acpi/cppc_acpi.h | 2 + 3 files changed, 94 insertions(+), 31 deletions(-) diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c index 5a6c01a1b0d95..729b35e84f5eb 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -9,6 +9,16 @@ #include #include +#define CPPC_HIGHEST_PERF_PREFCORE 166 + +enum amd_pref_core { + AMD_PREF_CORE_UNKNOWN = 0, + AMD_PREF_CORE_SUPPORTED, + AMD_PREF_CORE_UNSUPPORTED, +}; +static enum amd_pref_core amd_pref_core_detected; +static u64 boost_numerator; + /* Refer to drivers/acpi/cppc_acpi.c for the description of functions */ bool cpc_supported_by_cpu(void) @@ -149,6 +159,66 @@ int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf) } EXPORT_SYMBOL_GPL(amd_get_highest_perf); +/** + * amd_detect_prefcore: Detect if CPUs in the system support preferred cores + * @detected: Output variable for the result of the detection. + * + * Determine whether CPUs in the system support preferred cores. On systems + * that support preferred cores, different highest perf values will be found + * on different cores. On other systems, the highest perf value will be the + * same on all cores. + * + * The result of the detection will be stored in the 'detected' parameter. + * + * Return: 0 for success, negative error code otherwise + */ +int amd_detect_prefcore(bool *detected) +{ + int cpu, count = 0; + u64 highest_perf[2] = {0}; + + if (WARN_ON(!detected)) + return -EINVAL; + + switch (amd_pref_core_detected) { + case AMD_PREF_CORE_SUPPORTED: + *detected = true; + return 0; + case AMD_PREF_CORE_UNSUPPORTED: + *detected = false; + return 0; + default: + break; + } + + for_each_present_cpu(cpu) { + u32 tmp; + int ret; + + ret = amd_get_highest_perf(cpu, &tmp); + if (ret) + return ret; + + if (!count || (count == 1 && tmp != highest_perf[0])) + highest_perf[count++] = tmp; + + if (count == 2) + break; + } + + *detected = (count == 2); + boost_numerator = highest_perf[0]; + + amd_pref_core_detected = *detected ? AMD_PREF_CORE_SUPPORTED : + AMD_PREF_CORE_UNSUPPORTED; + + pr_debug("AMD CPPC preferred core is %ssupported (highest perf: 0x%llx)\n", + *detected ? "" : "un", highest_perf[0]); + + return 0; +} +EXPORT_SYMBOL_GPL(amd_detect_prefcore); + /** * amd_get_boost_ratio_numerator: Get the numerator to use for boost ratio calculation * @cpu: CPU to get numerator for. @@ -162,20 +232,19 @@ EXPORT_SYMBOL_GPL(amd_get_highest_perf); */ int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator) { - struct cpuinfo_x86 *c = &boot_cpu_data; + bool prefcore; + int ret; - if (c->x86 == 0x17 && ((c->x86_model >= 0x30 && c->x86_model < 0x40) || - (c->x86_model >= 0x70 && c->x86_model < 0x80))) { - *numerator = 166; - return 0; - } + ret = amd_detect_prefcore(&prefcore); + if (ret) + return ret; - if (c->x86 == 0x19 && ((c->x86_model >= 0x20 && c->x86_model < 0x30) || - (c->x86_model >= 0x40 && c->x86_model < 0x70))) { - *numerator = 166; + /* without preferred cores, return the highest perf register value */ + if (!prefcore) { + *numerator = boost_numerator; return 0; } - *numerator = 255; + *numerator = CPPC_HIGHEST_PERF_PREFCORE; return 0; } diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index f470b5700db58..ec32c830abc1d 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -807,32 +807,18 @@ static DECLARE_WORK(sched_prefcore_work, amd_pstste_sched_prefcore_workfn); static void amd_pstate_init_prefcore(struct amd_cpudata *cpudata) { - int ret, prio; - u32 highest_perf; - - ret = amd_get_highest_perf(cpudata->cpu, &highest_perf); - if (ret) + /* user disabled or not detected */ + if (!amd_pstate_prefcore) return; cpudata->hw_prefcore = true; - /* check if CPPC preferred core feature is enabled*/ - if (highest_perf < CPPC_MAX_PERF) - prio = (int)highest_perf; - else { - pr_debug("AMD CPPC preferred core is unsupported!\n"); - cpudata->hw_prefcore = false; - return; - } - - if (!amd_pstate_prefcore) - return; /* * The priorities can be set regardless of whether or not * sched_set_itmt_support(true) has been called and it is valid to * update them at any time after it has been called. */ - sched_set_itmt_core_prio(prio, cpudata->cpu); + sched_set_itmt_core_prio((int)READ_ONCE(cpudata->highest_perf), cpudata->cpu); schedule_work(&sched_prefcore_work); } @@ -998,12 +984,12 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) cpudata->cpu = policy->cpu; - amd_pstate_init_prefcore(cpudata); - ret = amd_pstate_init_perf(cpudata); if (ret) goto free_cpudata1; + amd_pstate_init_prefcore(cpudata); + ret = amd_pstate_init_freq(cpudata); if (ret) goto free_cpudata1; @@ -1453,12 +1439,12 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) cpudata->cpu = policy->cpu; cpudata->epp_policy = 0; - amd_pstate_init_prefcore(cpudata); - ret = amd_pstate_init_perf(cpudata); if (ret) goto free_cpudata1; + amd_pstate_init_prefcore(cpudata); + ret = amd_pstate_init_freq(cpudata); if (ret) goto free_cpudata1; @@ -1903,6 +1889,12 @@ static int __init amd_pstate_init(void) static_call_update(amd_pstate_update_perf, cppc_update_perf); } + if (amd_pstate_prefcore) { + ret = amd_detect_prefcore(&amd_pstate_prefcore); + if (ret) + return ret; + } + /* enable amd pstate feature */ ret = amd_pstate_enable(true); if (ret) { diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h index 2246ce0630362..1d79320a23490 100644 --- a/include/acpi/cppc_acpi.h +++ b/include/acpi/cppc_acpi.h @@ -137,10 +137,12 @@ struct cppc_cpudata { }; #ifdef CONFIG_CPU_SUP_AMD +extern int amd_detect_prefcore(bool *detected); extern int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf); extern int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator); #else /* !CONFIG_CPU_SUP_AMD */ static inline int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf) { return -ENODEV; } +static inline int amd_detect_prefcore(bool *detected) { return -ENODEV; } static inline int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator) { return -ENODEV; } #endif /* !CONFIG_CPU_SUP_AMD */ From patchwork Mon Aug 26 21:13:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13778482 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0AEB19CCF4; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NPuyBUsi" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D1A18C4FEB2; Mon, 26 Aug 2024 21:14:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724706850; bh=Itv5dSKp4O0Rg5AN7sFQ7TVZQjPLIr3am5lKRK636nI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NPuyBUsi9JDB/jB5x+bBYHr/MwBApafpILumh0LKIRbblDsCu20XlFCljMJApVsMH DCGCFxTMiGcuGtGrSj4AD4gjQ6TIPeVcRN52i4vgcV6/CvIdRRrlOYNGHY9XnheTv4 XcMLzl+J/YQev/jbaoXnKYMte6LS79guhJ14qcCV5C5ZsyVmL3MZ9U7O2+xwHOx52I nt8Jay1q0f68H193HC9bCDq1GP5jDt2GHe+tgT5hT4Tog01aW8vrnn13wUF+DmiLk2 1Zypwano+V30SOLP0YqbUqhvy6hiTGHZAXTA9o1/4xXqcRNFc9prnMurjY5yUruG4l YyhuFPi+yhO7Q== From: Mario Limonciello To: Borislav Petkov , "Gautham R . Shenoy" , Perry Yuan Cc: x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), "Rafael J . Wysocki" , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-acpi@vger.kernel.org (open list:ACPI), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH 6/8] cpufreq: amd-pstate: Merge amd_pstate_highest_perf_set() into amd_get_boost_ratio_numerator() Date: Mon, 26 Aug 2024 16:13:56 -0500 Message-ID: <20240826211358.2694603-7-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240826211358.2694603-1-superm1@kernel.org> References: <20240826211358.2694603-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello The special case in amd_pstate_highest_perf_set() is the value used for calculating the boost numerator. Merge this into amd_get_boost_ratio_numerator() and then use that to calculate boost ratio. This allows dropping more special casing of the highest perf value. Signed-off-by: Mario Limonciello --- arch/x86/kernel/acpi/cppc.c | 16 ++++++++++++ drivers/cpufreq/amd-pstate.c | 49 +++++++----------------------------- 2 files changed, 25 insertions(+), 40 deletions(-) diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c index 729b35e84f5eb..44b13a4e28740 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -9,6 +9,7 @@ #include #include +#define CPPC_HIGHEST_PERF_PERFORMANCE 196 #define CPPC_HIGHEST_PERF_PREFCORE 166 enum amd_pref_core { @@ -244,6 +245,21 @@ int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator) *numerator = boost_numerator; return 0; } + + /* + * For AMD CPUs with Family ID 19H and Model ID range 0x70 to 0x7f, + * the highest performance level is set to 196. + * https://bugzilla.kernel.org/show_bug.cgi?id=218759 + */ + if (cpu_feature_enabled(X86_FEATURE_ZEN4)) { + switch (boot_cpu_data.x86_model) { + case 0x70 ... 0x7f: + *numerator = CPPC_HIGHEST_PERF_PERFORMANCE; + return 0; + default: + break; + } + } *numerator = CPPC_HIGHEST_PERF_PREFCORE; return 0; diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index ec32c830abc1d..75568d0f84623 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -52,8 +52,6 @@ #define AMD_PSTATE_TRANSITION_LATENCY 20000 #define AMD_PSTATE_TRANSITION_DELAY 1000 #define AMD_PSTATE_FAST_CPPC_TRANSITION_DELAY 600 -#define CPPC_HIGHEST_PERF_PERFORMANCE 196 -#define CPPC_HIGHEST_PERF_DEFAULT 166 #define AMD_CPPC_EPP_PERFORMANCE 0x00 #define AMD_CPPC_EPP_BALANCE_PERFORMANCE 0x80 @@ -372,43 +370,17 @@ static inline int amd_pstate_enable(bool enable) return static_call(amd_pstate_enable)(enable); } -static u32 amd_pstate_highest_perf_set(struct amd_cpudata *cpudata) -{ - struct cpuinfo_x86 *c = &cpu_data(0); - - /* - * For AMD CPUs with Family ID 19H and Model ID range 0x70 to 0x7f, - * the highest performance level is set to 196. - * https://bugzilla.kernel.org/show_bug.cgi?id=218759 - */ - if (c->x86 == 0x19 && (c->x86_model >= 0x70 && c->x86_model <= 0x7f)) - return CPPC_HIGHEST_PERF_PERFORMANCE; - - return CPPC_HIGHEST_PERF_DEFAULT; -} - static int pstate_init_perf(struct amd_cpudata *cpudata) { u64 cap1; - u32 highest_perf; int ret = rdmsrl_safe_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1, &cap1); if (ret) return ret; - /* For platforms that do not support the preferred core feature, the - * highest_pef may be configured with 166 or 255, to avoid max frequency - * calculated wrongly. we take the AMD_CPPC_HIGHEST_PERF(cap1) value as - * the default max perf. - */ - if (cpudata->hw_prefcore) - highest_perf = amd_pstate_highest_perf_set(cpudata); - else - highest_perf = AMD_CPPC_HIGHEST_PERF(cap1); - - WRITE_ONCE(cpudata->highest_perf, highest_perf); - WRITE_ONCE(cpudata->max_limit_perf, highest_perf); + WRITE_ONCE(cpudata->highest_perf, AMD_CPPC_HIGHEST_PERF(cap1)); + WRITE_ONCE(cpudata->max_limit_perf, AMD_CPPC_HIGHEST_PERF(cap1)); WRITE_ONCE(cpudata->nominal_perf, AMD_CPPC_NOMINAL_PERF(cap1)); WRITE_ONCE(cpudata->lowest_nonlinear_perf, AMD_CPPC_LOWNONLIN_PERF(cap1)); WRITE_ONCE(cpudata->lowest_perf, AMD_CPPC_LOWEST_PERF(cap1)); @@ -426,12 +398,7 @@ static int cppc_init_perf(struct amd_cpudata *cpudata) if (ret) return ret; - if (cpudata->hw_prefcore) - highest_perf = amd_pstate_highest_perf_set(cpudata); - else - highest_perf = cppc_perf.highest_perf; - - WRITE_ONCE(cpudata->highest_perf, highest_perf); + WRITE_ONCE(cpudata->highest_perf, cppc_perf.highest_perf); WRITE_ONCE(cpudata->max_limit_perf, highest_perf); WRITE_ONCE(cpudata->nominal_perf, cppc_perf.nominal_perf); WRITE_ONCE(cpudata->lowest_nonlinear_perf, @@ -905,8 +872,8 @@ static u32 amd_pstate_get_transition_latency(unsigned int cpu) static int amd_pstate_init_freq(struct amd_cpudata *cpudata) { int ret; - u32 min_freq; - u32 highest_perf, max_freq; + u32 min_freq, max_freq; + u64 numerator; u32 nominal_perf, nominal_freq; u32 lowest_nonlinear_perf, lowest_nonlinear_freq; u32 boost_ratio, lowest_nonlinear_ratio; @@ -928,8 +895,10 @@ static int amd_pstate_init_freq(struct amd_cpudata *cpudata) nominal_perf = READ_ONCE(cpudata->nominal_perf); - highest_perf = READ_ONCE(cpudata->highest_perf); - boost_ratio = div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf); + ret = amd_get_boost_ratio_numerator(cpudata->cpu, &numerator); + if (ret) + return ret; + boost_ratio = div_u64(numerator << SCHED_CAPACITY_SHIFT, nominal_perf); max_freq = (nominal_freq * boost_ratio >> SCHED_CAPACITY_SHIFT) * 1000; lowest_nonlinear_perf = READ_ONCE(cpudata->lowest_nonlinear_perf); From patchwork Mon Aug 26 21:13:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13778483 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B53919DF4D; Mon, 26 Aug 2024 21:14:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Mon, 26 Aug 2024 21:14:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724706852; bh=uLtdEH/FuQxQoDClWlfBImx0hkxxg7PVSYyuZWqCLZQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eRTI9ZHSQtN2H62kv6KB/C9fMM7rki5eqT87/BDTgc+xuc5wdC0Mgst6I6gyj0jo9 UF9Hdn3TlXpNucJhr9KKw5NVNGK7clp14ndv4v39vKx+mWmwhY+uKUem7+QyBkZg3K HcLR/YE3cFAdfUkGpcOpr3v6b3NvLj9IkOLwsL/Ffyh8Pio8jOyi4soqjAa4jFl3Dz GhZnueHT1ekUyr4wbsNEvzYWSXy+GwNuh572D/X8wXvXSC1fu9kiMNA2UU5As5ZvZR /2C/EHjn6ELfqx3OmubqIlHFLQZcQu0SykDBVtqOHXUx/H3PA+YYu7a91oKle6PtIr CxOjlo2T+ZJOA== From: Mario Limonciello To: Borislav Petkov , "Gautham R . Shenoy" , Perry Yuan Cc: x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), "Rafael J . Wysocki" , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-acpi@vger.kernel.org (open list:ACPI), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH 7/8] cpufreq: amd-pstate: Optimize amd_pstate_update_limits() Date: Mon, 26 Aug 2024 16:13:57 -0500 Message-ID: <20240826211358.2694603-8-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240826211358.2694603-1-superm1@kernel.org> References: <20240826211358.2694603-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello Don't take and release the mutex when prefcore isn't present and avoid initialization of variables that will be initially set in the function. Signed-off-by: Mario Limonciello Reviewed-by: Perry Yuan Reviewed-by: Gautham R. Shenoy --- drivers/cpufreq/amd-pstate.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 75568d0f84623..ed05d7a0add10 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -798,17 +798,17 @@ static void amd_pstate_update_limits(unsigned int cpu) int ret; bool highest_perf_changed = false; - mutex_lock(&amd_pstate_driver_lock); - if ((!amd_pstate_prefcore) || (!cpudata->hw_prefcore)) - goto free_cpufreq_put; + if (!amd_pstate_prefcore) + return; + mutex_lock(&amd_pstate_driver_lock); ret = amd_get_highest_perf(cpu, &cur_high); if (ret) goto free_cpufreq_put; prev_high = READ_ONCE(cpudata->prefcore_ranking); - if (prev_high != cur_high) { - highest_perf_changed = true; + highest_perf_changed = (prev_high != cur_high); + if (highest_perf_changed) { WRITE_ONCE(cpudata->prefcore_ranking, cur_high); if (cur_high < CPPC_MAX_PERF) From patchwork Mon Aug 26 21:13:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13778484 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 974DD19DF82; Mon, 26 Aug 2024 21:14:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724706853; cv=none; b=icPiRRf7RHQUwR2FSNDrVbFfREY17eRkg30Zd85PDopZrZ3QJ3F1yMFMXD75KmNLUBuKDS+plDsx/yQwiFpNd+JS92eDcSvJxaikq6z1pTXnbLvQh50jTUphfj6y8EN3ffvjqQ99QF2FHSVCSvzxBAxfK89zQRxeWSTgrxfH11Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724706853; c=relaxed/simple; bh=/ftcgDwz/nWWyTslIh+d25Uxgj0lFGTkhwvF2OIiRu8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=shc0FUUSQ5uEUqR3ZNFb1T27yjyzXfehErBzmX5gBRNcqMzDBY79xODkKDtk7ME380e8DCqroJ9i/smawATcAxijVSxMGDNTg0M6sCdAVcd7+N5TUpNNz8cebW5zd3zUlIsClJi6iKcFYyOg7rjwGBE8wFlCwUSpOpYDkti7P2A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=vC93JVPk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="vC93JVPk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 426FCC4FF45; Mon, 26 Aug 2024 21:14:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724706853; bh=/ftcgDwz/nWWyTslIh+d25Uxgj0lFGTkhwvF2OIiRu8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vC93JVPkZ2ImvCxQZ0FZtPjSAQe2dhdVVAuSVVXMe411x/o2lH+Ee13+anIK6wVbi EkMAh5RMCpZ3FuYSJZHdpKXfhvKbf+jvr7EkyuVauNZJ/zMAcdTSVSENh9sc4zvZX/ kjsKdNOyQEBU+dIYRxJY6MrCegR5AZJ0YrhglqdxH4mAU4XIywXKGFkWQCo8HmK0Qs +jpPa8hKU1kF1HhKJvdxQ1egZsINxPgQ3hVlwsjvUnSqafuGDl61t25iaiWFQQMFL9 azkuQ/a588RgYcqaa4x8dq7dYHBILk6OjCuaZgMR2mTxAAm4nHHqdgbgSxjf2v35fi FIcSPH1LOld+w== From: Mario Limonciello To: Borislav Petkov , "Gautham R . Shenoy" , Perry Yuan Cc: x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), "Rafael J . Wysocki" , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-acpi@vger.kernel.org (open list:ACPI), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH 8/8] cpufreq: amd-pstate: Drop some uses of cpudata->hw_prefcore Date: Mon, 26 Aug 2024 16:13:58 -0500 Message-ID: <20240826211358.2694603-9-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240826211358.2694603-1-superm1@kernel.org> References: <20240826211358.2694603-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello As the global variable is cleared when preferred cores is not present the local variable use isn't needed in many functions. Drop it where possible. No intended functional changes. Signed-off-by: Mario Limonciello Reviewed-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index ed05d7a0add10..257e28e549bd1 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1112,12 +1112,7 @@ static ssize_t show_amd_pstate_prefcore_ranking(struct cpufreq_policy *policy, static ssize_t show_amd_pstate_hw_prefcore(struct cpufreq_policy *policy, char *buf) { - bool hw_prefcore; - struct amd_cpudata *cpudata = policy->driver_data; - - hw_prefcore = READ_ONCE(cpudata->hw_prefcore); - - return sysfs_emit(buf, "%s\n", str_enabled_disabled(hw_prefcore)); + return sysfs_emit(buf, "%s\n", str_enabled_disabled(amd_pstate_prefcore)); } static ssize_t show_energy_performance_available_preferences(