From patchwork Fri Aug 30 05:09:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784262 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 39025CA0EE1 for ; Fri, 30 Aug 2024 05:08:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8EA7C10E7D1; Fri, 30 Aug 2024 05:08:20 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="bSyAUvcm"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1434210E7D0; Fri, 30 Aug 2024 05:08:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1724994499; x=1756530499; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=arE856SoAQnc2FYXSVwc4yhMyVmfTrSwyFoBvxA+s/Y=; b=bSyAUvcmg4GGPeRgi5+kVCj5g+UNEYWcUd3VvvIofAsmOhZe3DfppH9g StnGvtPnARGE/+i+tWUIoxG8+kuwuD/uRTEPG3QXPN+CW/2zwRDDuJEHd iUmArBRsPzXm2gHdGdcgYtyCSHgGOU357Pnz5YgULB45NKkq1Elr3sJmr 9HquFB5HKUH8dPG541BKGEpyOe3l0DurOLkWfzfl3RS7wwzlatqM+Ph3y NecwIIB2rzfnwc6Bj3yJ2jyZNcJn7wu78DiqOq16jTCv4QzbYiNFWKMCR RhoVm3ZDj20tUDfPL1UL5aZpjM/89KGtrMh7/WEqafzVfQpSrJ2UMj/eb Q==; X-CSE-ConnectionGUID: 0wp42fzZSde+6KZOgqnEIQ== X-CSE-MsgGUID: oxHwAgNJShmWlOSovIAx1Q== X-IronPort-AV: E=McAfee;i="6700,10204,11179"; a="23421661" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421661" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:19 -0700 X-CSE-ConnectionGUID: 2w5g1ZFfS2CTzck6Q0uOfw== X-CSE-MsgGUID: PMLf80M2QEGpeUvtsCh2lQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610160" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:17 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 01/19] drm/i915/display: Move all DSS control registers to a new file Date: Fri, 30 Aug 2024 10:39:31 +0530 Message-ID: <20240830050950.2528450-2-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move all registers and bits related to dss ctl to a new file. v2: Move modification to use REG_* macros to a new patch. (Jani) Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/icl_dsi.c | 2 +- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/display/intel_dss_regs.h | 49 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vdsc.c | 1 + .../gpu/drm/i915/display/intel_vdsc_regs.h | 38 -------------- 6 files changed, 53 insertions(+), 41 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_dss_regs.h diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 293efc1f841d..5ad5011e1fee 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -44,9 +44,9 @@ #include "intel_de.h" #include "intel_dsi.h" #include "intel_dsi_vbt.h" +#include "intel_dss_regs.h" #include "intel_panel.h" #include "intel_vdsc.h" -#include "intel_vdsc_regs.h" #include "skl_scaler.h" #include "skl_universal_plane.h" diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 25ff3ff0ab95..4566a60c981c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -57,6 +57,7 @@ #include "intel_dp_tunnel.h" #include "intel_dpio_phy.h" #include "intel_dsi.h" +#include "intel_dss_regs.h" #include "intel_encoder.h" #include "intel_fdi.h" #include "intel_fifo_underrun.h" @@ -74,7 +75,6 @@ #include "intel_snps_phy.h" #include "intel_tc.h" #include "intel_vdsc.h" -#include "intel_vdsc_regs.h" #include "skl_scaler.h" #include "skl_universal_plane.h" diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 78ce402a5cd0..3cb960ca6eda 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -87,6 +87,7 @@ #include "intel_drrs.h" #include "intel_dsb.h" #include "intel_dsi.h" +#include "intel_dss_regs.h" #include "intel_dvo.h" #include "intel_fb.h" #include "intel_fbc.h" @@ -118,7 +119,6 @@ #include "intel_tv.h" #include "intel_vblank.h" #include "intel_vdsc.h" -#include "intel_vdsc_regs.h" #include "intel_vga.h" #include "intel_vrr.h" #include "intel_wm.h" diff --git a/drivers/gpu/drm/i915/display/intel_dss_regs.h b/drivers/gpu/drm/i915/display/intel_dss_regs.h new file mode 100644 index 000000000000..b1e24ea027c3 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_dss_regs.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2024 Intel Corporation + */ + +#ifndef __INTEL_DSS_REGS_H__ +#define __INTEL_DSS_REGS_H__ + +#include "intel_display_reg_defs.h" + +/* Display Stream Splitter Control */ +#define DSS_CTL1 _MMIO(0x67400) +#define SPLITTER_ENABLE (1 << 31) +#define JOINER_ENABLE (1 << 30) +#define DUAL_LINK_MODE_INTERLEAVE (1 << 24) +#define DUAL_LINK_MODE_FRONTBACK (0 << 24) +#define OVERLAP_PIXELS_MASK (0xf << 16) +#define OVERLAP_PIXELS(pixels) ((pixels) << 16) +#define LEFT_DL_BUF_TARGET_DEPTH_MASK (0xfff << 0) +#define LEFT_DL_BUF_TARGET_DEPTH(pixels) ((pixels) << 0) +#define MAX_DL_BUFFER_TARGET_DEPTH 0x5a0 + +#define DSS_CTL2 _MMIO(0x67404) +#define LEFT_BRANCH_VDSC_ENABLE (1 << 31) +#define RIGHT_BRANCH_VDSC_ENABLE (1 << 15) +#define RIGHT_DL_BUF_TARGET_DEPTH_MASK (0xfff << 0) +#define RIGHT_DL_BUF_TARGET_DEPTH(pixels) ((pixels) << 0) + +#define _ICL_PIPE_DSS_CTL1_PB 0x78200 +#define _ICL_PIPE_DSS_CTL1_PC 0x78400 +#define ICL_PIPE_DSS_CTL1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ + _ICL_PIPE_DSS_CTL1_PB, \ + _ICL_PIPE_DSS_CTL1_PC) +#define BIG_JOINER_ENABLE (1 << 29) +#define PRIMARY_BIG_JOINER_ENABLE (1 << 28) +#define VGA_CENTERING_ENABLE (1 << 27) +#define SPLITTER_CONFIGURATION_MASK REG_GENMASK(26, 25) +#define SPLITTER_CONFIGURATION_2_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 0) +#define SPLITTER_CONFIGURATION_4_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 1) +#define UNCOMPRESSED_JOINER_PRIMARY (1 << 21) +#define UNCOMPRESSED_JOINER_SECONDARY (1 << 20) + +#define _ICL_PIPE_DSS_CTL2_PB 0x78204 +#define _ICL_PIPE_DSS_CTL2_PC 0x78404 +#define ICL_PIPE_DSS_CTL2(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ + _ICL_PIPE_DSS_CTL2_PB, \ + _ICL_PIPE_DSS_CTL2_PC) + +#endif /* __INTEL_DSS_REGS_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 2e849b015e74..891346f1f09a 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -15,6 +15,7 @@ #include "intel_de.h" #include "intel_display_types.h" #include "intel_dsi.h" +#include "intel_dss_regs.h" #include "intel_qp_tables.h" #include "intel_vdsc.h" #include "intel_vdsc_regs.h" diff --git a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h index f921ad67b587..27c696e266af 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h +++ b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h @@ -8,44 +8,6 @@ #include "intel_display_reg_defs.h" -/* Display Stream Splitter Control */ -#define DSS_CTL1 _MMIO(0x67400) -#define SPLITTER_ENABLE (1 << 31) -#define JOINER_ENABLE (1 << 30) -#define DUAL_LINK_MODE_INTERLEAVE (1 << 24) -#define DUAL_LINK_MODE_FRONTBACK (0 << 24) -#define OVERLAP_PIXELS_MASK (0xf << 16) -#define OVERLAP_PIXELS(pixels) ((pixels) << 16) -#define LEFT_DL_BUF_TARGET_DEPTH_MASK (0xfff << 0) -#define LEFT_DL_BUF_TARGET_DEPTH(pixels) ((pixels) << 0) -#define MAX_DL_BUFFER_TARGET_DEPTH 0x5a0 - -#define DSS_CTL2 _MMIO(0x67404) -#define LEFT_BRANCH_VDSC_ENABLE (1 << 31) -#define RIGHT_BRANCH_VDSC_ENABLE (1 << 15) -#define RIGHT_DL_BUF_TARGET_DEPTH_MASK (0xfff << 0) -#define RIGHT_DL_BUF_TARGET_DEPTH(pixels) ((pixels) << 0) - -#define _ICL_PIPE_DSS_CTL1_PB 0x78200 -#define _ICL_PIPE_DSS_CTL1_PC 0x78400 -#define ICL_PIPE_DSS_CTL1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ - _ICL_PIPE_DSS_CTL1_PB, \ - _ICL_PIPE_DSS_CTL1_PC) -#define BIG_JOINER_ENABLE (1 << 29) -#define PRIMARY_BIG_JOINER_ENABLE (1 << 28) -#define VGA_CENTERING_ENABLE (1 << 27) -#define SPLITTER_CONFIGURATION_MASK REG_GENMASK(26, 25) -#define SPLITTER_CONFIGURATION_2_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 0) -#define SPLITTER_CONFIGURATION_4_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 1) -#define UNCOMPRESSED_JOINER_PRIMARY (1 << 21) -#define UNCOMPRESSED_JOINER_SECONDARY (1 << 20) - -#define _ICL_PIPE_DSS_CTL2_PB 0x78204 -#define _ICL_PIPE_DSS_CTL2_PC 0x78404 -#define ICL_PIPE_DSS_CTL2(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ - _ICL_PIPE_DSS_CTL2_PB, \ - _ICL_PIPE_DSS_CTL2_PC) - /* Icelake Display Stream Compression Registers */ #define DSCA_PICTURE_PARAMETER_SET_0 _MMIO(0x6B200) #define DSCC_PICTURE_PARAMETER_SET_0 _MMIO(0x6BA00) From patchwork Fri Aug 30 05:09:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784264 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5411ECA0EDF for ; Fri, 30 Aug 2024 05:08:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DE06E10E7D7; Fri, 30 Aug 2024 05:08:25 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="m+ixio8Y"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0B0D010E7D0; Fri, 30 Aug 2024 05:08:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1724994501; x=1756530501; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bLgsHe1cR/czH5W9dItRaNRIamDW7jPpteiLzIgebZ4=; b=m+ixio8Y1J3MBgjZB44T4VZUtlnuhhMR0WlnimkuS4JYJLE8LjX+Kevt 3ljWX9H53YqOm0FB1diYj7tGFy1P70yPR0OXTXmhcebYlO4GFIxN+PT8f aSM+aMG3CBPNL0rGKnZFTqblwzic/L7wBFsjQJejX7NU9lWkP36aquuFk AqGI6LtmEOHm9B56hqkR74tgkJKqwbZFdgonn/Nv7rJGxVnoSIXnDb+R3 OX6vOlVHgoAa5MS7UMVX12y0gHBp6dJj/MU548O7LZoTweLwZSQQC8I4B ZYuPX7ACPUmFAm2pV6kZ+avZ8hfPUp0x4NfPEtfEzcvSNZCsoJQOrmmNV g==; X-CSE-ConnectionGUID: KPJ35PIiSn6G9LxzyC43ZA== X-CSE-MsgGUID: yHgvu3e0QqyCuRK67PAr3g== X-IronPort-AV: E=McAfee;i="6700,10204,11179"; a="23421662" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421662" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:21 -0700 X-CSE-ConnectionGUID: /5WtrBXmTrqNkRqu50z5Pw== X-CSE-MsgGUID: l9rGRVngQLCj7VpbSNCRBg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610167" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:19 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 02/19] drm/i915/dss_regs: Use REG_* macros for the DSS ctl bits Date: Fri, 30 Aug 2024 10:39:32 +0530 Message-ID: <20240830050950.2528450-3-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Cleanup register definitions for DSS CLT reg bits. Replace the hand rolled (1< --- drivers/gpu/drm/i915/display/intel_dss_regs.h | 34 ++++++++++--------- 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dss_regs.h b/drivers/gpu/drm/i915/display/intel_dss_regs.h index b1e24ea027c3..cfc8ef451917 100644 --- a/drivers/gpu/drm/i915/display/intel_dss_regs.h +++ b/drivers/gpu/drm/i915/display/intel_dss_regs.h @@ -10,35 +10,37 @@ /* Display Stream Splitter Control */ #define DSS_CTL1 _MMIO(0x67400) -#define SPLITTER_ENABLE (1 << 31) -#define JOINER_ENABLE (1 << 30) -#define DUAL_LINK_MODE_INTERLEAVE (1 << 24) +#define SPLITTER_ENABLE REG_BIT(31) +#define JOINER_ENABLE REG_BIT(30) +#define DUAL_LINK_MODE_INTERLEAVE REG_BIT(24) #define DUAL_LINK_MODE_FRONTBACK (0 << 24) -#define OVERLAP_PIXELS_MASK (0xf << 16) -#define OVERLAP_PIXELS(pixels) ((pixels) << 16) -#define LEFT_DL_BUF_TARGET_DEPTH_MASK (0xfff << 0) -#define LEFT_DL_BUF_TARGET_DEPTH(pixels) ((pixels) << 0) +#define OVERLAP_PIXELS_MASK REG_GENMASK(19, 16) +#define OVERLAP_PIXELS(pixels) REG_FIELD_PREP(OVERLAP_PIXELS_MASK, pixels) +#define LEFT_DL_BUF_TARGET_DEPTH_MASK REG_GENMASK(11, 0) +#define LEFT_DL_BUF_TARGET_DEPTH(pixels) REG_FIELD_PREP(LEFT_DL_BUF_TARGET_DEPTH_MASK, \ + pixels) #define MAX_DL_BUFFER_TARGET_DEPTH 0x5a0 #define DSS_CTL2 _MMIO(0x67404) -#define LEFT_BRANCH_VDSC_ENABLE (1 << 31) -#define RIGHT_BRANCH_VDSC_ENABLE (1 << 15) -#define RIGHT_DL_BUF_TARGET_DEPTH_MASK (0xfff << 0) -#define RIGHT_DL_BUF_TARGET_DEPTH(pixels) ((pixels) << 0) +#define LEFT_BRANCH_VDSC_ENABLE REG_BIT(31) +#define RIGHT_BRANCH_VDSC_ENABLE REG_BIT(15) +#define RIGHT_DL_BUF_TARGET_DEPTH_MASK REG_GENMASK(11, 0) +#define RIGHT_DL_BUF_TARGET_DEPTH(pixels) REG_FIELD_PREP(RIGHT_DL_BUF_TARGET_DEPTH_MASK,\ + pixels) #define _ICL_PIPE_DSS_CTL1_PB 0x78200 #define _ICL_PIPE_DSS_CTL1_PC 0x78400 #define ICL_PIPE_DSS_CTL1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ _ICL_PIPE_DSS_CTL1_PB, \ _ICL_PIPE_DSS_CTL1_PC) -#define BIG_JOINER_ENABLE (1 << 29) -#define PRIMARY_BIG_JOINER_ENABLE (1 << 28) -#define VGA_CENTERING_ENABLE (1 << 27) +#define BIG_JOINER_ENABLE REG_BIT(29) +#define PRIMARY_BIG_JOINER_ENABLE REG_BIT(28) +#define VGA_CENTERING_ENABLE REG_BIT(27) #define SPLITTER_CONFIGURATION_MASK REG_GENMASK(26, 25) #define SPLITTER_CONFIGURATION_2_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 0) #define SPLITTER_CONFIGURATION_4_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 1) -#define UNCOMPRESSED_JOINER_PRIMARY (1 << 21) -#define UNCOMPRESSED_JOINER_SECONDARY (1 << 20) +#define UNCOMPRESSED_JOINER_PRIMARY REG_BIT(21) +#define UNCOMPRESSED_JOINER_SECONDARY REG_BIT(20) #define _ICL_PIPE_DSS_CTL2_PB 0x78204 #define _ICL_PIPE_DSS_CTL2_PC 0x78404 From patchwork Fri Aug 30 05:09:33 2024 Content-Type: text/plain; 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d="scan'208";a="94610186" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:21 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 03/19] drm/i915/ddi: Move all mso related helpers to a new file Date: Fri, 30 Aug 2024 10:39:33 +0530 Message-ID: <20240830050950.2528450-4-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move the MSO related helper functions from intel_ddi.c to a new file intel_dss.c to improve code modularity and maintainability. The corresponding headers are also moved to intel_dss.h. v2: Retain the old naming scheme for the functions and only add dss prefix. (Jani) v3: Remove extra line at the end of header file. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_ddi.c | 86 ++--------------------- drivers/gpu/drm/i915/display/intel_dss.c | 87 ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dss.h | 20 ++++++ drivers/gpu/drm/xe/Makefile | 1 + 5 files changed, 114 insertions(+), 81 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_dss.c create mode 100644 drivers/gpu/drm/i915/display/intel_dss.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index c63fa2133ccb..e55ce8ba123c 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -328,6 +328,7 @@ i915-y += \ display/intel_dsi.o \ display/intel_dsi_dcs_backlight.o \ display/intel_dsi_vbt.o \ + display/intel_dss.o \ display/intel_dvo.o \ display/intel_encoder.o \ display/intel_gmbus.o \ diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 4566a60c981c..7cc766043a5b 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -57,7 +57,7 @@ #include "intel_dp_tunnel.h" #include "intel_dpio_phy.h" #include "intel_dsi.h" -#include "intel_dss_regs.h" +#include "intel_dss.h" #include "intel_encoder.h" #include "intel_fdi.h" #include "intel_fifo_underrun.h" @@ -2349,82 +2349,6 @@ static void intel_ddi_power_up_lanes(struct intel_encoder *encoder, } } -/* - * Splitter enable for eDP MSO is limited to certain pipes, on certain - * platforms. - */ -static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915) -{ - if (DISPLAY_VER(i915) > 20) - return ~0; - else if (IS_ALDERLAKE_P(i915)) - return BIT(PIPE_A) | BIT(PIPE_B); - else - return BIT(PIPE_A); -} - -static void intel_ddi_mso_get_config(struct intel_encoder *encoder, - struct intel_crtc_state *pipe_config) -{ - struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); - enum pipe pipe = crtc->pipe; - u32 dss1; - - if (!HAS_MSO(i915)) - return; - - dss1 = intel_de_read(i915, ICL_PIPE_DSS_CTL1(pipe)); - - pipe_config->splitter.enable = dss1 & SPLITTER_ENABLE; - if (!pipe_config->splitter.enable) - return; - - if (drm_WARN_ON(&i915->drm, !(intel_ddi_splitter_pipe_mask(i915) & BIT(pipe)))) { - pipe_config->splitter.enable = false; - return; - } - - switch (dss1 & SPLITTER_CONFIGURATION_MASK) { - default: - drm_WARN(&i915->drm, true, - "Invalid splitter configuration, dss1=0x%08x\n", dss1); - fallthrough; - case SPLITTER_CONFIGURATION_2_SEGMENT: - pipe_config->splitter.link_count = 2; - break; - case SPLITTER_CONFIGURATION_4_SEGMENT: - pipe_config->splitter.link_count = 4; - break; - } - - pipe_config->splitter.pixel_overlap = REG_FIELD_GET(OVERLAP_PIXELS_MASK, dss1); -} - -static void intel_ddi_mso_configure(const struct intel_crtc_state *crtc_state) -{ - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); - enum pipe pipe = crtc->pipe; - u32 dss1 = 0; - - if (!HAS_MSO(i915)) - return; - - if (crtc_state->splitter.enable) { - dss1 |= SPLITTER_ENABLE; - dss1 |= OVERLAP_PIXELS(crtc_state->splitter.pixel_overlap); - if (crtc_state->splitter.link_count == 2) - dss1 |= SPLITTER_CONFIGURATION_2_SEGMENT; - else - dss1 |= SPLITTER_CONFIGURATION_4_SEGMENT; - } - - intel_de_rmw(i915, ICL_PIPE_DSS_CTL1(pipe), - SPLITTER_ENABLE | SPLITTER_CONFIGURATION_MASK | - OVERLAP_PIXELS_MASK, dss1); -} - static u8 mtl_get_port_width(u8 lane_count) { switch (lane_count) { @@ -2559,7 +2483,7 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state, /* * 6.e Program CoG/MSO configuration bits in DSS_CTL1 if selected. */ - intel_ddi_mso_configure(crtc_state); + intel_dss_mso_configure(crtc_state); if (!is_mst) intel_dp_set_power(intel_dp, DP_SET_POWER_D0); @@ -2714,7 +2638,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state, /* * 7.g Program CoG/MSO configuration bits in DSS_CTL1 if selected. */ - intel_ddi_mso_configure(crtc_state); + intel_dss_mso_configure(crtc_state); if (!is_mst) intel_dp_set_power(intel_dp, DP_SET_POWER_D0); @@ -3959,7 +3883,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder, intel_ddi_read_func_ctl(encoder, pipe_config); - intel_ddi_mso_get_config(encoder, pipe_config); + intel_dss_mso_get_config(encoder, pipe_config); pipe_config->has_audio = intel_ddi_is_audio_enabled(dev_priv, cpu_transcoder); @@ -5191,7 +5115,7 @@ void intel_ddi_init(struct intel_display *display, dig_port->hpd_pulse = intel_dp_hpd_pulse; if (dig_port->dp.mso_link_count) - encoder->pipe_mask = intel_ddi_splitter_pipe_mask(dev_priv); + encoder->pipe_mask = intel_dss_mso_pipe_mask(dev_priv); } /* diff --git a/drivers/gpu/drm/i915/display/intel_dss.c b/drivers/gpu/drm/i915/display/intel_dss.c new file mode 100644 index 000000000000..e774f55f7008 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_dss.c @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2024 Intel Corporation + */ + +#include "i915_drv.h" +#include "i915_reg_defs.h" +#include "intel_de.h" +#include "intel_display_types.h" +#include "intel_dss.h" +#include "intel_dss_regs.h" + +/* + * Splitter enable for eDP MSO is limited to certain pipes, on certain + * platforms. + */ +u8 intel_dss_mso_pipe_mask(struct drm_i915_private *i915) +{ + if (DISPLAY_VER(i915) > 20) + return ~0; + else if (IS_ALDERLAKE_P(i915)) + return BIT(PIPE_A) | BIT(PIPE_B); + else + return BIT(PIPE_A); +} + +void intel_dss_mso_get_config(struct intel_encoder *encoder, + struct intel_crtc_state *pipe_config) +{ + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); + struct drm_i915_private *i915 = to_i915(crtc->base.dev); + enum pipe pipe = crtc->pipe; + u32 dss1; + + if (!HAS_MSO(i915)) + return; + + dss1 = intel_de_read(i915, ICL_PIPE_DSS_CTL1(pipe)); + + pipe_config->splitter.enable = dss1 & SPLITTER_ENABLE; + if (!pipe_config->splitter.enable) + return; + + if (drm_WARN_ON(&i915->drm, !(intel_dss_mso_pipe_mask(i915) & BIT(pipe)))) { + pipe_config->splitter.enable = false; + return; + } + + switch (dss1 & SPLITTER_CONFIGURATION_MASK) { + default: + drm_WARN(&i915->drm, true, + "Invalid splitter configuration, dss1=0x%08x\n", dss1); + fallthrough; + case SPLITTER_CONFIGURATION_2_SEGMENT: + pipe_config->splitter.link_count = 2; + break; + case SPLITTER_CONFIGURATION_4_SEGMENT: + pipe_config->splitter.link_count = 4; + break; + } + + pipe_config->splitter.pixel_overlap = REG_FIELD_GET(OVERLAP_PIXELS_MASK, dss1); +} + +void intel_dss_mso_configure(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *i915 = to_i915(crtc->base.dev); + enum pipe pipe = crtc->pipe; + u32 dss1 = 0; + + if (!HAS_MSO(i915)) + return; + + if (crtc_state->splitter.enable) { + dss1 |= SPLITTER_ENABLE; + dss1 |= OVERLAP_PIXELS(crtc_state->splitter.pixel_overlap); + if (crtc_state->splitter.link_count == 2) + dss1 |= SPLITTER_CONFIGURATION_2_SEGMENT; + else + dss1 |= SPLITTER_CONFIGURATION_4_SEGMENT; + } + + intel_de_rmw(i915, ICL_PIPE_DSS_CTL1(pipe), + SPLITTER_ENABLE | SPLITTER_CONFIGURATION_MASK | + OVERLAP_PIXELS_MASK, dss1); +} diff --git a/drivers/gpu/drm/i915/display/intel_dss.h b/drivers/gpu/drm/i915/display/intel_dss.h new file mode 100644 index 000000000000..95302d061205 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_dss.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2024 Intel Corporation + */ + +#ifndef __INTEL_DSS_H__ +#define __INTEL_DSS_H__ + +#include "linux/types.h" + +struct drm_i915_private; +struct intel_crtc_state; +struct intel_encoder; + +u8 intel_dss_mso_pipe_mask(struct drm_i915_private *i915); +void intel_dss_mso_get_config(struct intel_encoder *encoder, + struct intel_crtc_state *pipe_config); +void intel_dss_mso_configure(const struct intel_crtc_state *crtc_state); + +#endif /* __INTEL_DSS_H__ */ diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index edfd812e0f41..ff1c0ce6da86 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -228,6 +228,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \ i915-display/intel_dsi.o \ i915-display/intel_dsi_dcs_backlight.o \ i915-display/intel_dsi_vbt.o \ + i915-display/intel_dss.o \ i915-display/intel_encoder.o \ i915-display/intel_fb.o \ i915-display/intel_fbc.o \ From patchwork Fri Aug 30 05:09:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 40C99CA0EE2 for ; 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X-CSE-ConnectionGUID: /Hn/hrzbR/+3Fyojz6W1Vw== X-CSE-MsgGUID: OiWo4nWPS6eu+UTbBOqTpQ== X-IronPort-AV: E=McAfee;i="6700,10204,11179"; a="23421673" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421673" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:26 -0700 X-CSE-ConnectionGUID: URg3ARceQRarufUKveDK7A== X-CSE-MsgGUID: KNSM41WzTwyjxQeN80Gmqg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610209" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:23 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 04/19] drm/i915/dss: Move to struct intel_display Date: Fri, 30 Aug 2024 10:39:34 +0530 Message-ID: <20240830050950.2528450-5-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use struct intel_display instead of struct drm_i915_private. v2: Use struct intel_display for drm Warns. (Jani) Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- drivers/gpu/drm/i915/display/intel_dss.c | 22 ++++++++++++---------- drivers/gpu/drm/i915/display/intel_dss.h | 4 ++-- 3 files changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 7cc766043a5b..aa176f4d42c4 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -5115,7 +5115,7 @@ void intel_ddi_init(struct intel_display *display, dig_port->hpd_pulse = intel_dp_hpd_pulse; if (dig_port->dp.mso_link_count) - encoder->pipe_mask = intel_dss_mso_pipe_mask(dev_priv); + encoder->pipe_mask = intel_dss_mso_pipe_mask(display); } /* diff --git a/drivers/gpu/drm/i915/display/intel_dss.c b/drivers/gpu/drm/i915/display/intel_dss.c index e774f55f7008..3f7f416eb3fa 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.c +++ b/drivers/gpu/drm/i915/display/intel_dss.c @@ -14,9 +14,11 @@ * Splitter enable for eDP MSO is limited to certain pipes, on certain * platforms. */ -u8 intel_dss_mso_pipe_mask(struct drm_i915_private *i915) +u8 intel_dss_mso_pipe_mask(struct intel_display *display) { - if (DISPLAY_VER(i915) > 20) + struct drm_i915_private *i915 = to_i915(display->drm); + + if (DISPLAY_VER(display) > 20) return ~0; else if (IS_ALDERLAKE_P(i915)) return BIT(PIPE_A) | BIT(PIPE_B); @@ -27,28 +29,28 @@ u8 intel_dss_mso_pipe_mask(struct drm_i915_private *i915) void intel_dss_mso_get_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config) { + struct intel_display *display = to_intel_display(pipe_config); struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; u32 dss1; - if (!HAS_MSO(i915)) + if (!HAS_MSO(display)) return; - dss1 = intel_de_read(i915, ICL_PIPE_DSS_CTL1(pipe)); + dss1 = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe)); pipe_config->splitter.enable = dss1 & SPLITTER_ENABLE; if (!pipe_config->splitter.enable) return; - if (drm_WARN_ON(&i915->drm, !(intel_dss_mso_pipe_mask(i915) & BIT(pipe)))) { + if (drm_WARN_ON(display->drm, !(intel_dss_mso_pipe_mask(display) & BIT(pipe)))) { pipe_config->splitter.enable = false; return; } switch (dss1 & SPLITTER_CONFIGURATION_MASK) { default: - drm_WARN(&i915->drm, true, + drm_WARN(display->drm, true, "Invalid splitter configuration, dss1=0x%08x\n", dss1); fallthrough; case SPLITTER_CONFIGURATION_2_SEGMENT: @@ -64,12 +66,12 @@ void intel_dss_mso_get_config(struct intel_encoder *encoder, void intel_dss_mso_configure(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; u32 dss1 = 0; - if (!HAS_MSO(i915)) + if (!HAS_MSO(display)) return; if (crtc_state->splitter.enable) { @@ -81,7 +83,7 @@ void intel_dss_mso_configure(const struct intel_crtc_state *crtc_state) dss1 |= SPLITTER_CONFIGURATION_4_SEGMENT; } - intel_de_rmw(i915, ICL_PIPE_DSS_CTL1(pipe), + intel_de_rmw(display, ICL_PIPE_DSS_CTL1(pipe), SPLITTER_ENABLE | SPLITTER_CONFIGURATION_MASK | OVERLAP_PIXELS_MASK, dss1); } diff --git a/drivers/gpu/drm/i915/display/intel_dss.h b/drivers/gpu/drm/i915/display/intel_dss.h index 95302d061205..d4629052979a 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.h +++ b/drivers/gpu/drm/i915/display/intel_dss.h @@ -8,11 +8,11 @@ #include "linux/types.h" -struct drm_i915_private; struct intel_crtc_state; +struct intel_display; struct intel_encoder; -u8 intel_dss_mso_pipe_mask(struct drm_i915_private *i915); +u8 intel_dss_mso_pipe_mask(struct intel_display *display); void intel_dss_mso_get_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config); void intel_dss_mso_configure(const struct intel_crtc_state *crtc_state); From patchwork Fri Aug 30 05:09:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784266 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5243ACA0EE0 for ; Fri, 30 Aug 2024 05:08:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EB99510E7CC; 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X-CSE-ConnectionGUID: n4xhivVCTDms2pmtmL/9Pg== X-CSE-MsgGUID: LjlgoUpeTde1ShF2MUI26Q== X-IronPort-AV: E=McAfee;i="6700,10204,11179"; a="23421676" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421676" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:28 -0700 X-CSE-ConnectionGUID: dGQh6orOTo2eVWqf/I+AGg== X-CSE-MsgGUID: RNsPdbnPS8yiTBBoOC9Q8g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610229" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:26 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 05/19] drm/i915/icl_dsi: Avoid using intel_dsi in configure_dual_link_mode Date: Fri, 30 Aug 2024 10:39:35 +0530 Message-ID: <20240830050950.2528450-6-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" DSS control regs have bits to configure dual_link_mode. Pass dual_link, and pixel_overlap to the configure_dual_link_mode() instead of deriving from intel_dsi. This will make the movement of the function to intel_dss files easier and avoid need of intel_dsi in intel_dss files. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/icl_dsi.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 5ad5011e1fee..2f94644f51f3 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -275,10 +275,10 @@ static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder) } static void configure_dual_link_mode(struct intel_encoder *encoder, - const struct intel_crtc_state *pipe_config) + const struct intel_crtc_state *pipe_config, + u8 dual_link, u8 pixel_overlap) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); i915_reg_t dss_ctl1_reg, dss_ctl2_reg; u32 dss_ctl1; @@ -296,16 +296,16 @@ static void configure_dual_link_mode(struct intel_encoder *encoder, dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg); dss_ctl1 |= SPLITTER_ENABLE; dss_ctl1 &= ~OVERLAP_PIXELS_MASK; - dss_ctl1 |= OVERLAP_PIXELS(intel_dsi->pixel_overlap); + dss_ctl1 |= OVERLAP_PIXELS(pixel_overlap); - if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) { + if (dual_link == DSI_DUAL_LINK_FRONT_BACK) { const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; u16 hactive = adjusted_mode->crtc_hdisplay; u16 dl_buffer_depth; dss_ctl1 &= ~DUAL_LINK_MODE_INTERLEAVE; - dl_buffer_depth = hactive / 2 + intel_dsi->pixel_overlap; + dl_buffer_depth = hactive / 2 + pixel_overlap; if (dl_buffer_depth > MAX_DL_BUFFER_TARGET_DEPTH) drm_err(&dev_priv->drm, @@ -791,7 +791,9 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, } /* configure stream splitting */ - configure_dual_link_mode(encoder, pipe_config); + configure_dual_link_mode(encoder, pipe_config, + intel_dsi->dual_link, + intel_dsi->pixel_overlap); } for_each_dsi_port(port, intel_dsi->ports) { From patchwork Fri Aug 30 05:09:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784267 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 525F8CA0EE0 for ; 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X-CSE-ConnectionGUID: ovf5r4imSmOVvw0nid1lEg== X-CSE-MsgGUID: 5nTdtjBLS9KlH73TwHffaA== X-IronPort-AV: E=McAfee;i="6700,10204,11179"; a="23421677" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421677" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:30 -0700 X-CSE-ConnectionGUID: Xg5ieX6cSvOCAnYyGATmQg== X-CSE-MsgGUID: /jDVNGgdQrSpC1SG3NYlLQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610238" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:28 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 06/19] drm/i915/icl_dsi: Use intel_display in configure_dual_link_mode Date: Fri, 30 Aug 2024 10:39:36 +0530 Message-ID: <20240830050950.2528450-7-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Replace struct drm_i915_private with struct intel_display in configure_dual_link_mode. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/icl_dsi.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 2f94644f51f3..79e149d51cb2 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -278,12 +278,12 @@ static void configure_dual_link_mode(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config, u8 dual_link, u8 pixel_overlap) { - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_display *display = to_intel_display(encoder); i915_reg_t dss_ctl1_reg, dss_ctl2_reg; u32 dss_ctl1; /* FIXME: Move all DSS handling to intel_vdsc.c */ - if (DISPLAY_VER(dev_priv) >= 12) { + if (DISPLAY_VER(display) >= 12) { struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); dss_ctl1_reg = ICL_PIPE_DSS_CTL1(crtc->pipe); @@ -293,7 +293,7 @@ static void configure_dual_link_mode(struct intel_encoder *encoder, dss_ctl2_reg = DSS_CTL2; } - dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg); + dss_ctl1 = intel_de_read(display, dss_ctl1_reg); dss_ctl1 |= SPLITTER_ENABLE; dss_ctl1 &= ~OVERLAP_PIXELS_MASK; dss_ctl1 |= OVERLAP_PIXELS(pixel_overlap); @@ -308,19 +308,19 @@ static void configure_dual_link_mode(struct intel_encoder *encoder, dl_buffer_depth = hactive / 2 + pixel_overlap; if (dl_buffer_depth > MAX_DL_BUFFER_TARGET_DEPTH) - drm_err(&dev_priv->drm, + drm_err(display->drm, "DL buffer depth exceed max value\n"); dss_ctl1 &= ~LEFT_DL_BUF_TARGET_DEPTH_MASK; dss_ctl1 |= LEFT_DL_BUF_TARGET_DEPTH(dl_buffer_depth); - intel_de_rmw(dev_priv, dss_ctl2_reg, RIGHT_DL_BUF_TARGET_DEPTH_MASK, + intel_de_rmw(display, dss_ctl2_reg, RIGHT_DL_BUF_TARGET_DEPTH_MASK, RIGHT_DL_BUF_TARGET_DEPTH(dl_buffer_depth)); } else { /* Interleave */ dss_ctl1 |= DUAL_LINK_MODE_INTERLEAVE; } - intel_de_write(dev_priv, dss_ctl1_reg, dss_ctl1); + intel_de_write(display, dss_ctl1_reg, dss_ctl1); } /* aka DSI 8X clock */ From patchwork Fri Aug 30 05:09:37 2024 Content-Type: text/plain; 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d="scan'208";a="94610245" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:30 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 07/19] drm/i915/icl_dsi: Move helpers to configure dsi dual link to intel_dss Date: Fri, 30 Aug 2024 10:39:37 +0530 Message-ID: <20240830050950.2528450-8-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move the function to configure dss_ctl for dual_link dsi to intel_dss files. While at it, use struct intel_display wherever possible. v2: Avoid modifying the code while movement. (Jani) Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/icl_dsi.c | 57 ++---------------------- drivers/gpu/drm/i915/display/intel_dss.c | 50 +++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dss.h | 3 ++ 3 files changed, 57 insertions(+), 53 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 79e149d51cb2..ec880d1cbbee 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -44,7 +44,7 @@ #include "intel_de.h" #include "intel_dsi.h" #include "intel_dsi_vbt.h" -#include "intel_dss_regs.h" +#include "intel_dss.h" #include "intel_panel.h" #include "intel_vdsc.h" #include "skl_scaler.h" @@ -274,55 +274,6 @@ static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder) } } -static void configure_dual_link_mode(struct intel_encoder *encoder, - const struct intel_crtc_state *pipe_config, - u8 dual_link, u8 pixel_overlap) -{ - struct intel_display *display = to_intel_display(encoder); - i915_reg_t dss_ctl1_reg, dss_ctl2_reg; - u32 dss_ctl1; - - /* FIXME: Move all DSS handling to intel_vdsc.c */ - if (DISPLAY_VER(display) >= 12) { - struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); - - dss_ctl1_reg = ICL_PIPE_DSS_CTL1(crtc->pipe); - dss_ctl2_reg = ICL_PIPE_DSS_CTL2(crtc->pipe); - } else { - dss_ctl1_reg = DSS_CTL1; - dss_ctl2_reg = DSS_CTL2; - } - - dss_ctl1 = intel_de_read(display, dss_ctl1_reg); - dss_ctl1 |= SPLITTER_ENABLE; - dss_ctl1 &= ~OVERLAP_PIXELS_MASK; - dss_ctl1 |= OVERLAP_PIXELS(pixel_overlap); - - if (dual_link == DSI_DUAL_LINK_FRONT_BACK) { - const struct drm_display_mode *adjusted_mode = - &pipe_config->hw.adjusted_mode; - u16 hactive = adjusted_mode->crtc_hdisplay; - u16 dl_buffer_depth; - - dss_ctl1 &= ~DUAL_LINK_MODE_INTERLEAVE; - dl_buffer_depth = hactive / 2 + pixel_overlap; - - if (dl_buffer_depth > MAX_DL_BUFFER_TARGET_DEPTH) - drm_err(display->drm, - "DL buffer depth exceed max value\n"); - - dss_ctl1 &= ~LEFT_DL_BUF_TARGET_DEPTH_MASK; - dss_ctl1 |= LEFT_DL_BUF_TARGET_DEPTH(dl_buffer_depth); - intel_de_rmw(display, dss_ctl2_reg, RIGHT_DL_BUF_TARGET_DEPTH_MASK, - RIGHT_DL_BUF_TARGET_DEPTH(dl_buffer_depth)); - } else { - /* Interleave */ - dss_ctl1 |= DUAL_LINK_MODE_INTERLEAVE; - } - - intel_de_write(display, dss_ctl1_reg, dss_ctl1); -} - /* aka DSI 8X clock */ static int afe_clk(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) @@ -791,9 +742,9 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, } /* configure stream splitting */ - configure_dual_link_mode(encoder, pipe_config, - intel_dsi->dual_link, - intel_dsi->pixel_overlap); + intel_dss_dsi_dual_link_mode_configure(encoder, pipe_config, + intel_dsi->dual_link, + intel_dsi->pixel_overlap); } for_each_dsi_port(port, intel_dsi->ports) { diff --git a/drivers/gpu/drm/i915/display/intel_dss.c b/drivers/gpu/drm/i915/display/intel_dss.c index 3f7f416eb3fa..969e32143983 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.c +++ b/drivers/gpu/drm/i915/display/intel_dss.c @@ -7,6 +7,7 @@ #include "i915_reg_defs.h" #include "intel_de.h" #include "intel_display_types.h" +#include "intel_dsi.h" #include "intel_dss.h" #include "intel_dss_regs.h" @@ -87,3 +88,52 @@ void intel_dss_mso_configure(const struct intel_crtc_state *crtc_state) SPLITTER_ENABLE | SPLITTER_CONFIGURATION_MASK | OVERLAP_PIXELS_MASK, dss1); } + +void intel_dss_dsi_dual_link_mode_configure(struct intel_encoder *encoder, + const struct intel_crtc_state *pipe_config, + u8 dual_link, + u8 pixel_overlap) +{ + struct intel_display *display = to_intel_display(encoder); + i915_reg_t dss_ctl1_reg, dss_ctl2_reg; + u32 dss_ctl1; + + if (DISPLAY_VER(display) >= 12) { + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); + + dss_ctl1_reg = ICL_PIPE_DSS_CTL1(crtc->pipe); + dss_ctl2_reg = ICL_PIPE_DSS_CTL2(crtc->pipe); + } else { + dss_ctl1_reg = DSS_CTL1; + dss_ctl2_reg = DSS_CTL2; + } + + dss_ctl1 = intel_de_read(display, dss_ctl1_reg); + dss_ctl1 |= SPLITTER_ENABLE; + dss_ctl1 &= ~OVERLAP_PIXELS_MASK; + dss_ctl1 |= OVERLAP_PIXELS(pixel_overlap); + + if (dual_link == DSI_DUAL_LINK_FRONT_BACK) { + const struct drm_display_mode *adjusted_mode = + &pipe_config->hw.adjusted_mode; + u16 hactive = adjusted_mode->crtc_hdisplay; + u16 dl_buffer_depth; + + dss_ctl1 &= ~DUAL_LINK_MODE_INTERLEAVE; + dl_buffer_depth = hactive / 2 + pixel_overlap; + + if (dl_buffer_depth > MAX_DL_BUFFER_TARGET_DEPTH) + drm_err(display->drm, + "DL buffer depth exceed max value\n"); + + dss_ctl1 &= ~LEFT_DL_BUF_TARGET_DEPTH_MASK; + dss_ctl1 |= LEFT_DL_BUF_TARGET_DEPTH(dl_buffer_depth); + intel_de_rmw(display, dss_ctl2_reg, RIGHT_DL_BUF_TARGET_DEPTH_MASK, + RIGHT_DL_BUF_TARGET_DEPTH(dl_buffer_depth)); + } else { + /* Interleave */ + dss_ctl1 |= DUAL_LINK_MODE_INTERLEAVE; + } + + intel_de_write(display, dss_ctl1_reg, dss_ctl1); +} diff --git a/drivers/gpu/drm/i915/display/intel_dss.h b/drivers/gpu/drm/i915/display/intel_dss.h index d4629052979a..aa8c67c15855 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.h +++ b/drivers/gpu/drm/i915/display/intel_dss.h @@ -16,5 +16,8 @@ u8 intel_dss_mso_pipe_mask(struct intel_display *display); void intel_dss_mso_get_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config); void intel_dss_mso_configure(const struct intel_crtc_state *crtc_state); +void intel_dss_dsi_dual_link_mode_configure(struct intel_encoder *encoder, + const struct intel_crtc_state *pipe_config, + u8 dual_link, u8 pixel_overlap); #endif /* __INTEL_DSS_H__ */ From patchwork Fri Aug 30 05:09:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784273 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88C12CA0EE1 for ; Fri, 30 Aug 2024 05:08:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0CEC310E7E3; Fri, 30 Aug 2024 05:08:47 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="MlEPUBqs"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id D5B0210E7DF; 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29 Aug 2024 22:08:34 -0700 X-CSE-ConnectionGUID: 8B0nacANQlCkURH/fx0qcQ== X-CSE-MsgGUID: 3IwGdwiaSH60n9vhsdIqtQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610251" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:32 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 08/19] drm/i915/vdsc: Rename helper to check if the pipe supports dsc Date: Fri, 30 Aug 2024 10:39:38 +0530 Message-ID: <20240830050950.2528450-9-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Rename the helper is_pipe_dsc to intel_dsc_is_pipe_dsc to prepare for its future use across multiple files. This change is a preliminary step towards making the function non-static, enhancing its accessibility and reusability. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vdsc.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 891346f1f09a..6d60b72a9dfb 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -35,7 +35,7 @@ bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) return true; } -static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder) +static bool intel_dsc_is_dsc_pipe(struct intel_crtc *crtc, enum transcoder cpu_transcoder) { struct drm_i915_private *i915 = to_i915(crtc->base.dev); @@ -366,7 +366,7 @@ intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder) */ if (DISPLAY_VER(i915) == 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A) return POWER_DOMAIN_TRANSCODER_VDSC_PW2; - else if (is_pipe_dsc(crtc, cpu_transcoder)) + else if (intel_dsc_is_dsc_pipe(crtc, cpu_transcoder)) return POWER_DOMAIN_PIPE(pipe); else return POWER_DOMAIN_TRANSCODER_VDSC_PW2; @@ -395,7 +395,7 @@ static void intel_dsc_get_pps_reg(const struct intel_crtc_state *crtc_state, int enum pipe pipe = crtc->pipe; bool pipe_dsc; - pipe_dsc = is_pipe_dsc(crtc, cpu_transcoder); + pipe_dsc = intel_dsc_is_dsc_pipe(crtc, cpu_transcoder); if (dsc_reg_num >= 3) MISSING_CASE(dsc_reg_num); @@ -538,7 +538,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state) rc_buf_thresh_dword[i / 4] |= (u32)(vdsc_cfg->rc_buf_thresh[i] << BITS_PER_BYTE * (i % 4)); - if (!is_pipe_dsc(crtc, cpu_transcoder)) { + if (!intel_dsc_is_dsc_pipe(crtc, cpu_transcoder)) { intel_de_write(dev_priv, DSCA_RC_BUF_THRESH_0, rc_buf_thresh_dword[0]); intel_de_write(dev_priv, DSCA_RC_BUF_THRESH_0_UDW, @@ -592,7 +592,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state) RC_MAX_QP_SHIFT) | (vdsc_cfg->rc_range_params[i].range_min_qp << RC_MIN_QP_SHIFT)) << 16 * (i % 2)); - if (!is_pipe_dsc(crtc, cpu_transcoder)) { + if (!intel_dsc_is_dsc_pipe(crtc, cpu_transcoder)) { intel_de_write(dev_priv, DSCA_RC_RANGE_PARAMETERS_0, rc_range_params_dword[0]); intel_de_write(dev_priv, DSCA_RC_RANGE_PARAMETERS_0_UDW, @@ -726,13 +726,13 @@ void intel_dsc_dp_pps_write(struct intel_encoder *encoder, static i915_reg_t dss_ctl1_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder) { - return is_pipe_dsc(crtc, cpu_transcoder) ? + return intel_dsc_is_dsc_pipe(crtc, cpu_transcoder) ? ICL_PIPE_DSS_CTL1(crtc->pipe) : DSS_CTL1; } static i915_reg_t dss_ctl2_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder) { - return is_pipe_dsc(crtc, cpu_transcoder) ? + return intel_dsc_is_dsc_pipe(crtc, cpu_transcoder) ? ICL_PIPE_DSS_CTL2(crtc->pipe) : DSS_CTL2; } From patchwork Fri Aug 30 05:09:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784268 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C78FCCA0EE1 for ; Fri, 30 Aug 2024 05:08:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5F34610E7D6; Fri, 30 Aug 2024 05:08:36 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="OnaYyAy5"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id E230F10E7D6; Fri, 30 Aug 2024 05:08:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1724994516; x=1756530516; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RIlmEABhaKDaDimwrYUT8yCg7k7yET8y0Xa15rMlHq8=; b=OnaYyAy5srwtfzReTJeWs4Tf3Te/EJrE/4bRFVf7nSpj73epFNu8DBEH cEvHok0yUe/RTIDaGzLlLSWiWyAWf8quJxU7k8NEUVJQlVnyf+RZA1Jte ZrLQiYEEh8s8A9uq0ZE4VRxphLmasCWcjVKw9SXR5qJVA8iDKGwkbdL2z isyDAVBnXHUJ9TWL4bk0vOYjm+zg1N490CpnS+o6AFZp2gpchg+2aRBIF 5PI8GW/X80rqm9Jpa5ASOn9kuoP4tRSnzhhYaXf69txPGqLwffiIuqANb LuyE+uhscKdRw35f/Upg3VNujd/Llu3bGbidvgIGjINHum5Y8cFPrgEr5 A==; X-CSE-ConnectionGUID: yBhd2GOATnOlWA1UFElWUA== X-CSE-MsgGUID: wlwMB/b4RGaHtnAdQtqfMA== X-IronPort-AV: E=McAfee;i="6700,10204,11179"; a="23421685" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421685" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:36 -0700 X-CSE-ConnectionGUID: /f3SeIAPTISp9v+Jok9lkQ== X-CSE-MsgGUID: H6/oAhK9TpOQrgBQSI1pGQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610260" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:34 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 09/19] drm/i915/vdsc: Move all dss stuff in dss files Date: Fri, 30 Aug 2024 10:39:39 +0530 Message-ID: <20240830050950.2528450-10-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move helpers to configure dss for compressed and uncompressed joiner to intel_dss files. While at it, replace struct drm_i915_private to struct intel_display wherever possible. v2: -Move modification to use struct intel_display to another patch. (Jani) -Tweak the name for helper to get_config helper. (Jani) Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 3 +- drivers/gpu/drm/i915/display/intel_dss.c | 80 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dss.h | 5 ++ drivers/gpu/drm/i915/display/intel_vdsc.c | 67 ++-------------- drivers/gpu/drm/i915/display/intel_vdsc.h | 2 +- 5 files changed, 94 insertions(+), 63 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 3cb960ca6eda..9bcbb9c923a9 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -87,6 +87,7 @@ #include "intel_drrs.h" #include "intel_dsb.h" #include "intel_dsi.h" +#include "intel_dss.h" #include "intel_dss_regs.h" #include "intel_dvo.h" #include "intel_fb.h" @@ -1711,7 +1712,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, intel_dsc_enable(pipe_crtc_state); if (DISPLAY_VER(dev_priv) >= 13) - intel_uncompressed_joiner_enable(pipe_crtc_state); + intel_dss_enable_uncompressed_joiner(pipe_crtc_state); intel_set_pipe_src_size(pipe_crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_dss.c b/drivers/gpu/drm/i915/display/intel_dss.c index 969e32143983..b37e9112ab77 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.c +++ b/drivers/gpu/drm/i915/display/intel_dss.c @@ -6,10 +6,12 @@ #include "i915_drv.h" #include "i915_reg_defs.h" #include "intel_de.h" +#include "intel_display_limits.h" #include "intel_display_types.h" #include "intel_dsi.h" #include "intel_dss.h" #include "intel_dss_regs.h" +#include "intel_vdsc.h" /* * Splitter enable for eDP MSO is limited to certain pipes, on certain @@ -137,3 +139,81 @@ void intel_dss_dsi_dual_link_mode_configure(struct intel_encoder *encoder, intel_de_write(display, dss_ctl1_reg, dss_ctl1); } + +static i915_reg_t dss_ctl1_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder) +{ + return intel_dsc_is_dsc_pipe(crtc, cpu_transcoder) ? + ICL_PIPE_DSS_CTL1(crtc->pipe) : DSS_CTL1; +} + +static i915_reg_t dss_ctl2_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder) +{ + return intel_dsc_is_dsc_pipe(crtc, cpu_transcoder) ? + ICL_PIPE_DSS_CTL2(crtc->pipe) : DSS_CTL2; +} + +void intel_dss_reset(const struct intel_crtc_state *old_crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + + intel_de_write(dev_priv, dss_ctl1_reg(crtc, old_crtc_state->cpu_transcoder), 0); + intel_de_write(dev_priv, dss_ctl2_reg(crtc, old_crtc_state->cpu_transcoder), 0); +} + +void intel_dss_enable_uncompressed_joiner(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + u32 dss_ctl1_val = 0; + + if (crtc_state->joiner_pipes && !crtc_state->dsc.compression_enable) { + if (intel_crtc_is_joiner_secondary(crtc_state)) + dss_ctl1_val |= UNCOMPRESSED_JOINER_SECONDARY; + else + dss_ctl1_val |= UNCOMPRESSED_JOINER_PRIMARY; + + intel_de_write(dev_priv, + dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), + dss_ctl1_val); + } +} + +void intel_dss_enable_compressed_joiner(const struct intel_crtc_state *crtc_state, + int vdsc_instances_per_pipe) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + u32 dss_ctl1_val = 0; + u32 dss_ctl2_val = 0; + + dss_ctl2_val |= LEFT_BRANCH_VDSC_ENABLE; + if (vdsc_instances_per_pipe > 1) { + dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE; + dss_ctl1_val |= JOINER_ENABLE; + } + if (crtc_state->joiner_pipes) { + dss_ctl1_val |= BIG_JOINER_ENABLE; + if (!intel_crtc_is_joiner_secondary(crtc_state)) + dss_ctl1_val |= PRIMARY_BIG_JOINER_ENABLE; + } + intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val); + intel_de_write(dev_priv, dss_ctl2_reg(crtc, crtc_state->cpu_transcoder), dss_ctl2_val); +} + +void intel_dss_dsc_get_config(struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + u32 dss_ctl1, dss_ctl2; + + dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder)); + dss_ctl2 = intel_de_read(dev_priv, dss_ctl2_reg(crtc, crtc_state->cpu_transcoder)); + + crtc_state->dsc.compression_enable = dss_ctl2 & LEFT_BRANCH_VDSC_ENABLE; + if (!crtc_state->dsc.compression_enable) + return; + + crtc_state->dsc.dsc_split = (dss_ctl2 & RIGHT_BRANCH_VDSC_ENABLE) && + (dss_ctl1 & JOINER_ENABLE); +} diff --git a/drivers/gpu/drm/i915/display/intel_dss.h b/drivers/gpu/drm/i915/display/intel_dss.h index aa8c67c15855..2d06bbe52687 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.h +++ b/drivers/gpu/drm/i915/display/intel_dss.h @@ -19,5 +19,10 @@ void intel_dss_mso_configure(const struct intel_crtc_state *crtc_state); void intel_dss_dsi_dual_link_mode_configure(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config, u8 dual_link, u8 pixel_overlap); +void intel_dss_reset(const struct intel_crtc_state *old_crtc_state); +void intel_dss_enable_uncompressed_joiner(const struct intel_crtc_state *crtc_state); +void intel_dss_enable_compressed_joiner(const struct intel_crtc_state *crtc_state, + int vdsc_instances_per_pipe); +void intel_dss_dsc_get_config(struct intel_crtc_state *crtc_state); #endif /* __INTEL_DSS_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 6d60b72a9dfb..7e7c7694e56f 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -15,7 +15,7 @@ #include "intel_de.h" #include "intel_display_types.h" #include "intel_dsi.h" -#include "intel_dss_regs.h" +#include "intel_dss.h" #include "intel_qp_tables.h" #include "intel_vdsc.h" #include "intel_vdsc_regs.h" @@ -35,7 +35,7 @@ bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) return true; } -static bool intel_dsc_is_dsc_pipe(struct intel_crtc *crtc, enum transcoder cpu_transcoder) +bool intel_dsc_is_dsc_pipe(struct intel_crtc *crtc, enum transcoder cpu_transcoder) { struct drm_i915_private *i915 = to_i915(crtc->base.dev); @@ -724,72 +724,23 @@ void intel_dsc_dp_pps_write(struct intel_encoder *encoder, sizeof(dp_dsc_pps_sdp)); } -static i915_reg_t dss_ctl1_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder) -{ - return intel_dsc_is_dsc_pipe(crtc, cpu_transcoder) ? - ICL_PIPE_DSS_CTL1(crtc->pipe) : DSS_CTL1; -} - -static i915_reg_t dss_ctl2_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder) -{ - return intel_dsc_is_dsc_pipe(crtc, cpu_transcoder) ? - ICL_PIPE_DSS_CTL2(crtc->pipe) : DSS_CTL2; -} - -void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state) -{ - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - u32 dss_ctl1_val = 0; - - if (crtc_state->joiner_pipes && !crtc_state->dsc.compression_enable) { - if (intel_crtc_is_joiner_secondary(crtc_state)) - dss_ctl1_val |= UNCOMPRESSED_JOINER_SECONDARY; - else - dss_ctl1_val |= UNCOMPRESSED_JOINER_PRIMARY; - - intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val); - } -} - void intel_dsc_enable(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - u32 dss_ctl1_val = 0; - u32 dss_ctl2_val = 0; int vdsc_instances_per_pipe = intel_dsc_get_vdsc_per_pipe(crtc_state); if (!crtc_state->dsc.compression_enable) return; intel_dsc_pps_configure(crtc_state); - - dss_ctl2_val |= LEFT_BRANCH_VDSC_ENABLE; - if (vdsc_instances_per_pipe > 1) { - dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE; - dss_ctl1_val |= JOINER_ENABLE; - } - if (crtc_state->joiner_pipes) { - dss_ctl1_val |= BIG_JOINER_ENABLE; - if (!intel_crtc_is_joiner_secondary(crtc_state)) - dss_ctl1_val |= PRIMARY_BIG_JOINER_ENABLE; - } - intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val); - intel_de_write(dev_priv, dss_ctl2_reg(crtc, crtc_state->cpu_transcoder), dss_ctl2_val); + intel_dss_enable_compressed_joiner(crtc_state, vdsc_instances_per_pipe); } void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - /* Disable only if either of them is enabled */ if (old_crtc_state->dsc.compression_enable || - old_crtc_state->joiner_pipes) { - intel_de_write(dev_priv, dss_ctl1_reg(crtc, old_crtc_state->cpu_transcoder), 0); - intel_de_write(dev_priv, dss_ctl2_reg(crtc, old_crtc_state->cpu_transcoder), 0); - } + old_crtc_state->joiner_pipes) + intel_dss_reset(old_crtc_state); } static u32 intel_dsc_pps_read(struct intel_crtc_state *crtc_state, int pps, @@ -946,7 +897,6 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state) enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; enum intel_display_power_domain power_domain; intel_wakeref_t wakeref; - u32 dss_ctl1, dss_ctl2; if (!intel_dsc_source_support(crtc_state)) return; @@ -957,16 +907,11 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state) if (!wakeref) return; - dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc, cpu_transcoder)); - dss_ctl2 = intel_de_read(dev_priv, dss_ctl2_reg(crtc, cpu_transcoder)); + intel_dss_dsc_get_config(crtc_state); - crtc_state->dsc.compression_enable = dss_ctl2 & LEFT_BRANCH_VDSC_ENABLE; if (!crtc_state->dsc.compression_enable) goto out; - crtc_state->dsc.dsc_split = (dss_ctl2 & RIGHT_BRANCH_VDSC_ENABLE) && - (dss_ctl1 & JOINER_ENABLE); - intel_dsc_get_pps_config(crtc_state); out: intel_display_power_put(dev_priv, power_domain, wakeref); diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h index 290b2e9b3482..345956d0c77e 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.h +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h @@ -16,7 +16,6 @@ struct intel_crtc_state; struct intel_encoder; bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state); -void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state); void intel_dsc_enable(const struct intel_crtc_state *crtc_state); void intel_dsc_disable(const struct intel_crtc_state *crtc_state); int intel_dsc_compute_params(struct intel_crtc_state *pipe_config); @@ -31,5 +30,6 @@ void intel_dsc_dp_pps_write(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); void intel_vdsc_state_dump(struct drm_printer *p, int indent, const struct intel_crtc_state *crtc_state); +bool intel_dsc_is_dsc_pipe(struct intel_crtc *crtc, enum transcoder cpu_transcoder); #endif /* __INTEL_VDSC_H__ */ From patchwork Fri Aug 30 05:09:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784272 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CDC7FCA0EDF for ; Fri, 30 Aug 2024 05:08:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6AA7B10E7E1; Fri, 30 Aug 2024 05:08:46 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="SJ0AaDaF"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id DD1CE10E7E0; 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29 Aug 2024 22:08:38 -0700 X-CSE-ConnectionGUID: B4W9ofjjR2qzmoUKTSysxw== X-CSE-MsgGUID: lu17uLZ/QeC8f+xT7T+Jvw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610264" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:36 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 10/19] drm/i915/dss: Use struct intel_display in dss dsc helpers Date: Fri, 30 Aug 2024 10:39:40 +0530 Message-ID: <20240830050950.2528450-11-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Replace struct drm_i915_private with intel_display in the dss dsc helpers. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dss.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dss.c b/drivers/gpu/drm/i915/display/intel_dss.c index b37e9112ab77..fe55f4b1a9bf 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.c +++ b/drivers/gpu/drm/i915/display/intel_dss.c @@ -154,17 +154,17 @@ static i915_reg_t dss_ctl2_reg(struct intel_crtc *crtc, enum transcoder cpu_tran void intel_dss_reset(const struct intel_crtc_state *old_crtc_state) { + struct intel_display *display = to_intel_display(old_crtc_state); struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - intel_de_write(dev_priv, dss_ctl1_reg(crtc, old_crtc_state->cpu_transcoder), 0); - intel_de_write(dev_priv, dss_ctl2_reg(crtc, old_crtc_state->cpu_transcoder), 0); + intel_de_write(display, dss_ctl1_reg(crtc, old_crtc_state->cpu_transcoder), 0); + intel_de_write(display, dss_ctl2_reg(crtc, old_crtc_state->cpu_transcoder), 0); } void intel_dss_enable_uncompressed_joiner(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 dss_ctl1_val = 0; if (crtc_state->joiner_pipes && !crtc_state->dsc.compression_enable) { @@ -173,7 +173,7 @@ void intel_dss_enable_uncompressed_joiner(const struct intel_crtc_state *crtc_st else dss_ctl1_val |= UNCOMPRESSED_JOINER_PRIMARY; - intel_de_write(dev_priv, + intel_de_write(display, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val); } @@ -182,8 +182,8 @@ void intel_dss_enable_uncompressed_joiner(const struct intel_crtc_state *crtc_st void intel_dss_enable_compressed_joiner(const struct intel_crtc_state *crtc_state, int vdsc_instances_per_pipe) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 dss_ctl1_val = 0; u32 dss_ctl2_val = 0; @@ -197,18 +197,18 @@ void intel_dss_enable_compressed_joiner(const struct intel_crtc_state *crtc_stat if (!intel_crtc_is_joiner_secondary(crtc_state)) dss_ctl1_val |= PRIMARY_BIG_JOINER_ENABLE; } - intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val); - intel_de_write(dev_priv, dss_ctl2_reg(crtc, crtc_state->cpu_transcoder), dss_ctl2_val); + intel_de_write(display, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val); + intel_de_write(display, dss_ctl2_reg(crtc, crtc_state->cpu_transcoder), dss_ctl2_val); } void intel_dss_dsc_get_config(struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 dss_ctl1, dss_ctl2; - dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder)); - dss_ctl2 = intel_de_read(dev_priv, dss_ctl2_reg(crtc, crtc_state->cpu_transcoder)); + dss_ctl1 = intel_de_read(display, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder)); + dss_ctl2 = intel_de_read(display, dss_ctl2_reg(crtc, crtc_state->cpu_transcoder)); crtc_state->dsc.compression_enable = dss_ctl2 & LEFT_BRANCH_VDSC_ENABLE; if (!crtc_state->dsc.compression_enable) From patchwork Fri Aug 30 05:09:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784274 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF7B6CA0EDF for ; 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X-CSE-ConnectionGUID: Q30Da5hDQ3CdSCbwX49ULQ== X-CSE-MsgGUID: d20uSgCMTPK6bPU6Or5C7Q== X-IronPort-AV: E=McAfee;i="6700,10204,11179"; a="23421687" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421687" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:40 -0700 X-CSE-ConnectionGUID: 8njWcwtpSdimjrO0V10d7w== X-CSE-MsgGUID: aPVCu8KfQ0S0U6phKgLr8A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610267" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:38 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 11/19] drm/i915/display: Move dss stuff in intel_dss files Date: Fri, 30 Aug 2024 10:39:41 +0530 Message-ID: <20240830050950.2528450-12-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move helper to retrieve the compressed and uncompressed joiner pipes from dss ctl to intel_dss files. v2: Derive intel_display from crtc. (Jani) Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 34 +++----------- drivers/gpu/drm/i915/display/intel_dss.c | 48 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dss.h | 7 +++ 3 files changed, 61 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 9bcbb9c923a9..7b407ebccd54 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3545,35 +3545,13 @@ static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, joiner_pipes(dev_priv)) { - enum intel_display_power_domain power_domain; - enum pipe pipe = crtc->pipe; - intel_wakeref_t wakeref; - - power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe); - with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) { - u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe)); + intel_dss_get_compressed_joiner_pipes(crtc, + primary_pipes, + secondary_pipes); - if (!(tmp & BIG_JOINER_ENABLE)) - continue; - - if (tmp & PRIMARY_BIG_JOINER_ENABLE) - *primary_pipes |= BIT(pipe); - else - *secondary_pipes |= BIT(pipe); - } - - if (DISPLAY_VER(dev_priv) < 13) - continue; - - power_domain = POWER_DOMAIN_PIPE(pipe); - with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) { - u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe)); - - if (tmp & UNCOMPRESSED_JOINER_PRIMARY) - *primary_pipes |= BIT(pipe); - if (tmp & UNCOMPRESSED_JOINER_SECONDARY) - *secondary_pipes |= BIT(pipe); - } + intel_dss_get_uncompressed_joiner_pipes(crtc, + primary_pipes, + secondary_pipes); } /* Joiner pipes should always be consecutive primary and secondary */ diff --git a/drivers/gpu/drm/i915/display/intel_dss.c b/drivers/gpu/drm/i915/display/intel_dss.c index fe55f4b1a9bf..01303feadcef 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.c +++ b/drivers/gpu/drm/i915/display/intel_dss.c @@ -217,3 +217,51 @@ void intel_dss_dsc_get_config(struct intel_crtc_state *crtc_state) crtc_state->dsc.dsc_split = (dss_ctl2 & RIGHT_BRANCH_VDSC_ENABLE) && (dss_ctl1 & JOINER_ENABLE); } + +void intel_dss_get_compressed_joiner_pipes(struct intel_crtc *crtc, + u8 *primary_pipes, + u8 *secondary_pipes) +{ + struct intel_display *display = to_intel_display(crtc); + struct drm_i915_private *i915 = to_i915(display->drm); + enum intel_display_power_domain power_domain; + enum pipe pipe = crtc->pipe; + intel_wakeref_t wakeref; + + power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe); + with_intel_display_power_if_enabled(i915, power_domain, wakeref) { + u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe)); + + if (!(tmp & BIG_JOINER_ENABLE)) + continue; + + if (tmp & PRIMARY_BIG_JOINER_ENABLE) + *primary_pipes |= BIT(pipe); + else + *secondary_pipes |= BIT(pipe); + } +} + +void intel_dss_get_uncompressed_joiner_pipes(struct intel_crtc *crtc, + u8 *primary_pipes, + u8 *secondary_pipes) +{ + struct intel_display *display = to_intel_display(crtc); + struct drm_i915_private *i915 = to_i915(display->drm); + enum intel_display_power_domain power_domain; + enum pipe pipe = crtc->pipe; + intel_wakeref_t wakeref; + + if (DISPLAY_VER(display) < 13) + return; + + power_domain = POWER_DOMAIN_PIPE(pipe); + with_intel_display_power_if_enabled(i915, power_domain, wakeref) { + u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe)); + + if (tmp & UNCOMPRESSED_JOINER_PRIMARY) + *primary_pipes |= BIT(pipe); + if (tmp & UNCOMPRESSED_JOINER_SECONDARY) + *secondary_pipes |= BIT(pipe); + } +} diff --git a/drivers/gpu/drm/i915/display/intel_dss.h b/drivers/gpu/drm/i915/display/intel_dss.h index 2d06bbe52687..9a63e18cce2e 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.h +++ b/drivers/gpu/drm/i915/display/intel_dss.h @@ -11,6 +11,7 @@ struct intel_crtc_state; struct intel_display; struct intel_encoder; +struct intel_crtc; u8 intel_dss_mso_pipe_mask(struct intel_display *display); void intel_dss_mso_get_config(struct intel_encoder *encoder, @@ -24,5 +25,11 @@ void intel_dss_enable_uncompressed_joiner(const struct intel_crtc_state *crtc_st void intel_dss_enable_compressed_joiner(const struct intel_crtc_state *crtc_state, int vdsc_instances_per_pipe); void intel_dss_dsc_get_config(struct intel_crtc_state *crtc_state); +void intel_dss_get_compressed_joiner_pipes(struct intel_crtc *crtc, + u8 *primary_pipes, + u8 *secondary_pipes); +void intel_dss_get_uncompressed_joiner_pipes(struct intel_crtc *crtc, + u8 *primary_pipes, + u8 *secondary_pipes); #endif /* __INTEL_DSS_H__ */ From patchwork Fri Aug 30 05:09:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784270 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1C673CA0EDF for ; Fri, 30 Aug 2024 05:08:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B31AE10E7DF; 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X-CSE-ConnectionGUID: LevU/rq+SpqJaltQa3c5Rg== X-CSE-MsgGUID: j1WziWAHRaCLFH/ubSpXPw== X-IronPort-AV: E=McAfee;i="6700,10204,11179"; a="23421688" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421688" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:42 -0700 X-CSE-ConnectionGUID: DbriUxVvS6qmnsv+a/h/rg== X-CSE-MsgGUID: 9vC3VQSZQN+GaH1T/Fif8A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610272" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:40 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 12/19] drm/i915/display: Rename static functions that use joiner Date: Fri, 30 Aug 2024 10:39:42 +0530 Message-ID: <20240830050950.2528450-13-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" At the moment, many functions that are concerned with joiner have different prefixes. Rename the static functions, to have a prefix 'intel_joiner'. This will make the movement of these helpers to a separate file for pipe joiner. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 56 +++++++++++--------- 1 file changed, 30 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 7b407ebccd54..ad72691b47b2 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -249,7 +249,7 @@ is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state) is_trans_port_sync_slave(crtc_state); } -static enum pipe joiner_primary_pipe(const struct intel_crtc_state *crtc_state) +static enum pipe intel_joiner_get_primary_pipe(const struct intel_crtc_state *crtc_state) { return ffs(crtc_state->joiner_pipes) - 1; } @@ -257,7 +257,7 @@ static enum pipe joiner_primary_pipe(const struct intel_crtc_state *crtc_state) u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state) { if (crtc_state->joiner_pipes) - return crtc_state->joiner_pipes & ~BIT(joiner_primary_pipe(crtc_state)); + return crtc_state->joiner_pipes & ~BIT(intel_joiner_get_primary_pipe(crtc_state)); else return 0; } @@ -267,7 +267,7 @@ bool intel_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state) struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); return crtc_state->joiner_pipes && - crtc->pipe != joiner_primary_pipe(crtc_state); + crtc->pipe != intel_joiner_get_primary_pipe(crtc_state); } bool intel_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state) @@ -275,10 +275,10 @@ bool intel_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state) struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); return crtc_state->joiner_pipes && - crtc->pipe == joiner_primary_pipe(crtc_state); + crtc->pipe == intel_joiner_get_primary_pipe(crtc_state); } -static int intel_joiner_num_pipes(const struct intel_crtc_state *crtc_state) +static int intel_joiner_get_num_pipes(const struct intel_crtc_state *crtc_state) { return hweight8(crtc_state->joiner_pipes); } @@ -295,7 +295,7 @@ struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state) struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); if (intel_crtc_is_joiner_secondary(crtc_state)) - return intel_crtc_for_pipe(i915, joiner_primary_pipe(crtc_state)); + return intel_crtc_for_pipe(i915, intel_joiner_get_primary_pipe(crtc_state)); else return to_intel_crtc(crtc_state->uapi.crtc); } @@ -2344,7 +2344,7 @@ static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state) static void intel_joiner_adjust_timings(const struct intel_crtc_state *crtc_state, struct drm_display_mode *mode) { - int num_pipes = intel_joiner_num_pipes(crtc_state); + int num_pipes = intel_joiner_get_num_pipes(crtc_state); if (num_pipes < 2) return; @@ -2408,7 +2408,7 @@ static void intel_crtc_readout_derived_state(struct intel_crtc_state *crtc_state drm_mode_copy(mode, pipe_mode); intel_mode_from_crtc_timings(mode, mode); mode->hdisplay = drm_rect_width(&crtc_state->pipe_src) * - (intel_joiner_num_pipes(crtc_state) ?: 1); + (intel_joiner_get_num_pipes(crtc_state) ?: 1); mode->vdisplay = drm_rect_height(&crtc_state->pipe_src); /* Derive per-pipe timings in case joiner is used */ @@ -2428,7 +2428,7 @@ void intel_encoder_get_config(struct intel_encoder *encoder, static void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state) { - int num_pipes = intel_joiner_num_pipes(crtc_state); + int num_pipes = intel_joiner_get_num_pipes(crtc_state); int width, height; if (num_pipes < 2) @@ -2888,14 +2888,14 @@ static void intel_get_transcoder_timings(struct intel_crtc *crtc, static void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - int num_pipes = intel_joiner_num_pipes(crtc_state); + int num_pipes = intel_joiner_get_num_pipes(crtc_state); enum pipe primary_pipe, pipe = crtc->pipe; int width; if (num_pipes < 2) return; - primary_pipe = joiner_primary_pipe(crtc_state); + primary_pipe = intel_joiner_get_primary_pipe(crtc_state); width = drm_rect_width(&crtc_state->pipe_src); drm_rect_translate_to(&crtc_state->pipe_src, @@ -3505,7 +3505,7 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc, return ret; } -static u8 joiner_pipes(struct drm_i915_private *i915) +static u8 intel_joiner_supported_pipes(struct drm_i915_private *i915) { u8 pipes; @@ -3535,8 +3535,8 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv, return tmp & TRANS_DDI_FUNC_ENABLE; } -static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, - u8 *primary_pipes, u8 *secondary_pipes) +static void intel_joiner_enabled_pipes(struct drm_i915_private *dev_priv, + u8 *primary_pipes, u8 *secondary_pipes) { struct intel_crtc *crtc; @@ -3544,7 +3544,7 @@ static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, *secondary_pipes = 0; for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, - joiner_pipes(dev_priv)) { + intel_joiner_supported_pipes(dev_priv)) { intel_dss_get_compressed_joiner_pipes(crtc, primary_pipes, secondary_pipes); @@ -3560,7 +3560,9 @@ static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, *primary_pipes, *secondary_pipes); } -static enum pipe get_joiner_primary_pipe(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes) +static enum pipe intel_joiner_find_primary_pipe(enum pipe pipe, + u8 primary_pipes, + u8 secondary_pipes) { if ((secondary_pipes & BIT(pipe)) == 0) return pipe; @@ -3572,11 +3574,13 @@ static enum pipe get_joiner_primary_pipe(enum pipe pipe, u8 primary_pipes, u8 se return fls(primary_pipes) - 1; } -static u8 get_joiner_secondary_pipes(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes) +static u8 intel_joiner_find_secondary_pipes(enum pipe pipe, + u8 primary_pipes, + u8 secondary_pipes) { enum pipe primary_pipe, next_primary_pipe; - primary_pipe = get_joiner_primary_pipe(pipe, primary_pipes, secondary_pipes); + primary_pipe = intel_joiner_find_primary_pipe(pipe, primary_pipes, secondary_pipes); if ((primary_pipes & BIT(primary_pipe)) == 0) return 0; @@ -3660,10 +3664,10 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) enabled_transcoders |= BIT(cpu_transcoder); /* joiner secondary -> consider the primary pipe's transcoder as well */ - enabled_joiner_pipes(dev_priv, &primary_pipes, &secondary_pipes); + intel_joiner_enabled_pipes(dev_priv, &primary_pipes, &secondary_pipes); if (secondary_pipes & BIT(crtc->pipe)) { cpu_transcoder = (enum transcoder) - get_joiner_primary_pipe(crtc->pipe, primary_pipes, secondary_pipes); + intel_joiner_find_primary_pipe(crtc->pipe, primary_pipes, secondary_pipes); if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder)) enabled_transcoders |= BIT(cpu_transcoder); } @@ -3797,14 +3801,14 @@ static void intel_joiner_get_config(struct intel_crtc_state *crtc_state) u8 primary_pipes, secondary_pipes; enum pipe pipe = crtc->pipe; - enabled_joiner_pipes(i915, &primary_pipes, &secondary_pipes); + intel_joiner_enabled_pipes(i915, &primary_pipes, &secondary_pipes); if (((primary_pipes | secondary_pipes) & BIT(pipe)) == 0) return; crtc_state->joiner_pipes = - BIT(get_joiner_primary_pipe(pipe, primary_pipes, secondary_pipes)) | - get_joiner_secondary_pipes(pipe, primary_pipes, secondary_pipes); + BIT(intel_joiner_find_primary_pipe(pipe, primary_pipes, secondary_pipes)) | + intel_joiner_find_secondary_pipes(pipe, primary_pipes, secondary_pipes); } static bool hsw_get_pipe_config(struct intel_crtc *crtc, @@ -5987,15 +5991,15 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state, /* sanity check */ if (drm_WARN_ON(&i915->drm, - primary_crtc->pipe != joiner_primary_pipe(primary_crtc_state))) + primary_crtc->pipe != intel_joiner_get_primary_pipe(primary_crtc_state))) return -EINVAL; - if (primary_crtc_state->joiner_pipes & ~joiner_pipes(i915)) { + if (primary_crtc_state->joiner_pipes & ~intel_joiner_supported_pipes(i915)) { drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] Cannot act as joiner primary " "(need 0x%x as pipes, only 0x%x possible)\n", primary_crtc->base.base.id, primary_crtc->base.name, - primary_crtc_state->joiner_pipes, joiner_pipes(i915)); + primary_crtc_state->joiner_pipes, intel_joiner_supported_pipes(i915)); return -EINVAL; } From patchwork Fri Aug 30 05:09:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784271 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 856D8CA0EE0 for ; Fri, 30 Aug 2024 05:08:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1DB1710E7E0; Fri, 30 Aug 2024 05:08:45 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="V+lCHUOw"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 15B8D10E7E0; Fri, 30 Aug 2024 05:08:44 +0000 (UTC) DKIM-Signature: v=1; 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d="scan'208";a="94610280" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:42 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 13/19] drm/i915/display: Separate out joiner stuff in a new file Date: Fri, 30 Aug 2024 10:39:43 +0530 Message-ID: <20240830050950.2528450-14-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move all the static functions intel_joiner* to the new file intel_joiner.c. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_display.c | 234 +------------------ drivers/gpu/drm/i915/display/intel_display.h | 5 + drivers/gpu/drm/i915/display/intel_joiner.c | 233 ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_joiner.h | 32 +++ drivers/gpu/drm/xe/Makefile | 1 + 6 files changed, 278 insertions(+), 228 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_joiner.c create mode 100644 drivers/gpu/drm/i915/display/intel_joiner.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index e55ce8ba123c..c337385bbe7d 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -333,6 +333,7 @@ i915-y += \ display/intel_encoder.o \ display/intel_gmbus.o \ display/intel_hdmi.o \ + display/intel_joiner.o \ display/intel_lspcon.o \ display/intel_lvds.o \ display/intel_panel.o \ diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index ad72691b47b2..9af3ea6c7642 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -97,6 +97,7 @@ #include "intel_frontbuffer.h" #include "intel_hdmi.h" #include "intel_hotplug.h" +#include "intel_joiner.h" #include "intel_link_bw.h" #include "intel_lvds.h" #include "intel_lvds_regs.h" @@ -249,11 +250,6 @@ is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state) is_trans_port_sync_slave(crtc_state); } -static enum pipe intel_joiner_get_primary_pipe(const struct intel_crtc_state *crtc_state) -{ - return ffs(crtc_state->joiner_pipes) - 1; -} - u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state) { if (crtc_state->joiner_pipes) @@ -278,11 +274,6 @@ bool intel_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state) crtc->pipe == intel_joiner_get_primary_pipe(crtc_state); } -static int intel_joiner_get_num_pipes(const struct intel_crtc_state *crtc_state) -{ - return hweight8(crtc_state->joiner_pipes); -} - u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); @@ -2341,23 +2332,6 @@ static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state) ilk_pipe_pixel_rate(crtc_state); } -static void intel_joiner_adjust_timings(const struct intel_crtc_state *crtc_state, - struct drm_display_mode *mode) -{ - int num_pipes = intel_joiner_get_num_pipes(crtc_state); - - if (num_pipes < 2) - return; - - mode->crtc_clock /= num_pipes; - mode->crtc_hdisplay /= num_pipes; - mode->crtc_hblank_start /= num_pipes; - mode->crtc_hblank_end /= num_pipes; - mode->crtc_hsync_start /= num_pipes; - mode->crtc_hsync_end /= num_pipes; - mode->crtc_htotal /= num_pipes; -} - static void intel_splitter_adjust_timings(const struct intel_crtc_state *crtc_state, struct drm_display_mode *mode) { @@ -2426,21 +2400,6 @@ void intel_encoder_get_config(struct intel_encoder *encoder, intel_crtc_readout_derived_state(crtc_state); } -static void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state) -{ - int num_pipes = intel_joiner_get_num_pipes(crtc_state); - int width, height; - - if (num_pipes < 2) - return; - - width = drm_rect_width(&crtc_state->pipe_src); - height = drm_rect_height(&crtc_state->pipe_src); - - drm_rect_init(&crtc_state->pipe_src, 0, 0, - width / num_pipes, height); -} - static int intel_crtc_compute_pipe_src(struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); @@ -2885,23 +2844,6 @@ static void intel_get_transcoder_timings(struct intel_crtc *crtc, TRANS_SET_CONTEXT_LATENCY(dev_priv, cpu_transcoder)); } -static void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state) -{ - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - int num_pipes = intel_joiner_get_num_pipes(crtc_state); - enum pipe primary_pipe, pipe = crtc->pipe; - int width; - - if (num_pipes < 2) - return; - - primary_pipe = intel_joiner_get_primary_pipe(crtc_state); - width = drm_rect_width(&crtc_state->pipe_src); - - drm_rect_translate_to(&crtc_state->pipe_src, - (pipe - primary_pipe) * width, 0); -} - static void intel_get_pipe_src_size(struct intel_crtc *crtc, struct intel_crtc_state *pipe_config) { @@ -3505,20 +3447,6 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc, return ret; } -static u8 intel_joiner_supported_pipes(struct drm_i915_private *i915) -{ - u8 pipes; - - if (DISPLAY_VER(i915) >= 12) - pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D); - else if (DISPLAY_VER(i915) >= 11) - pipes = BIT(PIPE_B) | BIT(PIPE_C); - else - pipes = 0; - - return pipes & DISPLAY_RUNTIME_INFO(i915)->pipe_mask; -} - static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv, enum transcoder cpu_transcoder) { @@ -3535,66 +3463,6 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv, return tmp & TRANS_DDI_FUNC_ENABLE; } -static void intel_joiner_enabled_pipes(struct drm_i915_private *dev_priv, - u8 *primary_pipes, u8 *secondary_pipes) -{ - struct intel_crtc *crtc; - - *primary_pipes = 0; - *secondary_pipes = 0; - - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, - intel_joiner_supported_pipes(dev_priv)) { - intel_dss_get_compressed_joiner_pipes(crtc, - primary_pipes, - secondary_pipes); - - intel_dss_get_uncompressed_joiner_pipes(crtc, - primary_pipes, - secondary_pipes); - } - - /* Joiner pipes should always be consecutive primary and secondary */ - drm_WARN(&dev_priv->drm, *secondary_pipes != *primary_pipes << 1, - "Joiner misconfigured (primary pipes 0x%x, secondary pipes 0x%x)\n", - *primary_pipes, *secondary_pipes); -} - -static enum pipe intel_joiner_find_primary_pipe(enum pipe pipe, - u8 primary_pipes, - u8 secondary_pipes) -{ - if ((secondary_pipes & BIT(pipe)) == 0) - return pipe; - - /* ignore everything above our pipe */ - primary_pipes &= ~GENMASK(7, pipe); - - /* highest remaining bit should be our primary pipe */ - return fls(primary_pipes) - 1; -} - -static u8 intel_joiner_find_secondary_pipes(enum pipe pipe, - u8 primary_pipes, - u8 secondary_pipes) -{ - enum pipe primary_pipe, next_primary_pipe; - - primary_pipe = intel_joiner_find_primary_pipe(pipe, primary_pipes, secondary_pipes); - - if ((primary_pipes & BIT(primary_pipe)) == 0) - return 0; - - /* ignore our primary pipe and everything below it */ - primary_pipes &= ~GENMASK(primary_pipe, 0); - /* make sure a high bit is set for the ffs() */ - primary_pipes |= BIT(7); - /* lowest remaining bit should be the next primary pipe */ - next_primary_pipe = ffs(primary_pipes) - 1; - - return secondary_pipes & GENMASK(next_primary_pipe - 1, primary_pipe); -} - static u8 hsw_panel_transcoders(struct drm_i915_private *i915) { u8 panel_transcoder_mask = BIT(TRANSCODER_EDP); @@ -3794,23 +3662,6 @@ static bool bxt_get_dsi_transcoder_state(struct intel_crtc *crtc, return transcoder_is_dsi(pipe_config->cpu_transcoder); } -static void intel_joiner_get_config(struct intel_crtc_state *crtc_state) -{ - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); - u8 primary_pipes, secondary_pipes; - enum pipe pipe = crtc->pipe; - - intel_joiner_enabled_pipes(i915, &primary_pipes, &secondary_pipes); - - if (((primary_pipes | secondary_pipes) & BIT(pipe)) == 0) - return; - - crtc_state->joiner_pipes = - BIT(intel_joiner_find_primary_pipe(pipe, primary_pipes, secondary_pipes)) | - intel_joiner_find_secondary_pipes(pipe, primary_pipes, secondary_pipes); -} - static bool hsw_get_pipe_config(struct intel_crtc *crtc, struct intel_crtc_state *pipe_config) { @@ -5822,9 +5673,9 @@ static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv) IS_IVYBRIDGE(dev_priv); } -static int intel_crtc_add_joiner_planes(struct intel_atomic_state *state, - struct intel_crtc *crtc, - struct intel_crtc *other) +int intel_crtc_add_joiner_planes(struct intel_atomic_state *state, + struct intel_crtc *crtc, + struct intel_crtc *other) { const struct intel_plane_state __maybe_unused *plane_state; struct intel_plane *plane; @@ -5839,32 +5690,6 @@ static int intel_crtc_add_joiner_planes(struct intel_atomic_state *state, return intel_crtc_add_planes_to_state(state, other, plane_ids); } -static int intel_joiner_add_affected_planes(struct intel_atomic_state *state) -{ - struct drm_i915_private *i915 = to_i915(state->base.dev); - const struct intel_crtc_state *crtc_state; - struct intel_crtc *crtc; - int i; - - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { - struct intel_crtc *other; - - for_each_intel_crtc_in_pipe_mask(&i915->drm, other, - crtc_state->joiner_pipes) { - int ret; - - if (crtc == other) - continue; - - ret = intel_crtc_add_joiner_planes(state, crtc, other); - if (ret) - return ret; - } - } - - return 0; -} - static int intel_atomic_check_planes(struct intel_atomic_state *state) { struct drm_i915_private *dev_priv = to_i915(state->base.dev); @@ -6049,8 +5874,8 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state, return 0; } -static void kill_joiner_secondaries(struct intel_atomic_state *state, - struct intel_crtc *primary_crtc) +void intel_crtc_kill_joiner_secondaries(struct intel_atomic_state *state, + struct intel_crtc *primary_crtc) { struct drm_i915_private *i915 = to_i915(state->base.dev); struct intel_crtc_state *primary_crtc_state = @@ -6349,53 +6174,6 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in return 0; } -static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state) -{ - struct drm_i915_private *i915 = to_i915(state->base.dev); - struct intel_crtc_state *crtc_state; - struct intel_crtc *crtc; - u8 affected_pipes = 0; - u8 modeset_pipes = 0; - int i; - - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { - affected_pipes |= crtc_state->joiner_pipes; - if (intel_crtc_needs_modeset(crtc_state)) - modeset_pipes |= crtc_state->joiner_pipes; - } - - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, affected_pipes) { - crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); - if (IS_ERR(crtc_state)) - return PTR_ERR(crtc_state); - } - - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, modeset_pipes) { - int ret; - - crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - - crtc_state->uapi.mode_changed = true; - - ret = drm_atomic_add_affected_connectors(&state->base, &crtc->base); - if (ret) - return ret; - - ret = intel_atomic_add_affected_planes(state, crtc); - if (ret) - return ret; - } - - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { - /* Kill old joiner link, we may re-establish afterwards */ - if (intel_crtc_needs_modeset(crtc_state) && - intel_crtc_is_joiner_primary(crtc_state)) - kill_joiner_secondaries(state, crtc); - } - - return 0; -} - static int intel_atomic_check_config(struct intel_atomic_state *state, struct intel_link_bw_limits *limits, enum pipe *failed_pipe) diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index b21d9578d5db..6bf423e36bc9 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -586,5 +586,10 @@ bool assert_port_valid(struct drm_i915_private *i915, enum port port); }) bool intel_scanout_needs_vtd_wa(struct drm_i915_private *i915); +int intel_crtc_add_joiner_planes(struct intel_atomic_state *state, + struct intel_crtc *crtc, + struct intel_crtc *other); +void intel_crtc_kill_joiner_secondaries(struct intel_atomic_state *state, + struct intel_crtc *primary_crtc); #endif diff --git a/drivers/gpu/drm/i915/display/intel_joiner.c b/drivers/gpu/drm/i915/display/intel_joiner.c new file mode 100644 index 000000000000..b24dfdbc9840 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_joiner.c @@ -0,0 +1,233 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2024 Intel Corporation + */ + +#include + +#include "i915_drv.h" +#include "intel_atomic.h" +#include "intel_display.h" +#include "intel_display_device.h" +#include "intel_display_types.h" +#include "intel_dss.h" +#include "intel_joiner.h" + +enum pipe intel_joiner_get_primary_pipe(const struct intel_crtc_state *crtc_state) +{ + return ffs(crtc_state->joiner_pipes) - 1; +} + +int intel_joiner_get_num_pipes(const struct intel_crtc_state *crtc_state) +{ + return hweight8(crtc_state->joiner_pipes); +} + +void intel_joiner_adjust_timings(const struct intel_crtc_state *crtc_state, + struct drm_display_mode *mode) +{ + int num_pipes = intel_joiner_get_num_pipes(crtc_state); + + if (num_pipes < 2) + return; + + mode->crtc_clock /= num_pipes; + mode->crtc_hdisplay /= num_pipes; + mode->crtc_hblank_start /= num_pipes; + mode->crtc_hblank_end /= num_pipes; + mode->crtc_hsync_start /= num_pipes; + mode->crtc_hsync_end /= num_pipes; + mode->crtc_htotal /= num_pipes; +} + +void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state) +{ + int num_pipes = intel_joiner_get_num_pipes(crtc_state); + int width, height; + + if (num_pipes < 2) + return; + + width = drm_rect_width(&crtc_state->pipe_src); + height = drm_rect_height(&crtc_state->pipe_src); + + drm_rect_init(&crtc_state->pipe_src, 0, 0, + width / num_pipes, height); +} + +void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + int num_pipes = intel_joiner_get_num_pipes(crtc_state); + enum pipe primary_pipe, pipe = crtc->pipe; + int width; + + if (num_pipes < 2) + return; + + primary_pipe = intel_joiner_get_primary_pipe(crtc_state); + width = drm_rect_width(&crtc_state->pipe_src); + + drm_rect_translate_to(&crtc_state->pipe_src, + (pipe - primary_pipe) * width, 0); +} + +u8 intel_joiner_supported_pipes(struct drm_i915_private *i915) +{ + u8 pipes; + + if (DISPLAY_VER(i915) >= 12) + pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D); + else if (DISPLAY_VER(i915) >= 11) + pipes = BIT(PIPE_B) | BIT(PIPE_C); + else + pipes = 0; + + return pipes & DISPLAY_RUNTIME_INFO(i915)->pipe_mask; +} + +void intel_joiner_enabled_pipes(struct drm_i915_private *dev_priv, + u8 *primary_pipes, u8 *secondary_pipes) +{ + struct intel_crtc *crtc; + + *primary_pipes = 0; + *secondary_pipes = 0; + + for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, + intel_joiner_supported_pipes(dev_priv)) { + intel_dss_get_compressed_joiner_pipes(crtc, + primary_pipes, + secondary_pipes); + + intel_dss_get_uncompressed_joiner_pipes(crtc, + primary_pipes, + secondary_pipes); + } + + /* Joiner pipes should always be consecutive primary and secondary */ + drm_WARN(&dev_priv->drm, *secondary_pipes != *primary_pipes << 1, + "Joiner misconfigured (primary pipes 0x%x, secondary pipes 0x%x)\n", + *primary_pipes, *secondary_pipes); +} + +enum pipe intel_joiner_find_primary_pipe(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes) +{ + if ((secondary_pipes & BIT(pipe)) == 0) + return pipe; + + /* ignore everything above our pipe */ + primary_pipes &= ~GENMASK(7, pipe); + + /* highest remaining bit should be our primary pipe */ + return fls(primary_pipes) - 1; +} + +u8 intel_joiner_find_secondary_pipes(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes) +{ + enum pipe primary_pipe, next_primary_pipe; + + primary_pipe = intel_joiner_find_primary_pipe(pipe, primary_pipes, secondary_pipes); + + if ((primary_pipes & BIT(primary_pipe)) == 0) + return 0; + + /* ignore our primary pipe and everything below it */ + primary_pipes &= ~GENMASK(primary_pipe, 0); + /* make sure a high bit is set for the ffs() */ + primary_pipes |= BIT(7); + /* lowest remaining bit should be the next primary pipe */ + next_primary_pipe = ffs(primary_pipes) - 1; + + return secondary_pipes & GENMASK(next_primary_pipe - 1, primary_pipe); +} + +void intel_joiner_get_config(struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *i915 = to_i915(crtc->base.dev); + u8 primary_pipes, secondary_pipes; + enum pipe pipe = crtc->pipe; + + intel_joiner_enabled_pipes(i915, &primary_pipes, &secondary_pipes); + + if (((primary_pipes | secondary_pipes) & BIT(pipe)) == 0) + return; + + crtc_state->joiner_pipes = + BIT(intel_joiner_find_primary_pipe(pipe, primary_pipes, secondary_pipes)) | + intel_joiner_find_secondary_pipes(pipe, primary_pipes, secondary_pipes); +} + +int intel_joiner_add_affected_planes(struct intel_atomic_state *state) +{ + struct drm_i915_private *i915 = to_i915(state->base.dev); + const struct intel_crtc_state *crtc_state; + struct intel_crtc *crtc; + int i; + + for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { + struct intel_crtc *other; + + for_each_intel_crtc_in_pipe_mask(&i915->drm, other, + crtc_state->joiner_pipes) { + int ret; + + if (crtc == other) + continue; + + ret = intel_crtc_add_joiner_planes(state, crtc, other); + if (ret) + return ret; + } + } + + return 0; +} + +int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state) +{ + struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_crtc_state *crtc_state; + struct intel_crtc *crtc; + u8 affected_pipes = 0; + u8 modeset_pipes = 0; + int i; + + for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { + affected_pipes |= crtc_state->joiner_pipes; + if (intel_crtc_needs_modeset(crtc_state)) + modeset_pipes |= crtc_state->joiner_pipes; + } + + for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, affected_pipes) { + crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + } + + for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, modeset_pipes) { + int ret; + + crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + + crtc_state->uapi.mode_changed = true; + + ret = drm_atomic_add_affected_connectors(&state->base, &crtc->base); + if (ret) + return ret; + + ret = intel_atomic_add_affected_planes(state, crtc); + if (ret) + return ret; + } + + for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { + /* Kill old joiner link, we may re-establish afterwards */ + if (intel_crtc_needs_modeset(crtc_state) && + intel_crtc_is_joiner_primary(crtc_state)) + intel_crtc_kill_joiner_secondaries(state, crtc); + } + + return 0; +} diff --git a/drivers/gpu/drm/i915/display/intel_joiner.h b/drivers/gpu/drm/i915/display/intel_joiner.h new file mode 100644 index 000000000000..3417274de4a2 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_joiner.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2024 Intel Corporation + */ + +#ifndef __INTEL_JOINER_H__ +#define __INTEL_JOINER_H__ + +#include "linux/types.h" + +enum pipe; +struct drm_display_mode; +struct drm_i915_private; +struct intel_atomic_state; +struct intel_crtc_state; + +enum pipe intel_joiner_get_primary_pipe(const struct intel_crtc_state *crtc_state); +int intel_joiner_get_num_pipes(const struct intel_crtc_state *crtc_state); +void intel_joiner_adjust_timings(const struct intel_crtc_state *crtc_state, + struct drm_display_mode *mode); +void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state); +void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state); +u8 intel_joiner_supported_pipes(struct drm_i915_private *i915); +void intel_joiner_enabled_pipes(struct drm_i915_private *dev_priv, + u8 *primary_pipes, u8 *secondary_pipes); +enum pipe intel_joiner_find_primary_pipe(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes); +u8 intel_joiner_find_secondary_pipes(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes); +void intel_joiner_get_config(struct intel_crtc_state *crtc_state); +int intel_joiner_add_affected_planes(struct intel_atomic_state *state); +int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state); + +#endif/* __INTEL_JOINER_H__ */ diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index ff1c0ce6da86..995accd939f9 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -243,6 +243,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \ i915-display/intel_hotplug.o \ i915-display/intel_hotplug_irq.o \ i915-display/intel_hti.o \ + i915-display/intel_joiner.o \ i915-display/intel_link_bw.o \ i915-display/intel_lspcon.o \ i915-display/intel_modeset_lock.o \ From patchwork Fri Aug 30 05:09:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784279 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9E155CA0EE5 for ; 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X-CSE-ConnectionGUID: ft+9IHmgRlKONwaGFSnOlw== X-CSE-MsgGUID: F2cbOwe9QYmdq/e8UQ3sEQ== X-IronPort-AV: E=McAfee;i="6700,10204,11179"; a="23421691" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421691" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:46 -0700 X-CSE-ConnectionGUID: Jge0VAdFSyyx5CD4e38QXA== X-CSE-MsgGUID: oReoDD3iTkye32+Zdm+nBg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610286" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:44 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 14/19] drm/i915/display: Move intel_crtc_joined_pipe_mask to intel_joiner Date: Fri, 30 Aug 2024 10:39:44 +0530 Message-ID: <20240830050950.2528450-15-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move the helper to get joined pipe mask to intel_joiner.c Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_ddi.c | 9 ++--- drivers/gpu/drm/i915/display/intel_display.c | 35 ++++++++------------ drivers/gpu/drm/i915/display/intel_display.h | 1 - drivers/gpu/drm/i915/display/intel_dp_mst.c | 7 ++-- drivers/gpu/drm/i915/display/intel_joiner.c | 7 ++++ drivers/gpu/drm/i915/display/intel_joiner.h | 1 + 6 files changed, 31 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index aa176f4d42c4..87dbb7733eda 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -66,6 +66,7 @@ #include "intel_hdmi.h" #include "intel_hotplug.h" #include "intel_hti.h" +#include "intel_joiner.h" #include "intel_lspcon.h" #include "intel_mg_phy_regs.h" #include "intel_modeset_lock.h" @@ -3043,7 +3044,7 @@ static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state *state, struct intel_crtc *pipe_crtc; for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -3055,7 +3056,7 @@ static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state *state, intel_ddi_disable_transcoder_func(old_crtc_state); for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -3319,7 +3320,7 @@ static void intel_enable_ddi(struct intel_atomic_state *state, intel_ddi_wait_for_fec_status(encoder, crtc_state, true); for_each_intel_crtc_in_pipe_mask_reverse(&i915->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -3429,7 +3430,7 @@ void intel_ddi_update_active_dpll(struct intel_atomic_state *state, return; for_each_intel_crtc_in_pipe_mask(&i915->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(crtc_state)) + intel_joiner_crtc_joined_pipe_mask(crtc_state)) intel_update_active_dpll(state, pipe_crtc, encoder); } diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 9af3ea6c7642..97f01a02efe3 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -274,13 +274,6 @@ bool intel_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state) crtc->pipe == intel_joiner_get_primary_pipe(crtc_state); } -u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state) -{ - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - - return BIT(crtc->pipe) | crtc_state->joiner_pipes; -} - struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state) { struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); @@ -1679,13 +1672,13 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, return; for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) + intel_joiner_crtc_joined_pipe_mask(new_crtc_state)) intel_dmc_enable_pipe(dev_priv, pipe_crtc->pipe); intel_encoders_pre_pll_enable(state, crtc); for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -1696,7 +1689,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, intel_encoders_pre_enable(state, crtc); for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -1715,7 +1708,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, hsw_configure_cpu_transcoder(new_crtc_state); for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -1751,7 +1744,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, intel_encoders_enable(state, crtc); for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); enum pipe hsw_workaround_pipe; @@ -1846,7 +1839,7 @@ static void hsw_crtc_disable(struct intel_atomic_state *state, intel_encoders_post_disable(state, crtc); for_each_intel_crtc_in_pipe_mask(&i915->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -1856,7 +1849,7 @@ static void hsw_crtc_disable(struct intel_atomic_state *state, intel_encoders_post_pll_disable(state, crtc); for_each_intel_crtc_in_pipe_mask(&i915->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) + intel_joiner_crtc_joined_pipe_mask(old_crtc_state)) intel_dmc_disable_pipe(i915, pipe_crtc->pipe); } @@ -6632,7 +6625,7 @@ static void intel_enable_crtc(struct intel_atomic_state *state, return; for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -6745,13 +6738,13 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state, * or we race against vblank off. */ for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) + intel_joiner_crtc_joined_pipe_mask(old_crtc_state)) intel_crtc_disable_pipe_crc(pipe_crtc); dev_priv->display.funcs.display->crtc_disable(state, crtc); for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(old_crtc_state)) { const struct intel_crtc_state *new_pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -6816,7 +6809,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state) intel_old_crtc_state_disables(state, crtc); - disable_pipes &= ~intel_crtc_joined_pipe_mask(old_crtc_state); + disable_pipes &= ~intel_joiner_crtc_joined_pipe_mask(old_crtc_state); } /* Disable everything else left on */ @@ -6829,7 +6822,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state) intel_old_crtc_state_disables(state, crtc); - disable_pipes &= ~intel_crtc_joined_pipe_mask(old_crtc_state); + disable_pipes &= ~intel_joiner_crtc_joined_pipe_mask(old_crtc_state); } drm_WARN_ON(&i915->drm, disable_pipes); @@ -6956,7 +6949,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) is_trans_port_sync_master(new_crtc_state)) continue; - modeset_pipes &= ~intel_crtc_joined_pipe_mask(new_crtc_state); + modeset_pipes &= ~intel_joiner_crtc_joined_pipe_mask(new_crtc_state); intel_enable_crtc(state, crtc); } @@ -6974,7 +6967,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) if (intel_crtc_is_joiner_secondary(new_crtc_state)) continue; - modeset_pipes &= ~intel_crtc_joined_pipe_mask(new_crtc_state); + modeset_pipes &= ~intel_joiner_crtc_joined_pipe_mask(new_crtc_state); intel_enable_crtc(state, crtc); } diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 6bf423e36bc9..72643f278c2e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -422,7 +422,6 @@ intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915, enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port); bool is_trans_port_sync_mode(const struct intel_crtc_state *state); bool is_trans_port_sync_master(const struct intel_crtc_state *state); -u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state); bool intel_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state); bool intel_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state); u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 15541932b809..0fc76455de1f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -47,6 +47,7 @@ #include "intel_dpio_phy.h" #include "intel_hdcp.h" #include "intel_hotplug.h" +#include "intel_joiner.h" #include "intel_link_bw.h" #include "intel_psr.h" #include "intel_vdsc.h" @@ -1009,7 +1010,7 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, !intel_dp_mst_is_master_trans(old_crtc_state)); for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -1034,7 +1035,7 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, intel_ddi_disable_transcoder_func(old_crtc_state); for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + intel_joiner_crtc_joined_pipe_mask(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -1301,7 +1302,7 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state, intel_enable_transcoder(pipe_config); for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(pipe_config)) { + intel_joiner_crtc_joined_pipe_mask(pipe_config)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); diff --git a/drivers/gpu/drm/i915/display/intel_joiner.c b/drivers/gpu/drm/i915/display/intel_joiner.c index b24dfdbc9840..e6dfed812564 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.c +++ b/drivers/gpu/drm/i915/display/intel_joiner.c @@ -231,3 +231,10 @@ int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state) return 0; } + +u8 intel_joiner_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + + return BIT(crtc->pipe) | crtc_state->joiner_pipes; +} diff --git a/drivers/gpu/drm/i915/display/intel_joiner.h b/drivers/gpu/drm/i915/display/intel_joiner.h index 3417274de4a2..f8c0cd27536c 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.h +++ b/drivers/gpu/drm/i915/display/intel_joiner.h @@ -28,5 +28,6 @@ u8 intel_joiner_find_secondary_pipes(enum pipe pipe, u8 primary_pipes, u8 second void intel_joiner_get_config(struct intel_crtc_state *crtc_state); int intel_joiner_add_affected_planes(struct intel_atomic_state *state); int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state); +u8 intel_joiner_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state); #endif/* __INTEL_JOINER_H__ */ From patchwork Fri Aug 30 05:09:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784280 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 177CBCA0EDF for ; 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X-CSE-ConnectionGUID: mhPO3inbQ0270+LiJet3FQ== X-CSE-MsgGUID: 6AoCjar3TAC74moXBte51w== X-IronPort-AV: E=McAfee;i="6700,10204,11179"; a="23421695" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421695" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:48 -0700 X-CSE-ConnectionGUID: jsf9czNOQmWuTVG/p8zU1g== X-CSE-MsgGUID: 0o6Sf2FwT/egWWDrVtuNdA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610292" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:46 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 15/19] drm/i915/display: Move helpers for primary joiner to intel_joiner Date: Fri, 30 Aug 2024 10:39:45 +0530 Message-ID: <20240830050950.2528450-16-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move helpers to get/check primary joiner pipes to intel_joiner. Rename them to align with other intel_joiner helpers. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 3 ++- drivers/gpu/drm/i915/display/intel_display.c | 8 -------- drivers/gpu/drm/i915/display/intel_display.h | 1 - drivers/gpu/drm/i915/display/intel_joiner.c | 10 +++++++++- drivers/gpu/drm/i915/display/intel_joiner.h | 1 + 5 files changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index 705ec5ad385c..606fa069c93c 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -10,6 +10,7 @@ #include "intel_crtc_state_dump.h" #include "intel_display_types.h" #include "intel_hdmi.h" +#include "intel_joiner.h" #include "intel_vdsc.h" #include "intel_vrr.h" @@ -225,7 +226,7 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, drm_printf(&p, "joiner: %s, pipes: 0x%x\n", intel_crtc_is_joiner_secondary(pipe_config) ? "secondary" : - intel_crtc_is_joiner_primary(pipe_config) ? "primary" : "no", + intel_joiner_crtc_is_joiner_primary(pipe_config) ? "primary" : "no", pipe_config->joiner_pipes); drm_printf(&p, "splitter: %s, link count %d, overlap %d\n", diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 97f01a02efe3..4506cf9fa031 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -266,14 +266,6 @@ bool intel_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state) crtc->pipe != intel_joiner_get_primary_pipe(crtc_state); } -bool intel_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state) -{ - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - - return crtc_state->joiner_pipes && - crtc->pipe == intel_joiner_get_primary_pipe(crtc_state); -} - struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state) { struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 72643f278c2e..6ef756a8781e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -423,7 +423,6 @@ enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port); bool is_trans_port_sync_mode(const struct intel_crtc_state *state); bool is_trans_port_sync_master(const struct intel_crtc_state *state); bool intel_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state); -bool intel_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state); u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state); struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state); bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_joiner.c b/drivers/gpu/drm/i915/display/intel_joiner.c index e6dfed812564..d36df20f811f 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.c +++ b/drivers/gpu/drm/i915/display/intel_joiner.c @@ -225,7 +225,7 @@ int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state) for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { /* Kill old joiner link, we may re-establish afterwards */ if (intel_crtc_needs_modeset(crtc_state) && - intel_crtc_is_joiner_primary(crtc_state)) + intel_joiner_crtc_is_joiner_primary(crtc_state)) intel_crtc_kill_joiner_secondaries(state, crtc); } @@ -238,3 +238,11 @@ u8 intel_joiner_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state) return BIT(crtc->pipe) | crtc_state->joiner_pipes; } + +bool intel_joiner_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + + return crtc_state->joiner_pipes && + crtc->pipe == intel_joiner_get_primary_pipe(crtc_state); +} diff --git a/drivers/gpu/drm/i915/display/intel_joiner.h b/drivers/gpu/drm/i915/display/intel_joiner.h index f8c0cd27536c..4f19d623558a 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.h +++ b/drivers/gpu/drm/i915/display/intel_joiner.h @@ -29,5 +29,6 @@ void intel_joiner_get_config(struct intel_crtc_state *crtc_state); int intel_joiner_add_affected_planes(struct intel_atomic_state *state); int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state); u8 intel_joiner_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state); +bool intel_joiner_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state); #endif/* __INTEL_JOINER_H__ */ From patchwork Fri Aug 30 05:09:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784276 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C02F7CA0EE4 for ; Fri, 30 Aug 2024 05:08:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 31FE510E7EF; Fri, 30 Aug 2024 05:08:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="bizcG1q9"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id F330C10E7EA; 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29 Aug 2024 22:08:50 -0700 X-CSE-ConnectionGUID: EaG8zH4yQl+6SEb1rXQD+g== X-CSE-MsgGUID: 4elZbMmQQju1+qE2g0Tm/w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610296" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:48 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 16/19] drm/i915/display: Move intel_crtc_is_joiner_secondary to intel_joiner Date: Fri, 30 Aug 2024 10:39:46 +0530 Message-ID: <20240830050950.2528450-17-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move the helper to check secondary joiner pipes to intel_joiner. v2: Rebase. Signed-off-by: Ankit Nautiyal --- .../gpu/drm/i915/display/intel_atomic_plane.c | 3 +- .../drm/i915/display/intel_crtc_state_dump.c | 2 +- drivers/gpu/drm/i915/display/intel_display.c | 30 +++++++------------ drivers/gpu/drm/i915/display/intel_display.h | 1 - .../drm/i915/display/intel_display_debugfs.c | 3 +- drivers/gpu/drm/i915/display/intel_drrs.c | 5 ++-- drivers/gpu/drm/i915/display/intel_dss.c | 5 ++-- drivers/gpu/drm/i915/display/intel_joiner.c | 8 +++++ drivers/gpu/drm/i915/display/intel_joiner.h | 1 + .../drm/i915/display/intel_modeset_setup.c | 9 +++--- 10 files changed, 36 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index e979786aa5cf..478205b88502 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -49,6 +49,7 @@ #include "intel_display_types.h" #include "intel_fb.h" #include "intel_fb_pin.h" +#include "intel_joiner.h" #include "skl_scaler.h" #include "skl_watermark.h" @@ -722,7 +723,7 @@ int intel_plane_atomic_check(struct intel_atomic_state *state, struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - if (new_crtc_state && intel_crtc_is_joiner_secondary(new_crtc_state)) { + if (new_crtc_state && intel_joiner_crtc_is_joiner_secondary(new_crtc_state)) { struct intel_crtc *primary_crtc = intel_primary_crtc(new_crtc_state); struct intel_plane *primary_crtc_plane = diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index 606fa069c93c..269c97343c72 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -225,7 +225,7 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, pipe_config->sync_mode_slaves_mask); drm_printf(&p, "joiner: %s, pipes: 0x%x\n", - intel_crtc_is_joiner_secondary(pipe_config) ? "secondary" : + intel_joiner_crtc_is_joiner_secondary(pipe_config) ? "secondary" : intel_joiner_crtc_is_joiner_primary(pipe_config) ? "primary" : "no", pipe_config->joiner_pipes); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 4506cf9fa031..71d9f132e46c 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -258,19 +258,11 @@ u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state) return 0; } -bool intel_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state) -{ - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - - return crtc_state->joiner_pipes && - crtc->pipe != intel_joiner_get_primary_pipe(crtc_state); -} - struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state) { struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); - if (intel_crtc_is_joiner_secondary(crtc_state)) + if (intel_joiner_crtc_is_joiner_secondary(crtc_state)) return intel_crtc_for_pipe(i915, intel_joiner_get_primary_pipe(crtc_state)); else return to_intel_crtc(crtc_state->uapi.crtc); @@ -4311,7 +4303,7 @@ intel_crtc_copy_uapi_to_hw_state_nomodeset(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - WARN_ON(intel_crtc_is_joiner_secondary(crtc_state)); + WARN_ON(intel_joiner_crtc_is_joiner_secondary(crtc_state)); drm_property_replace_blob(&crtc_state->hw.degamma_lut, crtc_state->uapi.degamma_lut); @@ -4328,7 +4320,7 @@ intel_crtc_copy_uapi_to_hw_state_modeset(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - WARN_ON(intel_crtc_is_joiner_secondary(crtc_state)); + WARN_ON(intel_joiner_crtc_is_joiner_secondary(crtc_state)); crtc_state->hw.enable = crtc_state->uapi.enable; crtc_state->hw.active = crtc_state->uapi.active; @@ -6181,14 +6173,14 @@ static int intel_atomic_check_config(struct intel_atomic_state *state, for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { if (!intel_crtc_needs_modeset(new_crtc_state)) { - if (intel_crtc_is_joiner_secondary(new_crtc_state)) + if (intel_joiner_crtc_is_joiner_secondary(new_crtc_state)) copy_joiner_crtc_state_nomodeset(state, crtc); else intel_crtc_copy_uapi_to_hw_state_nomodeset(state, crtc); continue; } - if (drm_WARN_ON(&i915->drm, intel_crtc_is_joiner_secondary(new_crtc_state))) + if (drm_WARN_ON(&i915->drm, intel_joiner_crtc_is_joiner_secondary(new_crtc_state))) continue; ret = intel_crtc_prepare_cleared_state(state, crtc); @@ -6207,7 +6199,7 @@ static int intel_atomic_check_config(struct intel_atomic_state *state, if (!intel_crtc_needs_modeset(new_crtc_state)) continue; - if (drm_WARN_ON(&i915->drm, intel_crtc_is_joiner_secondary(new_crtc_state))) + if (drm_WARN_ON(&i915->drm, intel_joiner_crtc_is_joiner_secondary(new_crtc_state))) continue; if (!new_crtc_state->hw.enable) @@ -6318,7 +6310,7 @@ int intel_atomic_check(struct drm_device *dev, if (!intel_crtc_needs_modeset(new_crtc_state)) continue; - if (intel_crtc_is_joiner_secondary(new_crtc_state)) { + if (intel_joiner_crtc_is_joiner_secondary(new_crtc_state)) { drm_WARN_ON(&dev_priv->drm, new_crtc_state->uapi.enable); continue; } @@ -6787,7 +6779,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state) if ((disable_pipes & BIT(crtc->pipe)) == 0) continue; - if (intel_crtc_is_joiner_secondary(old_crtc_state)) + if (intel_joiner_crtc_is_joiner_secondary(old_crtc_state)) continue; /* In case of Transcoder port Sync master slave CRTCs can be @@ -6809,7 +6801,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state) if ((disable_pipes & BIT(crtc->pipe)) == 0) continue; - if (intel_crtc_is_joiner_secondary(old_crtc_state)) + if (intel_joiner_crtc_is_joiner_secondary(old_crtc_state)) continue; intel_old_crtc_state_disables(state, crtc); @@ -6934,7 +6926,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) if ((modeset_pipes & BIT(pipe)) == 0) continue; - if (intel_crtc_is_joiner_secondary(new_crtc_state)) + if (intel_joiner_crtc_is_joiner_secondary(new_crtc_state)) continue; if (intel_dp_mst_is_slave_trans(new_crtc_state) || @@ -6956,7 +6948,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) if ((modeset_pipes & BIT(pipe)) == 0) continue; - if (intel_crtc_is_joiner_secondary(new_crtc_state)) + if (intel_joiner_crtc_is_joiner_secondary(new_crtc_state)) continue; modeset_pipes &= ~intel_joiner_crtc_joined_pipe_mask(new_crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 6ef756a8781e..5528e9c9568f 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -422,7 +422,6 @@ intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915, enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port); bool is_trans_port_sync_mode(const struct intel_crtc_state *state); bool is_trans_port_sync_master(const struct intel_crtc_state *state); -bool intel_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state); u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state); struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state); bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 74f527647aa9..2f862876f269 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -32,6 +32,7 @@ #include "intel_hdcp.h" #include "intel_hdmi.h" #include "intel_hotplug.h" +#include "intel_joiner.h" #include "intel_panel.h" #include "intel_pps.h" #include "intel_psr.h" @@ -581,7 +582,7 @@ static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) if (crtc_state->joiner_pipes) seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", crtc_state->joiner_pipes, - intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master"); + intel_joiner_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master"); intel_vdsc_state_dump(&p, 1, crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c index 3ca29afa5422..b80014b66ff4 100644 --- a/drivers/gpu/drm/i915/display/intel_drrs.c +++ b/drivers/gpu/drm/i915/display/intel_drrs.c @@ -10,6 +10,7 @@ #include "intel_display_types.h" #include "intel_drrs.h" #include "intel_frontbuffer.h" +#include "intel_joiner.h" #include "intel_panel.h" /** @@ -157,7 +158,7 @@ void intel_drrs_activate(const struct intel_crtc_state *crtc_state) if (!crtc_state->hw.active) return; - if (intel_crtc_is_joiner_secondary(crtc_state)) + if (intel_joiner_crtc_is_joiner_secondary(crtc_state)) return; mutex_lock(&crtc->drrs.mutex); @@ -189,7 +190,7 @@ void intel_drrs_deactivate(const struct intel_crtc_state *old_crtc_state) if (!old_crtc_state->hw.active) return; - if (intel_crtc_is_joiner_secondary(old_crtc_state)) + if (intel_joiner_crtc_is_joiner_secondary(old_crtc_state)) return; mutex_lock(&crtc->drrs.mutex); diff --git a/drivers/gpu/drm/i915/display/intel_dss.c b/drivers/gpu/drm/i915/display/intel_dss.c index 01303feadcef..6029e9a16655 100644 --- a/drivers/gpu/drm/i915/display/intel_dss.c +++ b/drivers/gpu/drm/i915/display/intel_dss.c @@ -11,6 +11,7 @@ #include "intel_dsi.h" #include "intel_dss.h" #include "intel_dss_regs.h" +#include "intel_joiner.h" #include "intel_vdsc.h" /* @@ -168,7 +169,7 @@ void intel_dss_enable_uncompressed_joiner(const struct intel_crtc_state *crtc_st u32 dss_ctl1_val = 0; if (crtc_state->joiner_pipes && !crtc_state->dsc.compression_enable) { - if (intel_crtc_is_joiner_secondary(crtc_state)) + if (intel_joiner_crtc_is_joiner_secondary(crtc_state)) dss_ctl1_val |= UNCOMPRESSED_JOINER_SECONDARY; else dss_ctl1_val |= UNCOMPRESSED_JOINER_PRIMARY; @@ -194,7 +195,7 @@ void intel_dss_enable_compressed_joiner(const struct intel_crtc_state *crtc_stat } if (crtc_state->joiner_pipes) { dss_ctl1_val |= BIG_JOINER_ENABLE; - if (!intel_crtc_is_joiner_secondary(crtc_state)) + if (!intel_joiner_crtc_is_joiner_secondary(crtc_state)) dss_ctl1_val |= PRIMARY_BIG_JOINER_ENABLE; } intel_de_write(display, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val); diff --git a/drivers/gpu/drm/i915/display/intel_joiner.c b/drivers/gpu/drm/i915/display/intel_joiner.c index d36df20f811f..f7acd2de8ffb 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.c +++ b/drivers/gpu/drm/i915/display/intel_joiner.c @@ -246,3 +246,11 @@ bool intel_joiner_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_sta return crtc_state->joiner_pipes && crtc->pipe == intel_joiner_get_primary_pipe(crtc_state); } + +bool intel_joiner_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + + return crtc_state->joiner_pipes && + crtc->pipe != intel_joiner_get_primary_pipe(crtc_state); +} diff --git a/drivers/gpu/drm/i915/display/intel_joiner.h b/drivers/gpu/drm/i915/display/intel_joiner.h index 4f19d623558a..b3266ebf8922 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.h +++ b/drivers/gpu/drm/i915/display/intel_joiner.h @@ -30,5 +30,6 @@ int intel_joiner_add_affected_planes(struct intel_atomic_state *state); int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state); u8 intel_joiner_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state); bool intel_joiner_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state); +bool intel_joiner_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state); #endif/* __INTEL_JOINER_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c index 72694dde3c22..466770f8b564 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c @@ -25,6 +25,7 @@ #include "intel_dmc.h" #include "intel_fifo_underrun.h" #include "intel_modeset_setup.h" +#include "intel_joiner.h" #include "intel_pch_display.h" #include "intel_pmdemand.h" #include "intel_tc.h" @@ -204,7 +205,7 @@ static u8 get_transcoder_pipes(struct drm_i915_private *i915, if (temp_crtc_state->cpu_transcoder == INVALID_TRANSCODER) continue; - if (intel_crtc_is_joiner_secondary(temp_crtc_state)) + if (intel_joiner_crtc_is_joiner_secondary(temp_crtc_state)) continue; if (transcoder_mask & BIT(temp_crtc_state->cpu_transcoder)) @@ -328,7 +329,7 @@ static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state { struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); - if (intel_crtc_is_joiner_secondary(crtc_state)) + if (intel_joiner_crtc_is_joiner_secondary(crtc_state)) return; crtc_state->uapi.enable = crtc_state->hw.enable; @@ -495,7 +496,7 @@ static bool intel_sanitize_crtc(struct intel_crtc *crtc, } if (!crtc_state->hw.active || - intel_crtc_is_joiner_secondary(crtc_state)) + intel_joiner_crtc_is_joiner_secondary(crtc_state)) return false; needs_link_reset = intel_crtc_needs_link_reset(crtc); @@ -754,7 +755,7 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) struct intel_crtc *secondary_crtc; /* encoder should read be linked to joiner primary */ - WARN_ON(intel_crtc_is_joiner_secondary(crtc_state)); + WARN_ON(intel_joiner_crtc_is_joiner_secondary(crtc_state)); for_each_intel_crtc_in_pipe_mask(&i915->drm, secondary_crtc, intel_crtc_joiner_secondary_pipes(crtc_state)) { From patchwork Fri Aug 30 05:09:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784275 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A599CA0EE1 for ; Fri, 30 Aug 2024 05:08:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D7B0310E7F2; Fri, 30 Aug 2024 05:08:56 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="cdazFFtC"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id E93E010E7EE; Fri, 30 Aug 2024 05:08:51 +0000 (UTC) DKIM-Signature: v=1; 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d="scan'208";a="94610302" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:50 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 17/19] drm/i915/display: Move intel_crtc_joiner_secondary_pipes to intel_joiner Date: Fri, 30 Aug 2024 10:39:47 +0530 Message-ID: <20240830050950.2528450-18-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move the helper to get secondary joiner pipes to intel_joiner. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 12 ++---------- drivers/gpu/drm/i915/display/intel_display.h | 1 - drivers/gpu/drm/i915/display/intel_joiner.c | 8 ++++++++ drivers/gpu/drm/i915/display/intel_joiner.h | 1 + drivers/gpu/drm/i915/display/intel_modeset_setup.c | 6 +++--- 5 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 71d9f132e46c..556c7774a0b0 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -250,14 +250,6 @@ is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state) is_trans_port_sync_slave(crtc_state); } -u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state) -{ - if (crtc_state->joiner_pipes) - return crtc_state->joiner_pipes & ~BIT(intel_joiner_get_primary_pipe(crtc_state)); - else - return 0; -} - struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state) { struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); @@ -5806,7 +5798,7 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state, } for_each_intel_crtc_in_pipe_mask(&i915->drm, secondary_crtc, - intel_crtc_joiner_secondary_pipes(primary_crtc_state)) { + intel_joiner_crtc_joiner_secondary_pipes(primary_crtc_state)) { struct intel_crtc_state *secondary_crtc_state; int ret; @@ -5860,7 +5852,7 @@ void intel_crtc_kill_joiner_secondaries(struct intel_atomic_state *state, struct intel_crtc *secondary_crtc; for_each_intel_crtc_in_pipe_mask(&i915->drm, secondary_crtc, - intel_crtc_joiner_secondary_pipes(primary_crtc_state)) { + intel_joiner_crtc_joiner_secondary_pipes(primary_crtc_state)) { struct intel_crtc_state *secondary_crtc_state = intel_atomic_get_new_crtc_state(state, secondary_crtc); diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 5528e9c9568f..b0f5303a5bb0 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -422,7 +422,6 @@ intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915, enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port); bool is_trans_port_sync_mode(const struct intel_crtc_state *state); bool is_trans_port_sync_master(const struct intel_crtc_state *state); -u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state); struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state); bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state); bool intel_pipe_config_compare(const struct intel_crtc_state *current_config, diff --git a/drivers/gpu/drm/i915/display/intel_joiner.c b/drivers/gpu/drm/i915/display/intel_joiner.c index f7acd2de8ffb..0899cf51a825 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.c +++ b/drivers/gpu/drm/i915/display/intel_joiner.c @@ -254,3 +254,11 @@ bool intel_joiner_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_s return crtc_state->joiner_pipes && crtc->pipe != intel_joiner_get_primary_pipe(crtc_state); } + +u8 intel_joiner_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state) +{ + if (crtc_state->joiner_pipes) + return crtc_state->joiner_pipes & ~BIT(intel_joiner_get_primary_pipe(crtc_state)); + else + return 0; +} diff --git a/drivers/gpu/drm/i915/display/intel_joiner.h b/drivers/gpu/drm/i915/display/intel_joiner.h index b3266ebf8922..cae9971c44f6 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.h +++ b/drivers/gpu/drm/i915/display/intel_joiner.h @@ -31,5 +31,6 @@ int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state); u8 intel_joiner_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state); bool intel_joiner_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state); bool intel_joiner_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state); +u8 intel_joiner_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state); #endif/* __INTEL_JOINER_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c index 466770f8b564..9b4acafdcdcd 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c @@ -69,7 +69,7 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc, /* Everything's already locked, -EDEADLK can't happen. */ for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, BIT(pipe) | - intel_crtc_joiner_secondary_pipes(crtc_state)) { + intel_joiner_crtc_joiner_secondary_pipes(crtc_state)) { struct intel_crtc_state *temp_crtc_state = intel_atomic_get_crtc_state(state, temp_crtc); int ret; @@ -258,7 +258,7 @@ static u8 get_joiner_secondary_pipes(struct drm_i915_private *i915, u8 primary_p struct intel_crtc_state *primary_crtc_state = to_intel_crtc_state(primary_crtc->base.state); - pipes |= intel_crtc_joiner_secondary_pipes(primary_crtc_state); + pipes |= intel_joiner_crtc_joiner_secondary_pipes(primary_crtc_state); } return pipes; @@ -758,7 +758,7 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) WARN_ON(intel_joiner_crtc_is_joiner_secondary(crtc_state)); for_each_intel_crtc_in_pipe_mask(&i915->drm, secondary_crtc, - intel_crtc_joiner_secondary_pipes(crtc_state)) { + intel_joiner_crtc_joiner_secondary_pipes(crtc_state)) { struct intel_crtc_state *secondary_crtc_state; secondary_crtc_state = to_intel_crtc_state(secondary_crtc->base.state); From patchwork Fri Aug 30 05:09:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784277 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D21CDCA0EE0 for ; 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X-CSE-ConnectionGUID: yhMadJptQ5e9NW3NoMZvuQ== X-CSE-MsgGUID: 0jW40+jvRoK+lCsg0HgL+A== X-IronPort-AV: E=McAfee;i="6700,10204,11179"; a="23421701" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421701" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:54 -0700 X-CSE-ConnectionGUID: NYP0SLSQQoitGFl89zVCkA== X-CSE-MsgGUID: 3JC3KfTCQR6wGkUVIGq3hg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610313" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:52 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 18/19] drm/i915/joiner: Use struct intel_display in intel_joiner_enabled_pipes Date: Fri, 30 Aug 2024 10:39:48 +0530 Message-ID: <20240830050950.2528450-19-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Replace struct drm_i915_private with struct intel_display in the helper intel_joiner_enabled_pipes and its callers. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 3 ++- drivers/gpu/drm/i915/display/intel_joiner.c | 13 +++++++------ drivers/gpu/drm/i915/display/intel_joiner.h | 3 ++- 3 files changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 556c7774a0b0..22a65d66f45e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3444,6 +3444,7 @@ static u8 hsw_panel_transcoders(struct drm_i915_private *i915) static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) { + struct intel_display *display = to_intel_display(crtc); struct drm_device *dev = crtc->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv); @@ -3501,7 +3502,7 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) enabled_transcoders |= BIT(cpu_transcoder); /* joiner secondary -> consider the primary pipe's transcoder as well */ - intel_joiner_enabled_pipes(dev_priv, &primary_pipes, &secondary_pipes); + intel_joiner_enabled_pipes(display, &primary_pipes, &secondary_pipes); if (secondary_pipes & BIT(crtc->pipe)) { cpu_transcoder = (enum transcoder) intel_joiner_find_primary_pipe(crtc->pipe, primary_pipes, secondary_pipes); diff --git a/drivers/gpu/drm/i915/display/intel_joiner.c b/drivers/gpu/drm/i915/display/intel_joiner.c index 0899cf51a825..2c7477914f74 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.c +++ b/drivers/gpu/drm/i915/display/intel_joiner.c @@ -86,16 +86,17 @@ u8 intel_joiner_supported_pipes(struct drm_i915_private *i915) return pipes & DISPLAY_RUNTIME_INFO(i915)->pipe_mask; } -void intel_joiner_enabled_pipes(struct drm_i915_private *dev_priv, +void intel_joiner_enabled_pipes(struct intel_display *display, u8 *primary_pipes, u8 *secondary_pipes) { + struct drm_i915_private *i915 = to_i915(display->drm); struct intel_crtc *crtc; *primary_pipes = 0; *secondary_pipes = 0; - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, - intel_joiner_supported_pipes(dev_priv)) { + for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, + intel_joiner_supported_pipes(i915)) { intel_dss_get_compressed_joiner_pipes(crtc, primary_pipes, secondary_pipes); @@ -106,7 +107,7 @@ void intel_joiner_enabled_pipes(struct drm_i915_private *dev_priv, } /* Joiner pipes should always be consecutive primary and secondary */ - drm_WARN(&dev_priv->drm, *secondary_pipes != *primary_pipes << 1, + drm_WARN(display->drm, *secondary_pipes != *primary_pipes << 1, "Joiner misconfigured (primary pipes 0x%x, secondary pipes 0x%x)\n", *primary_pipes, *secondary_pipes); } @@ -144,12 +145,12 @@ u8 intel_joiner_find_secondary_pipes(enum pipe pipe, u8 primary_pipes, u8 second void intel_joiner_get_config(struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); u8 primary_pipes, secondary_pipes; enum pipe pipe = crtc->pipe; - intel_joiner_enabled_pipes(i915, &primary_pipes, &secondary_pipes); + intel_joiner_enabled_pipes(display, &primary_pipes, &secondary_pipes); if (((primary_pipes | secondary_pipes) & BIT(pipe)) == 0) return; diff --git a/drivers/gpu/drm/i915/display/intel_joiner.h b/drivers/gpu/drm/i915/display/intel_joiner.h index cae9971c44f6..49cb2d78f4c8 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.h +++ b/drivers/gpu/drm/i915/display/intel_joiner.h @@ -13,6 +13,7 @@ struct drm_display_mode; struct drm_i915_private; struct intel_atomic_state; struct intel_crtc_state; +struct intel_display; enum pipe intel_joiner_get_primary_pipe(const struct intel_crtc_state *crtc_state); int intel_joiner_get_num_pipes(const struct intel_crtc_state *crtc_state); @@ -21,7 +22,7 @@ void intel_joiner_adjust_timings(const struct intel_crtc_state *crtc_state, void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state); void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state); u8 intel_joiner_supported_pipes(struct drm_i915_private *i915); -void intel_joiner_enabled_pipes(struct drm_i915_private *dev_priv, +void intel_joiner_enabled_pipes(struct intel_display *display, u8 *primary_pipes, u8 *secondary_pipes); enum pipe intel_joiner_find_primary_pipe(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes); u8 intel_joiner_find_secondary_pipes(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes); From patchwork Fri Aug 30 05:09:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13784278 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3BB60CA0EE2 for ; Fri, 30 Aug 2024 05:08:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5F14910E7F9; Fri, 30 Aug 2024 05:08:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; 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a="23421703" X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="23421703" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:56 -0700 X-CSE-ConnectionGUID: +12oFYtRTMqKZRI8scIawg== X-CSE-MsgGUID: tpVu3+6mSH62e+jSw7l53A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,187,1719903600"; d="scan'208";a="94610322" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2024 22:08:54 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, suraj.kandpal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 19/19] drm/i915/joiner: Use struct intel_display in intel_joiner_supported_pipes Date: Fri, 30 Aug 2024 10:39:49 +0530 Message-ID: <20240830050950.2528450-20-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> References: <20240830050950.2528450-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Replace struct drm_i915_private with struct intel_display in the helper intel_joiner_supported_pipes and its callers. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 6 ++++-- drivers/gpu/drm/i915/display/intel_joiner.c | 10 +++++----- drivers/gpu/drm/i915/display/intel_joiner.h | 3 +-- 3 files changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 22a65d66f45e..a326db662748 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5776,6 +5776,7 @@ static bool intel_pipes_need_modeset(struct intel_atomic_state *state, static int intel_atomic_check_joiner(struct intel_atomic_state *state, struct intel_crtc *primary_crtc) { + struct intel_display *display = to_intel_display(primary_crtc); struct drm_i915_private *i915 = to_i915(state->base.dev); struct intel_crtc_state *primary_crtc_state = intel_atomic_get_new_crtc_state(state, primary_crtc); @@ -5789,12 +5790,13 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state, primary_crtc->pipe != intel_joiner_get_primary_pipe(primary_crtc_state))) return -EINVAL; - if (primary_crtc_state->joiner_pipes & ~intel_joiner_supported_pipes(i915)) { + if (primary_crtc_state->joiner_pipes & ~intel_joiner_supported_pipes(display)) { drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] Cannot act as joiner primary " "(need 0x%x as pipes, only 0x%x possible)\n", primary_crtc->base.base.id, primary_crtc->base.name, - primary_crtc_state->joiner_pipes, intel_joiner_supported_pipes(i915)); + primary_crtc_state->joiner_pipes, + intel_joiner_supported_pipes(display)); return -EINVAL; } diff --git a/drivers/gpu/drm/i915/display/intel_joiner.c b/drivers/gpu/drm/i915/display/intel_joiner.c index 2c7477914f74..32cd0ab4e707 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.c +++ b/drivers/gpu/drm/i915/display/intel_joiner.c @@ -72,18 +72,18 @@ void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state) (pipe - primary_pipe) * width, 0); } -u8 intel_joiner_supported_pipes(struct drm_i915_private *i915) +u8 intel_joiner_supported_pipes(struct intel_display *display) { u8 pipes; - if (DISPLAY_VER(i915) >= 12) + if (DISPLAY_VER(display) >= 12) pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D); - else if (DISPLAY_VER(i915) >= 11) + else if (DISPLAY_VER(display) >= 11) pipes = BIT(PIPE_B) | BIT(PIPE_C); else pipes = 0; - return pipes & DISPLAY_RUNTIME_INFO(i915)->pipe_mask; + return pipes & DISPLAY_RUNTIME_INFO(display)->pipe_mask; } void intel_joiner_enabled_pipes(struct intel_display *display, @@ -96,7 +96,7 @@ void intel_joiner_enabled_pipes(struct intel_display *display, *secondary_pipes = 0; for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, - intel_joiner_supported_pipes(i915)) { + intel_joiner_supported_pipes(display)) { intel_dss_get_compressed_joiner_pipes(crtc, primary_pipes, secondary_pipes); diff --git a/drivers/gpu/drm/i915/display/intel_joiner.h b/drivers/gpu/drm/i915/display/intel_joiner.h index 49cb2d78f4c8..698f8e55f8ea 100644 --- a/drivers/gpu/drm/i915/display/intel_joiner.h +++ b/drivers/gpu/drm/i915/display/intel_joiner.h @@ -10,7 +10,6 @@ enum pipe; struct drm_display_mode; -struct drm_i915_private; struct intel_atomic_state; struct intel_crtc_state; struct intel_display; @@ -21,7 +20,7 @@ void intel_joiner_adjust_timings(const struct intel_crtc_state *crtc_state, struct drm_display_mode *mode); void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state); void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state); -u8 intel_joiner_supported_pipes(struct drm_i915_private *i915); +u8 intel_joiner_supported_pipes(struct intel_display *display); void intel_joiner_enabled_pipes(struct intel_display *display, u8 *primary_pipes, u8 *secondary_pipes); enum pipe intel_joiner_find_primary_pipe(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes);