From patchwork Mon Sep 2 10:36:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 13787014 Received: from mail-lj1-f171.google.com (mail-lj1-f171.google.com [209.85.208.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9450E143738 for ; Mon, 2 Sep 2024 10:36:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273420; cv=none; b=iXHRnvKqkww5LR0gzvlY6wTfPRxCCun+SlJGP63VebDtSDL0e9a5p0IUBih7/OPuXKF70M8Ckm/ALLfmn1p0fJ6r3s/cIS5KzhpB48JbOxdaaNDkOjVU0VEtYRwX/6q0cSc+Qw0hG4cqxYsnwoQ0ovP2SO6WyM+fIvgAeVzAT1A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273420; c=relaxed/simple; bh=m+JDUAFze61TKUmqgjZi4kJQBJPi7r7Nl0ZvyJY2pOo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Y9WICk84wEte5aU4xE+NEbEwbyE+GurOpdOJznXMeUpfpL3W0oUz29poxg5yf/Ff8TbAcpJMRxkKat1eLf5b1K7mhUTXi8XIAdXIv8fmNoBrc8GHZA4cyXyF3/HN2vPHhKf3ncIy79X819/uLy9TXG9/ACEmynWGQNEc/efCUVs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=Bwyesxb4; arc=none smtp.client-ip=209.85.208.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="Bwyesxb4" Received: by mail-lj1-f171.google.com with SMTP id 38308e7fff4ca-2f406034874so47860401fa.1 for ; Mon, 02 Sep 2024 03:36:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1725273414; x=1725878214; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zwFKX15TuB+lP2XuqgSDKuPw5N2dTeJWzE8YjtBx2Ck=; b=Bwyesxb4nbMWqlDxpV7LXaE1K0zxEAuhmSJyoz2jsdf6ad2EM9auzCLfLgZcTfVIDx SYA+97ey8x2s1QxV/XF/jvZbvzxHdrHTa6jIBlKqs+8YksER1GQpBqTv68VUyzIX+RjH i5oTI9RADELs0bZK5kGDR85OA/DiRzfAcQk7yGLVGAGz6YVkI4ivlNZtNEnHsNSZJJwl 7EOeMOLDVVltUKP72BO22FeR+PH5DmYZQ4ZdGpnx4+y1f7/4HYQGyRkSHh3tTQitHM2I IBEcRE6MCJGZeyFJsn7Lp2ohd2DIU2pvFNzr4zmguyzyJE9oWlH0jttSRgicftl/gnLw bTtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725273414; x=1725878214; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zwFKX15TuB+lP2XuqgSDKuPw5N2dTeJWzE8YjtBx2Ck=; b=hbjThzsuNvcIssA6gcZwvEHYcPmQ/b5/p/gPbnT1jOwp0395+ehUgjCGd4S06U32fA TAKjlsmLhEjTVBwNrWiCBWRzCjbK+9FCcOpkwrM23U1Lw2fB1f+cZ0fkjP/v09ppDjc0 NF2WP9lIvBDx9UR33AjLxOsMJYIFKTGSReTURvUbTAJg/lYgRzw/hCrXZJkb/aodNquQ 8uOEj/ju7BVgrZb0DaEov1Ao+gmdGRt/gu+BR0CBLDPor0It2mT9xCEXp6zknuJwmI0e FfukpDw57fEAHcA+gPh+sTiCxWyUPNyzEH5huHzIRwAGhofL63VfqRmjgTMXiVqndO2N PLrQ== X-Gm-Message-State: AOJu0YzX85szK1Zsz2fLRnZ2JbtWBPnHyouuxyuRn0UuiK/8K5+W1prX R6DwZg+aYuja/qbV0/8568tmu44DOu1Exy3XcmsZJbmm8r0W04pgbun0q1RHPEZhBADrSvRUsgp uw20= X-Google-Smtp-Source: AGHT+IEEQmpoV+ouxMmGGEQPQ1RJ1to1BLB7QdCRrlHE0htoeC67gYCWhIBQQrTQ12ZTMDwwnMcVVg== X-Received: by 2002:a05:6512:2208:b0:533:44a3:21b9 with SMTP id 2adb3069b0e04-53546b1916dmr7422282e87.1.1725273413826; Mon, 02 Sep 2024 03:36:53 -0700 (PDT) Received: from neptune.local ([2a02:2f0e:3004:6100:e124:ce40:67a4:fcf0]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a89891da22bsm540876766b.182.2024.09.02.03.36.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 03:36:53 -0700 (PDT) From: Alexandru Ardelean To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com, Alexandru Ardelean Subject: [PATCH v2 1/8] iio: adc: ad7606: add 'bits' parameter to channels macros Date: Mon, 2 Sep 2024 13:36:24 +0300 Message-ID: <20240902103638.686039-2-aardelean@baylibre.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240902103638.686039-1-aardelean@baylibre.com> References: <20240902103638.686039-1-aardelean@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There are some newer additions to the AD7606 family, which support 18 bit precision. Up until now, all chips were 16 bit. This change adds a 'bits' parameter to the AD760X_CHANNEL macro and renames 'ad7606_channels' -> 'ad7606_channels_16bit' for the current devices. The AD7606_SW_CHANNEL() macro is also introduced, as a short-hand for IIO channels in SW mode. Signed-off-by: Alexandru Ardelean --- drivers/iio/adc/ad7606.c | 58 ++++++++++++++++++------------------ drivers/iio/adc/ad7606.h | 18 ++++++----- drivers/iio/adc/ad7606_spi.c | 16 +++++----- 3 files changed, 47 insertions(+), 45 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index 539e4a8621fe..dba1f28782e4 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -333,16 +333,16 @@ static const struct iio_chan_spec ad7605_channels[] = { AD7605_CHANNEL(3), }; -static const struct iio_chan_spec ad7606_channels[] = { +static const struct iio_chan_spec ad7606_channels_16bit[] = { IIO_CHAN_SOFT_TIMESTAMP(8), - AD7606_CHANNEL(0), - AD7606_CHANNEL(1), - AD7606_CHANNEL(2), - AD7606_CHANNEL(3), - AD7606_CHANNEL(4), - AD7606_CHANNEL(5), - AD7606_CHANNEL(6), - AD7606_CHANNEL(7), + AD7606_CHANNEL(0, 16), + AD7606_CHANNEL(1, 16), + AD7606_CHANNEL(2, 16), + AD7606_CHANNEL(3, 16), + AD7606_CHANNEL(4, 16), + AD7606_CHANNEL(5, 16), + AD7606_CHANNEL(6, 16), + AD7606_CHANNEL(7, 16), }; /* @@ -357,22 +357,22 @@ static const struct iio_chan_spec ad7606_channels[] = { */ static const struct iio_chan_spec ad7616_channels[] = { IIO_CHAN_SOFT_TIMESTAMP(16), - AD7606_CHANNEL(0), - AD7606_CHANNEL(1), - AD7606_CHANNEL(2), - AD7606_CHANNEL(3), - AD7606_CHANNEL(4), - AD7606_CHANNEL(5), - AD7606_CHANNEL(6), - AD7606_CHANNEL(7), - AD7606_CHANNEL(8), - AD7606_CHANNEL(9), - AD7606_CHANNEL(10), - AD7606_CHANNEL(11), - AD7606_CHANNEL(12), - AD7606_CHANNEL(13), - AD7606_CHANNEL(14), - AD7606_CHANNEL(15), + AD7606_CHANNEL(0, 16), + AD7606_CHANNEL(1, 16), + AD7606_CHANNEL(2, 16), + AD7606_CHANNEL(3, 16), + AD7606_CHANNEL(4, 16), + AD7606_CHANNEL(5, 16), + AD7606_CHANNEL(6, 16), + AD7606_CHANNEL(7, 16), + AD7606_CHANNEL(8, 16), + AD7606_CHANNEL(9, 16), + AD7606_CHANNEL(10, 16), + AD7606_CHANNEL(11, 16), + AD7606_CHANNEL(12, 16), + AD7606_CHANNEL(13, 16), + AD7606_CHANNEL(14, 16), + AD7606_CHANNEL(15, 16), }; static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { @@ -382,25 +382,25 @@ static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { .num_channels = 5, }, [ID_AD7606_8] = { - .channels = ad7606_channels, + .channels = ad7606_channels_16bit, .num_channels = 9, .oversampling_avail = ad7606_oversampling_avail, .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), }, [ID_AD7606_6] = { - .channels = ad7606_channels, + .channels = ad7606_channels_16bit, .num_channels = 7, .oversampling_avail = ad7606_oversampling_avail, .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), }, [ID_AD7606_4] = { - .channels = ad7606_channels, + .channels = ad7606_channels_16bit, .num_channels = 5, .oversampling_avail = ad7606_oversampling_avail, .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), }, [ID_AD7606B] = { - .channels = ad7606_channels, + .channels = ad7606_channels_16bit, .num_channels = 9, .oversampling_avail = ad7606_oversampling_avail, .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 0c6a88cc4695..771121350f98 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -8,7 +8,7 @@ #ifndef IIO_ADC_AD7606_H_ #define IIO_ADC_AD7606_H_ -#define AD760X_CHANNEL(num, mask_sep, mask_type, mask_all) { \ +#define AD760X_CHANNEL(num, mask_sep, mask_type, mask_all, bits) { \ .type = IIO_VOLTAGE, \ .indexed = 1, \ .channel = num, \ @@ -19,24 +19,26 @@ .scan_index = num, \ .scan_type = { \ .sign = 's', \ - .realbits = 16, \ - .storagebits = 16, \ + .realbits = (bits), \ + .storagebits = (bits), \ .endianness = IIO_CPU, \ }, \ } #define AD7605_CHANNEL(num) \ AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \ - BIT(IIO_CHAN_INFO_SCALE), 0) + BIT(IIO_CHAN_INFO_SCALE), 0, 16) -#define AD7606_CHANNEL(num) \ +#define AD7606_CHANNEL(num, bits) \ AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \ BIT(IIO_CHAN_INFO_SCALE), \ - BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)) + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), bits) -#define AD7616_CHANNEL(num) \ +#define AD7606_SW_CHANNEL(num, bits) \ AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),\ - 0, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)) + 0, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), bits) + +#define AD7616_CHANNEL(num) AD7606_SW_CHANNEL(num, 16) /** * struct ad7606_chip_info - chip specific information diff --git a/drivers/iio/adc/ad7606_spi.c b/drivers/iio/adc/ad7606_spi.c index 62ec12195307..e00f58a6a0e9 100644 --- a/drivers/iio/adc/ad7606_spi.c +++ b/drivers/iio/adc/ad7606_spi.c @@ -67,14 +67,14 @@ static const struct iio_chan_spec ad7616_sw_channels[] = { static const struct iio_chan_spec ad7606b_sw_channels[] = { IIO_CHAN_SOFT_TIMESTAMP(8), - AD7616_CHANNEL(0), - AD7616_CHANNEL(1), - AD7616_CHANNEL(2), - AD7616_CHANNEL(3), - AD7616_CHANNEL(4), - AD7616_CHANNEL(5), - AD7616_CHANNEL(6), - AD7616_CHANNEL(7), + AD7606_SW_CHANNEL(0, 16), + AD7606_SW_CHANNEL(1, 16), + AD7606_SW_CHANNEL(2, 16), + AD7606_SW_CHANNEL(3, 16), + AD7606_SW_CHANNEL(4, 16), + AD7606_SW_CHANNEL(5, 16), + AD7606_SW_CHANNEL(6, 16), + AD7606_SW_CHANNEL(7, 16), }; static const unsigned int ad7606B_oversampling_avail[9] = { From patchwork Mon Sep 2 10:36:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 13787015 Received: from mail-lf1-f50.google.com (mail-lf1-f50.google.com [209.85.167.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1FAC17DFE7 for ; Mon, 2 Sep 2024 10:36:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273420; cv=none; b=A3BWYIq0rDHrd1Fr4EmpaWORgdiQy/T2+JdSgUFASFxKXvhKOkOjI+WcbOExI7WrsLAdmRC9/oK8xic8LYAuRo8KYFakLlxjISlGiLhOv+LaoArcjlkoVBZQJuYTxcMLD00XBRQrqxIOfChYYBzjx35/aV8CybwPyWs+apkzviw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273420; c=relaxed/simple; bh=IXqmhsQDt/RO+GElC8x8ywqYUr/3SWcgPZP7XLJrRH0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YDjjcX5pl0Dwpw/rIjSPvSKcHM1PpgHeLQ+tyB9i8w0LVbwG4HJ9RcmA+CKhKZPBhx8vGuL4Yq0xTdOQ6t+Rhb/BzzmrwIfNrZEcSPpMy7+JwbQSb9o8XiQ3+Uo9hsjMGwUCm0sQueEaR0GMqGzkwQC+Z9DhisgX+YAlTiI0Wsk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=i4ObsPfz; arc=none smtp.client-ip=209.85.167.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="i4ObsPfz" Received: by mail-lf1-f50.google.com with SMTP id 2adb3069b0e04-533488ffaebso4847558e87.0 for ; Mon, 02 Sep 2024 03:36:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1725273416; x=1725878216; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ui2lv4x9FTPWujQRhFdVeT4msHXJUFxc93RUhnH6Vdg=; b=i4ObsPfzFfllcg68ujk90EGsLWr0W9Szor3efz7N1usMwRxWYO7/gD61qfi5ioO9Bk ALarINfH5EIFYWZaHU/n7l3CbRn14Hb7YUUuuhCYUUy1XG4dVDse2PrPBcipO2FZeBmY eE6i/c4Xyq2m1cU7CKYW/rRYk/vNTAa8ZR8FNHryeme0qaPLowo/DVxGhK1FWvuvB0GS +NHjKOMcBPXXnbfVoGyXpVsD3tjORQO06TuOLKkrPTsIMtGUWUnjpaRnsEHQIevDppfW Mp5x/dPVkClES+Oh7NHeWRoa30OiIFLHMPXEiyR7P7P87/rOupmI5fHhSaqVQeGKe/dD KQ8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725273416; x=1725878216; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ui2lv4x9FTPWujQRhFdVeT4msHXJUFxc93RUhnH6Vdg=; b=hyW61WiuUIflPtbY0y1xC56vUg5xntscJzFfb4WGCFGLTu11NZMELPgdxDc23cud3k iE+MVCb9qLALGFTVgKPVJMY6DWbVcInkToaG1p2PfY7MgFXoI2bERftBn4eDWRReqvmX Nkp99lBDEMa9sUovMYXnkZ+y/qmd2mCBmmAnnT7L3fTpkjjK19LU5KemnWcSCXCXh9VK SZXmY7ncgb/Cu/1A9EyxBz7hY8gb8raf7MHOYNyMRa1eZMfv6rfAzs8RlI+4BZrWe1Ns drwLVza9FLt6stcSPxyW8M7fw4H+LYJtITX/NlWy2kwavR+IMPL8OkVaS1j3WQxf8KTx OGUw== X-Gm-Message-State: AOJu0YwvWsYvGrPT3VVWHCh4ueSFUNDv4thEzUAXWRyPtKZnofi3cmW5 3eHYZqEiNRlIoh0xqBHvslNN6BDRw1ttIhom8ij6+qIKFD/5d/Fx4kRaKWTRF3FoQI1l9ikdV3B r75E= X-Google-Smtp-Source: AGHT+IE7QHfP7LWY+O7Vl0+pPZHA7g1j6i36WnsPlbhD/KPhHNsYvcLbIn25Q3MFVzYi5IGmTTLisg== X-Received: by 2002:a05:6512:1101:b0:533:3fc8:9ac0 with SMTP id 2adb3069b0e04-53546b4248amr5551918e87.34.1725273415673; Mon, 02 Sep 2024 03:36:55 -0700 (PDT) Received: from neptune.local ([2a02:2f0e:3004:6100:e124:ce40:67a4:fcf0]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a89891da22bsm540876766b.182.2024.09.02.03.36.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 03:36:55 -0700 (PDT) From: Alexandru Ardelean To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com, Alexandru Ardelean Subject: [PATCH v2 2/8] iio: adc: ad7606: move 'val' pointer to ad7606_scan_direct() Date: Mon, 2 Sep 2024 13:36:25 +0300 Message-ID: <20240902103638.686039-3-aardelean@baylibre.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240902103638.686039-1-aardelean@baylibre.com> References: <20240902103638.686039-1-aardelean@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The ad7606_scan_direct() function returns 'int', which is fine for 16-bit samples. But when going to 18-bit samples, these need to be implemented as 32-bit (or int) type. In that case when getting samples (which can be negative), we'd get random error codes. So, the easiest thing is to just move the 'val' pointer to 'ad7606_scan_direct()'. This doesn't qualify as a fix, it's just a preparation for 18-bit ADCs (of the AD7606 family). Signed-off-by: Alexandru Ardelean --- drivers/iio/adc/ad7606.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index dba1f28782e4..5049e37f8393 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -138,7 +138,8 @@ static irqreturn_t ad7606_trigger_handler(int irq, void *p) return IRQ_HANDLED; } -static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch) +static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch, + int *val) { struct ad7606_state *st = iio_priv(indio_dev); int ret; @@ -153,7 +154,7 @@ static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch) ret = ad7606_read_samples(st); if (ret == 0) - ret = st->data[ch]; + *val = sign_extend32(st->data[ch], 15); error_ret: gpiod_set_value(st->gpio_convst, 0); @@ -173,10 +174,9 @@ static int ad7606_read_raw(struct iio_dev *indio_dev, switch (m) { case IIO_CHAN_INFO_RAW: iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { - ret = ad7606_scan_direct(indio_dev, chan->address); + ret = ad7606_scan_direct(indio_dev, chan->address, val); if (ret < 0) return ret; - *val = (short) ret; return IIO_VAL_INT; } unreachable(); From patchwork Mon Sep 2 10:36:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 13787016 Received: from mail-ej1-f45.google.com (mail-ej1-f45.google.com [209.85.218.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0BC6F183CA6 for ; Mon, 2 Sep 2024 10:36:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273421; cv=none; b=CyeMrTUGg7I5ooRiQ9cMmSJ178ARhXWy1IM9SVeihsFYh8gCP2/fs3wbKsqrH3ejHWXH5qOtgTfp76jsmrYpFGofDK5B76P+XNW5DtssZ6H2jG83qrdr3P/Hr7g1t0tpkWok/m2rjGtWDbJD8ieubXsrshzjEw50tY4XEDsgn0s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273421; c=relaxed/simple; bh=9wWTe2RhHwvr6CPLWLyUmFQssffTJWZ48+UUgVNgMfA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=i11mxGMtaVm8lHVppIroWTA75Uo91WW2KRqtUZx+uDwufXaOuQ2SjXgAR4R27xVfqfg1GLQyOl6/GCqm/C6OxtpF7KGwKbrsCR2tYT7yJWuLvB/7AJkInAHDP3h0EA2iBSBXEm6OxLtoyrE1Qk7uIBiuDethTm/PepAXXrt1Jzw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=RXaXJMyX; arc=none smtp.client-ip=209.85.218.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="RXaXJMyX" Received: by mail-ej1-f45.google.com with SMTP id a640c23a62f3a-a866cea40c4so465407966b.0 for ; Mon, 02 Sep 2024 03:36:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1725273418; x=1725878218; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WRucj7sLZEUBkFzhvRqpr3JKNs6+16Ez8lks/iAJ3Xo=; b=RXaXJMyXe7Iw3yp8BTlLK1dooJ4J55xsYrQjwaMHWGOUPJkXx8qsFxa3WiqAyUCCad KvUav1LSTP6gRMjoTvS/wRcuNgNe+YSPyamBY3+ODTfDIhIoHpeuquJOWsoQgyqAtkY6 66NsKEPK2638hMBwvOYvsYQwHxSq44TQ5ty7x0m2RbmUs9ujAQgGSosyVq9l81Mrb6Tu h3jajWJMWx+13rCHrPUTSx1Hr+TlV2aTWv6UteAguTOL73H5bfC1joIdw77PvW9+K5vL 8b5tVkIQJTTlM7uLEfEqp54uj3nzDLwrstNGiHSqzxqCMfvpsN8vuRhYoVZBRaeytNlH b6Aw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725273418; x=1725878218; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WRucj7sLZEUBkFzhvRqpr3JKNs6+16Ez8lks/iAJ3Xo=; b=As5hx6Zk3ig1whS/XEMbqEmHAqSzVKUHk8GgslMZpVhxub/nLCe0cuckUk+TfzMJyB L1gjssHE+bt5Y/OtBV1/d36aqet9VUDuPuObVUfwYsipIsuQtAud27K0Q3NewXKJd3c9 6rXJ3A2McuVFaTgsbsY4dVBmceTpD+D4+xEoSctabcuhN0PHlhqUKx/WxupzAi+74zE8 UjWsAT1+Sh44QbaIgTTjnPrXoDfeezVllN7cNkXN3NMJptRLqvVDw0BbbmZEkJXagFxl //lQkwqJ1ylva109pEzIhw9uagxLSCsSW1LNBwHF77diy8xpraTVzphqtzcvCAlYe/ur I/yA== X-Gm-Message-State: AOJu0YyRvZjKAdUjDzxn7ccgYwe7Sq5HYzulHl5PA07XWfUt6ul+v9CN g+Xy5Cxj2nauFFBoHPMQMSbnr7RGSEaVmHfbt5hC/WfqXEcOY6DFK+VyxfB1MwTpSmHZF7duZrM Hcjg= X-Google-Smtp-Source: AGHT+IGs3wVJTHJ7qyp2vbEm9Wg5aV71A/IVWW27uPpd7RSejJp8JXTar1dmQObOgDz9YV8h50xsmg== X-Received: by 2002:a17:907:3fa7:b0:a86:b00a:7a27 with SMTP id a640c23a62f3a-a897fad07f9mr1015773966b.60.1725273417491; Mon, 02 Sep 2024 03:36:57 -0700 (PDT) Received: from neptune.local ([2a02:2f0e:3004:6100:e124:ce40:67a4:fcf0]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a89891da22bsm540876766b.182.2024.09.02.03.36.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 03:36:57 -0700 (PDT) From: Alexandru Ardelean To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com, Alexandru Ardelean Subject: [PATCH v2 3/8] iio: adc: ad7606: split a 'ad7606_sw_mode_setup()' from probe Date: Mon, 2 Sep 2024 13:36:26 +0300 Message-ID: <20240902103638.686039-4-aardelean@baylibre.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240902103638.686039-1-aardelean@baylibre.com> References: <20240902103638.686039-1-aardelean@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This change moves the logic for setting up SW mode (during probe) into it's own function. With the addition of some newer parts, the SW-mode part can get a little more complicated. So it's a bit better to have a separate function for this. Signed-off-by: Alexandru Ardelean --- drivers/iio/adc/ad7606.c | 43 ++++++++++++++++++++++++---------------- 1 file changed, 26 insertions(+), 17 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index 5049e37f8393..b400c9b2519d 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -545,6 +545,29 @@ static const struct iio_trigger_ops ad7606_trigger_ops = { .validate_device = iio_trigger_validate_own_device, }; +static int ad7606_sw_mode_setup(struct iio_dev *indio_dev) +{ + struct ad7606_state *st = iio_priv(indio_dev); + + if (!st->bops->sw_mode_config) + return 0; + + st->sw_mode_en = device_property_present(st->dev, "adi,sw-mode"); + if (!st->sw_mode_en) + return 0; + + indio_dev->info = &ad7606_info_os_range_and_debug; + + /* Scale of 0.076293 is only available in sw mode */ + st->scale_avail = ad7616_sw_scale_avail; + st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail); + + /* After reset, in software mode, ±10 V is set by default */ + memset32(st->range, 2, ARRAY_SIZE(st->range)); + + return st->bops->sw_mode_config(indio_dev); +} + int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, const char *name, unsigned int id, const struct ad7606_bus_ops *bops) @@ -617,23 +640,9 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, st->write_scale = ad7606_write_scale_hw; st->write_os = ad7606_write_os_hw; - if (st->bops->sw_mode_config) - st->sw_mode_en = device_property_present(st->dev, - "adi,sw-mode"); - - if (st->sw_mode_en) { - /* Scale of 0.076293 is only available in sw mode */ - st->scale_avail = ad7616_sw_scale_avail; - st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail); - - /* After reset, in software mode, ±10 V is set by default */ - memset32(st->range, 2, ARRAY_SIZE(st->range)); - indio_dev->info = &ad7606_info_os_range_and_debug; - - ret = st->bops->sw_mode_config(indio_dev); - if (ret < 0) - return ret; - } + ret = ad7606_sw_mode_setup(indio_dev); + if (ret) + return ret; st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name, From patchwork Mon Sep 2 10:36:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 13787017 Received: from mail-ej1-f44.google.com (mail-ej1-f44.google.com [209.85.218.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3663C18455C for ; Mon, 2 Sep 2024 10:37:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273424; cv=none; b=TosvzIGVqbyePEGQ4I0uYFyRZOiljPPBDs+9F2Bat01lCv8fOX+O0Eaq+IFtk9PXhryqjOojOKPLaGq8zSG9BmH9YwoVVtZilsw2lMq4PlemEacAFqj38yVrtFPfkurtkxw2yckzOw4RVkexpM1iN8B7yr9D2dF0qqFUokBYkw8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273424; c=relaxed/simple; bh=ZK9Z1/Q4filbKX1kKWRghKSgUBwXpAJI26eeyznAt94=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=UlQwqDP6Vc06ILskYEZ9VWIcLtoh1QAgeSxUMI2/I/jV2OqfcrdESnNrG99BigzH0JkMswkHI0/Wd2fTtmCeUVNjU7Z9YlzNTMHdmRMlS4AEBVLwPTylMoMK5J+D1PP82/rbHTCuFvuIqHbHDMfQKL4i3PVn9O6g34QIwyYttv4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=yBJBm+Mu; arc=none smtp.client-ip=209.85.218.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="yBJBm+Mu" Received: by mail-ej1-f44.google.com with SMTP id a640c23a62f3a-a8682bb5e79so500667766b.2 for ; Mon, 02 Sep 2024 03:37:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1725273420; x=1725878220; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OMjsY+V8C+xpLeayM52S92PbmAJB3Osj5meZbpqVaZk=; b=yBJBm+MuyMkQC2qgckrBAiNklLctI6pYBOEcHYMJdpRYyVl0oMq02z2OINDjqhL3qM 0RHAtQdLgCN9Ph1q2sIQAj3sNTE2ocyiTjnfiBEs8bPeDWSpfjImF6ArY1mEjA77hV8i Y+o8BPNMcHHzjLFBtxyNO0COFhPfQmuqZ5MwG6WYIugoLYC2RI7KCNSs1c84YH/N1rdm ArSKtrtF5h0YURQEiiBYz+OJvHjPTANQprgHbBMmfMtvqlgWsvjhhQr1sz29LZNxRBsy fmzxUDokN9jMbgFxBQ/caC+BW5DjOe1owZqTJypTR+nvGcrrBbWa6KZ/PXQuLeRp4ld7 Ox7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725273420; x=1725878220; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OMjsY+V8C+xpLeayM52S92PbmAJB3Osj5meZbpqVaZk=; b=fBeUBvs/R8ZQxLwEKqcmmwtQOiamVEv4AG3t6tOWdvj/U/odPnnBypKuPiln2+5jeQ YSdk3NzPcBmxnljvH9IijMv1tU579D9SVJiW/pW6u4+AnAiQEcIM2YsFs5lgZU9OG1+V 0x8INSnUQGUQJoTLF6PTy/qI9v7ixwoEKrz8FcOjP8e5E3QPd1k5Jn1Oe19O/kRkDa/R YtF5+6H2nh/rdNdx89ogsZW2Pl70v3qnQ9pUD8eLFSByNJwURoIRiwfYtWl0lehWvg1W 0/lTMu9vJ+ae4yJezNMfp+ZoEFs4fMc0/101ICD6A9d/LjBxQ0YqJXzZ+w+vvqrG4N8D 5KIg== X-Gm-Message-State: AOJu0YztJQQmBybStyBfxR+OqkMAVLm1XrAH+TVGiMKgp+IohcTdwJfh qyqCYgyMNY3GjnZfHgG89+w9EaPmxOAU9vgvv/1OWa49UXGVFhOuVf48D4igfk7vuQMi+jYDPl2 OGGs= X-Google-Smtp-Source: AGHT+IHbARjgXwn7U30aU7FiHDg9/USz40lejw6I66iDFr8Nx2RdLSAgcWmS+PdSGk/Gcyk6KOUVsg== X-Received: by 2002:a17:907:744:b0:a86:85eb:bdd1 with SMTP id a640c23a62f3a-a89fae10b76mr269890566b.31.1725273419663; Mon, 02 Sep 2024 03:36:59 -0700 (PDT) Received: from neptune.local ([2a02:2f0e:3004:6100:e124:ce40:67a4:fcf0]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a89891da22bsm540876766b.182.2024.09.02.03.36.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 03:36:59 -0700 (PDT) From: Alexandru Ardelean To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com, Alexandru Ardelean Subject: [PATCH v2 4/8] iio: adc: ad7606: wrap channel ranges & scales into struct Date: Mon, 2 Sep 2024 13:36:27 +0300 Message-ID: <20240902103638.686039-5-aardelean@baylibre.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240902103638.686039-1-aardelean@baylibre.com> References: <20240902103638.686039-1-aardelean@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 With the addition of AD7606C-16,18 which have differential & bipolar channels (and ranges), which can vary from channel to channel, we'll need to keep more information about each channel range. To do that, we'll add a 'struct ad7606_chan_scale' type to hold just configuration for each channel. This includes the scales per channel (which can be different with AD7606C-16,18), as well as the range for each channel. This driver was already keeping the range value for each channel before, and since this is couple with the scales, it also makes sense to put them in the same struct. Signed-off-by: Alexandru Ardelean --- drivers/iio/adc/ad7606.c | 37 +++++++++++++++++++++++++------------ drivers/iio/adc/ad7606.h | 22 ++++++++++++++++------ 2 files changed, 41 insertions(+), 18 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index b400c9b2519d..2554a4a4a9c0 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -170,6 +170,7 @@ static int ad7606_read_raw(struct iio_dev *indio_dev, { int ret, ch = 0; struct ad7606_state *st = iio_priv(indio_dev); + struct ad7606_chan_scale *cs; switch (m) { case IIO_CHAN_INFO_RAW: @@ -183,8 +184,9 @@ static int ad7606_read_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_SCALE: if (st->sw_mode_en) ch = chan->address; + cs = &st->chan_scales[ch]; *val = 0; - *val2 = st->scale_avail[st->range[ch]]; + *val2 = cs->scale_avail[cs->range]; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: *val = st->oversampling; @@ -214,8 +216,9 @@ static ssize_t in_voltage_scale_available_show(struct device *dev, { struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7606_state *st = iio_priv(indio_dev); + struct ad7606_chan_scale *cs = &st->chan_scales[0]; - return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true); + return ad7606_show_avail(buf, cs->scale_avail, cs->num_scales, true); } static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0); @@ -253,19 +256,21 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, long mask) { struct ad7606_state *st = iio_priv(indio_dev); + struct ad7606_chan_scale *cs; int i, ret, ch = 0; guard(mutex)(&st->lock); switch (mask) { case IIO_CHAN_INFO_SCALE: - i = find_closest(val2, st->scale_avail, st->num_scales); if (st->sw_mode_en) ch = chan->address; + cs = &st->chan_scales[ch]; + i = find_closest(val2, cs->scale_avail, cs->num_scales); ret = st->write_scale(indio_dev, ch, i); if (ret < 0) return ret; - st->range[ch] = i; + cs->range = i; return 0; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: @@ -547,7 +552,9 @@ static const struct iio_trigger_ops ad7606_trigger_ops = { static int ad7606_sw_mode_setup(struct iio_dev *indio_dev) { + unsigned int num_channels = indio_dev->num_channels - 1; struct ad7606_state *st = iio_priv(indio_dev); + int ch; if (!st->bops->sw_mode_config) return 0; @@ -559,11 +566,14 @@ static int ad7606_sw_mode_setup(struct iio_dev *indio_dev) indio_dev->info = &ad7606_info_os_range_and_debug; /* Scale of 0.076293 is only available in sw mode */ - st->scale_avail = ad7616_sw_scale_avail; - st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail); - /* After reset, in software mode, ±10 V is set by default */ - memset32(st->range, 2, ARRAY_SIZE(st->range)); + for (ch = 0; ch < num_channels; ch++) { + struct ad7606_chan_scale *cs = &st->chan_scales[ch]; + + cs->scale_avail = ad7616_sw_scale_avail; + cs->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail); + cs->range = 2; + } return st->bops->sw_mode_config(indio_dev); } @@ -572,6 +582,7 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, const char *name, unsigned int id, const struct ad7606_bus_ops *bops) { + struct ad7606_chan_scale *cs; struct ad7606_state *st; int ret; struct iio_dev *indio_dev; @@ -588,10 +599,12 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, st->bops = bops; st->base_address = base_address; /* tied to logic low, analog input range is +/- 5V */ - st->range[0] = 0; st->oversampling = 1; - st->scale_avail = ad7606_scale_avail; - st->num_scales = ARRAY_SIZE(ad7606_scale_avail); + + cs = &st->chan_scales[0]; + cs->range = 0; + cs->scale_avail = ad7606_scale_avail; + cs->num_scales = ARRAY_SIZE(ad7606_scale_avail); ret = devm_regulator_get_enable(dev, "avcc"); if (ret) @@ -698,7 +711,7 @@ static int ad7606_resume(struct device *dev) struct ad7606_state *st = iio_priv(indio_dev); if (st->gpio_standby) { - gpiod_set_value(st->gpio_range, st->range[0]); + gpiod_set_value(st->gpio_range, st->chan_scales[0].range); gpiod_set_value(st->gpio_standby, 1); ad7606_reset(st); } diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 771121350f98..afe6a4030e0e 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -8,6 +8,8 @@ #ifndef IIO_ADC_AD7606_H_ #define IIO_ADC_AD7606_H_ +#define AD760X_MAX_CHANNELS 16 + #define AD760X_CHANNEL(num, mask_sep, mask_type, mask_all, bits) { \ .type = IIO_VOLTAGE, \ .indexed = 1, \ @@ -60,17 +62,27 @@ struct ad7606_chip_info { unsigned long init_delay_ms; }; +/** + * struct ad7606_chan_scale - channel scale configuration + * @scale_avail pointer to the array which stores the available scales + * @num_scales number of elements stored in the scale_avail array + * @range voltage range selection, selects which scale to apply + */ +struct ad7606_chan_scale { + const unsigned int *scale_avail; + unsigned int num_scales; + unsigned int range; +}; + /** * struct ad7606_state - driver instance specific data * @dev pointer to kernel device * @chip_info entry in the table of chips that describes this device * @bops bus operations (SPI or parallel) - * @range voltage range selection, selects which scale to apply + * @chan_scales scale configuration for channels * @oversampling oversampling selection * @base_address address from where to read data in parallel operation * @sw_mode_en software mode enabled - * @scale_avail pointer to the array which stores the available scales - * @num_scales number of elements stored in the scale_avail array * @oversampling_avail pointer to the array which stores the available * oversampling ratios. * @num_os_ratios number of elements stored in oversampling_avail array @@ -94,12 +106,10 @@ struct ad7606_state { struct device *dev; const struct ad7606_chip_info *chip_info; const struct ad7606_bus_ops *bops; - unsigned int range[16]; + struct ad7606_chan_scale chan_scales[AD760X_MAX_CHANNELS]; unsigned int oversampling; void __iomem *base_address; bool sw_mode_en; - const unsigned int *scale_avail; - unsigned int num_scales; const unsigned int *oversampling_avail; unsigned int num_os_ratios; int (*write_scale)(struct iio_dev *indio_dev, int ch, int val); From patchwork Mon Sep 2 10:36:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 13787018 Received: from mail-lf1-f48.google.com (mail-lf1-f48.google.com [209.85.167.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C024F185B75 for ; Mon, 2 Sep 2024 10:37:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273426; cv=none; b=WKUS+JZ3aTjn5AurUtqaDSGIM05JuxeX8N4ULAZ+MmQdll/VjiA81QWlrGrbFjgiYAvMX7WlxHRgqMtflbgA3cetqLv+c9UFjFbPSYeFyFtlPY8vwD6Qnrn50kNZC4iPBaNx4xqJoOvBPSVutcEjkgDqC5ofg2pTnHT5D6Q2o1c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273426; c=relaxed/simple; bh=btxuTAxTeAZgB4tvvXLZFp9Dg4BseIOKa6AY2g/Ixo8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=slAjoUUcDz2Nk9tlhXJrXtXg0xXFmFDARO6MtHfzMABJ+BX0+fhMx6fHz810q4+EL+KRx7kB6XEDTtQ7tTHQZowDcpJtn0gP5g0QZj7dxOFWsP8DHGUy79M8mW54l8/5A8SKB5vWDErSRHcUXwhYDYsZnBigFB3FcxjSXHNI71o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=COUEJkvb; arc=none smtp.client-ip=209.85.167.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="COUEJkvb" Received: by mail-lf1-f48.google.com with SMTP id 2adb3069b0e04-52f01b8738dso2830759e87.1 for ; Mon, 02 Sep 2024 03:37:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1725273422; x=1725878222; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mZzd833O0t7KStKqRf9EBVDiLjwq0SpyV5fk5sEtf8M=; b=COUEJkvbAHgNq8WvIoR57AwJh8YRkAs5oZsDoLivcAAPe00XDoBevLfQF36xK74fJ7 6yhp23KJ735F08DvvofHtFPa426s9fbTSahEbi7dLNq+HpIAC3ncd8RitcLo5PCqonkH 68axU7PvJOLEOzeLca2KXmozqqkGqG1RbYLnPhhJWL9PB1RAzjPQGlW+n2k0ocW/nNfh mFpm1bNatLY1BXVYJjI5Oo/sbe99PqJPbFmcHBPux/D0Trqmqpunz7gqrto3IJ/dYcx5 cZ007VeOLZCAYHNZ1b8gd4G0jlToXl2Dr+kakbt2BWAHsZ4F7Bclx6D7SJDQjZBy9Gmr dZ7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725273422; x=1725878222; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mZzd833O0t7KStKqRf9EBVDiLjwq0SpyV5fk5sEtf8M=; b=nGH9cUOmaLzRkp76ADTRVzBXHu1Ar6rFpSFe6XMqv21+z5ZTInMUa5Yyoc+ostTOGV q+PaWKBL2sb4DWC2MIEK7py1d8szCZZOYhlW7cVgUwVoUqkjwWX48nYIl0G056YPQmQW fCP/nqPSaOti498Azbn7itM3emVfjQswB9x9qbrhX3M+p2T5tRLU5AJmMAz6EIOEzguH XJonu9r0IFwaoyk6jqLM8kYbCrGfZ5rv+LunwZmejRnPONt4HhjZ11I2zEvsrLlxXRjb Ha0L2X0iGY9Axy7nqiUFuSQeRDv3JW3FUwgOk+0+4I1EZLCfg9z4gLdJ5GzlVX9cFzRD 9wrw== X-Gm-Message-State: AOJu0YzZbaOMlZKV2wiKTPFCQcvJElrXbjS/a9qLVaXf8jtWKD93XuN6 bwMT1fp4bbD713Fq0MbY1Ab7Q8ERUuta++KRm7W3fwmoTEWm/iTJfdt8z5aNDftZtNGPmZ7Zks0 Rv8k= X-Google-Smtp-Source: AGHT+IFCHq1Icpu9MblR1d0uJ6UxOi5cXVDdP0ogShCJeXvsF2WzkCaYU78T4WJqP7odmDbxGIdcPw== X-Received: by 2002:a05:6512:3510:b0:535:5e76:a590 with SMTP id 2adb3069b0e04-5355e76b366mr70790e87.1.1725273421625; Mon, 02 Sep 2024 03:37:01 -0700 (PDT) Received: from neptune.local ([2a02:2f0e:3004:6100:e124:ce40:67a4:fcf0]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a89891da22bsm540876766b.182.2024.09.02.03.36.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 03:37:01 -0700 (PDT) From: Alexandru Ardelean To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com, Alexandru Ardelean Subject: [PATCH v2 5/8] iio: adc: ad7606: rework available attributes for SW channels Date: Mon, 2 Sep 2024 13:36:28 +0300 Message-ID: <20240902103638.686039-6-aardelean@baylibre.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240902103638.686039-1-aardelean@baylibre.com> References: <20240902103638.686039-1-aardelean@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 For SW mode, the oversampling and scales attributes are always present. So, they can be implemented via a 'read_avail' hook in iio_info. For HW mode, it's a bit tricky, as these attributes get assigned based on GPIO definitions. So, for SW mode, we define a separate AD7606_SW_CHANNEL() macro, and use that for the SW channels. And 'ad7606_info_os_range_and_debug' can be renamed to 'ad7606_info_sw_mode' as it is only used for SW mode. For the 'read_avail' hook, we'll need to allocate the SW scales, so that they are just returned userspace without any extra processing. The allocation will happen when then ad7606_state struct is allocated. The oversampling available parameters don't need any extra processing; they can just be passed back to userspace (as they are). Signed-off-by: Alexandru Ardelean --- drivers/iio/adc/ad7606.c | 63 ++++++++++++++++++++++++++++++++++++---- drivers/iio/adc/ad7606.h | 31 +++++++++++++++++--- 2 files changed, 85 insertions(+), 9 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index 2554a4a4a9c0..4c3fbb28f790 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -507,6 +507,37 @@ static int ad7606_buffer_predisable(struct iio_dev *indio_dev) return 0; } +static int ad7606_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long info) +{ + struct ad7606_state *st = iio_priv(indio_dev); + struct ad7606_chan_scale *cs; + unsigned int ch = 0; + + switch (info) { + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + *vals = st->oversampling_avail; + *length = st->num_os_ratios; + *type = IIO_VAL_INT; + + return IIO_AVAIL_LIST; + + case IIO_CHAN_INFO_SCALE: + if (st->sw_mode_en) + ch = chan->address; + + cs = &st->chan_scales[ch]; + *vals = cs->scale_avail_show; + *length = cs->num_scales * 2; + *type = IIO_VAL_INT_PLUS_MICRO; + + return IIO_AVAIL_LIST; + } + return -EINVAL; +} + static const struct iio_buffer_setup_ops ad7606_buffer_ops = { .postenable = &ad7606_buffer_postenable, .predisable = &ad7606_buffer_predisable, @@ -524,11 +555,11 @@ static const struct iio_info ad7606_info_os_and_range = { .validate_trigger = &ad7606_validate_trigger, }; -static const struct iio_info ad7606_info_os_range_and_debug = { +static const struct iio_info ad7606_info_sw_mode = { .read_raw = &ad7606_read_raw, .write_raw = &ad7606_write_raw, + .read_avail = &ad7606_read_avail, .debugfs_reg_access = &ad7606_reg_access, - .attrs = &ad7606_attribute_group_os_and_range, .validate_trigger = &ad7606_validate_trigger, }; @@ -554,7 +585,7 @@ static int ad7606_sw_mode_setup(struct iio_dev *indio_dev) { unsigned int num_channels = indio_dev->num_channels - 1; struct ad7606_state *st = iio_priv(indio_dev); - int ch; + int ret, ch; if (!st->bops->sw_mode_config) return 0; @@ -563,7 +594,7 @@ static int ad7606_sw_mode_setup(struct iio_dev *indio_dev) if (!st->sw_mode_en) return 0; - indio_dev->info = &ad7606_info_os_range_and_debug; + indio_dev->info = &ad7606_info_sw_mode; /* Scale of 0.076293 is only available in sw mode */ /* After reset, in software mode, ±10 V is set by default */ @@ -575,7 +606,29 @@ static int ad7606_sw_mode_setup(struct iio_dev *indio_dev) cs->range = 2; } - return st->bops->sw_mode_config(indio_dev); + ret = st->bops->sw_mode_config(indio_dev); + if (ret) + return ret; + + for (ch = 0; ch < num_channels; ch++) { + struct ad7606_chan_scale *cs = &st->chan_scales[ch]; + int i; + + cs = &st->chan_scales[ch]; + + if (cs->num_scales * 2 > AD760X_MAX_SCALE_SHOW) { + dev_err(st->dev, "Driver error: scale range too big"); + return -ERANGE; + } + + /* Generate a scale_avail list for showing to userspace */ + for (i = 0; i < cs->num_scales; i++) { + cs->scale_avail_show[i * 2] = 0; + cs->scale_avail_show[i * 2 + 1] = cs->scale_avail[i]; + } + } + + return 0; } int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index afe6a4030e0e..1cc257374ba7 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -27,6 +27,29 @@ }, \ } +#define AD7606_SW_CHANNEL(num, bits) { \ + .type = IIO_VOLTAGE, \ + .indexed = 1, \ + .channel = num, \ + .address = num, \ + .info_mask_separate = \ + BIT(IIO_CHAN_INFO_RAW) | \ + BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_separate_available = \ + BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_shared_by_all = \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .info_mask_shared_by_all_available = \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .scan_index = num, \ + .scan_type = { \ + .sign = 's', \ + .realbits = (bits), \ + .storagebits = (bits), \ + .endianness = IIO_CPU, \ + }, \ +} + #define AD7605_CHANNEL(num) \ AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \ BIT(IIO_CHAN_INFO_SCALE), 0, 16) @@ -36,10 +59,6 @@ BIT(IIO_CHAN_INFO_SCALE), \ BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), bits) -#define AD7606_SW_CHANNEL(num, bits) \ - AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),\ - 0, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), bits) - #define AD7616_CHANNEL(num) AD7606_SW_CHANNEL(num, 16) /** @@ -65,11 +84,15 @@ struct ad7606_chip_info { /** * struct ad7606_chan_scale - channel scale configuration * @scale_avail pointer to the array which stores the available scales + * @scale_avail_show a duplicate of 'scale_avail' which is readily formatted + * such that it can be read via the 'read_avail' hook * @num_scales number of elements stored in the scale_avail array * @range voltage range selection, selects which scale to apply */ struct ad7606_chan_scale { +#define AD760X_MAX_SCALE_SHOW (AD760X_MAX_CHANNELS * 2) const unsigned int *scale_avail; + int scale_avail_show[AD760X_MAX_SCALE_SHOW]; unsigned int num_scales; unsigned int range; }; From patchwork Mon Sep 2 10:36:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 13787019 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 966C61D2790 for ; Mon, 2 Sep 2024 10:37:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273430; cv=none; b=b5eAHs9nAxmLgLdIN+pwHiGgszy6TD5MNJqjc/dzTMGYJBrCfgzBdFzN5KEE85zPumMeZAsB+w+EdzMzVVwVsoRmesd9X5UKQt2BJJ3SN4cxkhoNGqES619+TWsK+oLU98bRtGjoRr3oI9fUDnrEML+It9UPU1uOEjHR49obZdo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273430; c=relaxed/simple; bh=0B4OtPaPq3djfnjasTB0YK8oEPN0Criv7QLDnmRZ0RU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UnR/EPCPOdQ65k9B0WMo8bMW1ZGemImxslOrBCdUCh2aBqRTP1EZosizXoBOUrBTzw3oUF8bdRzccePkDjaC9TyIyE6luznAOfuCa9SdvRpQCSZ7w4eQ/sOLUX9NSPs6+Hk/0XPv3jKadeoU0+pOKwMGf2GXVi0YsL/FouKx1mI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=XeNMGh6k; arc=none smtp.client-ip=209.85.221.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="XeNMGh6k" Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-374ba74e9b6so1941486f8f.0 for ; Mon, 02 Sep 2024 03:37:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1725273424; x=1725878224; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=A/kzmA5I23xNWWAz1AzWxwFHc2DJG5+/Mnn/xB7FK5c=; b=XeNMGh6kKOKCiPplTwWMmXd0+k87CTnwEirR5NKx5f1ZvQn6uSIHWIhfVRkakQoLCC qTUPdymix1cbfm6ykPxFYAA5YBINw4WwgpIjrgFbzrERaxq5X4+h+kJNNyf06AiJsDQz PlDQTe87127K8Cmt1td5qGDwBCc9dsJGlR7EVk7kDqcuRfOMHGT4tOUFEfLE2NkmU/vw as++E7J5qKQ81sJZ6dA1OX9ZtancMmGVnHLQB4UU5FbDIijyd6aMwuMPCUssWDrSu/rL zfpPaMNGOZGSBKFeARcQDfYB+vyFcbqXjRvY36do3+qFJJBjmkFU5aKLg/GYtoG2JMfD 0BgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725273424; x=1725878224; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=A/kzmA5I23xNWWAz1AzWxwFHc2DJG5+/Mnn/xB7FK5c=; b=qa70mp5KAct2kuF5y49mJF2eY3tUsPVAdTRlpVxzSA0Q65yd1UhatT5guvcjmSuNwr uYX9G3k1IjKHDHF7Z3XZ3Rdqse5u75/Wa31Ul2GqICXr+y9IMvVYtHHP61C3r9602p42 1U7KpGDZe5gTcvYvFpXeEvJUXKVVkosAPt1lrJ/iPkaUwHF8wNCXYdSZU7XqU12qhv94 goy9ircLLo6G0QJP7ELOfmQug2ISNgMM48a+XHDARV272JxNAMwZku9LaphJXy8QRPFP l47WLKHGz51QIo08M+VEdK5wBcYJXEV1DcHVnkDODWK6tNc44hpoM460tS6zWA6yBVQY iAcQ== X-Gm-Message-State: AOJu0Yyq3p3/Nq5YU+BizzCMtjq0Lk/zkvQyGSqRxlYYLNYwXQ4ge1yz 09wnqBvfVksfpmBIEc5x4eMaDpUopU4wHaSijkGTNRc/ke5I3ayp9oauAYHSlnwBiTYk8l9uJe2 nRrQ= X-Google-Smtp-Source: AGHT+IEBx7IVtTTuLOdUKgwPX+nVjMSPPmQhbounNSfyRo5Pfedonxjb2TvP24fJ6LlPPgr/vZcWww== X-Received: by 2002:a5d:6485:0:b0:374:d254:61b3 with SMTP id ffacd0b85a97d-374d2546231mr130281f8f.14.1725273423868; Mon, 02 Sep 2024 03:37:03 -0700 (PDT) Received: from neptune.local ([2a02:2f0e:3004:6100:e124:ce40:67a4:fcf0]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a89891da22bsm540876766b.182.2024.09.02.03.37.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 03:37:03 -0700 (PDT) From: Alexandru Ardelean To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com, Alexandru Ardelean Subject: [PATCH v2 6/8] dt-bindings: iio: adc: document diff-channels corner case for some ADCs Date: Mon, 2 Sep 2024 13:36:29 +0300 Message-ID: <20240902103638.686039-7-aardelean@baylibre.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240902103638.686039-1-aardelean@baylibre.com> References: <20240902103638.686039-1-aardelean@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some ADCs have channels with negative and positive inputs, which can be used to measure differential voltage levels. These inputs/pins are dedicated (to the given channel) and cannot be muxed as with other ADCs. For those types of setups, the 'diff-channels' property can be specified to be used with the channel number (or reg property) for both negative and positive inputs/pins. Signed-off-by: Alexandru Ardelean --- Documentation/devicetree/bindings/iio/adc/adc.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adc.yaml b/Documentation/devicetree/bindings/iio/adc/adc.yaml index 8e7835cf36fd..9b7a8e149639 100644 --- a/Documentation/devicetree/bindings/iio/adc/adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adc.yaml @@ -37,6 +37,10 @@ properties: to both the positive and negative inputs of a differential ADC. The first value specifies the positive input pin, the second specifies the negative input pin. + There are also some ADCs, where the differential channel has dedicated + positive and negative inputs which can be used to measure differential + voltage levels. For those setups, this property can be configured with + the the 'reg' property (i.e. diff-channels = ). single-channel: $ref: /schemas/types.yaml#/definitions/uint32 From patchwork Mon Sep 2 10:36:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 13787020 Received: from mail-lf1-f42.google.com (mail-lf1-f42.google.com [209.85.167.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A14511D2794 for ; Mon, 2 Sep 2024 10:37:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273430; cv=none; b=UfCHlHcC0nRYM8UCpnt5JGgBmxZQrVpK5nJT7t15DJ04sDWGUagB13FQD2W/rEyrWOMzFwN26Wo9N7e4buWJgR0xF+A+11PBSpuXcalfDdlefEfydz7xSYXQHKK6YhqzzBnG5S1ITaHp5nLEOG/RIIjssVJOXG4+QIGryeCnl6g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273430; c=relaxed/simple; bh=+xcwvwnOEos+K8uKWPlM5UqP6pRbIIK5EdikTy64FQ0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rjKV0I89zgBDRJKyGI6G1L3SOi2K1JdxbTRdDTwo9set5lNdiEOQ2hF55e+CtV3f7cl0f1yPihCgsGu5b6ynh+W6UOq1b5MhDjzgJPzaxGHyTM3ii7EtKX7NU4Rgl3t3cvylxaNJdaVYzflnNSLlrhVAylceAH+aQXMUe99/M5c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=fEK1B1K5; arc=none smtp.client-ip=209.85.167.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="fEK1B1K5" Received: by mail-lf1-f42.google.com with SMTP id 2adb3069b0e04-53345604960so4524821e87.3 for ; Mon, 02 Sep 2024 03:37:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1725273426; x=1725878226; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Xj6lOb0yjAx7sj403+lOC5LTgqreAMB1j3nLGDxealA=; b=fEK1B1K5nEIs3Mnr5RgbvWmFk0PKayS9lPXB8Djy56RxWoucyv9rL9bOZy95QS+HH2 E88tK7Sq+yjHNVfv/qowhu2Y0yQQJIJGnIZhyZQLSVC20rfRf8bl3/wH7K1ArW3MC8/T H8EzRGjJ4cCxbxR0Hk2rgk12rC/wbBT4H8tIZojHunNST/dRpdnuMMoboX9988axRufl ug3zaRLKOsLaFyfEnub5myTFOZuFhUw6HImuPnv/ginBYWlYB9kEfcCz77WG4eMNkDLg tcCkHGTvxv73X4molRt5QBtIiClx6VPw1wOVD6ID3E0Yl951ILi5B541GRrfRMuiFxSn NPRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725273426; x=1725878226; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Xj6lOb0yjAx7sj403+lOC5LTgqreAMB1j3nLGDxealA=; b=CbQusD3Xd4OW4yJxNhgCXFzwLH/l+Gqtmt6qh0qxnqNaHaKL7cRQ4ZtzXHEJiAzO9M 1/Tr8cU+yJvSOwSdfxxoKfoD/WVOcGh8HFtOGEsGIF+44UDBjBGutWNsMg3FCcVeuSPd GPyP3BAqmtc0AREs1QX4Tn43IJSNZwmDmjke/odiG1sj7nzi/m0zcSZTjRiXZD6KFjpf xB/KC0fESBPUNMidPjLp0irj/VdBznyRAEmdAerULj9poxvKg58s9wfzxeiO1Jl01sP6 HWuRd2W5Yy1+mvTpig36LbSHYORFCVjebAWFMgIkjzXJmS0MkONDwVz1w4EDvPAXBUMK Azzw== X-Gm-Message-State: AOJu0YyZHLowEPgJ5Yuxo80ndJMNBrpwzQXii6Iex5xTab0BeSGg02G6 HU6OEBz0yV7LsrajbSBlffrL5UZ2Ol/w6GKkEpFgxsAqA+kCVM1POtPbhbrXyscX9Filq/v0IU3 EV1c= X-Google-Smtp-Source: AGHT+IE2DvfTc9clWhRcBzgZkoCye+ZIyZvHBSUEKE3j6/foUVQ0qS7Ex9pf2WIZFfDqtljDp9VoMA== X-Received: by 2002:a05:6512:3f01:b0:52c:c032:538d with SMTP id 2adb3069b0e04-53546b2a7a1mr6980668e87.27.1725273425775; Mon, 02 Sep 2024 03:37:05 -0700 (PDT) Received: from neptune.local ([2a02:2f0e:3004:6100:e124:ce40:67a4:fcf0]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a89891da22bsm540876766b.182.2024.09.02.03.37.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 03:37:05 -0700 (PDT) From: Alexandru Ardelean To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com, Alexandru Ardelean Subject: [PATCH v2 7/8] dt-bindings: iio: adc: add adi,ad7606c-{16,18} compatible strings Date: Mon, 2 Sep 2024 13:36:30 +0300 Message-ID: <20240902103638.686039-8-aardelean@baylibre.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240902103638.686039-1-aardelean@baylibre.com> References: <20240902103638.686039-1-aardelean@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The driver will support the AD7606C-16 and AD7606C-18. This change adds the compatible strings for these devices. The AD7606C-16,18 channels also support these (individually configurable) types of channels: - bipolar single-ended - unipolar single-ended - bipolar differential Signed-off-by: Alexandru Ardelean --- .../bindings/iio/adc/adi,ad7606.yaml | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml index 69408cae3db9..a1b8bfff76cb 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml @@ -14,6 +14,8 @@ description: | https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-16.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-18.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf properties: @@ -24,6 +26,8 @@ properties: - adi,ad7606-6 - adi,ad7606-8 # Referred to as AD7606 (without -8) in the datasheet - adi,ad7606b + - adi,ad7606c-16 + - adi,ad7606c-18 - adi,ad7616 reg: @@ -114,6 +118,25 @@ properties: assumed that the pins are hardwired to VDD. type: boolean +patternProperties: + "^channel@([0-7])$": + type: object + $ref: adc.yaml + unevaluatedProperties: false + + properties: + reg: + description: The channel number. + minimum: 0 + maximum: 7 + + diff-channels: true + + bipolar: true + + required: + - reg + required: - compatible - reg @@ -202,4 +225,44 @@ examples: standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>; }; }; + - | + #include + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7606c-18"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpol; + spi-cpha; + + avcc-supply = <&adc_vref>; + vdrive-supply = <&vdd_supply>; + + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio>; + + adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; + + adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>; + adi,first-data-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>; + + adi,sw-mode; + + channel@1 { + reg = <1>; + diff-channel; + }; + + channel@3 { + reg = <3>; + bipolar; + }; + }; + }; ... From patchwork Mon Sep 2 10:36:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 13787021 Received: from mail-lf1-f45.google.com (mail-lf1-f45.google.com [209.85.167.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8FCCD1D3628 for ; Mon, 2 Sep 2024 10:37:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273432; cv=none; b=YbGk+qrb4SCe4yicNSs6OZGDnQvfT63nxR9f2C/iydm+8dzMCPCHjiUDFzdHfvWFZNblNgNIau3a5PXpFYjTmarl+AU1A+RVu8kMfMX5BhjnuVRjvJaQmhdzs/uUJP3D8haOyBwFxuEXpMBYqZhydNfT9TvGm/rxIXXe/RQdBnI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725273432; c=relaxed/simple; bh=6p6FOGpX6uqW4M2PkCc6c9coEL+O43QEUugHVoIhm3s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=c1Gu7QrFkY/zsiaNPxVF+nS+cNCM+kyVWe4FHakxZvV2BYQG8g+uj6CtFZdbGAjbWNo9K/DJafLoDSkrPCct3lzPeLb1ent2pGkWc0U3lRv/ZAUXKHWTJzjKf9KEg9tYT6a0O/t26B37eIaViiehmN4/Daq+rRWoe7Ma8lwwnHI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=gkWkKtlz; arc=none smtp.client-ip=209.85.167.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="gkWkKtlz" Received: by mail-lf1-f45.google.com with SMTP id 2adb3069b0e04-533488ffaf7so5527952e87.0 for ; Mon, 02 Sep 2024 03:37:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1725273428; x=1725878228; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2jeeXqaSzseqvKVfLM9ZsyRmU/0rFAs0pAHit46xeQ4=; b=gkWkKtlzTBDvNYUKcaBpq7zT99nT7joJF1kAy5NrJzudRCA7ZKGRdtBf5qA/ZLcsvh BE1rZh3sD3bvBU5U2ZMSY27XuEgk9Ir9yAqEDOaP6tsvV/unGvQgSLS+NHuTyNk/BrmK Xl98xTbAw/vdHahGUi6sazhtTiuDnIZGVBBiN8rdRUykFGOh2cCbmnGe2HXwKB18nUre ey4sGFGMv0ZVeJTzShKkmnt43+0E3iBPS8z4A5WogzZahS6qra4fDqEUw1YeY87NHPlY 8Xfa5X37JNZoX9qpaGTYJjG8DQ77zsmobtSl63tOZl2j4+9f4hn6XpIxD2W90CFGd5k9 m8zg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725273428; x=1725878228; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2jeeXqaSzseqvKVfLM9ZsyRmU/0rFAs0pAHit46xeQ4=; b=pl+KNqA+3JBkZv1lMM9VZgbKyrR/GDcDGwha7pPEQN3TI+0cPSvDYytdpYShL9XutV 8o8e5FQf0lyGqkbmsHs3FdPTgXJ+MmmfxBi3zImJ2Nx9wTVVrzJat95cDD84HUxfDJ0c ifdAGrgv9ZyoRl6zsNxVAQW0qL6HLHUy5EhhtvfZ2z8A3FDOWYpuG0W1iXPJCAY/jEBc RdnK0M3kX3rh6/1IDnWUymrtl9Cw00ottJAtUPypPgrOjgZ1UQDo54VCUC8zck+lXXrQ DlOlFID99in94QEvCQxAM9JjlkxKrH4kGiMGQodqkPhKqhGtAGbmMgeuzijKvsiZcHgS mp2w== X-Gm-Message-State: AOJu0YyD5pUyDbC9I/bwppkcafclnpQFFSUJsddNoNtO+MuGKQ0Ocvkl u6o/gWTuadkFfm4CImOdGDqgQh/fUHABsbaauvV2yEVAjgVmsGmBRbqB7bSqrzZzIRf0LkJL5+R G6c8= X-Google-Smtp-Source: AGHT+IE7/TkfBXh8TnrG/+rqvpXfCwLKdPR9AP0AqwF1clYuNsZwLff4ijW5J26kWUjlTynIoih9Wg== X-Received: by 2002:a05:6512:1251:b0:52b:9c8a:734f with SMTP id 2adb3069b0e04-53546bb2b1fmr7298770e87.50.1725273427733; Mon, 02 Sep 2024 03:37:07 -0700 (PDT) Received: from neptune.local ([2a02:2f0e:3004:6100:e124:ce40:67a4:fcf0]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a89891da22bsm540876766b.182.2024.09.02.03.37.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 03:37:07 -0700 (PDT) From: Alexandru Ardelean To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com, Alexandru Ardelean Subject: [PATCH v2 8/8] iio: adc: ad7606: add support for AD7606C-{16,18} parts Date: Mon, 2 Sep 2024 13:36:31 +0300 Message-ID: <20240902103638.686039-9-aardelean@baylibre.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240902103638.686039-1-aardelean@baylibre.com> References: <20240902103638.686039-1-aardelean@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The AD7606C-16 and AD7606C-18 are pretty similar with the AD7606B. The main difference between AD7606C-16 & AD7606C-18 is the precision in bits (16 vs 18). Because of that, some scales need to be defined for the 18-bit variants, as they need to be computed against 2**18 (vs 2**16 for the 16 bit-variants). Because the AD7606C-16,18 also supports bipolar & differential channels, for SW-mode, the default range of 10 V or ±10V should be set at probe. On reset, the default range (in the registers) is set to value 0x3 which corresponds to '±10 V single-ended range', regardless of bipolar or differential configuration. Aside from the scale/ranges, the AD7606C-16 is similar to the AD7606B. The AD7606C-18 variant offers 18-bit precision. Because of this, the requirement to use this chip is that the SPI controller supports padding of 18-bit sequences to 32-bit arrays. Datasheet links: https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-16.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-18.pdf Signed-off-by: Alexandru Ardelean --- drivers/iio/adc/ad7606.c | 263 +++++++++++++++++++++++++++++++---- drivers/iio/adc/ad7606.h | 17 ++- drivers/iio/adc/ad7606_spi.c | 55 ++++++++ 3 files changed, 306 insertions(+), 29 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index 4c3fbb28f790..e5ef1e18d1a9 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -28,14 +28,44 @@ #include "ad7606.h" +typedef void (*ad7606c_chan_setup_cb_t)(struct ad7606_state *st, int ch, + bool bipolar, bool differential); + /* * Scales are computed as 5000/32768 and 10000/32768 respectively, * so that when applied to the raw values they provide mV values */ -static const unsigned int ad7606_scale_avail[2] = { +static const unsigned int ad7606_16bit_hw_scale_avail[2] = { 152588, 305176 }; +static const unsigned int ad7606_18bit_hw_scale_avail[2] = { + 38147, 76294 +}; + +static const unsigned int ad7606c_16_scale_single_ended_unipolar_avail[3] = { + 76294, 152588, 190735, +}; + +static const unsigned int ad7606c_16_scale_single_ended_bipolar_avail[5] = { + 76294, 152588, 190735, 305176, 381470 +}; + +static const unsigned int ad7606c_16_scale_differential_bipolar_avail[4] = { + 152588, 305176, 381470, 610352 +}; + +static const unsigned int ad7606c_18_scale_single_ended_unipolar_avail[3] = { + 19073, 38147, 47684 +}; + +static const unsigned int ad7606c_18_scale_single_ended_bipolar_avail[5] = { + 19073, 38147, 47684, 76294, 95367 +}; + +static const unsigned int ad7606c_18_scale_differential_bipolar_avail[4] = { + 38147, 76294, 95367, 152588 +}; static const unsigned int ad7616_sw_scale_avail[3] = { 76293, 152588, 305176 @@ -82,11 +112,19 @@ static int ad7606_reg_access(struct iio_dev *indio_dev, } } -static int ad7606_read_samples(struct ad7606_state *st) +static int ad7606_read_samples(struct ad7606_state *st, bool sign_extend_samples) { + unsigned int storagebits = st->chip_info->channels[1].scan_type.storagebits; unsigned int num = st->chip_info->num_channels - 1; - u16 *data = st->data; - int ret; + u32 *data32 = st->data.d32; + u16 *data16 = st->data.d16; + void *data; + int i, ret; + + if (storagebits > 16) + data = data32; + else + data = data16; /* * The frstdata signal is set to high while and after reading the sample @@ -108,11 +146,25 @@ static int ad7606_read_samples(struct ad7606_state *st) return -EIO; } - data++; + if (storagebits > 16) + data32++; + else + data16++; num--; } - return st->bops->read_block(st->dev, num, data); + ret = st->bops->read_block(st->dev, num, data); + if (ret) + return ret; + + if (storagebits == 16 || !sign_extend_samples) + return 0; + + /* For 18 bit samples, we need to sign-extend samples to 32 bits */ + for (i = 0; i < num; i++) + data32[i] = sign_extend32(data32[i], 17); + + return 0; } static irqreturn_t ad7606_trigger_handler(int irq, void *p) @@ -124,11 +176,11 @@ static irqreturn_t ad7606_trigger_handler(int irq, void *p) guard(mutex)(&st->lock); - ret = ad7606_read_samples(st); + ret = ad7606_read_samples(st, true); if (ret) goto error_ret; - iio_push_to_buffers_with_timestamp(indio_dev, st->data, + iio_push_to_buffers_with_timestamp(indio_dev, st->data.d16, iio_get_time_ns(indio_dev)); error_ret: iio_trigger_notify_done(indio_dev->trig); @@ -142,6 +194,7 @@ static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch, int *val) { struct ad7606_state *st = iio_priv(indio_dev); + unsigned int storagebits = st->chip_info->channels[1].scan_type.storagebits; int ret; gpiod_set_value(st->gpio_convst, 1); @@ -152,9 +205,13 @@ static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch, goto error_ret; } - ret = ad7606_read_samples(st); - if (ret == 0) - *val = sign_extend32(st->data[ch], 15); + ret = ad7606_read_samples(st, false); + if (ret == 0) { + if (storagebits > 16) + *val = sign_extend32(st->data.d32[ch], 17); + else + *val = sign_extend32(st->data.d16[ch], 15); + } error_ret: gpiod_set_value(st->gpio_convst, 0); @@ -267,7 +324,7 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, ch = chan->address; cs = &st->chan_scales[ch]; i = find_closest(val2, cs->scale_avail, cs->num_scales); - ret = st->write_scale(indio_dev, ch, i); + ret = st->write_scale(indio_dev, ch, i + cs->reg_offset); if (ret < 0) return ret; cs->range = i; @@ -350,6 +407,18 @@ static const struct iio_chan_spec ad7606_channels_16bit[] = { AD7606_CHANNEL(7, 16), }; +static const struct iio_chan_spec ad7606_channels_18bit[] = { + IIO_CHAN_SOFT_TIMESTAMP(8), + AD7606_CHANNEL(0, 18), + AD7606_CHANNEL(1, 18), + AD7606_CHANNEL(2, 18), + AD7606_CHANNEL(3, 18), + AD7606_CHANNEL(4, 18), + AD7606_CHANNEL(5, 18), + AD7606_CHANNEL(6, 18), + AD7606_CHANNEL(7, 18), +}; + /* * The current assumption that this driver makes for AD7616, is that it's * working in Hardware Mode with Serial, Burst and Sequencer modes activated. @@ -410,6 +479,18 @@ static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { .oversampling_avail = ad7606_oversampling_avail, .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), }, + [ID_AD7606C_16] = { + .channels = ad7606_channels_16bit, + .num_channels = 9, + .oversampling_avail = ad7606_oversampling_avail, + .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), + }, + [ID_AD7606C_18] = { + .channels = ad7606_channels_18bit, + .num_channels = 9, + .oversampling_avail = ad7606_oversampling_avail, + .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), + }, [ID_AD7616] = { .channels = ad7616_channels, .num_channels = 17, @@ -581,7 +662,119 @@ static const struct iio_trigger_ops ad7606_trigger_ops = { .validate_device = iio_trigger_validate_own_device, }; -static int ad7606_sw_mode_setup(struct iio_dev *indio_dev) +static void ad7606c_18_chan_setup(struct ad7606_state *st, int ch, + bool bipolar, bool differential) +{ + struct ad7606_chan_scale *cs = &st->chan_scales[ch]; + + if (differential) { + cs->scale_avail = + ad7606c_18_scale_differential_bipolar_avail; + cs->num_scales = + ARRAY_SIZE(ad7606c_18_scale_differential_bipolar_avail); + /* Bipolar differential ranges start at 8 (b1000) */ + cs->reg_offset = 8; + cs->range = 1; + } else if (bipolar) { + cs->scale_avail = + ad7606c_18_scale_single_ended_bipolar_avail; + cs->num_scales = + ARRAY_SIZE(ad7606c_18_scale_single_ended_bipolar_avail); + cs->range = 3; + } else { + cs->scale_avail = + ad7606c_18_scale_single_ended_unipolar_avail; + cs->num_scales = + ARRAY_SIZE(ad7606c_18_scale_single_ended_unipolar_avail); + /* Unipolar single-ended ranges start at 5 (b0101) */ + cs->reg_offset = 5; + cs->range = 1; + } +} + +static void ad7606c_16_chan_setup(struct ad7606_state *st, int ch, + bool bipolar, bool differential) +{ + struct ad7606_chan_scale *cs = &st->chan_scales[ch]; + + if (differential) { + cs->scale_avail = + ad7606c_16_scale_differential_bipolar_avail; + cs->num_scales = + ARRAY_SIZE(ad7606c_16_scale_differential_bipolar_avail); + /* Bipolar differential ranges start at 8 (b1000) */ + cs->reg_offset = 8; + cs->range = 1; + } else if (bipolar) { + cs->scale_avail = + ad7606c_16_scale_single_ended_bipolar_avail; + cs->num_scales = + ARRAY_SIZE(ad7606c_16_scale_single_ended_bipolar_avail); + cs->range = 3; + } else { + cs->scale_avail = + ad7606c_16_scale_single_ended_unipolar_avail; + cs->num_scales = + ARRAY_SIZE(ad7606c_16_scale_single_ended_unipolar_avail); + /* Unipolar single-ended ranges start at 5 (b0101) */ + cs->reg_offset = 5; + cs->range = 1; + } +} + +static int ad7606c_sw_mode_setup_channels(struct iio_dev *indio_dev, + ad7606c_chan_setup_cb_t chan_setup_cb) +{ + unsigned int num_channels = indio_dev->num_channels - 1; + struct ad7606_state *st = iio_priv(indio_dev); + bool chan_configured[AD760X_MAX_CHANNELS] = {}; + struct device *dev = st->dev; + int ret; + u32 ch; + + /* We need to hook this first */ + ret = st->bops->sw_mode_config(indio_dev); + if (ret) + return ret; + + device_for_each_child_node_scoped(dev, child) { + bool bipolar, differential; + u32 pins[2]; + + ret = fwnode_property_read_u32(child, "reg", &ch); + if (ret) + continue; + + if (ch >= num_channels) { + dev_warn(st->dev, + "Invalid channel number (ignoring): %d\n", ch); + continue; + } + + bipolar = fwnode_property_present(child, "bipolar"); + + ret = fwnode_property_read_u32_array(child, "diff-channels", + pins, ARRAY_SIZE(pins)); + /* Channel is differential, if pins are the same as 'reg' */ + if (ret == 0 && pins[0] == ch && pins[1] == ch) + differential = true; + else + differential = false; + + chan_setup_cb(st, ch, bipolar, differential); + chan_configured[ch] = true; + } + + /* Apply default configuration to unconfigured (via DT) channels */ + for (ch = 0; ch < num_channels; ch++) { + if (!chan_configured[ch]) + chan_setup_cb(st, ch, false, false); + } + + return 0; +} + +static int ad7606_sw_mode_setup(struct iio_dev *indio_dev, unsigned int id) { unsigned int num_channels = indio_dev->num_channels - 1; struct ad7606_state *st = iio_priv(indio_dev); @@ -596,17 +789,30 @@ static int ad7606_sw_mode_setup(struct iio_dev *indio_dev) indio_dev->info = &ad7606_info_sw_mode; - /* Scale of 0.076293 is only available in sw mode */ - /* After reset, in software mode, ±10 V is set by default */ - for (ch = 0; ch < num_channels; ch++) { - struct ad7606_chan_scale *cs = &st->chan_scales[ch]; + switch (id) { + case ID_AD7606C_18: + ret = ad7606c_sw_mode_setup_channels(indio_dev, + ad7606c_18_chan_setup); + break; + case ID_AD7606C_16: + ret = ad7606c_sw_mode_setup_channels(indio_dev, + ad7606c_16_chan_setup); + break; + default: + /* Scale of 0.076293 is only available in sw mode */ + /* After reset, in software mode, ±10 V is set by default */ + for (ch = 0; ch < num_channels; ch++) { + struct ad7606_chan_scale *cs = &st->chan_scales[ch]; + + cs->scale_avail = ad7616_sw_scale_avail; + cs->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail); + cs->range = 2; + } - cs->scale_avail = ad7616_sw_scale_avail; - cs->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail); - cs->range = 2; + ret = st->bops->sw_mode_config(indio_dev); + break; } - ret = st->bops->sw_mode_config(indio_dev); if (ret) return ret; @@ -655,9 +861,16 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, st->oversampling = 1; cs = &st->chan_scales[0]; - cs->range = 0; - cs->scale_avail = ad7606_scale_avail; - cs->num_scales = ARRAY_SIZE(ad7606_scale_avail); + switch (id) { + case ID_AD7606C_18: + cs->scale_avail = ad7606_18bit_hw_scale_avail; + cs->num_scales = ARRAY_SIZE(ad7606_18bit_hw_scale_avail); + break; + default: + cs->scale_avail = ad7606_16bit_hw_scale_avail; + cs->num_scales = ARRAY_SIZE(ad7606_16bit_hw_scale_avail); + break; + } ret = devm_regulator_get_enable(dev, "avcc"); if (ret) @@ -706,7 +919,7 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, st->write_scale = ad7606_write_scale_hw; st->write_os = ad7606_write_os_hw; - ret = ad7606_sw_mode_setup(indio_dev); + ret = ad7606_sw_mode_setup(indio_dev, id); if (ret) return ret; diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 1cc257374ba7..2619ce626742 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -22,7 +22,7 @@ .scan_type = { \ .sign = 's', \ .realbits = (bits), \ - .storagebits = (bits), \ + .storagebits = (bits) > 16 ? 32 : 16, \ .endianness = IIO_CPU, \ }, \ } @@ -45,7 +45,7 @@ .scan_type = { \ .sign = 's', \ .realbits = (bits), \ - .storagebits = (bits), \ + .storagebits = (bits) > 16 ? 32 : 16, \ .endianness = IIO_CPU, \ }, \ } @@ -88,6 +88,8 @@ struct ad7606_chip_info { * such that it can be read via the 'read_avail' hook * @num_scales number of elements stored in the scale_avail array * @range voltage range selection, selects which scale to apply + * @reg_offset offset for the register value, to be applied when + * writing the value of 'range' to the register value */ struct ad7606_chan_scale { #define AD760X_MAX_SCALE_SHOW (AD760X_MAX_CHANNELS * 2) @@ -95,6 +97,7 @@ struct ad7606_chan_scale { int scale_avail_show[AD760X_MAX_SCALE_SHOW]; unsigned int num_scales; unsigned int range; + unsigned int reg_offset; }; /** @@ -151,9 +154,13 @@ struct ad7606_state { /* * DMA (thus cache coherency maintenance) may require the * transfer buffers to live in their own cache lines. - * 16 * 16-bit samples + 64-bit timestamp + * 16 * 16-bit samples + 64-bit timestamp - for AD7616 + * 8 * 32-bit samples + 64-bit timestamp - for AD7616C-18 (and similar) */ - unsigned short data[20] __aligned(IIO_DMA_MINALIGN); + union { + unsigned short d16[20]; + unsigned int d32[10]; + } data __aligned(IIO_DMA_MINALIGN); __be16 d16[2]; }; @@ -192,6 +199,8 @@ enum ad7606_supported_device_ids { ID_AD7606_6, ID_AD7606_4, ID_AD7606B, + ID_AD7606C_16, + ID_AD7606C_18, ID_AD7616, }; diff --git a/drivers/iio/adc/ad7606_spi.c b/drivers/iio/adc/ad7606_spi.c index e00f58a6a0e9..b8d630ad156d 100644 --- a/drivers/iio/adc/ad7606_spi.c +++ b/drivers/iio/adc/ad7606_spi.c @@ -77,6 +77,18 @@ static const struct iio_chan_spec ad7606b_sw_channels[] = { AD7606_SW_CHANNEL(7, 16), }; +static const struct iio_chan_spec ad7606c_18_sw_channels[] = { + IIO_CHAN_SOFT_TIMESTAMP(8), + AD7606_SW_CHANNEL(0, 18), + AD7606_SW_CHANNEL(1, 18), + AD7606_SW_CHANNEL(2, 18), + AD7606_SW_CHANNEL(3, 18), + AD7606_SW_CHANNEL(4, 18), + AD7606_SW_CHANNEL(5, 18), + AD7606_SW_CHANNEL(6, 18), + AD7606_SW_CHANNEL(7, 18), +}; + static const unsigned int ad7606B_oversampling_avail[9] = { 1, 2, 4, 8, 16, 32, 64, 128, 256 }; @@ -120,6 +132,19 @@ static int ad7606_spi_read_block(struct device *dev, return 0; } +static int ad7606_spi_read_block18to32(struct device *dev, + int count, void *buf) +{ + struct spi_device *spi = to_spi_device(dev); + struct spi_transfer xfer = { + .bits_per_word = 18, + .len = count, + .rx_buf = buf, + }; + + return spi_sync_transfer(spi, &xfer, 1); +} + static int ad7606_spi_reg_read(struct ad7606_state *st, unsigned int addr) { struct spi_device *spi = to_spi_device(st->dev); @@ -283,6 +308,19 @@ static int ad7606B_sw_mode_config(struct iio_dev *indio_dev) return 0; } +static int ad7606c_18_sw_mode_config(struct iio_dev *indio_dev) +{ + int ret; + + ret = ad7606B_sw_mode_config(indio_dev); + if (ret) + return ret; + + indio_dev->channels = ad7606c_18_sw_channels; + + return 0; +} + static const struct ad7606_bus_ops ad7606_spi_bops = { .read_block = ad7606_spi_read_block, }; @@ -305,6 +343,15 @@ static const struct ad7606_bus_ops ad7606B_spi_bops = { .sw_mode_config = ad7606B_sw_mode_config, }; +static const struct ad7606_bus_ops ad7606c_18_spi_bops = { + .read_block = ad7606_spi_read_block18to32, + .reg_read = ad7606_spi_reg_read, + .reg_write = ad7606_spi_reg_write, + .write_mask = ad7606_spi_write_mask, + .rd_wr_cmd = ad7606B_spi_rd_wr_cmd, + .sw_mode_config = ad7606c_18_sw_mode_config, +}; + static int ad7606_spi_probe(struct spi_device *spi) { const struct spi_device_id *id = spi_get_device_id(spi); @@ -315,8 +362,12 @@ static int ad7606_spi_probe(struct spi_device *spi) bops = &ad7616_spi_bops; break; case ID_AD7606B: + case ID_AD7606C_16: bops = &ad7606B_spi_bops; break; + case ID_AD7606C_18: + bops = &ad7606c_18_spi_bops; + break; default: bops = &ad7606_spi_bops; break; @@ -333,6 +384,8 @@ static const struct spi_device_id ad7606_id_table[] = { { "ad7606-6", ID_AD7606_6 }, { "ad7606-8", ID_AD7606_8 }, { "ad7606b", ID_AD7606B }, + { "ad7606c-16", ID_AD7606C_16 }, + { "ad7606c-18", ID_AD7606C_18 }, { "ad7616", ID_AD7616 }, { } }; @@ -344,6 +397,8 @@ static const struct of_device_id ad7606_of_match[] = { { .compatible = "adi,ad7606-6" }, { .compatible = "adi,ad7606-8" }, { .compatible = "adi,ad7606b" }, + { .compatible = "adi,ad7606c-16" }, + { .compatible = "adi,ad7606c-18" }, { .compatible = "adi,ad7616" }, { } };