From patchwork Mon Sep 2 15:01:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13787409 Received: from mail-lf1-f41.google.com (mail-lf1-f41.google.com [209.85.167.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 842261CB516 for ; Mon, 2 Sep 2024 15:01:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725289316; cv=none; b=RCqsIyJgdNs1Ur1iOvcrxkwngaX6GlOrAQVs/oRHjSsswpdTqwYNWD7b19uD7URT9dUnzFZcGRL1oEETzy7yv5VyvZm/Dp6iT112q82+QxLWKD+sHDB9vjLA2EJVsDI+pVa3ShM6f2plYZrsNfZg6Lq+TTLnr+zwsyrt4QgNT3M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725289316; c=relaxed/simple; bh=ArsmYDW55cKASTnQ6hcua5UnQZJb2h3ZYLRZ6WJ8EUU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cHs4ZQXnE96pI87/LdnXrzsDnYLPo5v8YlLZ8Q7zWJu2LLBapJHKIapZXDB6cWVn+0EB0o/OpAxGg7Zopup7m2OC+TviLltO6AOmlTg8kJ533HzJ1/jNZ/lWyq4xse1mUbNAgqOt4nobES4/FXmgkLBL+hnlKnlO6t+ddwiAsdI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=cJe4/Z3/; arc=none smtp.client-ip=209.85.167.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="cJe4/Z3/" Received: by mail-lf1-f41.google.com with SMTP id 2adb3069b0e04-5334a8a1b07so5267770e87.1 for ; Mon, 02 Sep 2024 08:01:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1725289313; x=1725894113; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=B3pvwUMo0iJndMRUEcqbJ1B6l2vhr6vHtYLMGbW108E=; b=cJe4/Z3/jGmxzjSqHX20NDqXaaTuKGZZQS9QvBy5Zjd1dbeD9T9WWAwGtzXdhV5ZxX SSRawmyQQXVIJUGt8gJ7HeNIOAnbuFVmv0t8tLWva3N2vWpdNKCu+u1B0hLZJmPRGQ14 acjtzUV82cHnC87rf9ZHHSsl3t2yeH7ryHI5edIzLswZEh85bJ6R2MC+REzyBxuDwSmb 0T0DiJv4274567SNjk7m5d4hErjQIf46vTgdgVLdmj1EMRHKS4WPtczT62Du1Iqe3e3f c+J7UHS2Rc8QnX2QJGFTsK9wm8pMYvrpaeiPEsAwg6P15rE4RP9htyxAUs7advC1P3LZ HhrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725289313; x=1725894113; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=B3pvwUMo0iJndMRUEcqbJ1B6l2vhr6vHtYLMGbW108E=; b=VpRXjdbZezeUWM4CCS54CG7xI/yF4luGvSf+W3VPxsIbv65NO5fGjuW+h6S2BGnU/c 2+tLHIBOhTZC4qJ7M27cWFRipzLdWqxwX/oPSmKSvt4b5ATXxVHtIeAh3GPuSz+9PLND c+n4Vuquwotkq16sEMfsFu6qsTwJLuZkDtbbIvnOv62sfa9uYeeKPx+jdrnomZ+J/sU9 DzOUqgFQiRa07F6YQ0rt3kyqqRTEqIAskEtynhZyAOXa5mDTxhp1rHKL7Eqmm3bs50ht WwacuV2B8mxsfHbASo3QlBoMZvG6qgW9GcwQLOYrKK10Vuc30RvyEzyf3juZH9COE51/ Ek0A== X-Forwarded-Encrypted: i=1; AJvYcCWPTcub3pjic3tlPZlCxjqXKokydT2rynsyQz2KovJVtGy18Ah0O/hL03GJ3kgE/7trzuaeyGgeeedtgOsu@vger.kernel.org X-Gm-Message-State: AOJu0Yx0R0I8Ci74bXQc6D7uQm5LnZB5qmVe86nc3TGQ+W0+7GsoeEfg vegbVzvHfiQKSfn+NEuXEy6RfGmBxq8EYebgx8E+jQr2fk5Z7kIYPEk85+95qds= X-Google-Smtp-Source: AGHT+IEUpfkkhnqYuZWu5uQpN0jifICl8ddqys0S7znON5JPKahdlXacEdMa0Hdy5+ZvWR6WxIixJg== X-Received: by 2002:a05:6512:3d1d:b0:533:4722:ebbe with SMTP id 2adb3069b0e04-53546b33564mr7349587e87.26.1725289312394; Mon, 02 Sep 2024 08:01:52 -0700 (PDT) Received: from [127.0.1.1] ([82.79.186.176]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42bb6deb1ebsm140726115e9.3.2024.09.02.08.01.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 08:01:51 -0700 (PDT) From: Abel Vesa Date: Mon, 02 Sep 2024 18:01:35 +0300 Subject: [PATCH 1/2] arm64: dts: qcom: x1e80100-crd: Enable external DP support Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240902-x1e80100-crd-dts-add-external-dp-support-v1-1-899c264c0eb7@linaro.org> References: <20240902-x1e80100-crd-dts-add-external-dp-support-v1-0-899c264c0eb7@linaro.org> In-Reply-To: <20240902-x1e80100-crd-dts-add-external-dp-support-v1-0-899c264c0eb7@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Johan Hovold , Neil Armstrong , Trilok Soni , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=10887; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=ArsmYDW55cKASTnQ6hcua5UnQZJb2h3ZYLRZ6WJ8EUU=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBm1dNbs3SG9XUSejydzuinRf5Ksnly7I4Wc3M0G 0dhWbppXC+JAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZtXTWwAKCRAbX0TJAJUV VgQ6D/9C6dfsbbIdMdB+IbTGubYiIUhmVDgvTxGdJiD/LhlWC0LxryjRoogNW/BzMCvbjr0c6T1 pCXNiEFKqxUJxSJkUv/kgK5naLkvvbwT9lwGiaOgoke4nQ8tKVUH9O0popGtga79C7KVohYnkl3 LNLYZS3EWxyNOC1fUCN9L0BpzqWzHNewiAImyDzHY9xtL8VjxHOvM3mcy497lZB8nhMwLmL5UUW IVU0xukmFRu44Lu6DenCWZfZqNcjf1Ytp6nbxnJvU1bmiNYi4tWDlzz5q3QyMFJNmHgYex/WQtF iPTNbpGIN0J6ROg2NtHQsDwO4APbhL6d9RiOC7SSf2C+lbhH1DoyM9mC63VegaFGpp4pz7DPHWr iBQ2Cct+MrUQVsigPHsJ85YgwnoDJBx8NUsmMo5nifXCrNrqyd6+cOa8ZVUcOeK0PoNOecxTMcU ALzGjx7lXdi6K4jRUA05i3D5uQQkj0MMcfSfOsLj/o70Pkt6KBwjmZG75lIkLcYZb68br8aiJ+n PMUR4hrv0MqmgwlUsomTq9z5ne3yW6KYEpbOh/fFdKYVMHkPI/3Sc/P9G+oodgbyOTbMQICDjCX dRZrVfI/m7wDcrSg8Eo9KqAZEQYOudgULoQI78Uv81p/EbAKZNRy5WWpJfauk9uMrPM3AoX5ed2 Py+CRlk/wLfMpqA== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE The Qualcomm Snapdragon X Elite CRD board has 3 USB Type-C ports, all of them supporting external DP altmode. Between each QMP combo PHY and the corresponding Type-C port, sits one Parade PS8830 retimer which handles both orientation and SBU muxing. Add nodes for each retimer, fix the graphs between connectors and the PHYs accordingly, add the voltage regulators needed by each retimer and then enable all 3 remaining DPUs. Signed-off-by: Abel Vesa --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 414 +++++++++++++++++++++++++++++- 1 file changed, 408 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index 10b28d870f08..6dfc85eda354 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -99,7 +99,15 @@ port@1 { reg = <1>; pmic_glink_ss0_ss_in: endpoint { - remote-endpoint = <&usb_1_ss0_qmpphy_out>; + remote-endpoint = <&retimer_ss0_ss_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_ss0_con_sbu_in: endpoint { + remote-endpoint = <&retimer_ss0_con_sbu_out>; }; }; }; @@ -128,7 +136,15 @@ port@1 { reg = <1>; pmic_glink_ss1_ss_in: endpoint { - remote-endpoint = <&usb_1_ss1_qmpphy_out>; + remote-endpoint = <&retimer_ss1_ss_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_ss1_con_sbu_in: endpoint { + remote-endpoint = <&retimer_ss1_con_sbu_out>; }; }; }; @@ -157,7 +173,15 @@ port@1 { reg = <1>; pmic_glink_ss2_ss_in: endpoint { - remote-endpoint = <&usb_1_ss2_qmpphy_out>; + remote-endpoint = <&retimer_ss2_ss_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_ss2_con_sbu_in: endpoint { + remote-endpoint = <&retimer_ss2_con_sbu_out>; }; }; }; @@ -288,6 +312,134 @@ vreg_edp_3p3: regulator-edp-3p3 { regulator-boot-on; }; + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR0_1P15"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + + gpio = <&pm8550ve_8_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr0_1p15_reg_en>; + pinctrl-names = "default"; + }; + + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR0_1P8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr0_1p8_reg_en>; + pinctrl-names = "default"; + }; + + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR0_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr0_3p3_reg_en>; + pinctrl-names = "default"; + }; + + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR1_1P15"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + + gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&rtmr1_1p15_reg_en>; + }; + + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR1_1P8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&rtmr1_1p8_reg_en>; + }; + + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR1_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&rtmr1_3p3_reg_en>; + }; + + vreg_rtmr2_1p15: regulator-rtmr2-1p15 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR2_1P15"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + + gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&rtmr2_1p15_reg_en>; + }; + + vreg_rtmr2_1p8: regulator-rtmr2-1p8 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR2_1P8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&rtmr2_1p8_reg_en>; + }; + + vreg_rtmr2_3p3: regulator-rtmr2-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR2_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&rtmr2_3p3_reg_en>; + }; + + + vreg_nvme: regulator-nvme { compatible = "regulator-fixed"; @@ -709,6 +861,163 @@ keyboard@3a { }; }; +&i2c1 { + clock-frequency = <400000>; + + status = "okay"; + + typec-mux@8 { + compatible = "parade,ps8830"; + reg = <0x08>; + + clocks = <&rpmhcc RPMH_RF_CLK5>; + clock-names = "xo"; + + vdd15-supply = <&vreg_rtmr2_1p15>; + vdd18-supply = <&vreg_rtmr2_1p8>; + vdd33-supply = <&vreg_rtmr2_3p3>; + + reset-gpios = <&tlmm 185 GPIO_ACTIVE_HIGH>; + + orientation-switch; + retimer-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + retimer_ss2_ss_out: endpoint { + remote-endpoint = <&pmic_glink_ss2_ss_in>; + }; + }; + + port@1 { + reg = <1>; + + retimer_ss2_ss_in: endpoint { + remote-endpoint = <&usb_1_ss2_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + retimer_ss2_con_sbu_out: endpoint { + remote-endpoint = <&pmic_glink_ss2_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c3 { + clock-frequency = <400000>; + + status = "okay"; + + typec-mux@8 { + compatible = "parade,ps8830"; + reg = <0x08>; + + clocks = <&rpmhcc RPMH_RF_CLK3>; + clock-names = "xo"; + + vdd15-supply = <&vreg_rtmr0_1p15>; + vdd18-supply = <&vreg_rtmr0_1p8>; + vdd33-supply = <&vreg_rtmr0_3p3>; + + reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_HIGH>; + + retimer-switch; + orientation-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + retimer_ss0_ss_out: endpoint { + remote-endpoint = <&pmic_glink_ss0_ss_in>; + }; + }; + + port@1 { + reg = <1>; + + retimer_ss0_ss_in: endpoint { + remote-endpoint = <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + retimer_ss0_con_sbu_out: endpoint { + remote-endpoint = <&pmic_glink_ss0_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c7 { + clock-frequency = <400000>; + + status = "okay"; + + typec-mux@8 { + compatible = "parade,ps8830"; + reg = <0x8>; + + clocks = <&rpmhcc RPMH_RF_CLK4>; + clock-names = "xo"; + + vdd15-supply = <&vreg_rtmr1_1p15>; + vdd18-supply = <&vreg_rtmr1_1p8>; + vdd33-supply = <&vreg_rtmr1_3p3>; + + reset-gpios = <&tlmm 176 GPIO_ACTIVE_HIGH>; + + retimer-switch; + orientation-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + retimer_ss1_ss_out: endpoint { + remote-endpoint = <&pmic_glink_ss1_ss_in>; + }; + }; + + port@1 { + reg = <1>; + + retimer_ss1_ss_in: endpoint { + remote-endpoint = <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + retimer_ss1_con_sbu_out: endpoint { + remote-endpoint = <&pmic_glink_ss1_con_sbu_in>; + }; + }; + + }; + }; +}; + &i2c8 { clock-frequency = <400000>; @@ -756,6 +1065,30 @@ &mdss { status = "okay"; }; +&mdss_dp0 { + status = "okay"; +}; + +&mdss_dp0_out { + data-lanes = <0 1 2 3>; +}; + +&mdss_dp1 { + status = "okay"; +}; + +&mdss_dp1_out { + data-lanes = <0 1 2 3>; +}; + +&mdss_dp2 { + status = "okay"; +}; + +&mdss_dp2_out { + data-lanes = <0 1 2 3>; +}; + &mdss_dp3 { compatible = "qcom,x1e80100-dp"; /delete-property/ #sound-dai-cells; @@ -854,6 +1187,33 @@ &pcie6a_phy { status = "okay"; }; +&pm8550_gpios { + rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state { + pins = "gpio11"; + function = "func1"; + input-disable; + output-enable; + }; +}; + +&pm8550ve_8_gpios { + rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state { + pins = "gpio8"; + function = "func1"; + input-disable; + output-enable; + }; +}; + +&pm8550ve_9_gpios { + rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state { + pins = "gpio8"; + function = "func1"; + input-disable; + output-enable; + }; +}; + &pmc8380_3_gpios { edp_bl_en: edp-bl-en-state { pins = "gpio4"; @@ -1093,6 +1453,48 @@ wake-n-pins { }; }; + rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state { + pins = "gpio188"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state { + pins = "gpio175"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state { + pins = "gpio186"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr2_1p15_reg_en: rtmr2-1p15-reg-en-state { + pins = "gpio189"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr2_1p8_reg_en: rtmr2-1p8-reg-en-state { + pins = "gpio126"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr2_3p3_reg_en: rtmr2-3p3-reg-en-state { + pins = "gpio187"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + tpad_default: tpad-default-state { pins = "gpio3"; function = "gpio"; @@ -1164,7 +1566,7 @@ &usb_1_ss0_dwc3_hs { }; &usb_1_ss0_qmpphy_out { - remote-endpoint = <&pmic_glink_ss0_ss_in>; + remote-endpoint = <&retimer_ss0_ss_in>; }; &usb_1_ss1_hsphy { @@ -1196,7 +1598,7 @@ &usb_1_ss1_dwc3_hs { }; &usb_1_ss1_qmpphy_out { - remote-endpoint = <&pmic_glink_ss1_ss_in>; + remote-endpoint = <&retimer_ss1_ss_in>; }; &usb_1_ss2_hsphy { @@ -1228,5 +1630,5 @@ &usb_1_ss2_dwc3_hs { }; &usb_1_ss2_qmpphy_out { - remote-endpoint = <&pmic_glink_ss2_ss_in>; + remote-endpoint = <&retimer_ss2_ss_in>; }; From patchwork Mon Sep 2 15:01:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13787410 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C1AF555887 for ; Mon, 2 Sep 2024 15:01:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725289317; cv=none; b=L6duQRTgLBRcneNOOojKHI2Ct3yd4uSHj6SBLOuBX14u8QmW5sIubLN9hiZ6Dm9rGEP0ayGAXqCXoQRgpMCZ0Wf9zq5WiEBJKjsvwUsCLQaHgiGCAPoxeA3aqOU8ueETGkuf1q1qNTnG95+3e4OAQNX/8+N8jV3Ky+tDPNxvhyU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725289317; c=relaxed/simple; bh=h5Xq82//l1sVdEO34qNdYiFnG6IVy5Rx/913P5VPOVA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GdC1H5EsPYbm4vMPzdCIuCjkiOOzccaKTOwuvIv2dXk1dXFH41o8q/b/DjDNos2Jspo12RnIhcTgo/qZm8XL6wEfA8Smbd5W42r1eQbIvxp0WJaMzFI2Hirjpl1DroFEf1Cxj5lk8n+Aja+1XMtVvcpj+KU3+855V2RAKHL1Xk4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=EaZZJVJc; arc=none smtp.client-ip=209.85.128.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="EaZZJVJc" Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-42bb9d719d4so30966125e9.3 for ; Mon, 02 Sep 2024 08:01:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1725289314; x=1725894114; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=DxknQ0wfQYWuyr9cw/RceM9p4Pvz+sRj5P9CPIckMAM=; b=EaZZJVJcDjH/LXR/J3S3FkUVWkBhLCemDIRHhXsYAEdpbtZLPwNq2K1YjQA5MIDRQB LtaSCk7n1++FnA21IgjEt26IAhhllQcMdjvB5kkXAvfEWo5cnaA4/UORfMRU2peSP6Py 8CBKbpMkhSmKhgBPrvtiNLuCcvFXxAp3SH81qRVE6Zt37OyJa96icsNtkM3/VwVI6luh i3qh7McSegN3fC3eQt+7O6/wJjiq1eopS7R7cKG0imx5sUIy2QZREECTc5mSgOWnco0t 3TU7EJap970OHt5OGQNAZIsd+r6z02JrohV9c5KuNv583Mmq5+b21gfOn6fMyWo3X6Yb LmKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725289314; x=1725894114; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DxknQ0wfQYWuyr9cw/RceM9p4Pvz+sRj5P9CPIckMAM=; b=fQ/D4yI9aztQhsZ1HM0o1JxJYVfpng0VXRP3bMXUUucnZc68MtMOjOSCovUkaCnP+P GCUEgRI6ps2q5JiXP1dUO3OMYmmZDfEPjnlN4iwbDCx3UXjsTA6IlMpjnsD2dk3VR7qQ lNnN1t/oswbXD85FFBazwCCi7/C5okRXlgks5WW1oxu7XKtUuOSsqJE2LO3gOItyF0NA H43FKpqtOZXAT7b4t7ZORa1BOhJQLySwXm2KoJ6WXyEB2PZRiddWboNZnRFmpFytfUeL It1l0FWW4q6d1Oxb2RL8cb9P5B5yR/IG6aROpJdvBtIp7KlSERD97DDXuTjg8VsM+OiK ZD+g== X-Forwarded-Encrypted: i=1; AJvYcCW1OWvSeNp/d4gy76BDe4/O2l1GKpa8rsTXXxZc+3bNd0fUy+Gm/PKH1RrK0ZTF3ZSzezY4+eiz+LbymZJz@vger.kernel.org X-Gm-Message-State: AOJu0YyvXuEbXYZcyxr1VtilMiFNsqB5bleO501oUq0DwrxPnDMSmuP/ 6oUj9A8A9anMh+rSq/LYjfYyI5llKKNJpJyojTZpb2s9EY3awr/7iLbySZaQuTw= X-Google-Smtp-Source: AGHT+IHbOfN+sU8d6+iOdoFyqChJSi+NANboVEGhWfUjFGv6PJ5It/K5595QkKbX1B/2NspEgtXVyA== X-Received: by 2002:a05:600c:3c82:b0:42b:b016:94a3 with SMTP id 5b1f17b1804b1-42c88108590mr3601915e9.31.1725289313825; Mon, 02 Sep 2024 08:01:53 -0700 (PDT) Received: from [127.0.1.1] ([82.79.186.176]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42bb6deb1ebsm140726115e9.3.2024.09.02.08.01.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 08:01:53 -0700 (PDT) From: Abel Vesa Date: Mon, 02 Sep 2024 18:01:36 +0300 Subject: [PATCH 2/2] arm64: dts: qcom: x1e80100-t14s: Add external DP support Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240902-x1e80100-crd-dts-add-external-dp-support-v1-2-899c264c0eb7@linaro.org> References: <20240902-x1e80100-crd-dts-add-external-dp-support-v1-0-899c264c0eb7@linaro.org> In-Reply-To: <20240902-x1e80100-crd-dts-add-external-dp-support-v1-0-899c264c0eb7@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Johan Hovold , Neil Armstrong , Trilok Soni , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7841; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=h5Xq82//l1sVdEO34qNdYiFnG6IVy5Rx/913P5VPOVA=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBm1dNcwav1nL0dHrjX2wU5BHgIBJw3vsWxnT0Q4 oZ+raNyOCiJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZtXTXAAKCRAbX0TJAJUV VuEQD/4hl6By0Yi5gyeWU7JhZt/0ux1Gt/n8VtwoQh6AHuEDjE5F6z22zvjYF2puf4ggH5LuajH r2ycRLwwMcdsvW7OqbQAIKfAVx1GSlXq9aoisw6xdsK67s9XtxIHAH5J1BrBC/LaI9RL5Dr5xfV /tn9JwBu4tLK8nHVFyKedsruu/UrabCyG2fumfC4WJclZwNm9lXCSpN2U2q77PDZM/c7jJeM7qY i9XitBb3uIeWDNN2cSRvu+gmG5U6uAZhz0RBbxTMfq9ArP7elYtGIohkvLXlyvPoc/xdXH3Tex3 whnOlZrkixpMfhDXeXxrTs9bvpL05LwKsvRXfY0JYpSvAm+xbcUDBXKv7wFa/qtCRk0t51wygKq 9KIuHNwH5FUqctxattrepG1XzkajSvopo0H9p0Qf94A52qjtPoaXzmam0M0s8YAqvx3iBGOWqKu 4Ov50Pxish8ApCiKwOH9kelXRYooNG+HGnVCxRgaCk7eOMKPm9JuB165PyhzcC3ADyimOvVXwCE avgswJMsS0NY1Sr/PRWxRR9h99Pq6ut2B6bVsYnMo6V9WrMJVnrU0fqmeuVpERYjUPd0TJzgvJ5 qZ69PHRwSpJlRv5gT+61SS+40kxz61Utg+H53TpOyDOfm/FclkTjaYrBzWevY6T/zSAb3orNHb7 oxTKXVls804YUmw== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE The Lenovo Thinkpad T14s has only 2 USB Type-C ports, both of them supporting external DP altmode. Between each QMP combo PHY and the corresponding Type-C port, sits one Parade PS8830 retimer which handles both orientation and SBU muxing. Add nodes for each retimer, fix the graphs between connectors and the PHYs accordingly add the voltage regulators needed by each retimer and then enable DP 0 and 1. Signed-off-by: Abel Vesa --- .../dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts | 278 ++++++++++++++++++++- 1 file changed, 274 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts index 941dfddd6713..08ec2419f95f 100644 --- a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts +++ b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts @@ -66,7 +66,15 @@ port@1 { reg = <1>; pmic_glink_ss0_ss_in: endpoint { - remote-endpoint = <&usb_1_ss0_qmpphy_out>; + remote-endpoint = <&retimer_ss0_ss_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_ss0_con_sbu_in: endpoint { + remote-endpoint = <&retimer_ss0_con_sbu_out>; }; }; }; @@ -95,7 +103,15 @@ port@1 { reg = <1>; pmic_glink_ss1_ss_in: endpoint { - remote-endpoint = <&usb_1_ss1_qmpphy_out>; + remote-endpoint = <&retimer_ss1_ss_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_ss1_con_sbu_in: endpoint { + remote-endpoint = <&retimer_ss1_con_sbu_out>; }; }; }; @@ -127,6 +143,90 @@ vreg_edp_3p3: regulator-edp-3p3 { regulator-boot-on; }; + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR0_1P15"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + + gpio = <&pm8550ve_8_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr0_1p15_reg_en>; + pinctrl-names = "default"; + }; + + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR0_1P8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr0_1p8_reg_en>; + pinctrl-names = "default"; + }; + + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR0_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr0_3p3_reg_en>; + pinctrl-names = "default"; + }; + + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR1_1P15"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + + gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&rtmr1_1p15_reg_en>; + }; + + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR1_1P8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&rtmr1_1p8_reg_en>; + }; + + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR1_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&rtmr1_3p3_reg_en>; + }; + vreg_nvme: regulator-nvme { compatible = "regulator-fixed"; @@ -484,6 +584,111 @@ keyboard@3a { }; }; +&i2c3 { + clock-frequency = <400000>; + + status = "okay"; + + typec-mux@8 { + compatible = "parade,ps8830"; + reg = <0x08>; + + clocks = <&rpmhcc RPMH_RF_CLK3>; + clock-names = "xo"; + + vdd15-supply = <&vreg_rtmr0_1p15>; + vdd18-supply = <&vreg_rtmr0_1p8>; + vdd33-supply = <&vreg_rtmr0_3p3>; + + reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_HIGH>; + + retimer-switch; + orientation-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + retimer_ss0_ss_out: endpoint { + remote-endpoint = <&pmic_glink_ss0_ss_in>; + }; + }; + + port@1 { + reg = <1>; + + retimer_ss0_ss_in: endpoint { + remote-endpoint = <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + retimer_ss0_con_sbu_out: endpoint { + remote-endpoint = <&pmic_glink_ss0_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c7 { + clock-frequency = <400000>; + + status = "okay"; + + typec-mux@8 { + compatible = "parade,ps8830"; + reg = <0x8>; + + clocks = <&rpmhcc RPMH_RF_CLK4>; + clock-names = "xo"; + + vdd15-supply = <&vreg_rtmr1_1p15>; + vdd18-supply = <&vreg_rtmr1_1p8>; + vdd33-supply = <&vreg_rtmr1_3p3>; + + reset-gpios = <&tlmm 176 GPIO_ACTIVE_HIGH>; + + retimer-switch; + orientation-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + retimer_ss1_ss_out: endpoint { + remote-endpoint = <&pmic_glink_ss1_ss_in>; + }; + }; + + port@1 { + reg = <1>; + + retimer_ss1_ss_in: endpoint { + remote-endpoint = <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + retimer_ss1_con_sbu_out: endpoint { + remote-endpoint = <&pmic_glink_ss1_con_sbu_in>; + }; + }; + + }; + }; +}; + &i2c8 { clock-frequency = <400000>; @@ -508,6 +713,22 @@ &mdss { status = "okay"; }; +&mdss_dp0 { + status = "okay"; +}; + +&mdss_dp0_out { + data-lanes = <0 1 2 3>; +}; + +&mdss_dp1 { + status = "okay"; +}; + +&mdss_dp1_out { + data-lanes = <0 1 2 3>; +}; + &mdss_dp3 { compatible = "qcom,x1e80100-dp"; /delete-property/ #sound-dai-cells; @@ -588,6 +809,33 @@ &pcie6a_phy { status = "okay"; }; +&pm8550_gpios { + rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state { + pins = "gpio11"; + function = "func1"; + input-disable; + output-enable; + }; +}; + +&pm8550ve_8_gpios { + rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state { + pins = "gpio8"; + function = "func1"; + input-disable; + output-enable; + }; +}; + +&pm8550ve_9_gpios { + rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state { + pins = "gpio8"; + function = "func1"; + input-disable; + output-enable; + }; +}; + &pmc8380_3_gpios { edp_bl_en: edp-bl-en-state { pins = "gpio4"; @@ -733,6 +981,28 @@ wake-n-pins { }; }; + rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state { + pins = "gpio188"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state { + pins = "gpio175"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state { + pins = "gpio186"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + wcd_default: wcd-reset-n-active-state { pins = "gpio191"; function = "gpio"; @@ -771,7 +1041,7 @@ &usb_1_ss0_dwc3_hs { }; &usb_1_ss0_qmpphy_out { - remote-endpoint = <&pmic_glink_ss0_ss_in>; + remote-endpoint = <&retimer_ss0_ss_in>; }; &usb_1_ss1_hsphy { @@ -803,5 +1073,5 @@ &usb_1_ss1_dwc3_hs { }; &usb_1_ss1_qmpphy_out { - remote-endpoint = <&pmic_glink_ss1_ss_in>; + remote-endpoint = <&retimer_ss1_ss_in>; };