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Fixes: 28b5eaf9712b ("spi: Convert NXP flexspi to json schema") Signed-off-by: Haibo Chen --- Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml index 4a5f41bde00f..e994ff02f479 100644 --- a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml +++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml @@ -19,11 +19,11 @@ properties: - enum: - nxp,imx8dxl-fspi - nxp,imx8mm-fspi - - nxp,imx8mp-fspi - nxp,imx8qxp-fspi - nxp,lx2160a-fspi - items: - enum: + - nxp,imx8mp-fspi - nxp,imx93-fspi - nxp,imx95-fspi - const: nxp,imx8mm-fspi From patchwork Wed Sep 4 11:17:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 13790596 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2056.outbound.protection.outlook.com [40.107.21.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 017DA1D2221; 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So remove this redundant imx8mp compatible string here. Fixes: 0467a97367d4 ("spi: fspi: enable fspi driver for on imx8mp") Signed-off-by: Haibo Chen --- drivers/spi/spi-nxp-fspi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c index fd1816befcd8..da110188bfed 100644 --- a/drivers/spi/spi-nxp-fspi.c +++ b/drivers/spi/spi-nxp-fspi.c @@ -1286,7 +1286,6 @@ static int nxp_fspi_resume(struct device *dev) static const struct of_device_id nxp_fspi_dt_ids[] = { { .compatible = "nxp,lx2160a-fspi", .data = (void *)&lx2160a_data, }, { .compatible = "nxp,imx8mm-fspi", .data = (void *)&imx8mm_data, }, - { .compatible = "nxp,imx8mp-fspi", .data = (void *)&imx8mm_data, }, { .compatible = "nxp,imx8qxp-fspi", .data = (void *)&imx8qxp_data, }, { .compatible = "nxp,imx8dxl-fspi", .data = (void *)&imx8dxl_data, }, { /* sentinel */ } From patchwork Wed Sep 4 11:17:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 13790597 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2056.outbound.protection.outlook.com [40.107.21.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 247191D3658; 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Add the correct compatible string here. Signed-off-by: Haibo Chen --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 3b02c6e2988c..e44424af245c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1300,7 +1300,7 @@ usdhc3: mmc@30b60000 { }; flexspi: spi@30bb0000 { - compatible = "nxp,imx8mp-fspi"; + compatible = "nxp,imx8mp-fspi", "nxp,imx8mm-fspi"; reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>; reg-names = "fspi_base", "fspi_mmap"; interrupts = ; From patchwork Wed Sep 4 11:17:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 13790598 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2082.outbound.protection.outlook.com [40.107.22.82]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1BAB1D88C1; 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Signed-off-by: Haibo Chen --- Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml index e994ff02f479..3cbba282c040 100644 --- a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml +++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml @@ -20,6 +20,7 @@ properties: - nxp,imx8dxl-fspi - nxp,imx8mm-fspi - nxp,imx8qxp-fspi + - nxp,imx8ulp-fspi - nxp,lx2160a-fspi - items: - enum: From patchwork Wed Sep 4 11:17:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 13790599 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2089.outbound.protection.outlook.com [40.107.22.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F9741D9343; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: hooBJtsayhxGLy4wXnAeywNgP7mCZAYhlDGDETlBpv1WwGhKp1N8qxTxY1PRCYdPfEBJ34HV0rIpAK1CqAtt234908euXiySH/PfRN2uC4GWwK6LFjY3mkifRbqxMWUQCuY9nk3Rg+/yqA8CC6Rv8+Tk1lqHU9FtZS3d5DTUWbpubh4Yx5e6486iJWN/0Fmv9AsfNjE3Wi9rL61EAU3MgWTSIVx7R4ImgPmGmUl39cBvND7tOd77KBulBYh5EQPheM602g5W0djjlccCBCwmt8IAC04ndDJsuXkWCRdv05X5olv6seGt+vgvQfhS9G8QZwMIYt0GZizXvS8UL6PD/ehqxaJ6RtIBQZKl3loEY7lFu2ckbSi8dKPT4P6qALXEcj4IkIZYZ45r7+C3MQpvz/QIsPQBtNUoWREBZcBDg10MOXV6PuZngNwBf70dwQNq/c6CNkbsV+0Yp6HaSu/Yu84+b5g7UxKESIqvvUFXCQ4z4MFZHQ75Bxx70m3AhEQAeFqVenPz8J46ABQ1YITxUQfplWjXgd0a4vjoWnJ6wcRWw24AFEnzoMiYnishgFn/I4DlN7B5N/H0Jf6KIYN/rNGwpOQKimXoT79GZVVMk8Lw5GAp8NiDFQCnzyvZm0S6ITSfQfLWTdKSQm+Z2lYhSkMBH4fsqlLpyXdfXsna2sEigxom4FQg/63CY1yueEUnvdTN4AJ937RkFMUweNe/ak5ZmMyb0Eoi0MJ0pnbmph8YmbjkF4UcYrUOknlNUbuHjFcnlFXuafmB/P1wgUKV2fnF7bxp3gimcNQjFPWtSBWh7gOCNZK7XpQIG8OqFaHeKTjpmaTVw13E5d0wQQMr7JVqKmka9dAI76CbIy7D+egVaIHkGC1Ph7PKTE4XzK280xHC35rNNO/IrOnSo0VnPknnAUG4dsUw4JpZqG+Tv1zYIVF6eU8qplLOcOwKYUVa2smkav133zj+8MsRfYv6Un6ZlB92+UreMtO0xs6YnEDOt6G2OtvAxT9nTdc94qoI/Y3LFUEZnyXax3alsiPZ6zQSBzf6jd3CbfbEwPhwnpoFSawSVdYtQszY994vQ1PlnAEar7rhtLvY0cwpQxhq2eoVMQ+fRxkq2oSpLoXJYAqGYkbnwCRA1dBPk8ghSKWPkTyNmwNVhICOpDzk5oM0XXwxhnAXP9vYPW/ON7jGjIVvHmVbXz9TS7rgc2zknBW+x7HlHgXbpZz6kXpKruZIedWd6hVFlg0nqtfK8jWVHbTAHtnUGavFCdr+raENn56JFi/uDljML6U35e2mdiQcRqhs1I8SJQyOwqYr4Bsv4jrifPdmPujfmEG0BFs2T0BquXmig18krLF3nLPFLfsKKsoPAUnCJFHtHQqvLqPv7BbzyvlY1g7awOXqyan4rjyyi2mpCSlR4OxELrwyWNwZtc9MkG81CvUzJhY42RY2QwS2Fyuok54USuOjeEhoI3BDRj9hgoP3DrS5TDNIDKQ4yl/MYwYcksA/EKUBAJFc1KORK8IKCbRgvwQvHV5za2uTaVDsVaqPq+vpF2VtfmBtE4YqYzyVt/87B1U1lExeeHuX+hZVV4tmrumz5qf8hjJX X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8058f473-e5a3-4169-05eb-08dcccd34067 X-MS-Exchange-CrossTenant-AuthSource: DU0PR04MB9496.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Sep 2024 11:18:07.2733 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: F4SVQy5M1Gx2RILEMmaBKzHdLPIoooumnEdvBV35a0aS+fjpgw1w7zjTaBijyvAR0Y6JHxW8bnbUyarxOckgHg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB8831 From: Haibo Chen The flexspi on imx8ulp only has 16 LUTs, different with others which have up to 32 LUTs. Add a separate compatible string and nxp_fspi_devtype_data to support flexspi on imx8ulp. Signed-off-by: Haibo Chen --- drivers/spi/spi-nxp-fspi.c | 54 ++++++++++++++++++++++++-------------- 1 file changed, 35 insertions(+), 19 deletions(-) diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c index da110188bfed..96219cea65fb 100644 --- a/drivers/spi/spi-nxp-fspi.c +++ b/drivers/spi/spi-nxp-fspi.c @@ -57,13 +57,6 @@ #include #include -/* - * The driver only uses one single LUT entry, that is updated on - * each call of exec_op(). Index 0 is preset at boot with a basic - * read operation, so let's use the last entry (31). - */ -#define SEQID_LUT 31 - /* Registers used by the driver */ #define FSPI_MCR0 0x00 #define FSPI_MCR0_AHB_TIMEOUT(x) ((x) << 24) @@ -263,9 +256,6 @@ #define FSPI_TFDR 0x180 #define FSPI_LUT_BASE 0x200 -#define FSPI_LUT_OFFSET (SEQID_LUT * 4 * 4) -#define FSPI_LUT_REG(idx) \ - (FSPI_LUT_BASE + FSPI_LUT_OFFSET + (idx) * 4) /* register map end */ @@ -341,6 +331,7 @@ struct nxp_fspi_devtype_data { unsigned int txfifo; unsigned int ahb_buf_size; unsigned int quirks; + unsigned int lut_num; bool little_endian; }; @@ -349,6 +340,7 @@ static struct nxp_fspi_devtype_data lx2160a_data = { .txfifo = SZ_1K, /* (128 * 64 bits) */ .ahb_buf_size = SZ_2K, /* (256 * 64 bits) */ .quirks = 0, + .lut_num = 32, .little_endian = true, /* little-endian */ }; @@ -357,6 +349,7 @@ static struct nxp_fspi_devtype_data imx8mm_data = { .txfifo = SZ_1K, /* (128 * 64 bits) */ .ahb_buf_size = SZ_2K, /* (256 * 64 bits) */ .quirks = 0, + .lut_num = 32, .little_endian = true, /* little-endian */ }; @@ -365,6 +358,7 @@ static struct nxp_fspi_devtype_data imx8qxp_data = { .txfifo = SZ_1K, /* (128 * 64 bits) */ .ahb_buf_size = SZ_2K, /* (256 * 64 bits) */ .quirks = 0, + .lut_num = 32, .little_endian = true, /* little-endian */ }; @@ -373,6 +367,16 @@ static struct nxp_fspi_devtype_data imx8dxl_data = { .txfifo = SZ_1K, /* (128 * 64 bits) */ .ahb_buf_size = SZ_2K, /* (256 * 64 bits) */ .quirks = FSPI_QUIRK_USE_IP_ONLY, + .lut_num = 32, + .little_endian = true, /* little-endian */ +}; + +static struct nxp_fspi_devtype_data imx8ulp_data = { + .rxfifo = SZ_512, /* (64 * 64 bits) */ + .txfifo = SZ_1K, /* (128 * 64 bits) */ + .ahb_buf_size = SZ_2K, /* (256 * 64 bits) */ + .quirks = 0, + .lut_num = 16, .little_endian = true, /* little-endian */ }; @@ -544,6 +548,8 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f, void __iomem *base = f->iobase; u32 lutval[4] = {}; int lutidx = 1, i; + u32 lut_offset = (f->devtype_data->lut_num - 1) * 4 * 4; + u32 target_lut_reg; /* cmd */ lutval[0] |= LUT_DEF(0, LUT_CMD, LUT_PAD(op->cmd.buswidth), @@ -588,8 +594,10 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f, fspi_writel(f, FSPI_LCKER_UNLOCK, f->iobase + FSPI_LCKCR); /* fill LUT */ - for (i = 0; i < ARRAY_SIZE(lutval); i++) - fspi_writel(f, lutval[i], base + FSPI_LUT_REG(i)); + for (i = 0; i < ARRAY_SIZE(lutval); i++) { + target_lut_reg = FSPI_LUT_BASE + lut_offset + i * 4; + fspi_writel(f, lutval[i], base + target_lut_reg); + } dev_dbg(f->dev, "CMD[%02x] lutval[0:%08x 1:%08x 2:%08x 3:%08x], size: 0x%08x\n", op->cmd.opcode, lutval[0], lutval[1], lutval[2], lutval[3], op->data.nbytes); @@ -874,7 +882,7 @@ static int nxp_fspi_do_op(struct nxp_fspi *f, const struct spi_mem_op *op) void __iomem *base = f->iobase; int seqnum = 0; int err = 0; - u32 reg; + u32 reg, seqid_lut; reg = fspi_readl(f, base + FSPI_IPRXFCR); /* invalid RXFIFO first */ @@ -890,8 +898,9 @@ static int nxp_fspi_do_op(struct nxp_fspi *f, const struct spi_mem_op *op) * the LUT at each exec_op() call. And also specify the DATA * length, since it's has not been specified in the LUT. */ + seqid_lut = f->devtype_data->lut_num - 1; fspi_writel(f, op->data.nbytes | - (SEQID_LUT << FSPI_IPCR1_SEQID_SHIFT) | + (seqid_lut << FSPI_IPCR1_SEQID_SHIFT) | (seqnum << FSPI_IPCR1_SEQNUM_SHIFT), base + FSPI_IPCR1); @@ -1015,7 +1024,7 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f) { void __iomem *base = f->iobase; int ret, i; - u32 reg; + u32 reg, seqid_lut; /* disable and unprepare clock to avoid glitch pass to controller */ nxp_fspi_clk_disable_unprep(f); @@ -1090,11 +1099,17 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f) fspi_writel(f, reg, base + FSPI_FLSHB1CR1); fspi_writel(f, reg, base + FSPI_FLSHB2CR1); + /* + * The driver only uses one single LUT entry, that is updated on + * each call of exec_op(). Index 0 is preset at boot with a basic + * read operation, so let's use the last entry (31 or 15). + */ + seqid_lut = f->devtype_data->lut_num - 1; /* AHB Read - Set lut sequence ID for all CS. */ - fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA1CR2); - fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA2CR2); - fspi_writel(f, SEQID_LUT, base + FSPI_FLSHB1CR2); - fspi_writel(f, SEQID_LUT, base + FSPI_FLSHB2CR2); + fspi_writel(f, seqid_lut, base + FSPI_FLSHA1CR2); + fspi_writel(f, seqid_lut, base + FSPI_FLSHA2CR2); + fspi_writel(f, seqid_lut, base + FSPI_FLSHB1CR2); + fspi_writel(f, seqid_lut, base + FSPI_FLSHB2CR2); f->selected = -1; @@ -1288,6 +1303,7 @@ static const struct of_device_id nxp_fspi_dt_ids[] = { { .compatible = "nxp,imx8mm-fspi", .data = (void *)&imx8mm_data, }, { .compatible = "nxp,imx8qxp-fspi", .data = (void *)&imx8qxp_data, }, { .compatible = "nxp,imx8dxl-fspi", .data = (void *)&imx8dxl_data, }, + { .compatible = "nxp,imx8ulp-fspi", .data = (void *)&imx8ulp_data, }, { /* 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han.xu@nxp.com, yogeshgaur.83@gmail.com, broonie@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, singh.kuldeep87k@gmail.com, hs@denx.de, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, haibo.chen@nxp.com Subject: [PATCH 6/6] arm64: dts: imx8ulp: correct the flexspi compatible string Date: Wed, 4 Sep 2024 19:17:27 +0800 Message-Id: <20240904111727.1834935-7-haibo.chen@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240904111727.1834935-1-haibo.chen@nxp.com> References: <20240904111727.1834935-1-haibo.chen@nxp.com> X-ClientProxiedBy: SI2PR02CA0005.apcprd02.prod.outlook.com (2603:1096:4:194::6) To DU0PR04MB9496.eurprd04.prod.outlook.com (2603:10a6:10:32d::19) Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 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BMoBv8Tr0zso6ItGSUECKuRwrBA2DGv0FBBbjwtl6UT7kvAfeiI7WMjAyRXdYKHqY6axZwagvpvlKBKnz51ZVO1OKOGettiIVDAWIvSlDZTh9QGQMcrIOcadrKhAIfdo5M92qGwbp6mTb2/Hhol+em4NoolmyPDKrNGo2lOD3Hxkc5GfDVTeRSNr8Ig8FX/PTXqUPTs+uohQQ5s5eL2A9PTZfzrhOSXNZp1kOwrDB9mmMQSuCnOwU5pUVp0i9Tn0FX3MgHXu9br3aWzL3E8t2er5gdysaWjCryiBYdoJ65oDq3Di5uiHZkYwUtslf3q2AL7A579KIC+6SjgYN1vJu/3+drQligoYD3fWhVujHoyhfxwKEFrzkpJhYY204Agb1ySWrYpNjpyYkZTe5V4XOcB/IEShfb8FhffFhJmkmFk/n5vrUCozhaqd+4NyQ0T0RWmtD79qz6pi6/v5S5/AcIJOtQtLryPD1+nwAlmaUnwywL1fI11r4HCdmevSea7louChKkgkZ8VeVcCOqvLZ0xHfAmAYp6NhbexdprwrgFkAZzQUR0e4f4qzMb80f/+2BqiLhh9dCviE5nFyFn3jKbNDX9/AyfGPNL3W4tMTnXRRizMPFNUJ9+bMzG784zZ9wfG8ActfcvQ09Av/WqdU1tX59ZxbYbsvti2wDDsSh7LHwVswXAEiLGdJYu1B+nILHeO05m5syRr23zaN6JOmH5Gk7BsPaRThNsJyyjQLFnBtl8M0BBhowEFGHJ/zfTgjoOeZOn9nAVjnLRrKE7wYq7MrLA5/lib65oGyIC5dZnZgrsI8pVpRY3QQJc/PTgY5O4851qnPwq5NEpSVkg/jqs5KN2aVNmCR6+m8EL93UnIKIRYZsxm3nCv2H3tjZcPRry4+1YC/9hSQVo5iKiscf/NNeOHXQHgXpTrHwFteul/14CBpwr6TRav3yUPErwDMHTw5hEEx2lI0aARRAgUBovoqzdA3xsu7RWPY+8RJ3ilIdeIP6LmROuamC0ODH1nU6T+lISh2G2DOJnSPsi0o1b1janDWHpzpoQU0w8ixENP9EebCtKBCWkXWXmC16c0Jz/9BhanhiWbxTIlgTHqrF8zhvyYMOQp6L9Qe7W6ypmliTWMvwIbQayQ5UdbsuuR9q3YjJ9HGJF8km5Og8D9T5kvRbuP8LQfrForwWHhtGDkTO2PoUwiJcEJjXIM8zWcd8ThiUaxy+kj1BiqLUp7ihMaN4EDYTRtCcMES3wSqQrK7nCgOPAJBvgDvaoD9B73AdqxZmWlQimYhIpvHKov2i8GaHOGxDuTSwzR8w0Y02Z62BZLFVxh0cEDpZG2TlnGis74vJcj0ub/RKJZQULz6cVDBWUx6oUljhJASinwrF1vCr/8+QcaFMayLQyucbkK5P7sAEoL3ncFaCA4aEzRxE+F477nNNbKbgsG9qg4xKmfzzBENdeyZHEkN6E15U9PfCZ4F053vtKSF3cpOK+U4sndJl/Hl1HoLrnIY//25QXkRz8VcT0oszYuaAdL0RcCcsRmvMbSO1M2BT80c22nBW4D6NevTcB85JOkpN/9VtJNUFDCnKtNs+spBbty8JjGA X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: eb5b5733-f705-4dbe-138c-08dcccd34394 X-MS-Exchange-CrossTenant-AuthSource: DU0PR04MB9496.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Sep 2024 11:18:13.0190 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: VPqc+wjJy+Rhoh4dIgnMDle/xZCgw3JZIWJ7cMH3o7JEN+8DX97nHgNvMisqk6nVBdKIGayNrvOiKJoZO9MSLg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB8831 From: Haibo Chen The flexspi on imx8ulp only has 16 LUTs, and imx8mm flexspi has 32 LUTs, so correct the compatible string here, otherwise will meet below error: [ 1.119072] ------------[ cut here ]------------ [ 1.123926] WARNING: CPU: 0 PID: 1 at drivers/spi/spi-nxp-fspi.c:855 nxp_fspi_exec_op+0xb04/0xb64 [ 1.133239] Modules linked in: [ 1.136448] CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.11.0-rc6-next-20240902-00001-g131bf9439dd9 #69 [ 1.146821] Hardware name: NXP i.MX8ULP EVK (DT) [ 1.151647] pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 1.158931] pc : nxp_fspi_exec_op+0xb04/0xb64 [ 1.163496] lr : nxp_fspi_exec_op+0xa34/0xb64 [ 1.168060] sp : ffff80008002b2a0 [ 1.171526] x29: ffff80008002b2d0 x28: 0000000000000000 x27: 0000000000000000 [ 1.179002] x26: ffff2eb645542580 x25: ffff800080610014 x24: ffff800080610000 [ 1.186480] x23: ffff2eb645548080 x22: 0000000000000006 x21: ffff2eb6455425e0 [ 1.193956] x20: 0000000000000000 x19: ffff80008002b5e0 x18: ffffffffffffffff [ 1.201432] x17: ffff2eb644467508 x16: 0000000000000138 x15: 0000000000000002 [ 1.208907] x14: 0000000000000000 x13: ffff2eb6400d8080 x12: 00000000ffffff00 [ 1.216378] x11: 0000000000000000 x10: ffff2eb6400d8080 x9 : ffff2eb697adca80 [ 1.223850] x8 : ffff2eb697ad3cc0 x7 : 0000000100000000 x6 : 0000000000000001 [ 1.231324] x5 : 0000000000000000 x4 : 0000000000000000 x3 : 00000000000007a6 [ 1.238795] x2 : 0000000000000000 x1 : 00000000000001ce x0 : 00000000ffffff92 [ 1.246267] Call trace: [ 1.248824] nxp_fspi_exec_op+0xb04/0xb64 [ 1.253031] spi_mem_exec_op+0x3a0/0x430 [ 1.257139] spi_nor_read_id+0x80/0xcc [ 1.261065] spi_nor_scan+0x1ec/0xf10 [ 1.264901] spi_nor_probe+0x108/0x2fc [ 1.268828] spi_mem_probe+0x6c/0xbc [ 1.272574] spi_probe+0x84/0xe4 [ 1.275958] really_probe+0xbc/0x29c [ 1.279713] __driver_probe_device+0x78/0x12c [ 1.284277] driver_probe_device+0xd8/0x15c [ 1.288660] __device_attach_driver+0xb8/0x134 [ 1.293316] bus_for_each_drv+0x88/0xe8 [ 1.297337] __device_attach+0xa0/0x190 [ 1.301353] device_initial_probe+0x14/0x20 [ 1.305734] bus_probe_device+0xac/0xb0 [ 1.309752] device_add+0x5d0/0x790 [ 1.313408] __spi_add_device+0x134/0x204 [ 1.317606] of_register_spi_device+0x3b4/0x590 [ 1.322348] spi_register_controller+0x47c/0x754 [ 1.327181] devm_spi_register_controller+0x4c/0xa4 [ 1.332289] nxp_fspi_probe+0x1cc/0x2b0 [ 1.336307] platform_probe+0x68/0xc4 [ 1.340145] really_probe+0xbc/0x29c [ 1.343893] __driver_probe_device+0x78/0x12c [ 1.348457] driver_probe_device+0xd8/0x15c [ 1.352838] __driver_attach+0x90/0x19c [ 1.356857] bus_for_each_dev+0x7c/0xdc [ 1.360877] driver_attach+0x24/0x30 [ 1.364624] bus_add_driver+0xe4/0x208 [ 1.368552] driver_register+0x5c/0x124 [ 1.372573] __platform_driver_register+0x28/0x34 [ 1.377497] nxp_fspi_driver_init+0x1c/0x28 [ 1.381888] do_one_initcall+0x80/0x1c8 [ 1.385908] kernel_init_freeable+0x1c4/0x28c [ 1.390472] kernel_init+0x20/0x1d8 [ 1.394138] ret_from_fork+0x10/0x20 [ 1.397885] ---[ end trace 0000000000000000 ]--- [ 1.407908] ------------[ cut here ]------------ Signed-off-by: Haibo Chen --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index e32d5afcf4a9..43f543768444 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -384,7 +384,7 @@ pcc4: clock-controller@29800000 { }; flexspi2: spi@29810000 { - compatible = "nxp,imx8mm-fspi"; + compatible = "nxp,imx8ulp-fspi"; reg = <0x29810000 0x10000>, <0x60000000 0x10000000>; reg-names = "fspi_base", "fspi_mmap"; #address-cells = <1>;