From patchwork Wed Sep 4 14:52:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13791054 Received: from esa3.hgst.iphmx.com (esa3.hgst.iphmx.com [216.71.153.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84FA51DC187 for ; Wed, 4 Sep 2024 14:54:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.153.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725461684; cv=none; b=C0wqpWBZ1qX7MY3HKK3Cr2R9MUuVJJxGx5vwRiaGYaCc4zvUOhucdWiMDNpQjzS91HnXMQJgjqrS+ssAc30njjK/2HR2PM32wAXzTJBebZ/7fscFAYCx1qVim8dJ7+v/f9EAUvnwgIBjTBlcTg9JJZuReNX6mX7mGp6o10NwiNo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725461684; c=relaxed/simple; bh=heO7htxs1oEjmvCmBZOdtnNziTyF96CIdlHa0L1u2lY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qCKsDZV9kR7gmNSMVmTt5GpkGcXOOxxXu4Q5cGXY9qWgnXbXSnxBVL26gTjkf/SUrDuzHn8MJl+R9ZfXkdsV5jqvbKKz5N2Fmh8SPQAuEYZqJOXG8PK8mgbeHiJXtTqIH2UeHmXr2brqpZ7EtaGyuK/v4KJXqwleXOvJ6QMlb/M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=rID75ltP; arc=none smtp.client-ip=216.71.153.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="rID75ltP" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1725461683; x=1756997683; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=heO7htxs1oEjmvCmBZOdtnNziTyF96CIdlHa0L1u2lY=; b=rID75ltPuRwfmmmcRw3+ZYNPrhhQKpVLp11vW5wW6Mny+G3jPMd2pBT+ MiIvLf4kL30oWx3failLjaU+HFA7S1TjyT9mUuzQYeoAnr2TzlrJo+skd GiU+7o+mDr/SprHrbz2vA6RyD8qU9BBl7BAVhE6iTjJhkFqP8n949cDov RMP6wwdxormxo49FNzXcqAGc9Ta/Fqyt5BgrJ1obTDzL0spqMPXqQC9qg 1JyBzupNoeCOcIlo6FWkvV5ewo6Mdq7zU8UiRhsgDBFbNZrgaOSHWqCVq xBy52Jf6TQeFUzJUAcgTfABmN90qXvBxjuY+tl841Y+kum1gCyz4mslWK Q==; X-CSE-ConnectionGUID: jnMAYuh6Q3CYpWApNRLM4g== X-CSE-MsgGUID: hZeLGRvfR7eKTTcnuuTexQ== X-IronPort-AV: E=Sophos;i="6.10,202,1719849600"; d="scan'208";a="25915018" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 04 Sep 2024 22:54:43 +0800 IronPort-SDR: 66d86695_WIVSBbxdHcBMJ/m+OsvmmepKy6XFvwfsP25tnoa4SgR4OuL SJb8AbTgtchGSP3i1eI15VljL+IpqTlwuh9ylrw== Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Sep 2024 06:54:29 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Sep 2024 07:54:41 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v6 1/9] mmc: sd: SDUC Support Recognition Date: Wed, 4 Sep 2024 17:52:48 +0300 Message-Id: <20240904145256.3670679-2-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240904145256.3670679-1-avri.altman@wdc.com> References: <20240904145256.3670679-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Ultra Capacity SD cards (SDUC) was already introduced in SD7.0. Those cards support capacity larger than 2TB and up to including 128TB. ACMD41 was extended to support the host-card handshake during initialization. The card expects that the HCS & HO2T bits to be set in the command argument, and sets the applicable bits in the R3 returned response. On the contrary, if a SDUC card is inserted to a non-supporting host, it will never respond to this ACMD41 until eventually, the host will timed out and give up. Also, add SD CSD version 3.0 - designated for SDUC, and properly parse the csd register as the c_size field got expanded to 28 bits. Do not enable SDUC for now - leave it to the last patch in the series. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/bus.c | 4 +++- drivers/mmc/core/card.h | 3 +++ drivers/mmc/core/sd.c | 33 +++++++++++++++++++++------------ drivers/mmc/core/sd.h | 2 +- drivers/mmc/core/sdio.c | 2 +- include/linux/mmc/card.h | 2 +- include/linux/mmc/sd.h | 1 + 7 files changed, 31 insertions(+), 16 deletions(-) diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c index 0ddaee0eae54..30763b342bd3 100644 --- a/drivers/mmc/core/bus.c +++ b/drivers/mmc/core/bus.c @@ -321,7 +321,9 @@ int mmc_add_card(struct mmc_card *card) case MMC_TYPE_SD: type = "SD"; if (mmc_card_blockaddr(card)) { - if (mmc_card_ext_capacity(card)) + if (mmc_card_ult_capacity(card)) + type = "SDUC"; + else if (mmc_card_ext_capacity(card)) type = "SDXC"; else type = "SDHC"; diff --git a/drivers/mmc/core/card.h b/drivers/mmc/core/card.h index b7754a1b8d97..64dcb463a4f4 100644 --- a/drivers/mmc/core/card.h +++ b/drivers/mmc/core/card.h @@ -23,6 +23,7 @@ #define MMC_CARD_SDXC (1<<3) /* card is SDXC */ #define MMC_CARD_REMOVED (1<<4) /* card has been removed */ #define MMC_STATE_SUSPENDED (1<<5) /* card is suspended */ +#define MMC_CARD_SDUC (1<<6) /* card is SDUC */ #define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) @@ -30,11 +31,13 @@ #define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC) #define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED)) #define mmc_card_suspended(c) ((c)->state & MMC_STATE_SUSPENDED) +#define mmc_card_ult_capacity(c) ((c)->state & MMC_CARD_SDUC) #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) #define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC) +#define mmc_card_set_ult_capacity(c) ((c)->state |= MMC_CARD_SDUC) #define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED) #define mmc_card_set_suspended(c) ((c)->state |= MMC_STATE_SUSPENDED) #define mmc_card_clr_suspended(c) ((c)->state &= ~MMC_STATE_SUSPENDED) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index ee37ad14e79e..eb9990d9db56 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -114,7 +114,7 @@ void mmc_decode_cid(struct mmc_card *card) /* * Given a 128-bit response, decode to our card CSD structure. */ -static int mmc_decode_csd(struct mmc_card *card) +static int mmc_decode_csd(struct mmc_card *card, bool is_sduc) { struct mmc_csd *csd = &card->csd; unsigned int e, m, csd_struct; @@ -158,9 +158,10 @@ static int mmc_decode_csd(struct mmc_card *card) mmc_card_set_readonly(card); break; case 1: + case 2: /* - * This is a block-addressed SDHC or SDXC card. Most - * interesting fields are unused and have fixed + * This is a block-addressed SDHC, SDXC or SDUC card. + * Most interesting fields are unused and have fixed * values. To avoid getting tripped by buggy cards, * we assume those fixed values ourselves. */ @@ -173,14 +174,19 @@ static int mmc_decode_csd(struct mmc_card *card) e = UNSTUFF_BITS(resp, 96, 3); csd->max_dtr = tran_exp[e] * tran_mant[m]; csd->cmdclass = UNSTUFF_BITS(resp, 84, 12); - csd->c_size = UNSTUFF_BITS(resp, 48, 22); - /* SDXC cards have a minimum C_SIZE of 0x00FFFF */ - if (csd->c_size >= 0xFFFF) + if (csd_struct == 1) + m = UNSTUFF_BITS(resp, 48, 22); + else + m = UNSTUFF_BITS(resp, 48, 28); + csd->c_size = m; + + if (csd->c_size >= 0x400000 && is_sduc) + mmc_card_set_ult_capacity(card); + else if (csd->c_size >= 0xFFFF) mmc_card_set_ext_capacity(card); - m = UNSTUFF_BITS(resp, 48, 22); - csd->capacity = (1 + m) << 10; + csd->capacity = (1 + (typeof(sector_t))m) << 10; csd->read_blkbits = 9; csd->read_partial = 0; @@ -841,8 +847,11 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) * block-addressed SDHC cards. */ err = mmc_send_if_cond(host, ocr); - if (!err) + if (!err) { ocr |= SD_OCR_CCS; + /* Set HO2T as well - SDUC card won't respond otherwise */ + ocr |= SD_OCR_2T; + } /* * If the host supports one of UHS-I modes, request the card @@ -887,7 +896,7 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) return err; } -int mmc_sd_get_csd(struct mmc_card *card) +int mmc_sd_get_csd(struct mmc_card *card, bool is_sduc) { int err; @@ -898,7 +907,7 @@ int mmc_sd_get_csd(struct mmc_card *card) if (err) return err; - err = mmc_decode_csd(card); + err = mmc_decode_csd(card, is_sduc); if (err) return err; @@ -1453,7 +1462,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, } if (!oldcard) { - err = mmc_sd_get_csd(card); + err = mmc_sd_get_csd(card, false); if (err) goto free_card; diff --git a/drivers/mmc/core/sd.h b/drivers/mmc/core/sd.h index fe6dd46927a4..7e8beface2ca 100644 --- a/drivers/mmc/core/sd.h +++ b/drivers/mmc/core/sd.h @@ -10,7 +10,7 @@ struct mmc_host; struct mmc_card; int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr); -int mmc_sd_get_csd(struct mmc_card *card); +int mmc_sd_get_csd(struct mmc_card *card, bool is_sduc); void mmc_decode_cid(struct mmc_card *card); int mmc_sd_setup_card(struct mmc_host *host, struct mmc_card *card, bool reinit); diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c index 4fb247fde5c0..9566837c9848 100644 --- a/drivers/mmc/core/sdio.c +++ b/drivers/mmc/core/sdio.c @@ -769,7 +769,7 @@ static int mmc_sdio_init_card(struct mmc_host *host, u32 ocr, * Read CSD, before selecting the card */ if (!oldcard && mmc_card_sd_combo(card)) { - err = mmc_sd_get_csd(card); + err = mmc_sd_get_csd(card, false); if (err) goto remove; diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index f34407cc2788..f39bce322365 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -35,7 +35,7 @@ struct mmc_csd { unsigned int wp_grp_size; unsigned int read_blkbits; unsigned int write_blkbits; - unsigned int capacity; + sector_t capacity; unsigned int read_partial:1, read_misalign:1, write_partial:1, diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h index 6727576a8755..865cc0ca8543 100644 --- a/include/linux/mmc/sd.h +++ b/include/linux/mmc/sd.h @@ -36,6 +36,7 @@ /* OCR bit definitions */ #define SD_OCR_S18R (1 << 24) /* 1.8V switching request */ #define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */ +#define SD_OCR_2T (1 << 27) /* HO2T/CO2T - SDUC support */ #define SD_OCR_XPC (1 << 28) /* SDXC power control */ #define SD_OCR_CCS (1 << 30) /* Card Capacity Status */ From patchwork Wed Sep 4 14:52:49 2024 Content-Type: text/plain; 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04 Sep 2024 07:54:48 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v6 2/9] mmc: sd: Add Extension memory addressing Date: Wed, 4 Sep 2024 17:52:49 +0300 Message-Id: <20240904145256.3670679-3-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240904145256.3670679-1-avri.altman@wdc.com> References: <20240904145256.3670679-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SDUC memory addressing spans beyond 2TB and up to 128TB. Therefore, 38 bits are required to access the entire memory space of all sectors. Those extra 6 bits are to be carried by CMD22 prior of sending read/write/erase commands: CMD17, CMD18, CMD24, CMD25, CMD32, and CMD33. CMD22 will carry the higher order 6 bits, and must precedes any of the above commands even if it targets sector < 2TB. No error related to address or length is indicated in CMD22 but rather in the read/write command itself. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/sd_ops.c | 16 ++++++++++++++++ drivers/mmc/core/sd_ops.h | 1 + include/linux/mmc/sd.h | 3 +++ 3 files changed, 20 insertions(+) diff --git a/drivers/mmc/core/sd_ops.c b/drivers/mmc/core/sd_ops.c index 8b9b34286ef3..4397e5e06dd8 100644 --- a/drivers/mmc/core/sd_ops.c +++ b/drivers/mmc/core/sd_ops.c @@ -16,6 +16,7 @@ #include #include "core.h" +#include "card.h" #include "sd_ops.h" #include "mmc_ops.h" @@ -188,6 +189,21 @@ int mmc_send_app_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr) return 0; } +int mmc_send_ext_addr(struct mmc_host *host, u32 addr) +{ + struct mmc_command cmd = { + .opcode = SD_ADDR_EXT, + .arg = addr, + .flags = MMC_RSP_R1 | MMC_CMD_AC, + }; + + if (!mmc_card_ult_capacity(host->card)) + return 0; + + return mmc_wait_for_cmd(host, &cmd, 0); +} +EXPORT_SYMBOL_GPL(mmc_send_ext_addr); + static int __mmc_send_if_cond(struct mmc_host *host, u32 ocr, u8 pcie_bits, u32 *resp) { diff --git a/drivers/mmc/core/sd_ops.h b/drivers/mmc/core/sd_ops.h index 7667fc223b74..fd3f10b9cf86 100644 --- a/drivers/mmc/core/sd_ops.h +++ b/drivers/mmc/core/sd_ops.h @@ -21,6 +21,7 @@ int mmc_send_relative_addr(struct mmc_host *host, unsigned int *rca); int mmc_app_send_scr(struct mmc_card *card); int mmc_app_sd_status(struct mmc_card *card, void *ssr); int mmc_app_cmd(struct mmc_host *host, struct mmc_card *card); +int mmc_send_ext_addr(struct mmc_host *host, u32 addr); #endif diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h index 865cc0ca8543..af5fc70e09a2 100644 --- a/include/linux/mmc/sd.h +++ b/include/linux/mmc/sd.h @@ -15,6 +15,9 @@ #define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ #define SD_SWITCH_VOLTAGE 11 /* ac R1 */ +/* Class 2 */ +#define SD_ADDR_EXT 22 /* ac [5:0] R1 */ + /* class 10 */ #define SD_SWITCH 6 /* adtc [31:0] See below R1 */ From patchwork Wed Sep 4 14:52:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13791056 Received: from esa2.hgst.iphmx.com (esa2.hgst.iphmx.com [68.232.143.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A77431DC1B6 for ; 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d="scan'208";a="26291288" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 04 Sep 2024 22:54:56 +0800 IronPort-SDR: 66d867ea_1ACLABYzJ3KlkjJ70ULF5/+91XvwyVvzEMdzxnRZ6Wfc8C3 /AsUvaPtuHe+1JbRvhmOtneaYXUh3qkbuIpY6ig== Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Sep 2024 07:00:10 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Sep 2024 07:54:56 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v6 3/9] mmc: core: Add open-ended Ext memory addressing Date: Wed, 4 Sep 2024 17:52:50 +0300 Message-Id: <20240904145256.3670679-4-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240904145256.3670679-1-avri.altman@wdc.com> References: <20240904145256.3670679-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 For open-ended read/write - just send CMD22 before issuing the command. While at it, make sure that the rw command arg is properly casting the lower 32 bits, as it can be larger now. Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 6 +++++- drivers/mmc/core/core.c | 3 +++ include/linux/mmc/core.h | 5 +++++ 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index cc7318089cf2..54469261bc25 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -226,6 +226,7 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, static void mmc_blk_hsq_req_done(struct mmc_request *mrq); static int mmc_spi_err_check(struct mmc_card *card); static int mmc_blk_busy_cb(void *cb_data, bool *busy); +static int mmc_blk_wait_for_idle(struct mmc_queue *mq, struct mmc_host *host); static struct mmc_blk_data *mmc_blk_get(struct gendisk *disk) { @@ -1710,7 +1711,7 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, brq->mrq.cmd = &brq->cmd; - brq->cmd.arg = blk_rq_pos(req); + brq->cmd.arg = blk_rq_pos(req) & 0xFFFFFFFF; if (!mmc_card_blockaddr(card)) brq->cmd.arg <<= 9; brq->cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC; @@ -1758,6 +1759,9 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, (do_data_tag ? (1 << 29) : 0); brq->sbc.flags = MMC_RSP_R1 | MMC_CMD_AC; brq->mrq.sbc = &brq->sbc; + } else if (mmc_card_ult_capacity(card)) { + brq->cmd.ext_addr = (blk_rq_pos(req) >> 32) & 0x3F; + brq->cmd.has_ext_addr = 1; } } diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index d6c819dd68ed..a0b2999684b3 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -336,6 +336,9 @@ int mmc_start_request(struct mmc_host *host, struct mmc_request *mrq) { int err; + if (mrq->cmd && mrq->cmd->has_ext_addr) + mmc_send_ext_addr(host, mrq->cmd->ext_addr); + init_completion(&mrq->cmd_completion); mmc_retune_hold(host); diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h index f0ac2e469b32..41c21c216584 100644 --- a/include/linux/mmc/core.h +++ b/include/linux/mmc/core.h @@ -76,6 +76,11 @@ struct mmc_command { */ #define mmc_cmd_type(cmd) ((cmd)->flags & MMC_CMD_MASK) + /* for SDUC */ + u8 has_ext_addr; + u8 ext_addr; + u16 reserved; + unsigned int retries; /* max number of retries */ int error; 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04 Sep 2024 07:55:00 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v6 4/9] mmc: core: Don't use close-ended rw for SDUC Date: Wed, 4 Sep 2024 17:52:51 +0300 Message-Id: <20240904145256.3670679-5-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240904145256.3670679-1-avri.altman@wdc.com> References: <20240904145256.3670679-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The SDUC spec expects CMD22 to get squeezed between CMD23 and the read/write command, e.g. CMD23->CMD22->CMD18 and CMD23->CMD22->CMD25. At this early stage of adoption, we want to avoid an amid stream of fixes & quirks of bogus hw, that tends to apply extra logic specifically around auto-cmd12 & auto-cmd23. Let's leave close-ended out for now, and re-consider this should those cards become ubiquitous, if any. Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 54469261bc25..35e82b0f924b 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -2551,7 +2551,7 @@ static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card, if (mmc_host_cmd23(card->host)) { if ((mmc_card_mmc(card) && card->csd.mmca_vsn >= CSD_SPEC_VER_3) || - (mmc_card_sd(card) && + (mmc_card_sd(card) && !mmc_card_ult_capacity(card) && card->scr.cmds & SD_SCR_CMD23_SUPPORT)) md->flags |= MMC_BLK_CMD23; } From patchwork Wed Sep 4 14:52:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13791058 Received: from esa2.hgst.iphmx.com (esa2.hgst.iphmx.com [68.232.143.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52CAF1DC724 for ; Wed, 4 Sep 2024 14:55:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.143.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725461708; cv=none; b=JAP3YyP4uJ6gzs7g6TE2DPReUEIjl5uoBWbnYFhmCLifKYboCAraw+Qp5cWn02NBqdsxKOqNpYhteN7CKX7r9sNrqtEQEuSP7xTfz+o/PE85GwCm1NJFLsezBMB8dDgtqiKZuQPzZw6SEqZj1zBlwbN/b5cRejXCZQqPZCroADE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725461708; c=relaxed/simple; bh=0KCtGpv96/1E4gHzaA3O82LyJ6M9J4NzSYl28bN/Dc8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DAyi4lyZ2r+c1wPrrmVDerztak+52t7+9MRZDvb0DGBTie5YH4tUHYaB5c0B9fL94wyNjpPkGmDKycSfqMjhgyTgSKQWndI2lkmBd6c1wtx5fmc0TU/QOJpGvJVzyy2U1+of1pM9d21ZjZxAbReYdXJ7V2pYX4txbQzJSTfaDws= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=O08xuQgZ; arc=none smtp.client-ip=68.232.143.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="O08xuQgZ" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1725461706; x=1756997706; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0KCtGpv96/1E4gHzaA3O82LyJ6M9J4NzSYl28bN/Dc8=; b=O08xuQgZyIeX3+NUfQha+8e0qwb/OT5zX+M5q76Q7zTrWzY8SheDQPav TLcvLSeqsluUrys0hner51i/Ervk5qnBwb5OnSMvUBJ920nF2TMxgu7oI OSJQMQJxRkwZMyFb2ttEEfLJNwHwwcf11BquLiJU8tqjlSpo2QssBb848 u1//YCa4vaYVBkqxtTKNVP64rVayOjFyhxZIF4r6iaDsaiYzIAhjF3LBw xApRgJDoR3McuxIC9lLqFucTQUReAsEfrG9AlWsDR2XN476z4JmosxImK stWNPGLqNdfEniIVVb/GQYMdEEe6UxrgVsB+R13Vlx8WirQu7SspkZx/M g==; X-CSE-ConnectionGUID: WUs07+KtTQCWqHrAGi6p+A== X-CSE-MsgGUID: XOei77PqRkCQQn2NKCMusg== X-IronPort-AV: E=Sophos;i="6.10,202,1719849600"; d="scan'208";a="26291314" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 04 Sep 2024 22:55:05 +0800 IronPort-SDR: 66d867f3_8GnOuIOxF81Bm99oXh+/ZcuUQFXMaKRi1ZZGfby3yM0Xyol jJeqvpExhCLRCSw1AfsA2tqOZJcSH60jAF5DM+g== Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Sep 2024 07:00:19 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Sep 2024 07:55:05 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v6 5/9] mmc: core: Allow mmc erase to carry large addresses Date: Wed, 4 Sep 2024 17:52:52 +0300 Message-Id: <20240904145256.3670679-6-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240904145256.3670679-1-avri.altman@wdc.com> References: <20240904145256.3670679-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Preparing for SDUC, Allow the erase address to be larger beyond a 32 bit address. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 6 ++++-- drivers/mmc/core/core.c | 33 ++++++++++++++++++--------------- drivers/mmc/core/core.h | 16 ++++++++++++---- 3 files changed, 34 insertions(+), 21 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 35e82b0f924b..50d37c4f5a50 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -1200,7 +1200,8 @@ static void mmc_blk_issue_erase_rq(struct mmc_queue *mq, struct request *req, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr; + unsigned int nr; + sector_t from; int err = 0; blk_status_t status = BLK_STS_OK; @@ -1255,7 +1256,8 @@ static void mmc_blk_issue_secdiscard_rq(struct mmc_queue *mq, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr, arg; + unsigned int nr, arg; + sector_t from; int err = 0, type = MMC_BLK_SECDISCARD; blk_status_t status = BLK_STS_OK; diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index a0b2999684b3..06f63fbaadfb 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1601,8 +1601,8 @@ static unsigned int mmc_erase_timeout(struct mmc_card *card, return mmc_mmc_erase_timeout(card, arg, qty); } -static int mmc_do_erase(struct mmc_card *card, unsigned int from, - unsigned int to, unsigned int arg) +static int mmc_do_erase(struct mmc_card *card, sector_t from, + sector_t to, unsigned int arg) { struct mmc_command cmd = {}; unsigned int qty = 0, busy_timeout = 0; @@ -1633,8 +1633,8 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, else if (mmc_card_sd(card)) qty += to - from + 1; else - qty += ((to / card->erase_size) - - (from / card->erase_size)) + 1; + qty += (mmc_sector_div(to, card->erase_size) - + mmc_sector_div(from, card->erase_size)) + 1; if (!mmc_card_blockaddr(card)) { from <<= 9; @@ -1703,18 +1703,19 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, } static unsigned int mmc_align_erase_size(struct mmc_card *card, - unsigned int *from, - unsigned int *to, + sector_t *from, + sector_t *to, unsigned int nr) { - unsigned int from_new = *from, nr_new = nr, rem; + sector_t from_new = *from; + unsigned int nr_new = nr, rem; /* * When the 'card->erase_size' is power of 2, we can use round_up/down() * to align the erase size efficiently. */ if (is_power_of_2(card->erase_size)) { - unsigned int temp = from_new; + sector_t temp = from_new; from_new = round_up(temp, card->erase_size); rem = from_new - temp; @@ -1726,7 +1727,7 @@ static unsigned int mmc_align_erase_size(struct mmc_card *card, nr_new = round_down(nr_new, card->erase_size); } else { - rem = from_new % card->erase_size; + rem = mmc_sector_mod(from_new, card->erase_size); if (rem) { rem = card->erase_size - rem; from_new += rem; @@ -1759,10 +1760,12 @@ static unsigned int mmc_align_erase_size(struct mmc_card *card, * * Caller must claim host before calling this function. */ -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, +int mmc_erase(struct mmc_card *card, sector_t from, unsigned int nr, unsigned int arg) { - unsigned int rem, to = from + nr; + unsigned int rem; + sector_t to = from + nr; + int err; if (!(card->csd.cmdclass & CCC_ERASE)) @@ -1783,7 +1786,7 @@ int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, return -EOPNOTSUPP; if (arg == MMC_SECURE_ERASE_ARG) { - if (from % card->erase_size || nr % card->erase_size) + if (mmc_sector_mod(from, card->erase_size) || nr % card->erase_size) return -EINVAL; } @@ -1807,7 +1810,7 @@ int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, * and call mmc_do_erase() twice if necessary. This special case is * identified by the card->eg_boundary flag. */ - rem = card->erase_size - (from % card->erase_size); + rem = card->erase_size - mmc_sector_mod(from, card->erase_size); if ((arg & MMC_TRIM_OR_DISCARD_ARGS) && card->eg_boundary && nr > rem) { err = mmc_do_erase(card, from, from + rem - 1, arg); from += rem; @@ -1866,12 +1869,12 @@ int mmc_can_secure_erase_trim(struct mmc_card *card) } EXPORT_SYMBOL(mmc_can_secure_erase_trim); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, +int mmc_erase_group_aligned(struct mmc_card *card, sector_t from, unsigned int nr) { if (!card->erase_size) return 0; - if (from % card->erase_size || nr % card->erase_size) + if (mmc_sector_mod(from, card->erase_size) || nr % card->erase_size) return 0; return 1; } diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h index 37091a6589ed..fc9d5e9620b1 100644 --- a/drivers/mmc/core/core.h +++ b/drivers/mmc/core/core.h @@ -116,15 +116,13 @@ bool mmc_is_req_done(struct mmc_host *host, struct mmc_request *mrq); int mmc_start_request(struct mmc_host *host, struct mmc_request *mrq); -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, - unsigned int arg); +int mmc_erase(struct mmc_card *card, sector_t from, unsigned int nr, unsigned int arg); int mmc_can_erase(struct mmc_card *card); int mmc_can_trim(struct mmc_card *card); int mmc_can_discard(struct mmc_card *card); int mmc_can_sanitize(struct mmc_card *card); int mmc_can_secure_erase_trim(struct mmc_card *card); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, - unsigned int nr); +int mmc_erase_group_aligned(struct mmc_card *card, sector_t from, unsigned int nr); unsigned int mmc_calc_max_discard(struct mmc_card *card); int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen); @@ -199,4 +197,14 @@ static inline int mmc_flush_cache(struct mmc_host *host) return 0; } +static inline unsigned int mmc_sector_div(sector_t dividend, u32 divisor) +{ + return div_u64(dividend, divisor); +} + +static inline unsigned int mmc_sector_mod(sector_t dividend, u32 divisor) +{ + return sector_div(dividend, divisor); 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04 Sep 2024 07:55:11 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v6 6/9] mmc: core: Add Ext memory addressing for erase Date: Wed, 4 Sep 2024 17:52:53 +0300 Message-Id: <20240904145256.3670679-7-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240904145256.3670679-1-avri.altman@wdc.com> References: <20240904145256.3670679-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 CMD22 shall precede CMD32 and CMD33 to configure 38-bit erase start address and 38 bit erase stop address. Signed-off-by: Avri Altman --- drivers/mmc/core/core.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index 06f63fbaadfb..8d9f2c44d2a2 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1645,8 +1645,14 @@ static int mmc_do_erase(struct mmc_card *card, sector_t from, cmd.opcode = SD_ERASE_WR_BLK_START; else cmd.opcode = MMC_ERASE_GROUP_START; - cmd.arg = from; + cmd.arg = from & 0xFFFFFFFF; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; + + if (mmc_card_ult_capacity(card)) { + cmd.ext_addr = (from >> 32) & 0x3F; + cmd.has_ext_addr = 1; + } + err = mmc_wait_for_cmd(card->host, &cmd, 0); if (err) { pr_err("mmc_erase: group start error %d, " @@ -1660,8 +1666,14 @@ static int mmc_do_erase(struct mmc_card *card, sector_t from, cmd.opcode = SD_ERASE_WR_BLK_END; else cmd.opcode = MMC_ERASE_GROUP_END; - cmd.arg = to; + cmd.arg = to & 0xFFFFFFFF; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; + + if (mmc_card_ult_capacity(card)) { + cmd.ext_addr = (to >> 32) & 0x3F; + cmd.has_ext_addr = 1; + } + err = mmc_wait_for_cmd(card->host, &cmd, 0); if (err) { pr_err("mmc_erase: group end error %d, status %#x\n", From patchwork Wed Sep 4 14:52:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13791060 Received: from esa1.hgst.iphmx.com (esa1.hgst.iphmx.com [68.232.141.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3D561DC195 for ; Wed, 4 Sep 2024 14:55:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.141.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725461722; cv=none; b=amZUz05IaR9bBiapQjzBuf531o6NoFkAAIXrjOIbweISbMHUkDwktr/ThmjGf7If30NrmigpgiLseAB+soyEON5eLVE0DdZ3OTPOhyF4+LStSYcRoZySfYhFC8uTGAO4pC9HLiWymQGq1TP1qDoTI12Se+yjP3jkPbGRITgJLPg= ARC-Message-Signature: i=1; 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04 Sep 2024 06:55:03 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Sep 2024 07:55:15 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v6 7/9] mmc: core: Adjust ACMD22 to SDUC Date: Wed, 4 Sep 2024 17:52:54 +0300 Message-Id: <20240904145256.3670679-8-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240904145256.3670679-1-avri.altman@wdc.com> References: <20240904145256.3670679-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 ACMD22 is used to verify the previously write operation. Normally, it returns the number of written sectors as u32. SDUC, however, returns it as u64. This is not a superfluous requirement, because SDUC writes may exceeds 2TB. For Linux mmc however, the previously write operation could not be more than the block layer limits, thus we make room for a u64 and cast the returning value to u32. Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 50d37c4f5a50..f36611512a1d 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -50,6 +50,7 @@ #include #include +#include #include "queue.h" #include "block.h" @@ -994,11 +995,10 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) int err; u32 result; __be32 *blocks; - + u8 resp_sz; struct mmc_request mrq = {}; struct mmc_command cmd = {}; struct mmc_data data = {}; - struct scatterlist sg; err = mmc_app_cmd(card->host, card); @@ -1009,7 +1009,14 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) cmd.arg = 0; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC; - data.blksz = 4; + /* + * Normally, ACMD22 returns the number of written sectors as u32. + * SDUC, however, returns it as u64. This is not a superfluous + * requirement, because SDUC writes may exceed 2TB. + */ + resp_sz = mmc_card_ult_capacity(card) ? 8 : 4; + + data.blksz = resp_sz; data.blocks = 1; data.flags = MMC_DATA_READ; data.sg = &sg; @@ -1019,15 +1026,25 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) mrq.cmd = &cmd; mrq.data = &data; - blocks = kmalloc(4, GFP_KERNEL); + blocks = kmalloc(resp_sz, GFP_KERNEL); if (!blocks) return -ENOMEM; - sg_init_one(&sg, blocks, 4); + sg_init_one(&sg, blocks, resp_sz); mmc_wait_for_req(card->host, &mrq); - result = ntohl(*blocks); + if (mmc_card_ult_capacity(card)) { + u64 blocks_64 = get_unaligned_be64(blocks); + /* + * For Linux mmc however, the previously write operation could + * not be more than the block layer limits, thus just make room + * for a u64 and cast the response back to u32. + */ + result = blocks_64 > UINT_MAX ? UINT_MAX : (u32)blocks_64; + } else { + result = ntohl(*blocks); + } kfree(blocks); if (cmd.error || data.error) From patchwork Wed Sep 4 14:52:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13791061 Received: from esa5.hgst.iphmx.com (esa5.hgst.iphmx.com [216.71.153.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25E721DC187 for ; Wed, 4 Sep 2024 14:55:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.153.144 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725461726; cv=none; b=NhFrGHdVf9uATBlfbZ3UBvIL7rGNJDb7QFw2nEDQH7zF+sr6iJlNpww9hgMSBwMiw39ja3Cug3MugEmDVqsLDZfSs5JdEQPXGDwrYu5XTJC3quuj7DyKJnBsXv5Mqr3YrTAAZZem0iXRHb2FxvPFU1T2PAqaHwicnLx/Zm8u2Y0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725461726; c=relaxed/simple; bh=KhLw2cIeU26Njm3pIvs0KiFLLn7t2hzqXdK9b6qDqJI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=M3wj/Mhvi70vhbTSkjoa8aRnSFoYhMHvKNRchoTn4XNNgb+0uynRv4ecMSV+NaRpy6Y7DDto4u/RnDdrai2G3Yy8nDrLpOAaGhioI2bzYYo3HZPMgPB9YytT5EiWOqC2WSXAgGPX1hyw8gFUtI3Xxef99JcBzu9dgAg3f5tczts= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=o0WbgFtY; arc=none smtp.client-ip=216.71.153.144 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="o0WbgFtY" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1725461725; x=1756997725; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KhLw2cIeU26Njm3pIvs0KiFLLn7t2hzqXdK9b6qDqJI=; b=o0WbgFtYusRNIWAj5VMZPCaCGqbDQ64MWcxFFGjNuUscDCn2rHDtjJK8 RCZu7jbinVrHQvqTYPSrs8pUh1l34TZ3kwolGn483SrqUfYTwY9ysc0AU dRv0FkFTQ1KlDwZ+crbdQPvLFtPSb6xgkIpPh/KpDHEjjaLHQFRUM7H1+ tzfHciavWdSQ89fm5532M7sJSY0f4R1I4WPz2b2UyMlKkFq+KOBIlDlOH cu5Bnt81yQOr/cvdaw4YTYtGWI77LCtvRoywwaWJNafGns9gxBs533YqQ VH7y9rd5Gwu0LA1EV3qXdxP7iAfdkSwjRvfOctcOXrXcgLgDgby4xTGCy g==; X-CSE-ConnectionGUID: JWhPXHZbTP+R2zpSK+Ybow== X-CSE-MsgGUID: VDbWEoCISuS6YR+zcQvzvQ== X-IronPort-AV: E=Sophos;i="6.10,202,1719849600"; d="scan'208";a="26933752" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 04 Sep 2024 22:55:24 +0800 IronPort-SDR: 66d866bf_7DyYjbyXevmgD3seP7512ylArjIt5gHb05Wm8O4xpxL7J55 GhufWTrWmW1uJ9EULNyi+K/VEg2f84b3UNkf3/g== Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Sep 2024 06:55:11 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Sep 2024 07:55:21 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v6 8/9] mmc: core: Disable SDUC for mmc_test Date: Wed, 4 Sep 2024 17:52:55 +0300 Message-Id: <20240904145256.3670679-9-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240904145256.3670679-1-avri.altman@wdc.com> References: <20240904145256.3670679-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Panning to ameliorate it in the very near future. Signed-off-by: Avri Altman --- drivers/mmc/core/mmc_test.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/mmc/core/mmc_test.c b/drivers/mmc/core/mmc_test.c index b7f627a9fdea..a28e1a1aded3 100644 --- a/drivers/mmc/core/mmc_test.c +++ b/drivers/mmc/core/mmc_test.c @@ -3218,6 +3218,13 @@ static int mmc_test_register_dbgfs_file(struct mmc_card *card) mutex_lock(&mmc_test_lock); + if (mmc_card_ult_capacity(card)) { + pr_info("%s: mmc-test currently UNSUPPORTED for SDUC\n", + mmc_hostname(card->host)); + ret = -EOPNOTSUPP; + goto err; + } + ret = __mmc_test_register_dbgfs_file(card, "test", S_IWUSR | S_IRUGO, &mmc_test_fops_test); if (ret) From patchwork Wed Sep 4 14:52:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13791062 Received: from esa6.hgst.iphmx.com (esa6.hgst.iphmx.com [216.71.154.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98A811DC1A1 for ; Wed, 4 Sep 2024 14:55:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725461732; cv=none; b=JbOmYvB2Q8VhMk2f01FCXSNc4Ttve8B0/wRIcWHKc0+uMr9xpTvR09QuY6T1+nTPINajjocYEYm9sFRlfjJvPgTjLlOC4+a3PfHlGqJU7Q+e+B7Brs+QSaiTWIDdRRTCEe6nj+nVWBfmF/RmpUCFjG6QGTdu/46xGu6sPLM284Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725461732; c=relaxed/simple; bh=5vXwqAn3Jkjo0mlxNTKkILiOqE+jnj/zRJ6IrCryjDg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=VtBPMJrtC2M8mJ4yVhDlaBle1a2z+B2D1pbDAO8Wm8RZV+c7F9/vBVSzovquMG+4/+scurUK+z9aek2Q7onsGe+Arfyq3I49skE8Xi0b4P7rrllNU6yopTlYJrh74z0RaFeRQKw+zVelGWkg1gNXfp8KpLTAkSTCDYzmHkL0io0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=XJyt2FZ8; arc=none smtp.client-ip=216.71.154.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="XJyt2FZ8" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1725461730; x=1756997730; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5vXwqAn3Jkjo0mlxNTKkILiOqE+jnj/zRJ6IrCryjDg=; b=XJyt2FZ8Q4WL7I9sy9BgLFke+me0r9XukBQ9v1IYMImxR9TDd+fZK9iW SLH1s86SdRe4RM4OBrC9HfPs3zmURp1ZVhbVJSwk7VXl2VZj5EnkqOs/e ib1oDoSfJnnqaXHKukzfWWEXG8wSitBw6ypDr9ij7uTWb2+VRkBrkJCbl 8JVUyq+AjPT79Av8iswr8O4zX8M0pWBf4Yh4SDeJ2xHKe7YHStpnmyccl +AYptCUgk0h3eqzWWoypOYILQetrhHnaDV+ZkjertN5pY1rpHurX3fYgX jE1cnAmeUFb/aKLK9C1Mk5tpyQv9ibuZbt9BQ3WS2baaFgAClz+WXy6/3 g==; X-CSE-ConnectionGUID: 8wXiRTBPRbebjZKQXUUi2Q== X-CSE-MsgGUID: JuVzRAMURz+/tnJE3OBIdQ== X-IronPort-AV: E=Sophos;i="6.10,202,1719849600"; d="scan'208";a="25940556" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 04 Sep 2024 22:55:29 +0800 IronPort-SDR: 66d866c4_lLy+ZERhU+bxqhT/n8Qc897BUp7H5eOcGhn/+dA5n3jal39 LWHSsFgCTornAxEb9QlG48k28sUujalQ/LVnyyw== Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Sep 2024 06:55:16 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Sep 2024 07:55:26 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v6 9/9] mmc: core: Enable SDUC Date: Wed, 4 Sep 2024 17:52:56 +0300 Message-Id: <20240904145256.3670679-10-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240904145256.3670679-1-avri.altman@wdc.com> References: <20240904145256.3670679-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable SDUC if the card responded to ACMD41 with HCS & HO2T bits set. Signed-off-by: Avri Altman --- drivers/mmc/core/sd.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index eb9990d9db56..4261d3ae31ef 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -1462,7 +1462,10 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, } if (!oldcard) { - err = mmc_sd_get_csd(card, false); + u32 sduc_arg = SD_OCR_CCS | SD_OCR_2T; + bool is_sduc = (rocr & sduc_arg) == sduc_arg; + + err = mmc_sd_get_csd(card, is_sduc); if (err) goto free_card;