From patchwork Thu Sep 5 09:30:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrei Simion X-Patchwork-Id: 13792042 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A97ABCD5BA2 for ; Thu, 5 Sep 2024 09:33:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=WoE1z8TuYYOY6r54AoiDrIkQBosYckQIlz2XZbs+o4w=; b=UIDkM3dM0CZnwjtcH/AONJ3i3+ 0azRjqXYLqPV4HuMHrrzMBV8/E61ta84Y7bhNgcNK97j5PSdsb5xV38QzSG9RB/vPRU9lYZYl0lim 81taBZApn+KhYSU6dnX+FUXU/QyiDRo/wNXZCCMBsynHjrM2KnnONS3nrLFF4KdmjN4TjeWKUeBtP fZorNNYSc9+RsZcp/IBBGPstbPwbB6lT+OSrl+1Ja1BTPCQCF2jKUkznsq0wkYD6XUbOhGaXguzl7 s+gZwRZG+Gs/4liKZyDA3i9sh2NmzXNjdMJ3R6+CsxejjV1HWOBDdGyUrvKo+UOzOyIm0yBy9OD2+ P1yzwXZg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sm8rn-00000007mw0-2wS0; Thu, 05 Sep 2024 09:33:28 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sm8q0-00000007mNz-0S4d for linux-arm-kernel@lists.infradead.org; Thu, 05 Sep 2024 09:31:37 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725528696; x=1757064696; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=UD+4J9h5U556VSQaV+fZrmK1+8BUz0vKF0+AJcFrVJU=; b=kCMea8x5aWN9kSbkX375lJZS9RMHGt6jl2OUWvnQcEE5bVfbba4ha/Qb OyVUKAvSAc3RLD4ln2bI0k2vmZ6/AHwFQFHN3MZ+dIO7B5SuU3pRKQDgX hr6AwWTzaEXl2cy04aFt2ddQN5oHxi+DcuI7+n5yssEc15twHbK7NNBbu VmnWJ/8gNkpoQL3pDT0S/lF0KHDniVCNZ0bb7/C0a89DsO4n8rsG9WUoj iZ6U2I/xYz7bz6PenmBbGsXhedsghGgT5QN6oQoa+5vbDwcyyMGqk6WBu 7HM5mi/Z80QqS1b20wASSEqi33PbRPKJyP/0Z67N/vkhmms6OW28xCrh8 Q==; X-CSE-ConnectionGUID: TvvipYo5T+CgffTOc9cuVg== X-CSE-MsgGUID: cXs/9IlcQ0WGxfwHa6gH/w== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="31355457" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 02:31:35 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 02:30:53 -0700 Received: from ROB-ULT-M76677.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 02:30:51 -0700 From: Andrei Simion To: , , , , , CC: , , , Andrei Simion Subject: [PATCH] ARM: dts: microchip: sam9x60: Add missing property atmel,usart-mode Date: Thu, 5 Sep 2024 12:30:46 +0300 Message-ID: <20240905093046.23428-1-andrei.simion@microchip.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240905_023136_189647_C90BB856 X-CRM114-Status: UNSURE ( 8.64 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org ~: make dtbs_check DT_SCHEMA_FILES=atmel,at91-usart.ymal -> for all boards which inherit sam9x60.dtsi: serial@200: $nodename:0: 'serial@200' does not match '^spi(@.*|-([0-9]|[1-9][0-9]+))?$ serial@200: atmel,use-dma-rx: False schema does not allow True serial@200: atmel,use-dma-tx: False schema does not allow True serial@200: atmel,fifo-size: False schema does not allow [[16]] -> Means : atmel,usart-mode = misses for uart: 0,1,2,3,4,6,7,8,9,10,11,12 Add to uart nodes the property atmel,usart-mode to specify the driver to be used in serial mode to be compliant to atmel,at91-usart.yaml. Fixes: 99c808335877 ("ARM: dts: at91: sam9x60: Add missing flexcom definitions") Signed-off-by: Andrei Simion Acked-by: Nicolas Ferre --- arch/arm/boot/dts/microchip/sam9x60.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) base-commit: fdadd93817f124fd0ea6ef251d4a1068b7feceba diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi index 04a6d716ecaf..0ba424bba7cc 100644 --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi @@ -174,6 +174,7 @@ flx4: flexcom@f0000000 { uart4: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -376,6 +377,7 @@ flx11: flexcom@f0020000 { uart11: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -427,6 +429,7 @@ flx12: flexcom@f0024000 { uart12: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -586,6 +589,7 @@ flx6: flexcom@f8010000 { uart6: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -637,6 +641,7 @@ flx7: flexcom@f8014000 { uart7: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -688,6 +693,7 @@ flx8: flexcom@f8018000 { uart8: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -739,6 +745,7 @@ flx0: flexcom@f801c000 { uart0: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -809,6 +816,7 @@ flx1: flexcom@f8020000 { uart1: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -879,6 +887,7 @@ flx2: flexcom@f8024000 { uart2: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -949,6 +958,7 @@ flx3: flexcom@f8028000 { uart3: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -1074,6 +1084,7 @@ flx9: flexcom@f8040000 { uart9: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -1125,6 +1136,7 @@ flx10: flexcom@f8044000 { uart10: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) |