From patchwork Fri Sep 6 12:57:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794135 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EF99DCE7B03 for ; Fri, 6 Sep 2024 12:56:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1216110E191; Fri, 6 Sep 2024 12:56:32 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="a6ZKWG4P"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id BF27310E06C for ; Fri, 6 Sep 2024 12:56:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725627391; x=1757163391; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=P6NJUEwt7qU+DFq5RwLweEmGpq/NsY9KzFaG7GTk49g=; b=a6ZKWG4PmVU0noJ/ZODahrkJke8L6CggNtNiZy2OsMdKz4376aw2ZldT U5rk9FL+AA8qQ8jMyChBZ23RY1QzAaAsTBI4WBcb3kCc8uPF5p81U7Fry 4hukW4FlgYcKQCe1AcXPRwyNdx9r8pLwfRsqY8YTT/EZn7l09XlbUbvym yqlX27F06NqmzP/LGtB3nwT/l86RpgiIJ/YlAz+1OgMatnSz0Z4lAtbrt NqIztVWGPKoGl2LklHotY/QAm7WXs2mqVqiEPG0jMtUwdlKHvN21QFloi bstXrz1Y2nZpweu+tZwWapoH+yKnW//tsMeNaIE9ioheykSlTum/tSWY9 A==; X-CSE-ConnectionGUID: BwE6E5BQRnejUT29RmX9Sg== X-CSE-MsgGUID: NzURDO4lS4uuRJG4r414fQ== X-IronPort-AV: E=McAfee;i="6700,10204,11187"; a="24257397" X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="24257397" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:31 -0700 X-CSE-ConnectionGUID: PmCsRSm3RhWdn9x4LCasKA== X-CSE-MsgGUID: VnCi9OiCSDqDvI1/GRDMwg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="66691043" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:30 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 01/14] drm/i915/display: Modify debugfs for joiner to force n pipes Date: Fri, 6 Sep 2024 18:27:54 +0530 Message-ID: <20240906125807.3960642-2-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" At the moment, the debugfs for joiner allows only to force enable/disable pipe joiner for 2 pipes. Modify it to force join 'n' number of pipes, where n is a valid pipe joiner configuration. This will help in case of ultra joiner where 4 pipes are joined. v2: -Fix commit message to state that only valid joiner config can be forced. (Suraj) -Rename the identifiers to have INTEL_BIG/NONE_JOINER_PIPES. (Suraj) Signed-off-by: Ankit Nautiyal --- .../drm/i915/display/intel_display_debugfs.c | 71 ++++++++++++++++++- .../drm/i915/display/intel_display_types.h | 8 ++- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- 3 files changed, 77 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 830b9eb60976..0ef573afd8a1 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -1504,6 +1504,73 @@ static int intel_crtc_pipe_show(struct seq_file *m, void *unused) } DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); +static int i915_joiner_show(struct seq_file *m, void *data) +{ + struct intel_connector *connector = m->private; + struct drm_i915_private *i915 = to_i915(connector->base.dev); + int ret; + + ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); + if (ret) + return ret; + + seq_printf(m, "Force_joined_pipes: %d\n", connector->force_joined_pipes); + + drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); + + return ret; +} + +static ssize_t i915_joiner_write(struct file *file, + const char __user *ubuf, + size_t len, loff_t *offp) +{ + struct seq_file *m = file->private_data; + struct intel_connector *connector = m->private; + struct drm_i915_private *i915 = to_i915(connector->base.dev); + int force_join_pipes = 0; + int ret; + + if (len == 0) + return 0; + + drm_dbg(&i915->drm, + "Copied %zu bytes from user to force joiner\n", len); + + ret = kstrtoint_from_user(ubuf, len, 0, &force_join_pipes); + if (ret < 0) + return ret; + + drm_dbg(&i915->drm, "Got %d for force joining pipes\n", force_join_pipes); + + if (force_join_pipes < INTEL_NONE_JOINER_PIPES || + force_join_pipes >= INTEL_INVALID_JOINER_PIPES) { + drm_dbg(&i915->drm, "Ignoring Invalid num of pipes %d for force joining\n", + force_join_pipes); + connector->force_joined_pipes = INTEL_NONE_JOINER_PIPES; + } else { + connector->force_joined_pipes = force_join_pipes; + } + + *offp += len; + + return len; +} + +static int i915_joiner_open(struct inode *inode, struct file *file) +{ + return single_open(file, i915_joiner_show, inode->i_private); +} + +static const struct file_operations i915_joiner_fops = { + .owner = THIS_MODULE, + .open = i915_joiner_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, + .write = i915_joiner_write +}; + /** * intel_connector_debugfs_add - add i915 specific connector debugfs files * @connector: pointer to a registered intel_connector @@ -1553,8 +1620,8 @@ void intel_connector_debugfs_add(struct intel_connector *connector) if (DISPLAY_VER(i915) >= 11 && (connector_type == DRM_MODE_CONNECTOR_DisplayPort || connector_type == DRM_MODE_CONNECTOR_eDP)) { - debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root, - &connector->force_bigjoiner_enable); + debugfs_create_file("i915_joiner_force_enable", 0644, root, + connector, &i915_joiner_fops); } if (connector_type == DRM_MODE_CONNECTOR_DSI || diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 733de5edcfdb..c213fb61ceb7 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -486,6 +486,12 @@ struct intel_hdcp { enum transcoder stream_transcoder; }; +enum intel_joiner_pipe_count { + INTEL_NONE_JOINER_PIPES = 0, + INTEL_BIG_JOINER_PIPES = 2, + INTEL_INVALID_JOINER_PIPES, +}; + struct intel_connector { struct drm_connector base; /* @@ -524,7 +530,7 @@ struct intel_connector { struct intel_dp *mst_port; - bool force_bigjoiner_enable; + enum intel_joiner_pipe_count force_joined_pipes; struct { struct drm_dp_aux *dsc_decompression_aux; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index a1fcedfd404b..862a460c32b7 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1271,7 +1271,7 @@ bool intel_dp_need_joiner(struct intel_dp *intel_dp, return false; return clock > i915->display.cdclk.max_dotclk_freq || hdisplay > 5120 || - connector->force_bigjoiner_enable; + connector->force_joined_pipes == INTEL_BIG_JOINER_PIPES; } bool intel_dp_has_dsc(const struct intel_connector *connector) From patchwork Fri Sep 6 12:57:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794136 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8C44ECE7B06 for ; Fri, 6 Sep 2024 12:56:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2B71410E192; Fri, 6 Sep 2024 12:56:34 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="S9TnsdG6"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 76EDB10E192 for ; Fri, 6 Sep 2024 12:56:32 +0000 (UTC) DKIM-Signature: v=1; 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d="scan'208";a="66691048" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:31 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 02/14] drm/i915/display: Use joined pipes in intel_dp_joiner_needs_dsc Date: Fri, 6 Sep 2024 18:27:55 +0530 Message-ID: <20240906125807.3960642-3-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In preparation of ultrajoiner, use number of joined pipes in the intel_dp_joiner_needs_dsc helper, instead of joiner flag. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/display/intel_display.h | 2 ++ drivers/gpu/drm/i915/display/intel_dp.c | 18 +++++++++++++----- drivers/gpu/drm/i915/display/intel_dp.h | 4 +++- drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 ++++++++++--- 5 files changed, 29 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index b4ec9bf12aa7..82492ee6c2e6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -278,7 +278,7 @@ bool intel_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state) crtc->pipe == joiner_primary_pipe(crtc_state); } -static int intel_joiner_num_pipes(const struct intel_crtc_state *crtc_state) +int intel_joiner_num_pipes(const struct intel_crtc_state *crtc_state) { return hweight8(crtc_state->joiner_pipes); } diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index b21d9578d5db..3b90c5190d65 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -587,4 +587,6 @@ bool assert_port_valid(struct drm_i915_private *i915, enum port port); bool intel_scanout_needs_vtd_wa(struct drm_i915_private *i915); +int intel_joiner_num_pipes(const struct intel_crtc_state *crtc_state); + #endif diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 862a460c32b7..f95b62a026b6 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1309,6 +1309,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, u8 dsc_slice_count = 0; enum drm_mode_status status; bool dsc = false, joiner = false; + enum intel_joiner_pipe_count joined_pipes = INTEL_NONE_JOINER_PIPES; status = intel_cpu_transcoder_mode_valid(dev_priv, mode); if (status != MODE_OK) @@ -1332,7 +1333,8 @@ intel_dp_mode_valid(struct drm_connector *_connector, if (intel_dp_need_joiner(intel_dp, connector, mode->hdisplay, target_clock)) { joiner = true; - max_dotclk *= 2; + joined_pipes = INTEL_BIG_JOINER_PIPES; + max_dotclk *= INTEL_BIG_JOINER_PIPES; } if (target_clock > max_dotclk) return MODE_CLOCK_HIGH; @@ -1390,7 +1392,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, dsc = dsc_max_compressed_bpp && dsc_slice_count; } - if (intel_dp_joiner_needs_dsc(dev_priv, joiner) && !dsc) + if (intel_dp_joiner_needs_dsc(dev_priv, joined_pipes) && !dsc) return MODE_CLOCK_HIGH; if (mode_rate > max_rate && !dsc) @@ -2498,14 +2500,15 @@ int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state) return intel_dp_link_required(adjusted_mode->crtc_clock, bpp); } -bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_joiner) +bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, + enum intel_joiner_pipe_count joined_pipes) { /* * Pipe joiner needs compression up to display 12 due to bandwidth * limitation. DG2 onwards pipe joiner can be enabled without * compression. */ - return DISPLAY_VER(i915) < 13 && use_joiner; + return DISPLAY_VER(i915) < 13 && (joined_pipes == INTEL_BIG_JOINER_PIPES); } static int @@ -2523,6 +2526,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, struct intel_dp *intel_dp = enc_to_intel_dp(encoder); struct link_config_limits limits; bool dsc_needed, joiner_needs_dsc; + enum intel_joiner_pipe_count joined_pipes; int ret = 0; if (pipe_config->fec_enable && @@ -2534,7 +2538,11 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, adjusted_mode->crtc_clock)) pipe_config->joiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); - joiner_needs_dsc = intel_dp_joiner_needs_dsc(i915, pipe_config->joiner_pipes); + joined_pipes = intel_joiner_num_pipes(pipe_config); + if (joined_pipes >= INTEL_INVALID_JOINER_PIPES) + drm_warn(&i915->drm, "Invalid joined pipes : %d\n", joined_pipes); + + joiner_needs_dsc = intel_dp_joiner_needs_dsc(i915, joined_pipes); dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en || !intel_dp_compute_config_limits(intel_dp, pipe_config, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 1b9aaddd8c35..0a14db9bb20f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -8,6 +8,7 @@ #include +enum intel_joiner_pipe_count; enum intel_output_format; enum pipe; enum port; @@ -123,7 +124,8 @@ int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16, int bw_overhead); int intel_dp_max_link_data_rate(struct intel_dp *intel_dp, int max_dprx_rate, int max_dprx_lanes); -bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_joiner); +bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, + enum intel_joiner_pipe_count joined_pipes); bool intel_dp_has_joiner(struct intel_dp *intel_dp); bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 15541932b809..d3ff22f53fd5 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -568,6 +568,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, &pipe_config->hw.adjusted_mode; struct link_config_limits limits; bool dsc_needed, joiner_needs_dsc; + enum intel_joiner_pipe_count joined_pipes; int ret = 0; if (pipe_config->fec_enable && @@ -586,7 +587,11 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; pipe_config->has_pch_encoder = false; - joiner_needs_dsc = intel_dp_joiner_needs_dsc(dev_priv, pipe_config->joiner_pipes); + joined_pipes = intel_joiner_num_pipes(pipe_config); + if (joined_pipes >= INTEL_INVALID_JOINER_PIPES) + drm_warn(&dev_priv->drm, "Invalid joined pipes : %d\n", joined_pipes); + + joiner_needs_dsc = intel_dp_joiner_needs_dsc(dev_priv, joined_pipes); dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en || !intel_dp_mst_compute_config_limits(intel_dp, @@ -1426,6 +1431,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, u16 dsc_max_compressed_bpp = 0; u8 dsc_slice_count = 0; int target_clock = mode->clock; + enum intel_joiner_pipe_count joined_pipes = INTEL_NONE_JOINER_PIPES; if (drm_connector_is_unregistered(connector)) { *status = MODE_ERROR; @@ -1468,7 +1474,8 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, if (intel_dp_need_joiner(intel_dp, intel_connector, mode->hdisplay, target_clock)) { joiner = true; - max_dotclk *= 2; + joined_pipes = INTEL_BIG_JOINER_PIPES; + max_dotclk *= INTEL_BIG_JOINER_PIPES; } ret = drm_modeset_lock(&mgr->base.lock, ctx); @@ -1508,7 +1515,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, dsc = dsc_max_compressed_bpp && dsc_slice_count; } - if (intel_dp_joiner_needs_dsc(dev_priv, joiner) && !dsc) { + if (intel_dp_joiner_needs_dsc(dev_priv, joined_pipes) && !dsc) { *status = MODE_CLOCK_HIGH; return 0; } From patchwork Fri Sep 6 12:57:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794137 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 90D0DCE7AA3 for ; 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X-CSE-ConnectionGUID: 8dRlQ4l5SouR8yXBNv5rog== X-CSE-MsgGUID: eMRxt4nNTpu6dIXNW+fQcQ== X-IronPort-AV: E=McAfee;i="6700,10204,11187"; a="24257401" X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="24257401" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:34 -0700 X-CSE-ConnectionGUID: pjFNTGfKT3+EcCs38vbwVQ== X-CSE-MsgGUID: JvuCvXItTsqou7UaITzjMA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="66691054" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:33 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 03/14] drm/i915/display: Use joined pipes in intel_mode_valid_max_plane_size Date: Fri, 6 Sep 2024 18:27:56 +0530 Message-ID: <20240906125807.3960642-4-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In preparation of ultrajoiner, use number of joined pipes in the intel_mode_valid_max_plane_size helper, instead of joiner flag. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- drivers/gpu/drm/i915/display/intel_display.h | 3 ++- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- drivers/gpu/drm/i915/display/intel_dsi.c | 2 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +- 6 files changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 82492ee6c2e6..257e479310c2 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -8088,7 +8088,7 @@ enum drm_mode_status intel_cpu_transcoder_mode_valid(struct drm_i915_private *de enum drm_mode_status intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, const struct drm_display_mode *mode, - bool joiner) + enum intel_joiner_pipe_count joined_pipes) { int plane_width_max, plane_height_max; @@ -8105,7 +8105,7 @@ intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, * too big for that. */ if (DISPLAY_VER(dev_priv) >= 11) { - plane_width_max = 5120 << joiner; + plane_width_max = 5120 << joined_pipes / 2; plane_height_max = 4320; } else { plane_width_max = 5120; diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 3b90c5190d65..c0f8bb7e5095 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -31,6 +31,7 @@ #include "intel_display_limits.h" enum drm_scaling_filter; +enum intel_joiner_pipe_count; struct dpll; struct drm_atomic_state; struct drm_connector; @@ -415,7 +416,7 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv, enum drm_mode_status intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, const struct drm_display_mode *mode, - bool joiner); + enum intel_joiner_pipe_count joined_pipes); enum drm_mode_status intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915, const struct drm_display_mode *mode); diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index f95b62a026b6..71f33470f7a8 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1402,7 +1402,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, if (status != MODE_OK) return status; - return intel_mode_valid_max_plane_size(dev_priv, mode, joiner); + return intel_mode_valid_max_plane_size(dev_priv, mode, joined_pipes); } bool intel_dp_source_supports_tps3(struct drm_i915_private *i915) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index d3ff22f53fd5..9aae14a2ed15 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -1525,7 +1525,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, return 0; } - *status = intel_mode_valid_max_plane_size(dev_priv, mode, joiner); + *status = intel_mode_valid_max_plane_size(dev_priv, mode, joined_pipes); return 0; } diff --git a/drivers/gpu/drm/i915/display/intel_dsi.c b/drivers/gpu/drm/i915/display/intel_dsi.c index bd5888ce4852..92b3aa25366a 100644 --- a/drivers/gpu/drm/i915/display/intel_dsi.c +++ b/drivers/gpu/drm/i915/display/intel_dsi.c @@ -76,7 +76,7 @@ enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector, if (fixed_mode->clock > max_dotclk) return MODE_CLOCK_HIGH; - return intel_mode_valid_max_plane_size(dev_priv, mode, false); + return intel_mode_valid_max_plane_size(dev_priv, mode, INTEL_NONE_JOINER_PIPES); } struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi, diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 869fa00f7ef2..21b72a0bddea 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -2057,7 +2057,7 @@ intel_hdmi_mode_valid(struct drm_connector *connector, return status; } - return intel_mode_valid_max_plane_size(dev_priv, mode, false); + return intel_mode_valid_max_plane_size(dev_priv, mode, INTEL_NONE_JOINER_PIPES); } bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state, From patchwork Fri Sep 6 12:57:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794138 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 80DD4CE7B03 for ; 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X-CSE-ConnectionGUID: W8goJH2CR0qRUxV7X98n2w== X-CSE-MsgGUID: MqCG5ppvQ3G0q4RHODGmNg== X-IronPort-AV: E=McAfee;i="6700,10204,11187"; a="24257403" X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="24257403" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:36 -0700 X-CSE-ConnectionGUID: 2mpFbC1OSwGeGFdnAn8VRw== X-CSE-MsgGUID: Z/FZauflTv2lW85wJhq2Lw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="66691059" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:34 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 04/14] drm/i915/display: Use joined pipes in dsc helpers for slices, bpp Date: Fri, 6 Sep 2024 18:27:57 +0530 Message-ID: <20240906125807.3960642-5-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In preparation of ultrajoiner, use number of joined pipes in the dsc helpers to compute dsc slices and max compressed bpp, instead of using the joiner flag. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 27 +++++++++++---------- drivers/gpu/drm/i915/display/intel_dp.h | 4 +-- drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 +++++---- 3 files changed, 22 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 71f33470f7a8..942431a470c3 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -859,14 +859,14 @@ u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 p static u32 get_max_compressed_bpp_with_joiner(struct drm_i915_private *i915, u32 mode_clock, u32 mode_hdisplay, - bool bigjoiner) + enum intel_joiner_pipe_count joined_pipes) { u32 max_bpp_small_joiner_ram; /* Small Joiner Check: output bpp <= joiner RAM (bits) / Horiz. width */ max_bpp_small_joiner_ram = small_joiner_ram_size_bits(i915) / mode_hdisplay; - if (bigjoiner) { + if (joined_pipes == INTEL_BIG_JOINER_PIPES) { int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24; /* With bigjoiner multiple dsc engines are used in parallel so PPC is 2 */ int ppc = 2; @@ -885,7 +885,7 @@ u32 get_max_compressed_bpp_with_joiner(struct drm_i915_private *i915, u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, u32 link_clock, u32 lane_count, u32 mode_clock, u32 mode_hdisplay, - bool bigjoiner, + enum intel_joiner_pipe_count joined_pipes, enum intel_output_format output_format, u32 pipe_bpp, u32 timeslots) @@ -931,7 +931,7 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, intel_dp_mode_to_fec_clock(mode_clock)); joiner_max_bpp = get_max_compressed_bpp_with_joiner(i915, mode_clock, - mode_hdisplay, bigjoiner); + mode_hdisplay, joined_pipes); bits_per_pixel = min(bits_per_pixel, joiner_max_bpp); bits_per_pixel = intel_dp_dsc_nearest_valid_bpp(i915, bits_per_pixel, pipe_bpp); @@ -941,7 +941,7 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, int mode_clock, int mode_hdisplay, - bool bigjoiner) + enum intel_joiner_pipe_count joined_pipes) { struct drm_i915_private *i915 = to_i915(connector->base.dev); u8 min_slice_count, i; @@ -975,14 +975,14 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, /* Find the closest match to the valid slice count values */ for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) { - u8 test_slice_count = valid_dsc_slicecount[i] << bigjoiner; + u8 test_slice_count = valid_dsc_slicecount[i] << (joined_pipes / 2); if (test_slice_count > drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd, false)) break; /* big joiner needs small joiner to be enabled */ - if (bigjoiner && test_slice_count < 4) + if (joined_pipes == INTEL_BIG_JOINER_PIPES && test_slice_count < 4) continue; if (min_slice_count <= test_slice_count) @@ -1308,7 +1308,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, u16 dsc_max_compressed_bpp = 0; u8 dsc_slice_count = 0; enum drm_mode_status status; - bool dsc = false, joiner = false; + bool dsc = false; enum intel_joiner_pipe_count joined_pipes = INTEL_NONE_JOINER_PIPES; status = intel_cpu_transcoder_mode_valid(dev_priv, mode); @@ -1332,7 +1332,6 @@ intel_dp_mode_valid(struct drm_connector *_connector, if (intel_dp_need_joiner(intel_dp, connector, mode->hdisplay, target_clock)) { - joiner = true; joined_pipes = INTEL_BIG_JOINER_PIPES; max_dotclk *= INTEL_BIG_JOINER_PIPES; } @@ -1379,14 +1378,14 @@ intel_dp_mode_valid(struct drm_connector *_connector, max_lanes, target_clock, mode->hdisplay, - joiner, + joined_pipes, output_format, pipe_bpp, 64); dsc_slice_count = intel_dp_dsc_get_slice_count(connector, target_clock, mode->hdisplay, - joiner); + joined_pipes); } dsc = dsc_max_compressed_bpp && dsc_slice_count; @@ -2102,6 +2101,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp; int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp; int dsc_joiner_max_bpp; + int joined_pipes = intel_joiner_num_pipes(pipe_config); dsc_src_min_bpp = dsc_src_min_compressed_bpp(); dsc_sink_min_bpp = intel_dp_dsc_sink_min_compressed_bpp(pipe_config); @@ -2116,7 +2116,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, dsc_joiner_max_bpp = get_max_compressed_bpp_with_joiner(i915, adjusted_mode->clock, adjusted_mode->hdisplay, - pipe_config->joiner_pipes); + joined_pipes); dsc_max_bpp = min(dsc_max_bpp, dsc_joiner_max_bpp); dsc_max_bpp = min(dsc_max_bpp, fxp_q4_to_int(limits->link.max_bpp_x16)); @@ -2301,6 +2301,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, to_intel_connector(conn_state->connector); const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; + int joined_pipes = intel_joiner_num_pipes(pipe_config); int ret; pipe_config->fec_enable = pipe_config->fec_enable || @@ -2350,7 +2351,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, intel_dp_dsc_get_slice_count(connector, adjusted_mode->crtc_clock, adjusted_mode->crtc_hdisplay, - pipe_config->joiner_pipes); + joined_pipes); if (!dsc_dp_slice_count) { drm_dbg_kms(&dev_priv->drm, "Compressed Slice Count not supported\n"); diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 0a14db9bb20f..f284058f5148 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -144,7 +144,7 @@ int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector, u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, u32 link_clock, u32 lane_count, u32 mode_clock, u32 mode_hdisplay, - bool bigjoiner, + enum intel_joiner_pipe_count joined_pipes, enum intel_output_format output_format, u32 pipe_bpp, u32 timeslots); @@ -154,7 +154,7 @@ int intel_dp_dsc_sink_max_compressed_bpp(const struct intel_connector *connector int bpc); u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, int mode_clock, int mode_hdisplay, - bool bigjoiner); + enum intel_joiner_pipe_count joined_pipes); bool intel_dp_need_joiner(struct intel_dp *intel_dp, struct intel_connector *connector, int hdisplay, int clock); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 9aae14a2ed15..ef524935b136 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -102,11 +102,13 @@ static int intel_dp_mst_bw_overhead(const struct intel_crtc_state *crtc_state, flags |= crtc_state->fec_enable ? DRM_DP_BW_OVERHEAD_FEC : 0; if (dsc) { + int joined_pipes = intel_joiner_num_pipes(crtc_state); + flags |= DRM_DP_BW_OVERHEAD_DSC; dsc_slice_count = intel_dp_dsc_get_slice_count(connector, adjusted_mode->clock, adjusted_mode->hdisplay, - crtc_state->joiner_pipes); + joined_pipes); } overhead = drm_dp_bw_overhead(crtc_state->lane_count, @@ -1427,7 +1429,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, int max_dotclk = to_i915(connector->dev)->display.cdclk.max_dotclk_freq; int max_rate, mode_rate, max_lanes, max_link_clock; int ret; - bool dsc = false, joiner = false; + bool dsc = false; u16 dsc_max_compressed_bpp = 0; u8 dsc_slice_count = 0; int target_clock = mode->clock; @@ -1473,7 +1475,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, */ if (intel_dp_need_joiner(intel_dp, intel_connector, mode->hdisplay, target_clock)) { - joiner = true; joined_pipes = INTEL_BIG_JOINER_PIPES; max_dotclk *= INTEL_BIG_JOINER_PIPES; } @@ -1502,14 +1503,14 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, max_lanes, target_clock, mode->hdisplay, - joiner, + joined_pipes, INTEL_OUTPUT_FORMAT_RGB, pipe_bpp, 64); dsc_slice_count = intel_dp_dsc_get_slice_count(intel_connector, target_clock, mode->hdisplay, - joiner); + joined_pipes); } dsc = dsc_max_compressed_bpp && dsc_slice_count; From patchwork Fri Sep 6 12:57:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794140 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5C48CCE7B03 for ; Fri, 6 Sep 2024 12:56:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E1F1310EA43; Fri, 6 Sep 2024 12:56:40 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="kYkM7ucP"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9048510EA43 for ; Fri, 6 Sep 2024 12:56:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725627398; x=1757163398; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vq8mJ59RxZ+DJ/8olkNhFW01SY+uqD6Do+yZLuWwN6U=; b=kYkM7ucPobK3H5iSo8+DGlQNX3UsWlZddrYawxb3xM4+H52W2G/F2d4B 3ApJrI139eojkf/WKp3FHSUzoKCOoGVE7nV+rneBrz61Dw/arVQJS5tAX LmPTK1tf6Lf2uJCtd5eCdZXa98ZzfftWntvWvfL3rnZNnZs/ndhQOuKYH J5KPEVy/InBG/chio3faWfZS6a3zlwGEbfyicGPW/qwDGX/O1k0j6yXL0 px2aHAfz8vFoL8un/LKw7omCqeXCOQTJGw5BfCG9p7MFbTwqDMZIgfMU/ 6i5+9q5ZoTeRGDA4/SppVwxTpdF9aO+QHcyqdO54uHDvWrOWunc1GV3h8 A==; X-CSE-ConnectionGUID: 7ZdEwtA5RFiRNi1HtSnsGA== X-CSE-MsgGUID: iNBDqMKkRqavPGMJqmqKOQ== X-IronPort-AV: E=McAfee;i="6700,10204,11187"; a="24257405" X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="24257405" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:37 -0700 X-CSE-ConnectionGUID: Z1leOnyRSxe/tZ25ztJIyw== X-CSE-MsgGUID: dr+3ULI5QMKm4VL3qTVaNw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="66691064" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:36 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 05/14] drm/i915: Add some essential functionality for joiners Date: Fri, 6 Sep 2024 18:27:58 +0530 Message-ID: <20240906125807.3960642-6-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Stanislav Lisovskiy In most of the cases we now try to avoid mentioning things like "bigjoiner" or "ultrajoiner" trying to unify the API and refer mostly to all this functionality as "joiner". In majority cases that should be way to go. However in some cases we still need to distinguish between bigjoiner primaries and secondaries(such as DSC register programming). Create correspondent helper functions and start using them, in order be prepared for adding ultrajoiner functionality. v2: Fixed checkpatch warnings (Ankit) v3: Introduce ultrajoiner helpers in next patch. Signed-off-by: Stanislav Lisovskiy Signed-off-by: Ankit Nautiyal --- .../gpu/drm/i915/display/intel_atomic_plane.c | 2 +- drivers/gpu/drm/i915/display/intel_display.c | 52 +++++++++++++++++-- drivers/gpu/drm/i915/display/intel_display.h | 6 ++- .../drm/i915/display/intel_modeset_verify.c | 2 +- drivers/gpu/drm/i915/display/intel_vdsc.c | 4 +- 5 files changed, 56 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 928d985f9985..83ed018b1735 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -725,7 +725,7 @@ int intel_plane_atomic_check(struct intel_atomic_state *state, if (new_crtc_state && intel_crtc_is_joiner_secondary(new_crtc_state)) { struct intel_crtc *primary_crtc = - intel_primary_crtc(new_crtc_state); + intel_joiner_primary_crtc(new_crtc_state); struct intel_plane *primary_crtc_plane = intel_crtc_get_plane(primary_crtc, plane->id); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 257e479310c2..3278debf47cc 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -254,6 +254,50 @@ static enum pipe joiner_primary_pipe(const struct intel_crtc_state *crtc_state) return ffs(crtc_state->joiner_pipes) - 1; } +static bool intel_is_joiner(const struct intel_crtc_state *crtc_state) +{ + return intel_joiner_num_pipes(crtc_state) > 1; +} + +static u8 bigjoiner_primary_pipes(const struct intel_crtc_state *crtc_state) +{ + int lsb = ffs(crtc_state->joiner_pipes) - 1; + int msb = fls(crtc_state->joiner_pipes) - 1; + int i; + u8 bigjoiner_primary_mask = 0; + + for (i = lsb; i < msb; i += 4) { + /* + * Regardless of how joiner_pipes mask is set, currently + * we always assume, that primary pipe bit goes before secondary + * pipe bit. So in each set of 2 bits, least significant bit is + * bigjoiner primary pipe and most significant bit is secondary pipe. + */ + bigjoiner_primary_mask |= + ((BIT(0) | BIT(2)) << i) & crtc_state->joiner_pipes; + } + + return bigjoiner_primary_mask; +} + +bool intel_crtc_is_bigjoiner_primary(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + + if (!intel_is_joiner(crtc_state)) + return false; + + return BIT(crtc->pipe) & bigjoiner_primary_pipes(crtc_state); +} + +bool intel_crtc_is_bigjoiner_secondary(const struct intel_crtc_state *crtc_state) +{ + if (!intel_is_joiner(crtc_state)) + return false; + + return !intel_crtc_is_bigjoiner_primary(crtc_state); +} + u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state) { if (crtc_state->joiner_pipes) @@ -290,7 +334,7 @@ u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state) return BIT(crtc->pipe) | crtc_state->joiner_pipes; } -struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state) +struct intel_crtc *intel_joiner_primary_crtc(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); @@ -810,7 +854,7 @@ intel_get_crtc_new_encoder(const struct intel_atomic_state *state, int num_encoders = 0; int i; - primary_crtc = intel_primary_crtc(crtc_state); + primary_crtc = intel_joiner_primary_crtc(crtc_state); for_each_new_connector_in_state(&state->base, connector, connector_state, i) { if (connector_state->crtc != &primary_crtc->base) @@ -4530,7 +4574,7 @@ copy_joiner_crtc_state_nomodeset(struct intel_atomic_state *state, { struct intel_crtc_state *secondary_crtc_state = intel_atomic_get_new_crtc_state(state, secondary_crtc); - struct intel_crtc *primary_crtc = intel_primary_crtc(secondary_crtc_state); + struct intel_crtc *primary_crtc = intel_joiner_primary_crtc(secondary_crtc_state); const struct intel_crtc_state *primary_crtc_state = intel_atomic_get_new_crtc_state(state, primary_crtc); @@ -4550,7 +4594,7 @@ copy_joiner_crtc_state_modeset(struct intel_atomic_state *state, { struct intel_crtc_state *secondary_crtc_state = intel_atomic_get_new_crtc_state(state, secondary_crtc); - struct intel_crtc *primary_crtc = intel_primary_crtc(secondary_crtc_state); + struct intel_crtc *primary_crtc = intel_joiner_primary_crtc(secondary_crtc_state); const struct intel_crtc_state *primary_crtc_state = intel_atomic_get_new_crtc_state(state, primary_crtc); struct intel_crtc_state *saved_state; diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index c0f8bb7e5095..840a98947de8 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -424,10 +424,12 @@ enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port); bool is_trans_port_sync_mode(const struct intel_crtc_state *state); bool is_trans_port_sync_master(const struct intel_crtc_state *state); u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state); -bool intel_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state); bool intel_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state); +bool intel_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state); +bool intel_crtc_is_bigjoiner_primary(const struct intel_crtc_state *crtc_state); +bool intel_crtc_is_bigjoiner_secondary(const struct intel_crtc_state *crtc_state); u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state); -struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state); +struct intel_crtc *intel_joiner_primary_crtc(const struct intel_crtc_state *crtc_state); bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state); bool intel_pipe_config_compare(const struct intel_crtc_state *current_config, const struct intel_crtc_state *pipe_config, diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index 3491db5cad31..b53b810c6470 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -193,7 +193,7 @@ verify_crtc_state(struct intel_atomic_state *state, "transitional active state does not match atomic hw state (expected %i, found %i)\n", sw_crtc_state->hw.active, crtc->active); - primary_crtc = intel_primary_crtc(sw_crtc_state); + primary_crtc = intel_joiner_primary_crtc(sw_crtc_state); for_each_encoder_on_crtc(dev, &primary_crtc->base, encoder) { enum pipe pipe; diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 2e849b015e74..8158e3702ed5 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -742,7 +742,7 @@ void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state) u32 dss_ctl1_val = 0; if (crtc_state->joiner_pipes && !crtc_state->dsc.compression_enable) { - if (intel_crtc_is_joiner_secondary(crtc_state)) + if (intel_crtc_is_bigjoiner_secondary(crtc_state)) dss_ctl1_val |= UNCOMPRESSED_JOINER_SECONDARY; else dss_ctl1_val |= UNCOMPRESSED_JOINER_PRIMARY; @@ -771,7 +771,7 @@ void intel_dsc_enable(const struct intel_crtc_state *crtc_state) } if (crtc_state->joiner_pipes) { dss_ctl1_val |= BIG_JOINER_ENABLE; - if (!intel_crtc_is_joiner_secondary(crtc_state)) + if (intel_crtc_is_bigjoiner_primary(crtc_state)) dss_ctl1_val |= PRIMARY_BIG_JOINER_ENABLE; } intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val); From patchwork Fri Sep 6 12:57:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794139 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 712DECE7AA3 for ; Fri, 6 Sep 2024 12:56:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E325110EA46; Fri, 6 Sep 2024 12:56:40 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="eqaDAipD"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 28DC010EA43 for ; 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06 Sep 2024 05:56:39 -0700 X-CSE-ConnectionGUID: AzLW8EzKQ0OLkGnLRP8AqA== X-CSE-MsgGUID: j9bV5FcwQaqGLsdx753JIA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="66691070" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:38 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 06/14] drm/i915: Split current joiner hw state readout Date: Fri, 6 Sep 2024 18:27:59 +0530 Message-ID: <20240906125807.3960642-7-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Stanislav Lisovskiy We need to add a new sanity checks and also do some preparations for adding ultrajoiner hw state readout. Lets first split reading of the uncompressed joiner and bigjoiner bit masks into separate functions. v2: Fixed checkpatch warnings (Ankit) Signed-off-by: Stanislav Lisovskiy Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display.c | 65 +++++++++++++++----- 1 file changed, 48 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 3278debf47cc..cdc7531311fc 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3580,51 +3580,82 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv, return tmp & TRANS_DDI_FUNC_ENABLE; } -static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, - u8 *primary_pipes, u8 *secondary_pipes) +static void enabled_uncompressed_joiner_pipes(struct drm_i915_private *dev_priv, + u8 *primary_pipes, u8 *secondary_pipes) { struct intel_crtc *crtc; *primary_pipes = 0; *secondary_pipes = 0; + if (DISPLAY_VER(dev_priv) < 13) + return; + for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, joiner_pipes(dev_priv)) { enum intel_display_power_domain power_domain; enum pipe pipe = crtc->pipe; intel_wakeref_t wakeref; - power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe); + power_domain = POWER_DOMAIN_PIPE(pipe); with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) { u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe)); - if (!(tmp & BIG_JOINER_ENABLE)) - continue; - - if (tmp & PRIMARY_BIG_JOINER_ENABLE) + if (tmp & UNCOMPRESSED_JOINER_PRIMARY) *primary_pipes |= BIT(pipe); - else + if (tmp & UNCOMPRESSED_JOINER_SECONDARY) *secondary_pipes |= BIT(pipe); } + } +} - if (DISPLAY_VER(dev_priv) < 13) - continue; +static void enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv, + u8 *primary_pipes, u8 *secondary_pipes) +{ + struct intel_crtc *crtc; - power_domain = POWER_DOMAIN_PIPE(pipe); + *primary_pipes = 0; + *secondary_pipes = 0; + + for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, + joiner_pipes(dev_priv)) { + enum intel_display_power_domain power_domain; + enum pipe pipe = crtc->pipe; + intel_wakeref_t wakeref; + + power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe); with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) { u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe)); - if (tmp & UNCOMPRESSED_JOINER_PRIMARY) + if (!(tmp & BIG_JOINER_ENABLE)) + continue; + + if (tmp & PRIMARY_BIG_JOINER_ENABLE) *primary_pipes |= BIT(pipe); - if (tmp & UNCOMPRESSED_JOINER_SECONDARY) + else *secondary_pipes |= BIT(pipe); } } +} + +static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, + u8 *primary_pipes, u8 *secondary_pipes) +{ + u8 primary_uncompressed_joiner_pipes, primary_bigjoiner_pipes; + u8 secondary_uncompressed_joiner_pipes, secondary_bigjoiner_pipes; + + enabled_uncompressed_joiner_pipes(dev_priv, &primary_uncompressed_joiner_pipes, + &secondary_uncompressed_joiner_pipes); + + enabled_bigjoiner_pipes(dev_priv, &primary_bigjoiner_pipes, + &secondary_bigjoiner_pipes); + + *primary_pipes = 0; + *secondary_pipes = 0; + + *primary_pipes = primary_uncompressed_joiner_pipes | primary_bigjoiner_pipes; - /* Joiner pipes should always be consecutive primary and secondary */ - drm_WARN(&dev_priv->drm, *secondary_pipes != *primary_pipes << 1, - "Joiner misconfigured (primary pipes 0x%x, secondary pipes 0x%x)\n", - *primary_pipes, *secondary_pipes); + *secondary_pipes = secondary_uncompressed_joiner_pipes | secondary_bigjoiner_pipes; } static enum pipe get_joiner_primary_pipe(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes) From patchwork Fri Sep 6 12:58:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794141 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0FE21CE7B06 for ; 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Signed-off-by: Stanislav Lisovskiy Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display.c | 24 ++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index cdc7531311fc..6f098383479f 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3638,11 +3638,17 @@ static void enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv, } } +static u8 expected_secondary_pipes(u8 primary_pipes) +{ + return primary_pipes << 1; +} + static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, u8 *primary_pipes, u8 *secondary_pipes) { u8 primary_uncompressed_joiner_pipes, primary_bigjoiner_pipes; u8 secondary_uncompressed_joiner_pipes, secondary_bigjoiner_pipes; + u8 uncompressed_joiner_pipes, bigjoiner_pipes; enabled_uncompressed_joiner_pipes(dev_priv, &primary_uncompressed_joiner_pipes, &secondary_uncompressed_joiner_pipes); @@ -3650,6 +3656,24 @@ static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, enabled_bigjoiner_pipes(dev_priv, &primary_bigjoiner_pipes, &secondary_bigjoiner_pipes); + uncompressed_joiner_pipes = primary_uncompressed_joiner_pipes | + secondary_uncompressed_joiner_pipes; + bigjoiner_pipes = primary_bigjoiner_pipes | secondary_bigjoiner_pipes; + + drm_WARN(&dev_priv->drm, (uncompressed_joiner_pipes & bigjoiner_pipes) != 0, + "Uncomressed joiner pipes(%x) and bigjoiner pipes(%x) can't intersect\n", + uncompressed_joiner_pipes, bigjoiner_pipes); + drm_WARN(&dev_priv->drm, secondary_bigjoiner_pipes != + expected_secondary_pipes(primary_bigjoiner_pipes), + "Wrong secondary bigjoiner pipes(expected %x, current %x)\n", + expected_secondary_pipes(primary_bigjoiner_pipes), + secondary_bigjoiner_pipes); + drm_WARN(&dev_priv->drm, secondary_uncompressed_joiner_pipes != + expected_secondary_pipes(primary_uncompressed_joiner_pipes), + "Wrong secondary uncompressed joiner pipes(expected %x, current %x)\n", + expected_secondary_pipes(primary_uncompressed_joiner_pipes), + secondary_uncompressed_joiner_pipes); + *primary_pipes = 0; *secondary_pipes = 0; From patchwork Fri Sep 6 12:58:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794143 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C89AECE7B08 for ; Fri, 6 Sep 2024 12:56:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2E8C010EA4B; Fri, 6 Sep 2024 12:56:45 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="H+7pibj6"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 568A810EA47 for ; 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06 Sep 2024 05:56:42 -0700 X-CSE-ConnectionGUID: MZKXg8W/TJugQYOSTL40aw== X-CSE-MsgGUID: OruVjrriQ0WM6vKgbVS/ag== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="66691079" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:41 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 08/14] drm/i915: Implement hw state readout and checks for ultrajoiner Date: Fri, 6 Sep 2024 18:28:01 +0530 Message-ID: <20240906125807.3960642-9-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Stanislav Lisovskiy Ultrajoiner mode has some new bits and states to be read out from the hw. Lets make changes accordingly. v2: Fix checkpatch warnings. (Ankit) v3: Add separate functions for computing expected secondary_big/ultrajoiner pipes. (Ankit) Signed-off-by: Stanislav Lisovskiy Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 133 ++++++++++++++---- .../gpu/drm/i915/display/intel_vdsc_regs.h | 3 + 2 files changed, 108 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 6f098383479f..1243e4b24acc 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3638,17 +3638,63 @@ static void enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv, } } -static u8 expected_secondary_pipes(u8 primary_pipes) +static void enabled_ultrajoiner_pipes(struct drm_i915_private *i915, + u8 *primary_pipes, u8 *secondary_pipes) { + struct intel_crtc *crtc; + + *primary_pipes = 0; + *secondary_pipes = 0; + + if (DISPLAY_VER(i915) < 14) + return; + + for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, + joiner_pipes(i915)) { + enum intel_display_power_domain power_domain; + enum pipe pipe = crtc->pipe; + intel_wakeref_t wakeref; + + power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe); + with_intel_display_power_if_enabled(i915, power_domain, wakeref) { + u32 tmp = intel_de_read(i915, ICL_PIPE_DSS_CTL1(pipe)); + + if (!(tmp & ULTRA_JOINER_ENABLE)) + continue; + + if (tmp & PRIMARY_ULTRA_JOINER_ENABLE) + *primary_pipes |= BIT(pipe); + else + *secondary_pipes |= BIT(pipe); + } + } +} + +static u8 expected_secondary_bigjoiner_pipes(u8 primary_pipes) +{ + if (!primary_pipes) + return 0; + return primary_pipes << 1; } +static u8 expected_secondary_ultrajoiner_pipes(u8 primary_pipes) +{ + if (!primary_pipes) + return 0; + + return GENMASK(2, primary_pipes); +} + static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, - u8 *primary_pipes, u8 *secondary_pipes) + u8 *primary_pipes, u8 *secondary_pipes, + bool *ultrajoiner_used) { u8 primary_uncompressed_joiner_pipes, primary_bigjoiner_pipes; + u8 primary_ultrajoiner_pipes; u8 secondary_uncompressed_joiner_pipes, secondary_bigjoiner_pipes; - u8 uncompressed_joiner_pipes, bigjoiner_pipes; + u8 secondary_ultrajoiner_pipes; + u8 uncompressed_joiner_pipes, bigjoiner_pipes, ultrajoiner_pipes; enabled_uncompressed_joiner_pipes(dev_priv, &primary_uncompressed_joiner_pipes, &secondary_uncompressed_joiner_pipes); @@ -3656,33 +3702,50 @@ static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, enabled_bigjoiner_pipes(dev_priv, &primary_bigjoiner_pipes, &secondary_bigjoiner_pipes); + enabled_ultrajoiner_pipes(dev_priv, &primary_ultrajoiner_pipes, + &secondary_ultrajoiner_pipes); + uncompressed_joiner_pipes = primary_uncompressed_joiner_pipes | secondary_uncompressed_joiner_pipes; bigjoiner_pipes = primary_bigjoiner_pipes | secondary_bigjoiner_pipes; + ultrajoiner_pipes = primary_ultrajoiner_pipes | secondary_ultrajoiner_pipes; + *ultrajoiner_used = ultrajoiner_pipes != 0; drm_WARN(&dev_priv->drm, (uncompressed_joiner_pipes & bigjoiner_pipes) != 0, "Uncomressed joiner pipes(%x) and bigjoiner pipes(%x) can't intersect\n", uncompressed_joiner_pipes, bigjoiner_pipes); + drm_WARN(&dev_priv->drm, (ultrajoiner_pipes & bigjoiner_pipes) != ultrajoiner_pipes, + "Ultrajoiner pipes(%x) should be bigjoiner pipes(%x)\n", + ultrajoiner_pipes, bigjoiner_pipes); + drm_WARN(&dev_priv->drm, secondary_bigjoiner_pipes != - expected_secondary_pipes(primary_bigjoiner_pipes), + expected_secondary_bigjoiner_pipes(primary_bigjoiner_pipes), "Wrong secondary bigjoiner pipes(expected %x, current %x)\n", - expected_secondary_pipes(primary_bigjoiner_pipes), + expected_secondary_bigjoiner_pipes(primary_bigjoiner_pipes), secondary_bigjoiner_pipes); drm_WARN(&dev_priv->drm, secondary_uncompressed_joiner_pipes != - expected_secondary_pipes(primary_uncompressed_joiner_pipes), + expected_secondary_bigjoiner_pipes(primary_uncompressed_joiner_pipes), "Wrong secondary uncompressed joiner pipes(expected %x, current %x)\n", - expected_secondary_pipes(primary_uncompressed_joiner_pipes), + expected_secondary_bigjoiner_pipes(primary_uncompressed_joiner_pipes), secondary_uncompressed_joiner_pipes); + drm_WARN(&dev_priv->drm, secondary_ultrajoiner_pipes != + expected_secondary_ultrajoiner_pipes(primary_ultrajoiner_pipes), + "Wrong secondary ultrajoiner pipes(expected %x, current %x)\n", + expected_secondary_ultrajoiner_pipes(primary_ultrajoiner_pipes), + secondary_ultrajoiner_pipes); *primary_pipes = 0; *secondary_pipes = 0; - *primary_pipes = primary_uncompressed_joiner_pipes | primary_bigjoiner_pipes; + *primary_pipes = primary_uncompressed_joiner_pipes | primary_bigjoiner_pipes | + primary_ultrajoiner_pipes; - *secondary_pipes = secondary_uncompressed_joiner_pipes | secondary_bigjoiner_pipes; + *secondary_pipes = secondary_uncompressed_joiner_pipes | secondary_bigjoiner_pipes | + secondary_ultrajoiner_pipes; } -static enum pipe get_joiner_primary_pipe(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes) +static enum pipe get_joiner_primary_pipe(enum pipe pipe, u8 primary_pipes, + u8 secondary_pipes, bool ultrajoiner_used) { if ((secondary_pipes & BIT(pipe)) == 0) return pipe; @@ -3690,27 +3753,37 @@ static enum pipe get_joiner_primary_pipe(enum pipe pipe, u8 primary_pipes, u8 se /* ignore everything above our pipe */ primary_pipes &= ~GENMASK(7, pipe); - /* highest remaining bit should be our primary pipe */ - return fls(primary_pipes) - 1; + if (!ultrajoiner_used) + /* highest remaining bit should be our master pipe */ + return fls(primary_pipes) - 1; + + /* lowest remaining bit should be our primary master pipe */ + return ffs(primary_pipes) - 1; } -static u8 get_joiner_secondary_pipes(enum pipe pipe, u8 primary_pipes, u8 secondary_pipes) +static u8 get_joiner_secondary_pipes(enum pipe pipe, u8 primary_pipes, + u8 secondary_pipes, bool ultrajoiner_used) { enum pipe primary_pipe, next_primary_pipe; - primary_pipe = get_joiner_primary_pipe(pipe, primary_pipes, secondary_pipes); + primary_pipe = get_joiner_primary_pipe(pipe, primary_pipes, + secondary_pipes, ultrajoiner_used); if ((primary_pipes & BIT(primary_pipe)) == 0) return 0; - /* ignore our primary pipe and everything below it */ - primary_pipes &= ~GENMASK(primary_pipe, 0); - /* make sure a high bit is set for the ffs() */ - primary_pipes |= BIT(7); - /* lowest remaining bit should be the next primary pipe */ - next_primary_pipe = ffs(primary_pipes) - 1; + if (!ultrajoiner_used) { + /* ignore our primary pipe and everything below it */ + primary_pipes &= ~GENMASK(primary_pipe, 0); + /* make sure a high bit is set for the ffs() */ + primary_pipes |= BIT(7); + /* lowest remaining bit should be the next primary pipe */ + next_primary_pipe = ffs(primary_pipes) - 1; - return secondary_pipes & GENMASK(next_primary_pipe - 1, primary_pipe); + return secondary_pipes & GENMASK(next_primary_pipe - 1, primary_pipe); + } else { + return (secondary_pipes | primary_pipes) & ~BIT(primary_pipe); + } } static u8 hsw_panel_transcoders(struct drm_i915_private *i915) @@ -3731,6 +3804,7 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) enum transcoder cpu_transcoder; u8 primary_pipes, secondary_pipes; u8 enabled_transcoders = 0; + bool ultrajoiner_used; /* * XXX: Do intel_display_power_get_if_enabled before reading this (for @@ -3781,11 +3855,12 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder)) enabled_transcoders |= BIT(cpu_transcoder); - /* joiner secondary -> consider the primary pipe's transcoder as well */ - enabled_joiner_pipes(dev_priv, &primary_pipes, &secondary_pipes); + /* joiner slave -> consider the master pipe's transcoder as well */ + enabled_joiner_pipes(dev_priv, &primary_pipes, &secondary_pipes, &ultrajoiner_used); if (secondary_pipes & BIT(crtc->pipe)) { cpu_transcoder = (enum transcoder) - get_joiner_primary_pipe(crtc->pipe, primary_pipes, secondary_pipes); + get_joiner_primary_pipe(crtc->pipe, primary_pipes, + secondary_pipes, ultrajoiner_used); if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder)) enabled_transcoders |= BIT(cpu_transcoder); } @@ -3917,16 +3992,18 @@ static void intel_joiner_get_config(struct intel_crtc_state *crtc_state) struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *i915 = to_i915(crtc->base.dev); u8 primary_pipes, secondary_pipes; + bool ultrajoiner_used; enum pipe pipe = crtc->pipe; - enabled_joiner_pipes(i915, &primary_pipes, &secondary_pipes); + enabled_joiner_pipes(i915, &primary_pipes, &secondary_pipes, &ultrajoiner_used); if (((primary_pipes | secondary_pipes) & BIT(pipe)) == 0) return; - crtc_state->joiner_pipes = - BIT(get_joiner_primary_pipe(pipe, primary_pipes, secondary_pipes)) | - get_joiner_secondary_pipes(pipe, primary_pipes, secondary_pipes); + crtc_state->joiner_pipes = BIT(get_joiner_primary_pipe(pipe, primary_pipes, + secondary_pipes, ultrajoiner_used)) | + get_joiner_secondary_pipes(pipe, primary_pipes, + secondary_pipes, ultrajoiner_used); } static bool hsw_get_pipe_config(struct intel_crtc *crtc, diff --git a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h index f921ad67b587..db07c9775892 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h +++ b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h @@ -37,6 +37,9 @@ #define SPLITTER_CONFIGURATION_MASK REG_GENMASK(26, 25) #define SPLITTER_CONFIGURATION_2_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 0) #define SPLITTER_CONFIGURATION_4_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 1) + +#define ULTRA_JOINER_ENABLE REG_BIT(23) +#define PRIMARY_ULTRA_JOINER_ENABLE REG_BIT(22) #define UNCOMPRESSED_JOINER_PRIMARY (1 << 21) #define UNCOMPRESSED_JOINER_SECONDARY (1 << 20) From patchwork Fri Sep 6 12:58:02 2024 Content-Type: text/plain; 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d="scan'208";a="66691084" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:43 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 09/14] drm/i915/display: Add helpers to check for ultrajoiner primary Date: Fri, 6 Sep 2024 18:28:02 +0530 Message-ID: <20240906125807.3960642-10-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add helpers to check if ultrajoiner is used and to check for ultrajoiner primary. Signed-off-by: Ankit Nautiyal Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++ drivers/gpu/drm/i915/display/intel_display.h | 2 ++ drivers/gpu/drm/i915/display/intel_display_types.h | 1 + 3 files changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 1243e4b24acc..212163b1c73e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -298,6 +298,19 @@ bool intel_crtc_is_bigjoiner_secondary(const struct intel_crtc_state *crtc_state return !intel_crtc_is_bigjoiner_primary(crtc_state); } +bool intel_crtc_is_ultrajoiner(const struct intel_crtc_state *crtc_state) +{ + return intel_joiner_num_pipes(crtc_state) == INTEL_ULTRA_JOINER_PIPES; +} + +bool intel_crtc_is_ultrajoiner_primary(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + + return intel_crtc_is_ultrajoiner(crtc_state) && + (crtc->pipe == joiner_primary_pipe(crtc_state)); +} + u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state) { if (crtc_state->joiner_pipes) diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 840a98947de8..e0de2715a4a6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -428,6 +428,8 @@ bool intel_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state); bool intel_crtc_is_joiner_secondary(const struct intel_crtc_state *crtc_state); bool intel_crtc_is_bigjoiner_primary(const struct intel_crtc_state *crtc_state); bool intel_crtc_is_bigjoiner_secondary(const struct intel_crtc_state *crtc_state); +bool intel_crtc_is_ultrajoiner(const struct intel_crtc_state *crtc_state); +bool intel_crtc_is_ultrajoiner_primary(const struct intel_crtc_state *crtc_state); u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state); struct intel_crtc *intel_joiner_primary_crtc(const struct intel_crtc_state *crtc_state); bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index c213fb61ceb7..6c8ba9760f1a 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -489,6 +489,7 @@ struct intel_hdcp { enum intel_joiner_pipe_count { INTEL_NONE_JOINER_PIPES = 0, INTEL_BIG_JOINER_PIPES = 2, + INTEL_ULTRA_JOINER_PIPES = 4, INTEL_INVALID_JOINER_PIPES, }; From patchwork Fri Sep 6 12:58:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794144 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AA671CE7B06 for ; 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X-CSE-ConnectionGUID: uqCuLbNwQDigONfS8i/Bng== X-CSE-MsgGUID: aHrpJjhBTUy8/zvSAIEf1Q== X-IronPort-AV: E=McAfee;i="6700,10204,11187"; a="24257414" X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="24257414" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:45 -0700 X-CSE-ConnectionGUID: 5tmH/cDKTdejxMv6HYT9TA== X-CSE-MsgGUID: sVdfn82KSkSo4MeJ0sHqag== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="66691087" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:44 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 10/14] drm/i915/display/vdsc: Add ultrajoiner support with DSC Date: Fri, 6 Sep 2024 18:28:03 +0530 Message-ID: <20240906125807.3960642-11-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Stanislav Lisovskiy Add changes to DSC which are required for Ultrajoiner. v2: -Use correct helper for setting bits for bigjoiner secondary. (Ankit) -Use enum for joiner pipe count instead magic numbers. (Suraj) -Use primary/secondary instead of master/slave. (Suraj) Signed-off-by: Stanislav Lisovskiy Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vdsc.c | 26 +++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 8158e3702ed5..66e810c8de68 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -379,9 +379,11 @@ static int intel_dsc_get_vdsc_per_pipe(const struct intel_crtc_state *crtc_state int intel_dsc_get_num_vdsc_instances(const struct intel_crtc_state *crtc_state) { int num_vdsc_instances = intel_dsc_get_vdsc_per_pipe(crtc_state); + int joined_pipes = intel_joiner_num_pipes(crtc_state); - if (crtc_state->joiner_pipes) - num_vdsc_instances *= 2; + if (joined_pipes == INTEL_BIG_JOINER_PIPES || + joined_pipes == INTEL_ULTRA_JOINER_PIPES) + num_vdsc_instances *= joined_pipes; return num_vdsc_instances; } @@ -751,6 +753,14 @@ void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state) } } +static bool intel_crtc_ultrajoiner_enable_needed(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + + return intel_joiner_num_pipes(crtc_state) == INTEL_ULTRA_JOINER_PIPES && + crtc->pipe != PIPE_D; +} + void intel_dsc_enable(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); @@ -770,7 +780,19 @@ void intel_dsc_enable(const struct intel_crtc_state *crtc_state) dss_ctl1_val |= JOINER_ENABLE; } if (crtc_state->joiner_pipes) { + /* + * This bit doesn't seem to follow primary/secondary logic or + * any other logic, so lets just add helper function to + * at least hide this hassle.. + */ + if (intel_crtc_ultrajoiner_enable_needed(crtc_state)) + dss_ctl1_val |= ULTRA_JOINER_ENABLE; + + if (intel_crtc_is_ultrajoiner_primary(crtc_state)) + dss_ctl1_val |= PRIMARY_ULTRA_JOINER_ENABLE; + dss_ctl1_val |= BIG_JOINER_ENABLE; + if (intel_crtc_is_bigjoiner_primary(crtc_state)) dss_ctl1_val |= PRIMARY_BIG_JOINER_ENABLE; } From patchwork Fri Sep 6 12:58:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794145 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DCC64CE7AA3 for ; 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X-CSE-ConnectionGUID: frgpVbs6T3yaZocFrFJjnQ== X-CSE-MsgGUID: A1UKSOmeQwSDNCwONf9pqg== X-IronPort-AV: E=McAfee;i="6700,10204,11187"; a="24257415" X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="24257415" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:47 -0700 X-CSE-ConnectionGUID: 2QtV6t4hQRC91+n49c7CdA== X-CSE-MsgGUID: Q7C9jT/bTQWDHeWhiGt/5g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="66691090" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:46 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 11/14] drm/i915: Add new abstraction layer to handle pipe order for different joiners Date: Fri, 6 Sep 2024 18:28:04 +0530 Message-ID: <20240906125807.3960642-12-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Stanislav Lisovskiy Ultrajoiner case requires special treatment where both reverse and staight order iteration doesn't work(for instance disabling case requires order to be: primary master, slaves, secondary master). Lets unify our approach by using not only pipe masks for iterating required pipes based on joiner type used, but also using different "priority" arrays for each of those. v2: Fix checkpatch warnings. (Ankit) Signed-off-by: Stanislav Lisovskiy Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_ddi.c | 19 +++-- drivers/gpu/drm/i915/display/intel_display.c | 83 ++++++++++++++++---- drivers/gpu/drm/i915/display/intel_display.h | 7 ++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 18 +++-- 4 files changed, 96 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 00fbe9f8c03a..2c064b6c6d01 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3116,10 +3116,11 @@ static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state *state, const struct drm_connector_state *old_conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *pipe_crtc; + struct intel_crtc *pipe_crtc; enum pipe pipe; - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -3130,8 +3131,9 @@ static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state *state, intel_ddi_disable_transcoder_func(old_crtc_state); - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -3383,7 +3385,7 @@ static void intel_enable_ddi(struct intel_atomic_state *state, const struct drm_connector_state *conn_state) { struct drm_i915_private *i915 = to_i915(encoder->base.dev); - struct intel_crtc *pipe_crtc; + struct intel_crtc *pipe_crtc; enum pipe pipe; intel_ddi_enable_transcoder_func(encoder, crtc_state); @@ -3394,8 +3396,9 @@ static void intel_enable_ddi(struct intel_atomic_state *state, intel_ddi_wait_for_fec_status(encoder, crtc_state, true); - for_each_intel_crtc_in_pipe_mask_reverse(&i915->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(crtc_state)) { + for_each_intel_crtc_in_mask_priority(i915, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(crtc_state), + intel_get_pipe_order_enable(crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 212163b1c73e..f05e4cfd2146 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1732,6 +1732,50 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta hsw_set_transconf(crtc_state); } +static +bool intel_crtc_is_bigjoiner(const struct intel_crtc_state *pipe_config) +{ + return hweight8(pipe_config->joiner_pipes) == INTEL_BIG_JOINER_PIPES; +} + +const enum pipe *intel_get_pipe_order_enable(const struct intel_crtc_state *crtc_state) +{ + static const enum pipe ultrajoiner_pipe_order_enable[I915_MAX_PIPES] = { + PIPE_B, PIPE_D, PIPE_C, PIPE_A + }; + static const enum pipe bigjoiner_pipe_order_enable[I915_MAX_PIPES] = { + PIPE_B, PIPE_A, PIPE_D, PIPE_C + }; + static const enum pipe nojoiner_pipe_order_enable[I915_MAX_PIPES] = { + PIPE_A, PIPE_B, PIPE_C, PIPE_D + }; + + if (intel_crtc_is_ultrajoiner(crtc_state)) + return ultrajoiner_pipe_order_enable; + else if (intel_crtc_is_bigjoiner(crtc_state)) + return bigjoiner_pipe_order_enable; + return nojoiner_pipe_order_enable; +} + +const enum pipe *intel_get_pipe_order_disable(const struct intel_crtc_state *crtc_state) +{ + static const enum pipe ultrajoiner_pipe_order_disable[I915_MAX_PIPES] = { + PIPE_A, PIPE_B, PIPE_D, PIPE_C + }; + static const enum pipe bigjoiner_pipe_order_disable[I915_MAX_PIPES] = { + PIPE_A, PIPE_B, PIPE_C, PIPE_D + }; + static const enum pipe nojoiner_pipe_order_disable[I915_MAX_PIPES] = { + PIPE_A, PIPE_B, PIPE_C, PIPE_D + }; + + if (intel_crtc_is_ultrajoiner(crtc_state)) + return ultrajoiner_pipe_order_disable; + else if (intel_crtc_is_bigjoiner(crtc_state)) + return bigjoiner_pipe_order_disable; + return nojoiner_pipe_order_disable; +} + static void hsw_crtc_enable(struct intel_atomic_state *state, struct intel_crtc *crtc) { @@ -1740,19 +1784,21 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder; - struct intel_crtc *pipe_crtc; + struct intel_crtc *pipe_crtc; enum pipe pipe; if (drm_WARN_ON(&dev_priv->drm, crtc->active)) return; - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(new_crtc_state), + intel_get_pipe_order_enable(new_crtc_state)) intel_dmc_enable_pipe(dev_priv, pipe_crtc->pipe); intel_encoders_pre_pll_enable(state, crtc); - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(new_crtc_state), + intel_get_pipe_order_enable(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -1762,8 +1808,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, intel_encoders_pre_enable(state, crtc); - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(new_crtc_state), + intel_get_pipe_order_enable(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -1781,8 +1828,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, if (!transcoder_is_dsi(cpu_transcoder)) hsw_configure_cpu_transcoder(new_crtc_state); - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(new_crtc_state), + intel_get_pipe_order_enable(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -1817,8 +1865,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, intel_encoders_enable(state, crtc); - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(new_crtc_state), + intel_get_pipe_order_enable(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); enum pipe hsw_workaround_pipe; @@ -1903,7 +1952,7 @@ static void hsw_crtc_disable(struct intel_atomic_state *state, const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); struct drm_i915_private *i915 = to_i915(crtc->base.dev); - struct intel_crtc *pipe_crtc; + struct intel_crtc *pipe_crtc; enum pipe pipe; /* * FIXME collapse everything to one hook. @@ -1912,8 +1961,9 @@ static void hsw_crtc_disable(struct intel_atomic_state *state, intel_encoders_disable(state, crtc); intel_encoders_post_disable(state, crtc); - for_each_intel_crtc_in_pipe_mask(&i915->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + for_each_intel_crtc_in_mask_priority(i915, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -1922,8 +1972,9 @@ static void hsw_crtc_disable(struct intel_atomic_state *state, intel_encoders_post_pll_disable(state, crtc); - for_each_intel_crtc_in_pipe_mask(&i915->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) + for_each_intel_crtc_in_mask_priority(i915, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) intel_dmc_disable_pipe(i915, pipe_crtc->pipe); } diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index e0de2715a4a6..ac7b007b3b15 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -275,6 +275,11 @@ enum phy_fia { &(dev)->mode_config.crtc_list, \ base.head) +#define for_each_intel_crtc_in_mask_priority(__dev_priv, intel_crtc, __p, __mask, __priolist) \ + for_each_pipe(__dev_priv, __p) \ + for_each_if((__mask) & BIT(__priolist[__p])) \ + for_each_if(intel_crtc = intel_crtc_for_pipe(to_intel_display(&__dev_priv->drm), __priolist[__p])) + #define for_each_intel_crtc_in_pipe_mask(dev, intel_crtc, pipe_mask) \ list_for_each_entry(intel_crtc, \ &(dev)->mode_config.crtc_list, \ @@ -432,6 +437,8 @@ bool intel_crtc_is_ultrajoiner(const struct intel_crtc_state *crtc_state); bool intel_crtc_is_ultrajoiner_primary(const struct intel_crtc_state *crtc_state); u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state); struct intel_crtc *intel_joiner_primary_crtc(const struct intel_crtc_state *crtc_state); +const enum pipe *intel_get_pipe_order_enable(const struct intel_crtc_state *crtc_state); +const enum pipe *intel_get_pipe_order_disable(const struct intel_crtc_state *crtc_state); bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state); bool intel_pipe_config_compare(const struct intel_crtc_state *current_config, const struct intel_crtc_state *pipe_config, diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index ef524935b136..5513ed3f39e4 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -1006,7 +1006,7 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, struct drm_dp_mst_atomic_payload *new_payload = drm_atomic_get_mst_payload_state(new_mst_state, connector->port); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct intel_crtc *pipe_crtc; + struct intel_crtc *pipe_crtc; enum pipe pipe; bool last_mst_stream; intel_dp->active_mst_links--; @@ -1015,8 +1015,9 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, DISPLAY_VER(dev_priv) >= 12 && last_mst_stream && !intel_dp_mst_is_master_trans(old_crtc_state)); - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -1040,8 +1041,9 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, intel_ddi_disable_transcoder_func(old_crtc_state); - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -1260,6 +1262,7 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state, enum transcoder trans = pipe_config->cpu_transcoder; bool first_mst_stream = intel_dp->active_mst_links == 1; struct intel_crtc *pipe_crtc; + enum pipe pipe; int ret; drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder); @@ -1307,8 +1310,9 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state, intel_enable_transcoder(pipe_config); - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(pipe_config)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(pipe_config), + intel_get_pipe_order_enable(pipe_config)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); From patchwork Fri Sep 6 12:58:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794146 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B49D0CE7B06 for ; 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X-CSE-ConnectionGUID: 4dTbhsTkQQq8jxyaCEgUEw== X-CSE-MsgGUID: 3W8qMzubTjW/YdUU5mxK6A== X-IronPort-AV: E=McAfee;i="6700,10204,11187"; a="24257416" X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="24257416" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:48 -0700 X-CSE-ConnectionGUID: 088MzyqWQKSIEQ/3OFvb5w== X-CSE-MsgGUID: Yb2wlQ3IQqWvsAlmzQ1+dg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="66691094" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:47 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 12/14] drm/i915: Compute config and mode valid changes for ultrajoiner Date: Fri, 6 Sep 2024 18:28:05 +0530 Message-ID: <20240906125807.3960642-13-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Stanislav Lisovskiy Implement required changes for mode validation and compute config, to support Ultrajoiner. This also includes required DSC changes and checks. v2: -Use enum for Ultrajoiner pipes. -Drop changes for HDMI. -Separate out DSC changes into another patch. v3: -Fix check in can_ultrajoiner. (Ankit) Signed-off-by: Stanislav Lisovskiy Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dp.c | 72 ++++++++++++++++----- drivers/gpu/drm/i915/display/intel_dp.h | 7 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 +++-- 3 files changed, 71 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 942431a470c3..f8e642a57ec7 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -862,24 +862,34 @@ u32 get_max_compressed_bpp_with_joiner(struct drm_i915_private *i915, enum intel_joiner_pipe_count joined_pipes) { u32 max_bpp_small_joiner_ram; + u32 max_bpp_joiner; /* Small Joiner Check: output bpp <= joiner RAM (bits) / Horiz. width */ max_bpp_small_joiner_ram = small_joiner_ram_size_bits(i915) / mode_hdisplay; + max_bpp_joiner = max_bpp_small_joiner_ram; - if (joined_pipes == INTEL_BIG_JOINER_PIPES) { - int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24; + /* if ultra joiner is enabled, we have 2 bigjoiners enabled */ + if (joined_pipes == INTEL_BIG_JOINER_PIPES || + joined_pipes == INTEL_ULTRA_JOINER_PIPES) { + int joiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24; /* With bigjoiner multiple dsc engines are used in parallel so PPC is 2 */ int ppc = 2; - u32 max_bpp_bigjoiner = - i915->display.cdclk.max_cdclk_freq * ppc * bigjoiner_interface_bits / + max_bpp_joiner = + i915->display.cdclk.max_cdclk_freq * ppc * joiner_interface_bits / intel_dp_mode_to_fec_clock(mode_clock); max_bpp_small_joiner_ram *= 2; - return min(max_bpp_small_joiner_ram, max_bpp_bigjoiner); } + if (joined_pipes == INTEL_ULTRA_JOINER_PIPES) { + /* TODO: Check for ultrajoiner ram constraints */ - return max_bpp_small_joiner_ram; + /* both get multiplied by 2, because ram bits/ppc now doubled */ + max_bpp_small_joiner_ram *= 2; + max_bpp_joiner *= 2; + } + + return min(max_bpp_small_joiner_ram, max_bpp_joiner); } u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, @@ -985,6 +995,10 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, if (joined_pipes == INTEL_BIG_JOINER_PIPES && test_slice_count < 4) continue; + /* ultrajoiner needs 2 bigjoiners to be enabled */ + if (joined_pipes == INTEL_ULTRA_JOINER_PIPES && test_slice_count < 8) + continue; + if (min_slice_count <= test_slice_count) return test_slice_count; } @@ -1261,9 +1275,9 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector, return MODE_OK; } -bool intel_dp_need_joiner(struct intel_dp *intel_dp, - struct intel_connector *connector, - int hdisplay, int clock) +bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, + struct intel_connector *connector, + int hdisplay, int clock) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); @@ -1294,6 +1308,26 @@ bool intel_dp_has_dsc(const struct intel_connector *connector) return true; } +static bool intel_display_can_use_ultrajoiner(struct intel_display *display) +{ + struct drm_i915_private *i915 = to_i915(display->drm); + + return ((DISPLAY_VER(display) == 14 && IS_DGFX(i915)) || + DISPLAY_VER(display) > 14); +} + +bool intel_dp_need_ultrajoiner(struct intel_dp *dp, int clock) +{ + const struct intel_encoder *encoder = &dp_to_dig_port(dp)->base; + struct drm_i915_private *i915 = to_i915(encoder->base.dev); + struct intel_display *display = to_intel_display(encoder); + + if (!intel_display_can_use_ultrajoiner(display)) + return false; + + return clock > (i915->display.cdclk.max_dotclk_freq * 2); +} + static enum drm_mode_status intel_dp_mode_valid(struct drm_connector *_connector, struct drm_display_mode *mode) @@ -1330,11 +1364,15 @@ intel_dp_mode_valid(struct drm_connector *_connector, target_clock = fixed_mode->clock; } - if (intel_dp_need_joiner(intel_dp, connector, - mode->hdisplay, target_clock)) { + if (intel_dp_need_ultrajoiner(intel_dp, target_clock)) { + joined_pipes = INTEL_ULTRA_JOINER_PIPES; + max_dotclk *= INTEL_ULTRA_JOINER_PIPES; + } else if (intel_dp_need_bigjoiner(intel_dp, connector, + mode->hdisplay, target_clock)) { joined_pipes = INTEL_BIG_JOINER_PIPES; max_dotclk *= INTEL_BIG_JOINER_PIPES; } + if (target_clock > max_dotclk) return MODE_CLOCK_HIGH; @@ -2508,8 +2546,10 @@ bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, * Pipe joiner needs compression up to display 12 due to bandwidth * limitation. DG2 onwards pipe joiner can be enabled without * compression. + * Ultrajoiner always needs compression. */ - return DISPLAY_VER(i915) < 13 && (joined_pipes == INTEL_BIG_JOINER_PIPES); + return (DISPLAY_VER(i915) < 13 && (joined_pipes == INTEL_BIG_JOINER_PIPES)) || + joined_pipes == INTEL_ULTRA_JOINER_PIPES; } static int @@ -2534,9 +2574,11 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, !intel_dp_supports_fec(intel_dp, connector, pipe_config)) return -EINVAL; - if (intel_dp_need_joiner(intel_dp, connector, - adjusted_mode->crtc_hdisplay, - adjusted_mode->crtc_clock)) + if (intel_dp_need_ultrajoiner(intel_dp, adjusted_mode->crtc_clock)) + pipe_config->joiner_pipes = GENMASK(crtc->pipe + 3, crtc->pipe); + else if (intel_dp_need_bigjoiner(intel_dp, connector, + adjusted_mode->crtc_hdisplay, + adjusted_mode->crtc_clock)) pipe_config->joiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); joined_pipes = intel_joiner_num_pipes(pipe_config); diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index f284058f5148..b413b9f5fdf8 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -155,9 +155,10 @@ int intel_dp_dsc_sink_max_compressed_bpp(const struct intel_connector *connector u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, int mode_clock, int mode_hdisplay, enum intel_joiner_pipe_count joined_pipes); -bool intel_dp_need_joiner(struct intel_dp *intel_dp, - struct intel_connector *connector, - int hdisplay, int clock); +bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, + struct intel_connector *connector, + int hdisplay, int clock); +bool intel_dp_need_ultrajoiner(struct intel_dp *intel_dp, int clock); static inline unsigned int intel_dp_unused_lane_mask(int lane_count) { diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 5513ed3f39e4..1f2a6d275114 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -580,9 +580,11 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) return -EINVAL; - if (intel_dp_need_joiner(intel_dp, connector, - adjusted_mode->crtc_hdisplay, - adjusted_mode->crtc_clock)) + if (intel_dp_need_ultrajoiner(intel_dp, adjusted_mode->crtc_clock)) + pipe_config->joiner_pipes = GENMASK(crtc->pipe + 3, crtc->pipe); + else if (intel_dp_need_bigjoiner(intel_dp, connector, + adjusted_mode->crtc_hdisplay, + adjusted_mode->crtc_clock)) pipe_config->joiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; @@ -1477,8 +1479,11 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, * corresponding link capabilities of the sink) in case the * stream is uncompressed for it by the last branch device. */ - if (intel_dp_need_joiner(intel_dp, intel_connector, - mode->hdisplay, target_clock)) { + if (intel_dp_need_ultrajoiner(intel_dp, target_clock)) { + joined_pipes = INTEL_BIG_JOINER_PIPES; + max_dotclk *= INTEL_BIG_JOINER_PIPES; + } else if (intel_dp_need_bigjoiner(intel_dp, intel_connector, + mode->hdisplay, target_clock)) { joined_pipes = INTEL_BIG_JOINER_PIPES; max_dotclk *= INTEL_BIG_JOINER_PIPES; } From patchwork Fri Sep 6 12:58:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794147 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7EE9CE7AA3 for ; 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X-CSE-ConnectionGUID: 1vEC4zZQSS2oT3S7rzwQKg== X-CSE-MsgGUID: +UKL0drXTQyVtatsBscPCw== X-IronPort-AV: E=McAfee;i="6700,10204,11187"; a="24257418" X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="24257418" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:50 -0700 X-CSE-ConnectionGUID: QuyoBmmCQuesubL3dpjYvg== X-CSE-MsgGUID: CSS/v3ZFQa6al/smpsUjfg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="66691097" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:49 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 13/14] drm/i915/display: Consider ultrajoiner for computing maxdotclock Date: Fri, 6 Sep 2024 18:28:06 +0530 Message-ID: <20240906125807.3960642-14-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move helper to check ultrajoiner from intel_dp to intel_display and use it to compute maxdotclock. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 21 ++++++++++++++++++-- drivers/gpu/drm/i915/display/intel_display.h | 2 ++ drivers/gpu/drm/i915/display/intel_dp.c | 8 -------- 3 files changed, 21 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index f05e4cfd2146..cb52d412c961 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -8199,12 +8199,29 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv) drm_helper_move_panel_connectors_to_head(&dev_priv->drm); } +static bool intel_display_can_use_joiner(struct intel_display *display) +{ + /* icl+ might use joiner */ + return (DISPLAY_VER(display) >= 11); +} + +bool intel_display_can_use_ultrajoiner(struct intel_display *display) +{ + struct drm_i915_private *i915 = to_i915(display->drm); + + return ((DISPLAY_VER(display) == 14 && IS_DGFX(i915)) || + DISPLAY_VER(display) > 14); +} + static int max_dotclock(struct drm_i915_private *i915) { + struct intel_display *display = to_intel_display(&i915->drm); int max_dotclock = i915->display.cdclk.max_dotclk_freq; - /* icl+ might use joiner */ - if (DISPLAY_VER(i915) >= 11) + if (intel_display_can_use_joiner(display)) + max_dotclock *= 2; + + if (intel_display_can_use_ultrajoiner(display)) max_dotclock *= 2; return max_dotclock; diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index ac7b007b3b15..aa7e1b52d165 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -53,6 +53,7 @@ struct intel_atomic_state; struct intel_crtc; struct intel_crtc_state; struct intel_digital_port; +struct intel_display; struct intel_dp; struct intel_encoder; struct intel_initial_plane_config; @@ -600,5 +601,6 @@ bool assert_port_valid(struct drm_i915_private *i915, enum port port); bool intel_scanout_needs_vtd_wa(struct drm_i915_private *i915); int intel_joiner_num_pipes(const struct intel_crtc_state *crtc_state); +bool intel_display_can_use_ultrajoiner(struct intel_display *display); #endif diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index f8e642a57ec7..79837ba05a14 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1308,14 +1308,6 @@ bool intel_dp_has_dsc(const struct intel_connector *connector) return true; } -static bool intel_display_can_use_ultrajoiner(struct intel_display *display) -{ - struct drm_i915_private *i915 = to_i915(display->drm); - - return ((DISPLAY_VER(display) == 14 && IS_DGFX(i915)) || - DISPLAY_VER(display) > 14); -} - bool intel_dp_need_ultrajoiner(struct intel_dp *dp, int clock) { const struct intel_encoder *encoder = &dp_to_dig_port(dp)->base; From patchwork Fri Sep 6 12:58:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13794148 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CF19DCE7AA3 for ; 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X-CSE-ConnectionGUID: 9Q9lgh0HTSqIrOW4+PX2RA== X-CSE-MsgGUID: 5EqivnQwSQepiiTctIKRDA== X-IronPort-AV: E=McAfee;i="6700,10204,11187"; a="24257420" X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="24257420" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:52 -0700 X-CSE-ConnectionGUID: aufjIS+fQ4Kxb0m8MIssrQ== X-CSE-MsgGUID: pazjbMjwR5Gn+/93SrJonA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,207,1719903600"; d="scan'208";a="66691100" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2024 05:56:50 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 14/14] drm/i915/intel_dp: Add support for forcing ultrajoiner Date: Fri, 6 Sep 2024 18:28:07 +0530 Message-ID: <20240906125807.3960642-15-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> References: <20240906125807.3960642-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Allow forcing ultrajoiner through debugfs. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++---- drivers/gpu/drm/i915/display/intel_dp.h | 4 +++- drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 ++++-- 3 files changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 79837ba05a14..db2a50678cda 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1308,7 +1308,9 @@ bool intel_dp_has_dsc(const struct intel_connector *connector) return true; } -bool intel_dp_need_ultrajoiner(struct intel_dp *dp, int clock) +bool intel_dp_need_ultrajoiner(struct intel_dp *dp, + struct intel_connector *connector, + int clock) { const struct intel_encoder *encoder = &dp_to_dig_port(dp)->base; struct drm_i915_private *i915 = to_i915(encoder->base.dev); @@ -1317,7 +1319,8 @@ bool intel_dp_need_ultrajoiner(struct intel_dp *dp, int clock) if (!intel_display_can_use_ultrajoiner(display)) return false; - return clock > (i915->display.cdclk.max_dotclk_freq * 2); + return clock > (i915->display.cdclk.max_dotclk_freq * 2) || + connector->force_joined_pipes == INTEL_ULTRA_JOINER_PIPES; } static enum drm_mode_status @@ -1356,7 +1359,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, target_clock = fixed_mode->clock; } - if (intel_dp_need_ultrajoiner(intel_dp, target_clock)) { + if (intel_dp_need_ultrajoiner(intel_dp, connector, target_clock)) { joined_pipes = INTEL_ULTRA_JOINER_PIPES; max_dotclk *= INTEL_ULTRA_JOINER_PIPES; } else if (intel_dp_need_bigjoiner(intel_dp, connector, @@ -2566,7 +2569,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, !intel_dp_supports_fec(intel_dp, connector, pipe_config)) return -EINVAL; - if (intel_dp_need_ultrajoiner(intel_dp, adjusted_mode->crtc_clock)) + if (intel_dp_need_ultrajoiner(intel_dp, connector, adjusted_mode->crtc_clock)) pipe_config->joiner_pipes = GENMASK(crtc->pipe + 3, crtc->pipe); else if (intel_dp_need_bigjoiner(intel_dp, connector, adjusted_mode->crtc_hdisplay, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index b413b9f5fdf8..748e1a94afd2 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -158,7 +158,9 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, struct intel_connector *connector, int hdisplay, int clock); -bool intel_dp_need_ultrajoiner(struct intel_dp *intel_dp, int clock); +bool intel_dp_need_ultrajoiner(struct intel_dp *intel_dp, + struct intel_connector *connector, + int clock); static inline unsigned int intel_dp_unused_lane_mask(int lane_count) { diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 1f2a6d275114..5e87cdf0be69 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -580,7 +580,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) return -EINVAL; - if (intel_dp_need_ultrajoiner(intel_dp, adjusted_mode->crtc_clock)) + if (intel_dp_need_ultrajoiner(intel_dp, connector, + adjusted_mode->crtc_clock)) pipe_config->joiner_pipes = GENMASK(crtc->pipe + 3, crtc->pipe); else if (intel_dp_need_bigjoiner(intel_dp, connector, adjusted_mode->crtc_hdisplay, @@ -1479,7 +1480,8 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, * corresponding link capabilities of the sink) in case the * stream is uncompressed for it by the last branch device. */ - if (intel_dp_need_ultrajoiner(intel_dp, target_clock)) { + if (intel_dp_need_ultrajoiner(intel_dp, intel_connector, + target_clock)) { joined_pipes = INTEL_BIG_JOINER_PIPES; max_dotclk *= INTEL_BIG_JOINER_PIPES; } else if (intel_dp_need_bigjoiner(intel_dp, intel_connector,