From patchwork Fri Sep 6 17:39:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lad, Prabhakar" X-Patchwork-Id: 13794482 X-Patchwork-Delegate: kieran@bingham.xyz Received: from mail-ed1-f43.google.com (mail-ed1-f43.google.com [209.85.208.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB2B1154BF5; Fri, 6 Sep 2024 17:40:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725644428; cv=none; b=jzrDn6GfHDGoM5Ue5gm1QUoS9L3z9K4gJ2ntJkctyphN83PqO/z+vB98hhdeV6qPyaES/CUxje6IbRUk5YLpOWhRYs1Labyd8jOYNFxETqpr6nz82qlhhUaNtXMyYHXQ1jfECe5kEBHT0l5k+eoX317SAQ1XhEwjFeehRMcWWoI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725644428; c=relaxed/simple; bh=YPKrvoiTq6nWtkxe4ZFFcGAZ8SFTIBuM8+heVE/TslY=; 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To obtain this information, the .get_frame_desc() routine is implemented. This routine, in turn, calls .get_frame_desc() on the remote sensor connected to the CSI2 bridge. Signed-off-by: Lad Prabhakar Reviewed-by: Laurent Pinchart --- .../media/platform/renesas/rzg2l-cru/rzg2l-csi2.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c index c7fdee347ac8..a7e4a0c109da 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c @@ -582,6 +582,17 @@ static int rzg2l_csi2_enum_frame_size(struct v4l2_subdev *sd, return 0; } +static int rzg2l_csi2_get_frame_desc(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_mbus_frame_desc *fd) +{ + struct rzg2l_csi2 *csi2 = sd_to_csi2(sd); + + if (!csi2->remote_source) + return -EINVAL; + + return v4l2_subdev_call(csi2->remote_source, pad, get_frame_desc, pad, fd); +} + static const struct v4l2_subdev_video_ops rzg2l_csi2_video_ops = { .s_stream = rzg2l_csi2_s_stream, .pre_streamon = rzg2l_csi2_pre_streamon, @@ -593,6 +604,7 @@ static const struct v4l2_subdev_pad_ops rzg2l_csi2_pad_ops = { .enum_frame_size = rzg2l_csi2_enum_frame_size, .set_fmt = rzg2l_csi2_set_format, .get_fmt = v4l2_subdev_get_fmt, + .get_frame_desc = rzg2l_csi2_get_frame_desc, }; static const struct v4l2_subdev_ops rzg2l_csi2_subdev_ops = { From patchwork Fri Sep 6 17:39:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lad, Prabhakar" X-Patchwork-Id: 13794483 X-Patchwork-Delegate: kieran@bingham.xyz Received: from mail-ed1-f49.google.com (mail-ed1-f49.google.com [209.85.208.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 496FC1C7B68; Fri, 6 Sep 2024 17:40:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725644428; cv=none; b=YDXQLYKbahaTcZEQxbnB4hXqGuV4P+UPl+6NsFz6cwQEwp9R4M6QGmUG6oFG45jsJ4rGkRRKeGhWt4AeemyTogzSNJJHFWesb9i9IcuNqqw/AbWStqr6o+1QPmEcnWXdMV7la3DeaYTurUnDSGJs9BtNvGxlU4GFkDm6GnacWC0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Fri, 06 Sep 2024 10:40:25 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Sakari Ailus , Laurent Pinchart , Mauro Carvalho Chehab , Hans Verkuil Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 2/3] media: platform: rzg2l-cru: rzg2l-video: Retrieve virtual channel information Date: Fri, 6 Sep 2024 18:39:46 +0100 Message-Id: <20240906173947.282402-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240906173947.282402-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20240906173947.282402-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar The RZ/G2L CRU needs to configure the ICnMC.VCSEL bits to specify which virtual channel should be processed from the four available VCs. To retrieve this information from the connected subdevice, the .get_frame_desc() function is called. Signed-off-by: Lad Prabhakar Reviewed-by: Laurent Pinchart --- .../platform/renesas/rzg2l-cru/rzg2l-video.c | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c index bbf4674f888d..6101a070e785 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c @@ -433,12 +433,41 @@ void rzg2l_cru_stop_image_processing(struct rzg2l_cru_dev *cru) spin_unlock_irqrestore(&cru->qlock, flags); } +static int rzg2l_cru_get_virtual_channel(struct rzg2l_cru_dev *cru) +{ + struct v4l2_mbus_frame_desc fd = { }; + struct media_pad *pad; + int ret; + + pad = media_pad_remote_pad_unique(&cru->ip.pads[1]); + if (IS_ERR(pad)) + return PTR_ERR(pad); + + ret = v4l2_subdev_call(cru->ip.remote, pad, get_frame_desc, + pad->index, &fd); + if (ret < 0 && ret != -ENOIOCTLCMD) + return ret; + /* If remote subdev does not implement .get_frame_desc default to VC0. */ + if (ret == -ENOIOCTLCMD) + return 0; + + if (fd.type != V4L2_MBUS_FRAME_DESC_TYPE_CSI2) + return -EINVAL; + + return fd.num_entries ? fd.entry[0].bus.csi2.vc : 0; +} + int rzg2l_cru_start_image_processing(struct rzg2l_cru_dev *cru) { struct v4l2_mbus_framefmt *fmt = rzg2l_cru_ip_get_src_fmt(cru); unsigned long flags; int ret; + ret = rzg2l_cru_get_virtual_channel(cru); + if (ret < 0) + return ret; + cru->csi.channel = ret; + spin_lock_irqsave(&cru->qlock, flags); /* Select a video input */ From patchwork Fri Sep 6 17:39:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lad, Prabhakar" X-Patchwork-Id: 13794484 X-Patchwork-Delegate: kieran@bingham.xyz Received: from mail-ed1-f48.google.com (mail-ed1-f48.google.com [209.85.208.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0D061D679A; Fri, 6 Sep 2024 17:40:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 06 Sep 2024 10:40:26 -0700 (PDT) Received: from prasmi.home ([2a00:23c8:2500:a01:2595:4364:d152:dff3]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c3cc697fedsm2623557a12.64.2024.09.06.10.40.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Sep 2024 10:40:26 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Sakari Ailus , Laurent Pinchart , Mauro Carvalho Chehab , Hans Verkuil Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 3/3] media: platform: rzg2l-cru: Add support to capture 8bit raw sRGB Date: Fri, 6 Sep 2024 18:39:47 +0100 Message-Id: <20240906173947.282402-4-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240906173947.282402-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20240906173947.282402-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Add support to capture 8bit Bayer formats. Signed-off-by: Lad Prabhakar --- .../platform/renesas/rzg2l-cru/rzg2l-cru.h | 5 ++ .../platform/renesas/rzg2l-cru/rzg2l-csi2.c | 7 ++- .../platform/renesas/rzg2l-cru/rzg2l-ip.c | 9 +++- .../platform/renesas/rzg2l-cru/rzg2l-video.c | 51 ++++++++++++++++--- 4 files changed, 61 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h index 174760239548..83c664cb0929 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h @@ -58,6 +58,11 @@ struct rzg2l_cru_ip { struct v4l2_subdev *remote; }; +enum rzg2l_cru_fmt { + RZG2L_YUV = 0, + RZG2L_RAW_BAYER, + RZG2L_USER_DEFINED, +}; /** * struct rzg2l_cru_dev - Renesas CRU device structure * @dev: (OF) device diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c index a7e4a0c109da..b14c92cd7c18 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c @@ -18,6 +18,7 @@ #include #include +#include #include #include #include @@ -188,7 +189,11 @@ struct rzg2l_csi2_format { }; static const struct rzg2l_csi2_format rzg2l_csi2_formats[] = { - { .code = MEDIA_BUS_FMT_UYVY8_1X16, .datatype = 0x1e, .bpp = 16 }, + { .code = MEDIA_BUS_FMT_UYVY8_1X16, .datatype = MIPI_CSI2_DT_YUV422_8B, .bpp = 16 }, + { .code = MEDIA_BUS_FMT_SBGGR8_1X8, .datatype = MIPI_CSI2_DT_RAW8, .bpp = 8, }, + { .code = MEDIA_BUS_FMT_SGBRG8_1X8, .datatype = MIPI_CSI2_DT_RAW8, .bpp = 8, }, + { .code = MEDIA_BUS_FMT_SGRBG8_1X8, .datatype = MIPI_CSI2_DT_RAW8, .bpp = 8, }, + { .code = MEDIA_BUS_FMT_SRGGB8_1X8, .datatype = MIPI_CSI2_DT_RAW8, .bpp = 8, }, }; static inline struct rzg2l_csi2 *sd_to_csi2(struct v4l2_subdev *sd) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c index ac8ebae4ed07..5f60be92ea85 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c @@ -6,6 +6,7 @@ */ #include +#include #include "rzg2l-cru.h" struct rzg2l_cru_ip_format { @@ -15,7 +16,11 @@ struct rzg2l_cru_ip_format { }; static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = { - { .code = MEDIA_BUS_FMT_UYVY8_1X16, .datatype = 0x1e, .bpp = 16 }, + { .code = MEDIA_BUS_FMT_UYVY8_1X16, .datatype = MIPI_CSI2_DT_YUV422_8B, .bpp = 16 }, + { .code = MEDIA_BUS_FMT_SBGGR8_1X8, .datatype = MIPI_CSI2_DT_RAW8, .bpp = 8, }, + { .code = MEDIA_BUS_FMT_SGBRG8_1X8, .datatype = MIPI_CSI2_DT_RAW8, .bpp = 8, }, + { .code = MEDIA_BUS_FMT_SGRBG8_1X8, .datatype = MIPI_CSI2_DT_RAW8, .bpp = 8, }, + { .code = MEDIA_BUS_FMT_SRGGB8_1X8, .datatype = MIPI_CSI2_DT_RAW8, .bpp = 8, }, }; enum rzg2l_csi2_pads { @@ -149,7 +154,7 @@ static int rzg2l_cru_ip_enum_frame_size(struct v4l2_subdev *sd, if (fse->index != 0) return -EINVAL; - if (fse->code != MEDIA_BUS_FMT_UYVY8_1X16) + if (!rzg2l_cru_ip_code_to_fmt(fse->code)) return -EINVAL; fse->min_width = RZG2L_CRU_MIN_INPUT_WIDTH; diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c index 6101a070e785..66a0b80e8da7 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c @@ -15,6 +15,7 @@ #include #include +#include #include #include @@ -78,6 +79,7 @@ #define ICnMC 0x208 #define ICnMC_CSCTHR BIT(5) #define ICnMC_INF_YUV8_422 (0x1e << 16) +#define ICnMC_INF_RAW8 (0x2a << 16) #define ICnMC_INF_USER (0x30 << 16) #define ICnMC_VCSEL(x) ((x) << 22) #define ICnMC_INF_MASK GENMASK(21, 16) @@ -203,6 +205,10 @@ static int rzg2l_cru_mc_validate_format(struct rzg2l_cru_dev *cru, switch (fmt.format.code) { case MEDIA_BUS_FMT_UYVY8_1X16: + case MEDIA_BUS_FMT_SBGGR8_1X8: + case MEDIA_BUS_FMT_SGBRG8_1X8: + case MEDIA_BUS_FMT_SGRBG8_1X8: + case MEDIA_BUS_FMT_SRGGB8_1X8: break; default: return -EPIPE; @@ -300,7 +306,7 @@ static void rzg2l_cru_initialize_axi(struct rzg2l_cru_dev *cru) rzg2l_cru_write(cru, AMnAXIATTR, amnaxiattr); } -static void rzg2l_cru_csi2_setup(struct rzg2l_cru_dev *cru, bool *input_is_yuv, +static void rzg2l_cru_csi2_setup(struct rzg2l_cru_dev *cru, enum rzg2l_cru_fmt *input_fmt, struct v4l2_mbus_framefmt *ip_sd_fmt) { u32 icnmc; @@ -308,11 +314,18 @@ static void rzg2l_cru_csi2_setup(struct rzg2l_cru_dev *cru, bool *input_is_yuv, switch (ip_sd_fmt->code) { case MEDIA_BUS_FMT_UYVY8_1X16: icnmc = ICnMC_INF_YUV8_422; - *input_is_yuv = true; + *input_fmt = RZG2L_YUV; + break; + case MEDIA_BUS_FMT_SBGGR8_1X8: + case MEDIA_BUS_FMT_SGBRG8_1X8: + case MEDIA_BUS_FMT_SGRBG8_1X8: + case MEDIA_BUS_FMT_SRGGB8_1X8: + icnmc = ICnMC_INF_RAW8; + *input_fmt = RZG2L_RAW_BAYER; break; default: - *input_is_yuv = false; icnmc = ICnMC_INF_USER; + *input_fmt = RZG2L_USER_DEFINED; break; } @@ -327,17 +340,23 @@ static void rzg2l_cru_csi2_setup(struct rzg2l_cru_dev *cru, bool *input_is_yuv, static int rzg2l_cru_initialize_image_conv(struct rzg2l_cru_dev *cru, struct v4l2_mbus_framefmt *ip_sd_fmt) { - bool output_is_yuv = false; - bool input_is_yuv = false; + enum rzg2l_cru_fmt input_fmt, output_fmt; u32 icndmr; - rzg2l_cru_csi2_setup(cru, &input_is_yuv, ip_sd_fmt); + rzg2l_cru_csi2_setup(cru, &input_fmt, ip_sd_fmt); /* Output format */ switch (cru->format.pixelformat) { case V4L2_PIX_FMT_UYVY: icndmr = ICnDMR_YCMODE_UYVY; - output_is_yuv = true; + output_fmt = RZG2L_YUV; + break; + case V4L2_PIX_FMT_SBGGR8: + case V4L2_PIX_FMT_SGBRG8: + case V4L2_PIX_FMT_SGRBG8: + case V4L2_PIX_FMT_SRGGB8: + icndmr = 0; + output_fmt = RZG2L_RAW_BAYER; break; default: dev_err(cru->dev, "Invalid pixelformat (0x%x)\n", @@ -346,7 +365,7 @@ static int rzg2l_cru_initialize_image_conv(struct rzg2l_cru_dev *cru, } /* If input and output use same colorspace, do bypass mode */ - if (output_is_yuv == input_is_yuv) + if (input_fmt == output_fmt) rzg2l_cru_write(cru, ICnMC, rzg2l_cru_read(cru, ICnMC) | ICnMC_CSCTHR); else @@ -809,6 +828,22 @@ static const struct v4l2_format_info rzg2l_cru_formats[] = { .format = V4L2_PIX_FMT_UYVY, .bpp[0] = 2, }, + { + .format = V4L2_PIX_FMT_SBGGR8, + .bpp[0] = 1, + }, + { + .format = V4L2_PIX_FMT_SGBRG8, + .bpp[0] = 1, + }, + { + .format = V4L2_PIX_FMT_SGRBG8, + .bpp[0] = 1, + }, + { + .format = V4L2_PIX_FMT_SRGGB8, + .bpp[0] = 1, + }, }; const struct v4l2_format_info *rzg2l_cru_format_from_pixel(u32 format)