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Smith" , Jiqian Chen , Huang Rui Subject: [XEN PATCH v15 1/4] x86/hvm: allow {,un}map_pirq hypercalls unconditionally Date: Wed, 11 Sep 2024 14:58:29 +0800 Message-ID: <20240911065832.1591273-2-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240911065832.1591273-1-Jiqian.Chen@amd.com> References: <20240911065832.1591273-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075F3:EE_|SA0PR12MB4350:EE_ X-MS-Office365-Filtering-Correlation-Id: 26d1b09d-dadb-4b6b-af3e-08dcd22fcb33 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: QcAW4S4ZcC95ov5WLP6BB0J1GqGVy+0n3gc9czFUQDMP36KkLSqcOJLFRwow8Z/biPXGtXFkChOx9S2Ql/uI5uKQs15CMT5Hv1pLne03Bvzk65e7OFQzE6E8LBCsKMbEj0FxGm66X4KCQBtUK7dMQslq2IxSVtCoPKXwVFXmyZQMEqrAa1t6slqsU3W7cF09KgCvZJ8MSUqLcBnw/xq2NkMValZtdDkWtzrtySIBEWtfnXk2pd/ZvOszA6yVrirtopd7SgMqb//mYHW2q51ZZDPmrpVLqYG6mONdlKXXxCfXtQj4duG6mNnZwjsHmbIdORNXoPZ0BWHEnX7AOBZoMVLyVL7eX+6atGZTsgnb2MzyivXZ8uz8C+dxrFLy8CiPf8MejVvxBlILH1jqyGkh4tB1aVMAbsnOkJsd0tAcEptRvCjhySzKAcMZrBlE6a+g6tuUt1/FruE5XX/Ux4jMad6L6Mq4vpcWqAVlkCaN9DmyBSOea8/v52+aAtWx8Qut98uJtGyEpF9hZqXVG0SnqJfFWvZsyzYBuKROouVIokHeCMvUmigi8a+HSNHnWLNUEPPWAQD12Dz6MDkgP6OxOW/AivWLzEDSggcrbv4XEWVfEplcx8d6QmJwnlmvRp8o4OkZZYZcRiNbAIDLuCrWZM5RjmP8esbwWa32LVRgzFFq3jvleGkDssS5rNYEhmUH23LkFVqa4oLHEmkrUoFKC064OdI4Ikm3SUiT/F7zbqEa6yjgbAwKmyK4aOVUPy9VVVKbzQgi3H49VtUz0kldlQn6e4YssPluoMqiK3bhf0Eh8C66vn6rT33flUsfO31XA4BXFj7+/IvsxGP2fpNM11vARBolRdZ6bAI4y+Ze0QnhMrXm1TF236maaMqO+bwvG+ZTj1EoYCMwWX2C2lkiEkWtuUz5CeMY+WiOlic7gjzGBYaz9o4X0y/60QHMvqzQ4YXhlmIH/fFLegSgXRSreeJ1AO+dysajOMR592b2eTVTqBykVJNv5f4M9n3Knb8NDsQjJ22ImNQBXyYdaK+06l+lcFU+zy/KYhLw+wX7CCF9/RCkewo5q08U1d2zT9SKpTM0lh9kVkTT/iJYOYbbrv953xuDRnlmnd1MStVMhjOk1Y3WmSccE8nG0GCUhsZ/JjIHYMMwF3UX4O9buQnMNxXWDwtnkT91vBKpXuZsue2VXbiTmAfcQ3jp15hd8Ar3n4f/gloRI1TzeqUrsoLmfV1Us9D8ykfIqUK7RYxcJtcYjNEcWkyV+2KIkhPxEnkX2Z2r0vVFrlDMKHhpKh9o7+nchPwxl+5KHEGYL2ME4d4ARqATiSFVRMj91Hbn+EJk1hp4K0QBOUyadivz9G/Jc7SPsqNFAug+HU29uBiCzc3NyfvUDolHIzRiFF8DX+InSY1XezWWljrw6jeNJ+H3oPDkZ18j1x+TW96E9k7xT0zAmQuIJ0UtUdIOF5ccR1Fb X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Sep 2024 07:03:08.7663 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 26d1b09d-dadb-4b6b-af3e-08dcd22fcb33 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075F3.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4350 The current hypercall interfaces to manage and assign interrupts to domains is mostly based in using pIRQs as handlers. Such pIRQ values are abstract domain-specific references to interrupts. Classic HVM domains can have access to {,un}map_pirq hypercalls if the domain is allowed to route physical interrupts over event channels. That's however a different interface, limited to only mapping interrupts to itself. PVH domains on the other hand never had access to the interface, as PVH domains are not allowed to route interrupts over event channels. In order to allow setting up PCI passthrough from a PVH domain it needs access to the {,un}map_pirq hypercalls so interrupts can be assigned a pIRQ handler that can then be used by further hypercalls to bind the interrupt to a domain. Note that the {,un}map_pirq hypercalls end up calling helpers that are already used against a PVH domain in order to setup interrupts for the hardware domain when running in PVH mode. physdev_map_pirq() will call allocate_and_map_{gsi,msi}_pirq() which is already used by the vIO-APIC or the vPCI code respectively. So the exposed code paths are not new when targeting a PVH domain, but rather previous callers are not hypercall but emulation based. Signed-off-by: Jiqian Chen Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen Acked-by: Jan Beulich --- v14->v15 changes: Change to use the commit message wrote by Roger. v13->v14 changes: Modified the commit message. v12->v13 changes: Removed the PHYSDEVOP_(un)map_pirq restriction check for pvh domU and added a corresponding description in the commit message. v11->v12 changes: Avoid using return, set error code instead when (un)map is not allowed. v10->v11 changes: Delete the judgment of "d==currd", so that we can prevent physdev_(un)map_pirq from being executed when domU has no pirq, instead of just preventing self-mapping. And modify the description of the commit message accordingly. v9->v10 changes: Indent the comments above PHYSDEVOP_map_pirq according to the code style. v8->v9 changes: Add a comment above PHYSDEVOP_map_pirq to describe why need this hypercall. Change "!is_pv_domain(d)" to "is_hvm_domain(d)", and "map.domid == DOMID_SELF" to "d == current->domian". v7->v8 changes: Add the domid check(domid == DOMID_SELF) to prevent self map when guest doesn't use pirq. That check was missed in the previous version. v6->v7 changes: Nothing. v5->v6 changes: Nothing. v4->v5 changes: Move the check of self map_pirq to physdev.c, and change to check if the caller has PIRQ flag, and just break for PHYSDEVOP_(un)map_pirq in hvm_physdev_op. v3->v4 changes: add check to prevent PVH self map. v2->v3 changes: Du to changes in the implementation of the second patch on kernel side(that it will do setup_gsi and map_pirq when assigning a device to passthrough), add PHYSDEVOP_setup_gsi for PVH dom0, and we need to support self mapping. --- xen/arch/x86/hvm/hypercall.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index f023f7879e24..81883c8d4f60 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -73,6 +73,8 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) { case PHYSDEVOP_map_pirq: case PHYSDEVOP_unmap_pirq: + break; + case PHYSDEVOP_eoi: case PHYSDEVOP_irq_status_query: case PHYSDEVOP_get_free_pirq: From patchwork Wed Sep 11 06:58:30 2024 Content-Type: text/plain; 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Smith" , Jiqian Chen , Huang Rui Subject: [XEN PATCH v15 2/4] x86/irq: allow setting IRQ permissions from GSI instead of pIRQ Date: Wed, 11 Sep 2024 14:58:30 +0800 Message-ID: <20240911065832.1591273-3-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240911065832.1591273-1-Jiqian.Chen@amd.com> References: <20240911065832.1591273-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075F4:EE_|CYXPR12MB9444:EE_ X-MS-Office365-Filtering-Correlation-Id: 9c9881b3-3171-44cd-1d6a-08dcd22fcd31 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|82310400026|376014; X-Microsoft-Antispam-Message-Info: 2+oAbzAToJpXQf9kVIuV8X3vGzauoeB3KgpJvejAYxrwi6KweUyCwwpbJ1n9y+HRfhnRwHixDmours44Y1RX09sNfW5gpVdOaxBmvYfuvIAdFrI3xWf1yRdPnBLpMGlawwjLR7o6f4W9wPDk9ybTXlAjekJnzsKZC51TERqfLBpTlSx74yNDQpIW2whVjWxpawwBqotnwlxDh59+4MwiBJB0wzSYGTgCqgkfKPPsU821nBG/j2H97xlCq26RHHpvm26xhQjruIP0e3S0jj/VOMbCT3ZoXLbkaCREOBQLd0iR7janC1uN0yh+0LLCQF37pTi9A+0LBUxzCxo0s8cuXB1kE4fE6q/qF89NH8LPDLyXmT8xto/wMQDZy6aPgqepxli7UFV8AG1Wxp/4Ih4UUqTsjbLTr/5aoGT29MpuZbolHIf8Zt/c8sbLFmbFf/KfUviGRMc48vGyTAY4BLdiGh2T/vvLt2l1ZmvpKLPtUEG9IeiLQp8KTbdvAYBFI7hwPx+jqAhcWKzoFUoLfYDOsFtrdAoiO5hXn9yp2PcI8eIDJUtKZt3CQVd2d9t78cYa+RMIY1ksCDiqD10k6FU+d20LscmpHYj49qMFpSPpYYS7/67B6NuqXdejmNRcuDegnJ7yAHgCDFiyHKnZg+oskISav2236r+JuyNI/A3oPEy+el8tYuYCDebolMJ/DB5vpvqOf2bnBxQcY7uyEKtILq1lljh3n6ZFsZU8mgIl0dU+XyPfnJmeIDRH9NQL9G3oxqatr7U7W0xsSzF1j5J7k//TNIoN/+M0WVLmxEtsfj26xj/P8DVgZ/S1+jyV4iMvJ8GCbK9FOUdEeSyIvaXqpSP1kA9DOHUKLNW8aeZ3nUa8mpgmqxlJb8b0FcHuolQ3NwZDdPMHUpKOM75P0iU1nxPDkm4auntFUT0eLjc+EZOMyq1e7Z2pxG8JYoS+0E2hKGOFuuEiWutxwruBSOUu/eV7X6ahWaZOFUbnv5B3DRL7slkB68Jrq6wpR4+Uw12CNSWpAa2EuwnQik01bVgQN9S7g6kgzgC6zM9EFJnkwhKQ3dlnxYG2qSAoTOAnNhNDUdJm9yI55HfO5D5Rw6sDrpdXuYNW7HxUff2g4boRiO8EWFMhlzk/S+YPx9XDlqK1a0fTfLD0KB42jg4DrNBmN7TPYEcQBsR9W+JOV7MXUk8foP9hEJ5k0KohFnp0kBZ1l3k8Lt03qEOQxRQ7z6JpC5k0Bcq428TI6nGZe1myYARDyxCV4PuPWEo+u8JotlXGuF0B2OfKjK5Z32hN6Yq2WtfQrzloSG7kNypt7ntSh+IKdwr7WvEyRWrn2lPNJS+5ktbr9lap/ovEcY5oD7h6dEUs8hhfb//Uk7ujPyZHYZrlSYmLpjsPMktRvUvcbzX5hgEYVeqpee4US2lEw0hvSLAAT6/BCp3KbZKlpZ9/bqme7Em3RvcIfkvMpcKJGTfB X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Sep 2024 07:03:12.5736 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9c9881b3-3171-44cd-1d6a-08dcd22fcd31 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075F4.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR12MB9444 Some domains are not aware of the pIRQ abstraction layer that maps interrupt sources into Xen space interrupt numbers. pIRQs values are only exposed to domains that have the option to route physical interrupts over event channels. This creates issues for PCI-passthrough from a PVH domain, as some of the passthrough related hypercalls use pIRQ as references to physical interrupts on the system. One of such interfaces is XEN_DOMCTL_irq_permission, used to grant or revoke access to interrupts, takes a pIRQ as the reference to the interrupt to be adjusted. Since PVH doesn't manage interrupts in terms of pIRQs, introduce a new hypercall that allows setting interrupt permissions based on GSI value rather than pIRQ. Note the GSI hypercall parameters is translated to an IRQ value (in case there are ACPI overrides) before doing the checks. Signed-off-by: Jiqian Chen Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen Reviewed-by: Daniel P. Smith --- CC: Daniel P . Smith Remaining comment @Daniel P . Smith: + ret = -EPERM; + if ( !irq_access_permitted(currd, irq) || + xsm_irq_permission(XSM_HOOK, d, irq, flags) ) + break; Is it okay to issue the XSM check using the translated value(irq), not the one(gsi) that was originally passed into the hypercall? --- v13->v15 changes: Change to use the commit message wrote by Roger. Change the code comment from "Check all bits are zero except lowest bit" to "Check only valid bits are set". Change the end return sentence of gsi_2_irq to "return irq ?: -EINVAL;" to preserve the error code from apic_pin_2_gsi_irq(). v12->v13 changes: For struct xen_domctl_gsi_permission, rename "access_flag" to "flags", change its type from uint8_t to uint32_t, delete "pad", add XEN_DOMCTL_GSI_REVOKE and XEN_DOMCTL_GSI_GRANT macros. Move "gsi > highest_gsi()" into function gsi_2_irq. Modify parameter gsi in function gsi_2_irq and mp_find_ioapic to unsigned int type. Delete unnecessary spaces and brackets around "~XEN_DOMCTL_GSI_ACTION_MASK". Delete unnecessary goto statements and change to direct break. Add description in commit message to explain how gsi to irq isconverted. v11->v12 changes: Change nr_irqs_gsi to highest_gsi() to check gsi boundary, then need to remove "__init" of highest_gsi function. Change the check of irq boundary from <0 to <=0, and remove unnecessary space. Add #define XEN_DOMCTL_GSI_PERMISSION_MASK 1 to get lowest bit. v10->v11 changes: Extracted from patch#5 of v10 into a separate patch. Add non-zero judgment for other bits of allow_access. Delete unnecessary judgment "if ( is_pv_domain(currd) || has_pirq(currd) )". Change the error exit path identifier "out" to "gsi_permission_out". Use ARRAY_SIZE() instead of open coed. v9->v10 changes: Modified the commit message to further describe the purpose of adding XEN_DOMCTL_gsi_permission. Added a check for all zeros in the padding field in XEN_DOMCTL_gsi_permission, and used currd instead of current->domain. In the function gsi_2_irq, apic_pin_2_gsi_irq was used instead of the original new code, and error handling for irq0 was added. Deleted the extra spaces in the upper and lower lines of the struct xen_domctl_gsi_permission definition. v8->v9 changes: Change the commit message to describe more why we need this new hypercall. Add comment above "if ( is_pv_domain(current->domain) || has_pirq(current->domain) )" to explain why we need this check. Add gsi_2_irq to transform gsi to irq, instead of considering gsi == irq. Add explicit padding to struct xen_domctl_gsi_permission. v5->v8 changes: Nothing. v4->v5 changes: New implementation to add new hypercall XEN_DOMCTL_gsi_permission to grant gsi. --- xen/arch/x86/domctl.c | 29 +++++++++++++++++++++++++++++ xen/arch/x86/include/asm/io_apic.h | 2 ++ xen/arch/x86/io_apic.c | 19 +++++++++++++++++++ xen/arch/x86/mpparse.c | 7 +++---- xen/include/public/domctl.h | 10 ++++++++++ xen/xsm/flask/hooks.c | 1 + 6 files changed, 64 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 68b5b46d1a83..939b1de0ee59 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -36,6 +36,7 @@ #include #include #include +#include static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) @@ -237,6 +238,34 @@ long arch_do_domctl( break; } + case XEN_DOMCTL_gsi_permission: + { + int irq; + unsigned int gsi = domctl->u.gsi_permission.gsi; + uint32_t flags = domctl->u.gsi_permission.flags; + + /* Check only valid bits are set */ + ret = -EINVAL; + if ( flags & ~XEN_DOMCTL_GSI_ACTION_MASK ) + break; + + ret = irq = gsi_2_irq(gsi); + if ( ret <= 0 ) + break; + + ret = -EPERM; + if ( !irq_access_permitted(currd, irq) || + xsm_irq_permission(XSM_HOOK, d, irq, flags) ) + break; + + if ( flags ) + ret = irq_permit_access(d, irq); + else + ret = irq_deny_access(d, irq); + + break; + } + case XEN_DOMCTL_getpageframeinfo3: { unsigned int num = domctl->u.getpageframeinfo3.num; diff --git a/xen/arch/x86/include/asm/io_apic.h b/xen/arch/x86/include/asm/io_apic.h index 78268ea8f666..62456806c7af 100644 --- a/xen/arch/x86/include/asm/io_apic.h +++ b/xen/arch/x86/include/asm/io_apic.h @@ -213,5 +213,7 @@ unsigned highest_gsi(void); int ioapic_guest_read( unsigned long physbase, unsigned int reg, u32 *pval); int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val); +int mp_find_ioapic(unsigned int gsi); +int gsi_2_irq(unsigned int gsi); #endif diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index 772700584639..e40d2f7dbd75 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -955,6 +955,25 @@ static int pin_2_irq(int idx, int apic, int pin) return irq; } +int gsi_2_irq(unsigned int gsi) +{ + int ioapic, irq; + unsigned int pin; + + if ( gsi > highest_gsi() ) + return -ERANGE; + + ioapic = mp_find_ioapic(gsi); + if ( ioapic < 0 ) + return -EINVAL; + + pin = gsi - io_apic_gsi_base(ioapic); + + irq = apic_pin_2_gsi_irq(ioapic, pin); + + return irq ?: -EINVAL; +} + static inline int IO_APIC_irq_trigger(int irq) { int apic, idx, pin; diff --git a/xen/arch/x86/mpparse.c b/xen/arch/x86/mpparse.c index 306d8ed97a83..e13b83bbe9dd 100644 --- a/xen/arch/x86/mpparse.c +++ b/xen/arch/x86/mpparse.c @@ -842,8 +842,7 @@ static struct mp_ioapic_routing { } mp_ioapic_routing[MAX_IO_APICS]; -static int mp_find_ioapic ( - int gsi) +int mp_find_ioapic(unsigned int gsi) { unsigned int i; @@ -854,7 +853,7 @@ static int mp_find_ioapic ( return i; } - printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); + printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %u\n", gsi); return -1; } @@ -915,7 +914,7 @@ void __init mp_register_ioapic ( return; } -unsigned __init highest_gsi(void) +unsigned highest_gsi(void) { unsigned x, res = 0; for (x = 0; x < nr_ioapics; x++) diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 2a49fe46ce25..e1028fc524cf 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -464,6 +464,14 @@ struct xen_domctl_irq_permission { uint8_t pad[3]; }; +/* XEN_DOMCTL_gsi_permission */ +struct xen_domctl_gsi_permission { + uint32_t gsi; +#define XEN_DOMCTL_GSI_REVOKE 0 +#define XEN_DOMCTL_GSI_GRANT 1 +#define XEN_DOMCTL_GSI_ACTION_MASK 1 + uint32_t flags; +}; /* XEN_DOMCTL_iomem_permission */ struct xen_domctl_iomem_permission { @@ -1306,6 +1314,7 @@ struct xen_domctl { #define XEN_DOMCTL_get_paging_mempool_size 85 #define XEN_DOMCTL_set_paging_mempool_size 86 #define XEN_DOMCTL_dt_overlay 87 +#define XEN_DOMCTL_gsi_permission 88 #define XEN_DOMCTL_gdbsx_guestmemio 1000 #define XEN_DOMCTL_gdbsx_pausevcpu 1001 #define XEN_DOMCTL_gdbsx_unpausevcpu 1002 @@ -1328,6 +1337,7 @@ struct xen_domctl { struct xen_domctl_setdomainhandle setdomainhandle; struct xen_domctl_setdebugging setdebugging; struct xen_domctl_irq_permission irq_permission; + struct xen_domctl_gsi_permission gsi_permission; struct xen_domctl_iomem_permission iomem_permission; struct xen_domctl_ioport_permission ioport_permission; struct xen_domctl_hypercall_init hypercall_init; diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c index 278ad38c2af3..dfa23738cd8a 100644 --- a/xen/xsm/flask/hooks.c +++ b/xen/xsm/flask/hooks.c @@ -695,6 +695,7 @@ static int cf_check flask_domctl(struct domain *d, unsigned int cmd, case XEN_DOMCTL_shadow_op: case XEN_DOMCTL_ioport_permission: case XEN_DOMCTL_ioport_mapping: + case XEN_DOMCTL_gsi_permission: #endif #ifdef CONFIG_HAS_PASSTHROUGH /* From patchwork Wed Sep 11 06:58:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jiqian" X-Patchwork-Id: 13799780 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C7CFEDE998 for ; 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Smith" , Jiqian Chen , Huang Rui , "Anthony PERARD" Subject: [RFC XEN PATCH v15 3/4] tools: Add new function to get gsi from dev Date: Wed, 11 Sep 2024 14:58:31 +0800 Message-ID: <20240911065832.1591273-4-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240911065832.1591273-1-Jiqian.Chen@amd.com> References: <20240911065832.1591273-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075ED:EE_|DM4PR12MB7672:EE_ X-MS-Office365-Filtering-Correlation-Id: 180d522e-a6d4-465e-02c1-08dcd230474f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|376014|7416014|1800799024; X-Microsoft-Antispam-Message-Info: wu6AdG77JApWKqQFFh64Kye1XhgzRvlzz3zVfKOUHByxfMGWfsgpv/ow/8PvAUrEMgzOH0aH/aYwSWgSHX0rhJiA4NCaZbmHNn/u3ROgd69sAynIagscwK/qtua7xWovXwo/yBcObs/WG6DMZu1gwyUuCvI1sEqr5OcyMmQH818T0gV6KxlM0uf04LxBmV39gKsTkUsvswnU7tFUKcWGQkYhJ5X5ChQyDHH2Xlnw1Y10TJ9MNImVecQouSqUK44M6UuC1hEn1sy+Pw9utkJK0246XAAsASK+ylThF9R2H5+SVKzDUMdgUatyVp/ibQYHHf4HlTp23yo04BgYNg1KlAq07EXGwzybehFHVXnJEWNaQpjoSEP2rn99Jr6lF7euPdcAr589lcKl5UXbwfUKL8xEq1+E3La0sLsBuklcMwmhv7AajX3YVoV9qttQfskkoSjHO0bJZbnjIowggg4ZadqijtiYQj/nUSJtgaz4WN1P6uTR0KY6PWYnJGKanU/IHOHjwaY7dj7U116Ow5b3F/PHAOgo6+rLSLEZfPK2tD/GujoACy3Oz8OiVxFLSNsetX1b2Jozp8hNbzxgnjhBB05KWnYZMGX+GMIpZgsRx7qbztl3NOZacH6xouFSnp2PrWxZl8wCDfuVYU1VOuepic8goeTpqsnmVXF9Dm6CyYgYMKnAExiKCMpgT57N+OBLFuqbg2QZcqulrsMpVw9AmO3jaLFJSZVsojvtxXpjqTwGpl/+dWigAcr22qCDAE28ZMalTo2jAwta3eG6UTUR4uZ8kDlZdvqs1u0U2YM7mJ57G8MF9kQ8iaisTOP9I1YwptE9f1QesYTAlv5H18NMvdutaLPmW2WQFexk5f6ycSkyLGD7ISMw5ofMFrVOQI1E0r5csFALwiY+shef+rrjxGiT1VDnxg8seaIlJmnipEEEVKm0EBP0i2cYEaC3ceflGUeSQVmQCDEz9Lg8cmW9xzTnbFVx/npAkJeOBLzvPCPecn3ofsTUENXChTh48OIuhLX3T141QjH/N315zB68pQIesVRH31Ja2iKYAlQfzCdIQjW0WX+VxaU1L1WRpVsxUIv/JKp/Txk57qttFsg42FCJ0OP7LhA6q/cBttjT/r1BHd6XaIm+tPezAQrVZs3l+OEN6O/Z4mnD+Bd6utPFtoDcZ+4YwmY1newdt/Tg5eYI5Mv90z2AzpuY34GnuSdqm71IgIVKBPbm/UR2c2cXwbC3lSb572VWapKd1wuZbJmB+zqwwZQ8Cr/1hLk86CKE7czE7IL5Q9C5rG6uhXeN0Dg3oRHc0tPe543r8CiSQxi2udwb4AbUcAJy5OW+saUNoF7rNgmsQQb6grSLeIBvd7Bz97IW9t9Jz9flTLPS3Qd7tnUQ1W8mEtn3u6f+6PhaDw7c0FDPRIfKZroFInuoXVbFTeutvFFrWaDiHWToYtnNSZOqyrDKyGY6rk6WGm4x X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(376014)(7416014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Sep 2024 07:06:37.5141 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 180d522e-a6d4-465e-02c1-08dcd230474f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075ED.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7672 On PVH dom0, when passthrough a device to domU, QEMU and xl tools want to use gsi number to do pirq mapping, see QEMU code xen_pt_realize->xc_physdev_map_pirq, and xl code pci_add_dm_done->xc_physdev_map_pirq, but in current codes, the gsi number is got from file /sys/bus/pci/devices//irq, that is wrong, because irq is not equal with gsi, they are in different spaces, so pirq mapping fails. And in current codes, there is no method to get gsi for userspace. For above purpose, add new function to get gsi, and the corresponding ioctl is implemented on linux kernel side. Signed-off-by: Jiqian Chen Signed-off-by: Huang Rui Signed-off-by: Chen Jiqian Reviewed-by: Anthony PERARD --- RFC: it needs to wait for the corresponding third patch on linux kernel side to be merged. https://lore.kernel.org/xen-devel/20240607075109.126277-4-Jiqian.Chen@amd.com/ --- v13->v15 changes: Add "Reviewed-by: Anthony PERARD " v12->v13 changes: Rename the function xc_physdev_gsi_from_pcidev to xc_pcidev_get_gsi to avoid confusion with physdev namesapce. Move the implementation of xc_pcidev_get_gsi into xc_linux.c. Directly use xencall_fd(xch->xcall) in the function xc_pcidev_get_gsi instead of opening "privcmd". v11->v12 changes: Nothing. v10->v11 changes: Patch#4 of v10, directly open "/dev/xen/privcmd" in the function xc_physdev_gsi_from_dev instead of adding unnecessary functions to libxencall. Change the type of gsi in the structure privcmd_gsi_from_dev from int to u32. v9->v10 changes: Extract the implementation of xc_physdev_gsi_from_dev to be a new patch. --- tools/include/xen-sys/Linux/privcmd.h | 7 +++++++ tools/include/xenctrl.h | 2 ++ tools/libs/ctrl/xc_freebsd.c | 6 ++++++ tools/libs/ctrl/xc_linux.c | 20 ++++++++++++++++++++ tools/libs/ctrl/xc_minios.c | 6 ++++++ tools/libs/ctrl/xc_netbsd.c | 6 ++++++ tools/libs/ctrl/xc_solaris.c | 6 ++++++ 7 files changed, 53 insertions(+) diff --git a/tools/include/xen-sys/Linux/privcmd.h b/tools/include/xen-sys/Linux/privcmd.h index bc60e8fd55eb..607dfa2287bc 100644 --- a/tools/include/xen-sys/Linux/privcmd.h +++ b/tools/include/xen-sys/Linux/privcmd.h @@ -95,6 +95,11 @@ typedef struct privcmd_mmap_resource { __u64 addr; } privcmd_mmap_resource_t; +typedef struct privcmd_pcidev_get_gsi { + __u32 sbdf; + __u32 gsi; +} privcmd_pcidev_get_gsi_t; + /* * @cmd: IOCTL_PRIVCMD_HYPERCALL * @arg: &privcmd_hypercall_t @@ -114,6 +119,8 @@ typedef struct privcmd_mmap_resource { _IOC(_IOC_NONE, 'P', 6, sizeof(domid_t)) #define IOCTL_PRIVCMD_MMAP_RESOURCE \ _IOC(_IOC_NONE, 'P', 7, sizeof(privcmd_mmap_resource_t)) +#define IOCTL_PRIVCMD_PCIDEV_GET_GSI \ + _IOC(_IOC_NONE, 'P', 10, sizeof(privcmd_pcidev_get_gsi_t)) #define IOCTL_PRIVCMD_UNIMPLEMENTED \ _IOC(_IOC_NONE, 'P', 0xFF, 0) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index 2c4608c09ab0..924f9a35f790 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -1642,6 +1642,8 @@ int xc_physdev_unmap_pirq(xc_interface *xch, uint32_t domid, int pirq); +int xc_pcidev_get_gsi(xc_interface *xch, uint32_t sbdf); + /* * LOGGING AND ERROR REPORTING */ diff --git a/tools/libs/ctrl/xc_freebsd.c b/tools/libs/ctrl/xc_freebsd.c index 9dd48a3a08bb..9019fc663361 100644 --- a/tools/libs/ctrl/xc_freebsd.c +++ b/tools/libs/ctrl/xc_freebsd.c @@ -60,6 +60,12 @@ void *xc_memalign(xc_interface *xch, size_t alignment, size_t size) return ptr; } +int xc_pcidev_get_gsi(xc_interface *xch, uint32_t sbdf) +{ + errno = ENOSYS; + return -1; +} + /* * Local variables: * mode: C diff --git a/tools/libs/ctrl/xc_linux.c b/tools/libs/ctrl/xc_linux.c index c67c71c08be3..92591e49a1c8 100644 --- a/tools/libs/ctrl/xc_linux.c +++ b/tools/libs/ctrl/xc_linux.c @@ -66,6 +66,26 @@ void *xc_memalign(xc_interface *xch, size_t alignment, size_t size) return ptr; } +int xc_pcidev_get_gsi(xc_interface *xch, uint32_t sbdf) +{ + int ret; + privcmd_pcidev_get_gsi_t dev_gsi = { + .sbdf = sbdf, + .gsi = 0, + }; + + ret = ioctl(xencall_fd(xch->xcall), + IOCTL_PRIVCMD_PCIDEV_GET_GSI, &dev_gsi); + + if (ret < 0) { + PERROR("Failed to get gsi from dev"); + } else { + ret = dev_gsi.gsi; + } + + return ret; +} + /* * Local variables: * mode: C diff --git a/tools/libs/ctrl/xc_minios.c b/tools/libs/ctrl/xc_minios.c index 3dea7a78a576..462af827b33c 100644 --- a/tools/libs/ctrl/xc_minios.c +++ b/tools/libs/ctrl/xc_minios.c @@ -47,6 +47,12 @@ void *xc_memalign(xc_interface *xch, size_t alignment, size_t size) return memalign(alignment, size); } +int xc_pcidev_get_gsi(xc_interface *xch, uint32_t sbdf) +{ + errno = ENOSYS; + return -1; +} + /* * Local variables: * mode: C diff --git a/tools/libs/ctrl/xc_netbsd.c b/tools/libs/ctrl/xc_netbsd.c index 31979937621e..1318d4d90608 100644 --- a/tools/libs/ctrl/xc_netbsd.c +++ b/tools/libs/ctrl/xc_netbsd.c @@ -63,6 +63,12 @@ void *xc_memalign(xc_interface *xch, size_t alignment, size_t size) return valloc(size); } +int xc_pcidev_get_gsi(xc_interface *xch, uint32_t sbdf) +{ + errno = ENOSYS; + return -1; +} + /* * Local variables: * mode: C diff --git a/tools/libs/ctrl/xc_solaris.c b/tools/libs/ctrl/xc_solaris.c index 5128f3f0f490..049e28d55ccd 100644 --- a/tools/libs/ctrl/xc_solaris.c +++ b/tools/libs/ctrl/xc_solaris.c @@ -32,6 +32,12 @@ void *xc_memalign(xc_interface *xch, size_t alignment, size_t size) return memalign(alignment, size); } +int xc_pcidev_get_gsi(xc_interface *xch, uint32_t sbdf) +{ + errno = ENOSYS; + return -1; +} + /* * Local variables: * mode: C From patchwork Wed Sep 11 06:58:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jiqian" X-Patchwork-Id: 13799781 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1146EEE0211 for ; Wed, 11 Sep 2024 07:07:20 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.796236.1205744 (Exim 4.92) (envelope-from ) id 1soHRY-000524-Rj; Wed, 11 Sep 2024 07:07:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 796236.1205744; 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pr=C From: Jiqian Chen To: CC: Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Julien Grall , Stefano Stabellini , Anthony PERARD , "Juergen Gross" , "Daniel P . Smith" , Jiqian Chen , Huang Rui Subject: [RFC XEN PATCH v15 4/4] tools: Add new function to do PIRQ (un)map on PVH dom0 Date: Wed, 11 Sep 2024 14:58:32 +0800 Message-ID: <20240911065832.1591273-5-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240911065832.1591273-1-Jiqian.Chen@amd.com> References: <20240911065832.1591273-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00004689:EE_|SA3PR12MB7999:EE_ X-MS-Office365-Filtering-Correlation-Id: a1214b58-9faa-430a-9050-08dcd230552f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: QWSdz/kvcqrpaSmMO4u3KagfGt7udNgC/ce4JCMYRrJAlykw0CdHUbz1jcdhwBKxI2Rj9FbI6zBfiBITyMsRUoFrtnHheqoslGuEV5mVVOwpJ+v/BhsNweBQioSzTmhlomzwPUG2rZ6GOpAyQQNonhOPDVff5Rqx9/PrOnGD8SZp7O2DksAPhRojPuWgUVaWNrsiGffOFwQE2D+7EG82CUVeU8a4bJJgmtZMERcvGxhvbbvEYUPnWFyusJ3irKMKiVIKS5O4x/eIIli4MTWuHj7zaevQ7Alw1A/dgMZ/asf3XWljM/LyeXyQVEfsq9kKypLvc9HD62Hjnmj068HSMzDRLUlp/2HVWDbVFRtiggkkSt4AJVCvh7bFmnE7r7jcrot5sf89ReqbUxBvwoSd4pS9i87DPgONRsh0ETmCZu4+Q9EDo+qPbxUrsx5Aop6/zUYE5q0AhoBqNOgkcFoVEg0EsKhHsKGw0hotZxOF5krJNl9EJy6nWVp0HCRm0cR/fm/ypSLzAujFSTLN6G1jPMCQH0fPKLPF6cSSyOH/4gM7VvPEbt5EiCNL3ldIUBxfToChgdf7BXYIwlTilCMzB9ww6hynOTgcLXbYUDG+vqOFqo943Z5nSpEK4S73dLYs2gYEVm5YgMkdgIAOt9hLqggsKxFmHSLarbp6coGPAQBoYpm6WeSb20aqiHTJkdGefZ1UmcEIoetKydDZqLTzHxtni+5E+Dst6zJgM386f8UsnVmFal2l8fRODtgIPxyI5/lZLUr9eeshcfqRThCiZ8Osxerp1qdwd5QaA2dykHmExmIChKBgmHH2L2V3zdKuHXMjG578MQbn+OTMlo7HaVnM2uJNrHJygZgCsM3kVXSfu0UIx2Sy+50vxhbIIi6EH1/PoCQX9l9fZGpUZWHgTg1g5JtHK6KHRcETHtyAoZPWuC3TcjkWfSyo0G8aYraEiZN0LgKinvvH4NpEoIL55lqDZdN9Z9Fbim3T/oi5YRIJNfordfubQrT6MyaJK+zbX6EmQKU08bKv4GqazBbk8V8FI2vZMq8I2CiTC3SU2MmpqQ4V/VuIcSJL+JDnNJ9tP4G2UbyzPQ/YOTNPG/MSwfjtT2khBgmDAJ5GH2ehEp9i7ImYV84LOffDk2er/7OuQ8k+ozuFCyTuvz9zO4P8fSSNunOhxSvA+wZMdKKjAtP9NQpS8mBNU3F3lJ0LpdyAp28Kgq9Rnt7CBxNEEvGYBmSiECSRgmM1SxjUpBGJID2knAG7sI8ncFCCQZ7BtWqyCG5Of8pmWiFe7Lac/UkYaoPcy5OibZ8/ibOiG9OUIO4mwB4S1yFjyiSVE1J0C5yfL/voNtpg+/XP65DHYSmRgfoSaZ60DPF+Yq/eiuSa5Cj1nko7FUCeOEhfzDjcwzj/Vpn9a2Mo+3+hDUjpaHvIdJnut0IUye76oIGX/rcNKraX5cYIItKohIOUwfsmVvrI X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Sep 2024 07:07:00.8430 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a1214b58-9faa-430a-9050-08dcd230552f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004689.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7999 When dom0 is PVH, and passthrough a device to dumU, xl will use the gsi number of device to do a pirq mapping, see pci_add_dm_done->xc_physdev_map_pirq, but the gsi number is got from file /sys/bus/pci/devices//irq, that confuses irq and gsi, they are in different space and are not equal, so it will fail when mapping. To solve this issue, to get the real gsi and add a new function xc_physdev_map_pirq_gsi to get a free pirq for gsi. Note: why not use current function xc_physdev_map_pirq, because it doesn't support to allocate a free pirq, what's more, to prevent changing it and affecting its callers, so add xc_physdev_map_pirq_gsi. Besides, PVH dom0 doesn't have PIRQs flag, it doesn't do PHYSDEVOP_map_pirq for each gsi. So grant function callstack pci_add_dm_done->XEN_DOMCTL_irq_permission will fail at function domain_pirq_to_irq. And old hypercall XEN_DOMCTL_irq_permission requires passing in pirq, it is not suitable for PVH dom0 that doesn't have PIRQs to grant irq permission. To solve this issue, use the another hypercall XEN_DOMCTL_gsi_permission to grant the permission of irq( translate from gsi) to dumU when dom0 has no PIRQs. Signed-off-by: Jiqian Chen Signed-off-by: Huang Rui Signed-off-by: Chen Jiqian Reviewed-by: Anthony PERARD --- RFC: it needs to wait for the corresponding third patch on linux kernel side to be merged. https://lore.kernel.org/xen-devel/20240607075109.126277-4-Jiqian.Chen@amd.com/ --- v13->v15 changes: Change the initialization way of "struct physdev_map_pirq map" in function xc_physdev_map_pirq_gsi to be definition and set value directly. Change code from "rc = libxl__arch_local_domain_has_pirq_notion(gc); if (!rc) {}" to "if (libxl__arch_local_domain_has_pirq_notion(gc) == false) {}" Modified some log prints codes. v12->v13 changes: Deleted patch #6 of v12, and added function xc_physdev_map_pirq_gsi to map pirq for gsi. For functions that generate libxl error, changed the return value from -1 to ERROR_*. Instead of declaring "ctx", use the macro "CTX". Add the function libxl__arch_local_romain_ has_pirq_notion to determine if there is a concept of pirq in the domain where xl is located. In the function libxl__arch_hvm_unmap_gsi, before unmap_pirq, use map_pirq to obtain the pirq corresponding to gsi. v11->v12 changes: Nothing. v10->v11 changes: New patch Modification of the tools part of patches#4 and #5 of v10, use privcmd_gsi_from_dev to get gsi, and use XEN_DOMCTL_gsi_permission to grant gsi. Change the hard-coded 0 to use LIBXL_TOOLSTACK_DOMID. Add libxl__arch_hvm_map_gsi to distinguish x86 related implementations. Add a list pcidev_pirq_list to record the relationship between sbdf and pirq, which can be used to obtain the corresponding pirq when unmap PIRQ. --- tools/include/xenctrl.h | 10 ++++ tools/libs/ctrl/xc_domain.c | 15 +++++ tools/libs/ctrl/xc_physdev.c | 27 +++++++++ tools/libs/light/libxl_arch.h | 6 ++ tools/libs/light/libxl_arm.c | 15 +++++ tools/libs/light/libxl_pci.c | 110 ++++++++++++++++++++-------------- tools/libs/light/libxl_x86.c | 72 ++++++++++++++++++++++ 7 files changed, 210 insertions(+), 45 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index 924f9a35f790..29617585c535 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -1383,6 +1383,11 @@ int xc_domain_irq_permission(xc_interface *xch, uint32_t pirq, bool allow_access); +int xc_domain_gsi_permission(xc_interface *xch, + uint32_t domid, + uint32_t gsi, + uint32_t flags); + int xc_domain_iomem_permission(xc_interface *xch, uint32_t domid, unsigned long first_mfn, @@ -1638,6 +1643,11 @@ int xc_physdev_map_pirq_msi(xc_interface *xch, int entry_nr, uint64_t table_base); +int xc_physdev_map_pirq_gsi(xc_interface *xch, + uint32_t domid, + int gsi, + int *pirq); + int xc_physdev_unmap_pirq(xc_interface *xch, uint32_t domid, int pirq); diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c index f2d9d14b4d9f..e3538ec0ba80 100644 --- a/tools/libs/ctrl/xc_domain.c +++ b/tools/libs/ctrl/xc_domain.c @@ -1394,6 +1394,21 @@ int xc_domain_irq_permission(xc_interface *xch, return do_domctl(xch, &domctl); } +int xc_domain_gsi_permission(xc_interface *xch, + uint32_t domid, + uint32_t gsi, + uint32_t flags) +{ + struct xen_domctl domctl = { + .cmd = XEN_DOMCTL_gsi_permission, + .domain = domid, + .u.gsi_permission.gsi = gsi, + .u.gsi_permission.flags = flags, + }; + + return do_domctl(xch, &domctl); +} + int xc_domain_iomem_permission(xc_interface *xch, uint32_t domid, unsigned long first_mfn, diff --git a/tools/libs/ctrl/xc_physdev.c b/tools/libs/ctrl/xc_physdev.c index 460a8e779ce8..25e686d7b389 100644 --- a/tools/libs/ctrl/xc_physdev.c +++ b/tools/libs/ctrl/xc_physdev.c @@ -95,6 +95,33 @@ int xc_physdev_map_pirq_msi(xc_interface *xch, return rc; } +int xc_physdev_map_pirq_gsi(xc_interface *xch, + uint32_t domid, + int gsi, + int *pirq) +{ + int rc; + struct physdev_map_pirq map = { + .domid = domid, + .type = MAP_PIRQ_TYPE_GSI, + .index = gsi, + }; + + if ( !pirq ) + { + errno = EINVAL; + return -1; + } + map.pirq = *pirq; + + rc = do_physdev_op(xch, PHYSDEVOP_map_pirq, &map, sizeof(map)); + + if ( !rc ) + *pirq = map.pirq; + + return rc; +} + int xc_physdev_unmap_pirq(xc_interface *xch, uint32_t domid, int pirq) diff --git a/tools/libs/light/libxl_arch.h b/tools/libs/light/libxl_arch.h index f88f11d6de1d..c8ef52ddbe7f 100644 --- a/tools/libs/light/libxl_arch.h +++ b/tools/libs/light/libxl_arch.h @@ -91,6 +91,12 @@ void libxl__arch_update_domain_config(libxl__gc *gc, libxl_domain_config *dst, const libxl_domain_config *src); +_hidden +int libxl__arch_hvm_map_gsi(libxl__gc *gc, uint32_t sbdf, uint32_t domid); +_hidden +int libxl__arch_hvm_unmap_gsi(libxl__gc *gc, uint32_t sbdf, uint32_t domid); +_hidden +bool libxl__arch_local_domain_has_pirq_notion(libxl__gc *gc); #if defined(__i386__) || defined(__x86_64__) #define LAPIC_BASE_ADDRESS 0xfee00000 diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index a4029e3ac810..5a9db5e85f6f 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -1774,6 +1774,21 @@ void libxl__arch_update_domain_config(libxl__gc *gc, { } +int libxl__arch_hvm_map_gsi(libxl__gc *gc, uint32_t sbdf, uint32_t domid) +{ + return ERROR_INVAL; +} + +int libxl__arch_hvm_unmap_gsi(libxl__gc *gc, uint32_t sbdf, uint32_t domid) +{ + return ERROR_INVAL; +} + +bool libxl__arch_local_domain_has_pirq_notion(libxl__gc *gc) +{ + return true; +} + /* * Local variables: * mode: C diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c index 96cb4da0794e..8ef6a7b5fe3a 100644 --- a/tools/libs/light/libxl_pci.c +++ b/tools/libs/light/libxl_pci.c @@ -17,6 +17,7 @@ #include "libxl_osdeps.h" /* must come before any other headers */ #include "libxl_internal.h" +#include "libxl_arch.h" #define PCI_BDF "%04x:%02x:%02x.%01x" #define PCI_BDF_SHORT "%02x:%02x.%01x" @@ -1478,32 +1479,42 @@ static void pci_add_dm_done(libxl__egc *egc, fclose(f); if (!pci_supp_legacy_irq()) goto out_no_irq; - sysfs_path = GCSPRINTF(SYSFS_PCI_DEV"/"PCI_BDF"/irq", pci->domain, - pci->bus, pci->dev, pci->func); - f = fopen(sysfs_path, "r"); - if (f == NULL) { - LOGED(ERROR, domainid, "Couldn't open %s", sysfs_path); - goto out_no_irq; - } - if ((fscanf(f, "%u", &irq) == 1) && irq) { - r = xc_physdev_map_pirq(ctx->xch, domid, irq, &irq); - if (r < 0) { - LOGED(ERROR, domainid, "xc_physdev_map_pirq irq=%d (error=%d)", - irq, r); - fclose(f); - rc = ERROR_FAIL; + + /* When dom0 is PVH, should use gsi to map pirq and grant permission */ + if (libxl__arch_local_domain_has_pirq_notion(gc) == false) { + rc = libxl__arch_hvm_map_gsi(gc, pci_encode_bdf(pci), domid); + if (rc) { + LOGD(ERROR, domainid, "libxl__arch_hvm_map_gsi failed"); goto out; } - r = xc_domain_irq_permission(ctx->xch, domid, irq, 1); - if (r < 0) { - LOGED(ERROR, domainid, - "xc_domain_irq_permission irq=%d (error=%d)", irq, r); - fclose(f); - rc = ERROR_FAIL; - goto out; + } else { + sysfs_path = GCSPRINTF(SYSFS_PCI_DEV"/"PCI_BDF"/irq", pci->domain, + pci->bus, pci->dev, pci->func); + f = fopen(sysfs_path, "r"); + if (f == NULL) { + LOGED(ERROR, domainid, "Couldn't open %s", sysfs_path); + goto out_no_irq; + } + if ((fscanf(f, "%u", &irq) == 1) && irq) { + r = xc_physdev_map_pirq(ctx->xch, domid, irq, &irq); + if (r < 0) { + LOGED(ERROR, domainid, "xc_physdev_map_pirq irq=%d (error=%d)", + irq, r); + fclose(f); + rc = ERROR_FAIL; + goto out; + } + r = xc_domain_irq_permission(ctx->xch, domid, irq, 1); + if (r < 0) { + LOGED(ERROR, domainid, + "xc_domain_irq_permission irq=%d (error=%d)", irq, r); + fclose(f); + rc = ERROR_FAIL; + goto out; + } } + fclose(f); } - fclose(f); /* Don't restrict writes to the PCI config space from this VM */ if (pci->permissive) { @@ -2229,33 +2240,42 @@ skip_bar: if (!pci_supp_legacy_irq()) goto skip_legacy_irq; - sysfs_path = GCSPRINTF(SYSFS_PCI_DEV"/"PCI_BDF"/irq", pci->domain, - pci->bus, pci->dev, pci->func); - - f = fopen(sysfs_path, "r"); - if (f == NULL) { - LOGED(ERROR, domid, "Couldn't open %s", sysfs_path); - goto skip_legacy_irq; - } + /* When dom0 is PVH, should use gsi to unmap pirq and deny permission */ + if (libxl__arch_local_domain_has_pirq_notion(gc) == false) { + rc = libxl__arch_hvm_unmap_gsi(gc, pci_encode_bdf(pci), domid); + if (rc) { + LOGD(ERROR, domid, "libxl__arch_hvm_unmap_gsi failed"); + goto out; + } + } else { + sysfs_path = GCSPRINTF(SYSFS_PCI_DEV"/"PCI_BDF"/irq", pci->domain, + pci->bus, pci->dev, pci->func); - if ((fscanf(f, "%u", &irq) == 1) && irq) { - rc = xc_physdev_unmap_pirq(ctx->xch, domid, irq); - if (rc < 0) { - /* - * QEMU may have already unmapped the IRQ. So the error - * may be spurious. For now, still print an error message as - * it is not easy to distinguished between valid and - * spurious error. - */ - LOGED(ERROR, domid, "xc_physdev_unmap_pirq irq=%d", irq); + f = fopen(sysfs_path, "r"); + if (f == NULL) { + LOGED(ERROR, domid, "Couldn't open %s", sysfs_path); + goto skip_legacy_irq; } - rc = xc_domain_irq_permission(ctx->xch, domid, irq, 0); - if (rc < 0) { - LOGED(ERROR, domid, "xc_domain_irq_permission irq=%d", irq); + + if ((fscanf(f, "%u", &irq) == 1) && irq) { + rc = xc_physdev_unmap_pirq(ctx->xch, domid, irq); + if (rc < 0) { + /* + * QEMU may have already unmapped the IRQ. So the error + * may be spurious. For now, still print an error message as + * it is not easy to distinguished between valid and + * spurious error. + */ + LOGED(ERROR, domid, "xc_physdev_unmap_pirq irq=%d", irq); + } + rc = xc_domain_irq_permission(ctx->xch, domid, irq, 0); + if (rc < 0) { + LOGED(ERROR, domid, "xc_domain_irq_permission irq=%d", irq); + } } - } - fclose(f); + fclose(f); + } skip_legacy_irq: diff --git a/tools/libs/light/libxl_x86.c b/tools/libs/light/libxl_x86.c index 60643d6f5376..a3164a3077fe 100644 --- a/tools/libs/light/libxl_x86.c +++ b/tools/libs/light/libxl_x86.c @@ -879,6 +879,78 @@ void libxl__arch_update_domain_config(libxl__gc *gc, libxl_defbool_val(src->b_info.u.hvm.pirq)); } +bool libxl__arch_local_domain_has_pirq_notion(libxl__gc *gc) +{ + int r; + xc_domaininfo_t info; + + r = xc_domain_getinfo_single(CTX->xch, LIBXL_TOOLSTACK_DOMID, &info); + if (r == 0) { + if (!(info.flags & XEN_DOMINF_hvm_guest) || + (info.arch_config.emulation_flags & XEN_X86_EMU_USE_PIRQ)) + return true; + } else { + LOGE(ERROR, "getdomaininfo failed ret=%d", r); + } + + return false; +} + +int libxl__arch_hvm_map_gsi(libxl__gc *gc, uint32_t sbdf, uint32_t domid) +{ + int pirq = -1, gsi, r; + + gsi = xc_pcidev_get_gsi(CTX->xch, sbdf); + if (gsi < 0) { + return ERROR_FAIL; + } + + r = xc_physdev_map_pirq_gsi(CTX->xch, domid, gsi, &pirq); + if (r < 0) { + LOGED(ERROR, domid, "xc_physdev_map_pirq_gsi gsi=%d", gsi); + return ERROR_FAIL; + } + + r = xc_domain_gsi_permission(CTX->xch, domid, gsi, XEN_DOMCTL_GSI_GRANT); + if (r < 0) { + LOGED(ERROR, domid, "xc_domain_gsi_permission gsi=%d", gsi); + return ERROR_FAIL; + } + + return 0; +} + +int libxl__arch_hvm_unmap_gsi(libxl__gc *gc, uint32_t sbdf, uint32_t domid) +{ + int pirq = -1, gsi, r; + + gsi = xc_pcidev_get_gsi(CTX->xch, sbdf); + if (gsi < 0) { + return ERROR_FAIL; + } + + /* Before unmapping, use mapping to get the already mapped pirq first */ + r = xc_physdev_map_pirq_gsi(CTX->xch, domid, gsi, &pirq); + if (r < 0) { + LOGED(ERROR, domid, "xc_physdev_map_pirq_gsi gsi=%d", gsi); + return ERROR_FAIL; + } + + r = xc_physdev_unmap_pirq(CTX->xch, domid, pirq); + if (r < 0) { + LOGED(ERROR, domid, "xc_physdev_unmap_pirq gsi=%d", gsi); + return ERROR_FAIL; + } + + r = xc_domain_gsi_permission(CTX->xch, domid, gsi, XEN_DOMCTL_GSI_REVOKE); + if (r < 0) { + LOGED(ERROR, domid, "xc_domain_gsi_permission gsi=%d", gsi); + return ERROR_FAIL; + } + + return 0; +} + /* * Local variables: * mode: C