From patchwork Thu Sep 12 02:55:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WangYuli X-Patchwork-Id: 13801308 Received: from smtpbgbr2.qq.com (smtpbgbr2.qq.com [54.207.22.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C8DE126BF7 for ; Thu, 12 Sep 2024 02:56:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.207.22.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726109816; cv=none; b=WlV4ckL15Of/MYecTg0WDIVK7niss7WmpEzKLsvuYUpmzNNu0PqzN6+1Y62cRJ0uAjCYT4iMTv0y7KyZqco48OU/MHWOBae/HMSUUDh7liCZgJe9LOHmRO3/GnV43uPc0TSwzITt+934C2ySM2EWL2xkqQmUfamAix1Lapn53dw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726109816; c=relaxed/simple; bh=utyDe5eZCMdGV6R5hhAx0NCl89O3xZZBOa2ynVuR1cE=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=TyGL7vAOrapgW/J71nVaSlBAPVLIez6GAQvpTmnZxgePjlyyWtvUXt8LnOqARfneKQjSyzIjqW1wIUbdXvTyCytTj4QVZnsDZxMAj0uciWRl2XRtboBFeZAlfLdJKSlEktNPX/jqx3UdX3QoaG4JXpLFFmEhkqQowyz6qJ+NkXU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=uniontech.com; spf=pass smtp.mailfrom=uniontech.com; dkim=pass (1024-bit key) header.d=uniontech.com header.i=@uniontech.com header.b=O13N8h7G; arc=none smtp.client-ip=54.207.22.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=uniontech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=uniontech.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=uniontech.com header.i=@uniontech.com header.b="O13N8h7G" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=uniontech.com; s=onoh2408; t=1726109763; bh=ItiN5nFTSra7Vr5po2FBwHrIsvZx+V/Mwk2BLpZP71Q=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=O13N8h7GMx6hf49YADLg10jyJfjywFsLuPWNJghfa0dg4YOAFH+1Rr/lBmcHd+obj aseRJGw5IVBYTjpWVdtJ4v/yJv0z/ToRs790d8qMHHHOFSPbm+oY2yyy0GP+xVXb+b TlV2cXPgD9Uu9gdiWe87TdV7X2tv78x/GaCPggxE= X-QQ-mid: bizesmtp81t1726109745ti5gwwm0 X-QQ-Originating-IP: Q9VlWd8TNoXtY9lblvywY1Ehy7N3aYevzbIayxgrJRM= Received: from localhost.localdomain ( [113.57.152.160]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 12 Sep 2024 10:55:42 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 1 X-BIZMAIL-ID: 7041621352797983170 From: WangYuli To: stable@vger.kernel.org, gregkh@linuxfoundation.org, sashal@kernel.org, william.qiu@starfivetech.com, emil.renner.berthing@canonical.com, conor.dooley@microchip.com, wangyuli@uniontech.com, xingyu.wu@starfivetech.com, walker.chen@starfivetech.com, robh@kernel.org, hal.feng@starfivetech.com Cc: kernel@esmil.dk, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, richardcochran@gmail.com, netdev@vger.kernel.org Subject: [PATCH 6.6 v2 1/4] riscv: dts: starfive: add assigned-clock* to limit frquency Date: Thu, 12 Sep 2024 10:55:05 +0800 Message-ID: <3A31C289BC240955+20240912025539.1928223-1-wangyuli@uniontech.com> X-Mailer: git-send-email 2.43.4 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:uniontech.com:qybglogicsvrgz:qybglogicsvrgz8a-1 From: William Qiu [ Upstream commit af571133f7ae028ec9b5fdab78f483af13bf28d3 ] In JH7110 SoC, we need to go by-pass mode, so we need add the assigned-clock* properties to limit clock frquency. Signed-off-by: William Qiu Reviewed-by: Emil Renner Berthing Signed-off-by: Conor Dooley Signed-off-by: WangYuli --- .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 062b97c6e7df..4874e3bb42ab 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -204,6 +204,8 @@ &i2c6 { &mmc0 { max-frequency = <100000000>; + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; + assigned-clock-rates = <50000000>; bus-width = <8>; cap-mmc-highspeed; mmc-ddr-1_8v; @@ -220,6 +222,8 @@ &mmc0 { &mmc1 { max-frequency = <100000000>; + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; + assigned-clock-rates = <50000000>; bus-width = <4>; no-sdio; no-mmc; From patchwork Thu Sep 12 02:55:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WangYuli X-Patchwork-Id: 13801307 Received: from smtpbgsg1.qq.com (smtpbgsg1.qq.com [54.254.200.92]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6707986126 for ; Thu, 12 Sep 2024 02:56:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.254.200.92 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726109812; cv=none; b=crfsypdcuTC6uumoqJfIy9iUgnukVd0b90iAAWmjh7eiK2Ws6pwUP5nBwhOiDZ3jObJV1D0sbAXQfNrWhceReShyA7ar6UrpI7nflNdHJEpsaqkZpkrXiVkqVWdfJ6DXVqWkWBpyPSHqQXsKP3smNf/T9t8BIZmN6owCMXXaXpM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726109812; c=relaxed/simple; bh=xm7LbTv/MUcZzmyc0Yj1Cl/PvgH0OuuIJwbz1W9+4+o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=P6KgkE0T2lEK+mrBxoJE74vAbB/EW30ErCIyV8uetknid3Yu/koYdzSGiZHz7eKWa8bppdrD/U+WN3YCihqOCUNa3XbP0HQaFHhFSyrFLUx4RDTPlZk1wZtfhiLrTJXGHpj4xusOK535CxDr+5g1Imdrkr0qvNnfBwgFLxM0My8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=uniontech.com; spf=pass smtp.mailfrom=uniontech.com; dkim=pass (1024-bit key) header.d=uniontech.com header.i=@uniontech.com header.b=B/lJoPWE; arc=none smtp.client-ip=54.254.200.92 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=uniontech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=uniontech.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=uniontech.com header.i=@uniontech.com header.b="B/lJoPWE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=uniontech.com; s=onoh2408; t=1726109768; bh=Q+f7Y6NaDNcklTT7is2kRztTuiX4oAl/H2qYe+la9kk=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=B/lJoPWEIcqng/uR0kLhoS0Bk2g4B4gQU0lkkS65+otJUHi6XLIDjBrnY8C9ghwcE NwD6VGKdhqtRMyIvy1em0K7rK0LUFjnj9SeI54AHOWg6ZmgdAQYdjf+3QikK5rOmMJ pFyQdji79e6l5l5E+QVFe3ZlHcSjItbkpj+LClNE= X-QQ-mid: bizesmtp81t1726109752tgd9zc2a X-QQ-Originating-IP: FwNYInude3/6pcUIZW5jorMw7+H52eujKyRqd6Fcx+8= Received: from localhost.localdomain ( [113.57.152.160]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 12 Sep 2024 10:55:48 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 1 X-BIZMAIL-ID: 4074563589889725486 From: WangYuli To: stable@vger.kernel.org, gregkh@linuxfoundation.org, sashal@kernel.org, william.qiu@starfivetech.com, emil.renner.berthing@canonical.com, conor.dooley@microchip.com, wangyuli@uniontech.com, xingyu.wu@starfivetech.com, walker.chen@starfivetech.com, robh@kernel.org, hal.feng@starfivetech.com Cc: kernel@esmil.dk, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, richardcochran@gmail.com, netdev@vger.kernel.org Subject: [PATCH 6.6 v2 2/4] riscv: dts: starfive: pinfunc: Fix the pins name of I2STX1 Date: Thu, 12 Sep 2024 10:55:06 +0800 Message-ID: <3D0F65E42817C96F+20240912025539.1928223-2-wangyuli@uniontech.com> X-Mailer: git-send-email 2.43.4 In-Reply-To: <20240912025539.1928223-1-wangyuli@uniontech.com> References: <20240912025539.1928223-1-wangyuli@uniontech.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:uniontech.com:qybglogicsvrgz:qybglogicsvrgz8a-1 From: Xingyu Wu [ Upstream commit 4e1abae5688aae9dd8345dbd4ea92a4b9adf340d ] These pins are actually I2STX1 clock input, not I2STX0, so their names should be changed. Signed-off-by: Xingyu Wu Reviewed-by: Walker Chen Acked-by: Rob Herring Signed-off-by: Conor Dooley Signed-off-by: WangYuli --- arch/riscv/boot/dts/starfive/jh7110-pinfunc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h index fb0139b56723..256de17f5261 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h +++ b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h @@ -240,8 +240,8 @@ #define GPI_SYS_MCLK_EXT 30 #define GPI_SYS_I2SRX_BCLK 31 #define GPI_SYS_I2SRX_LRCK 32 -#define GPI_SYS_I2STX0_BCLK 33 -#define GPI_SYS_I2STX0_LRCK 34 +#define GPI_SYS_I2STX1_BCLK 33 +#define GPI_SYS_I2STX1_LRCK 34 #define GPI_SYS_TDM_CLK 35 #define GPI_SYS_TDM_RXD 36 #define GPI_SYS_TDM_SYNC 37 From patchwork Thu Sep 12 02:55:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WangYuli X-Patchwork-Id: 13801309 Received: from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5CE4126C15 for ; Thu, 12 Sep 2024 02:57:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.206.16.166 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726109824; cv=none; b=G3942njcsbWtW+qwrTUN7DPCuHVSd3Q1ZwViaT1WGyYtwk7vL9nI13NVfJMUWGHni/OC2INhSsx6jDIMABaxulFPZZsTzsQbT/adXU3BG4t3DfdA+LRrE/7IXLED8fbC1vgBW4eW6iy1/wYED68i95FLqKj5XD9ymOkHp0cNHic= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726109824; c=relaxed/simple; bh=k5k1Ysr62BVhOo/gBfAqHmcJM9ZZy7JPNFr1TW0Nkss=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qC1hCd4l0Q+wGtCzlvED6OF7cFb3oRxiqDgkNS1a5dciw7e5Nca+MRybC79qBDoIZAtipGjaI+F1fnNZFesh7M9pOJL2ovZdGltnHkJy2IdtV4dMwDG9+zWhdku/QsPPJn0ROIr720co8Rgqv+2AEtv9ZWBmnax+ViwJZJomIUA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=uniontech.com; spf=pass smtp.mailfrom=uniontech.com; dkim=pass (1024-bit key) header.d=uniontech.com header.i=@uniontech.com header.b=IAvMdQtN; arc=none smtp.client-ip=54.206.16.166 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=uniontech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=uniontech.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=uniontech.com header.i=@uniontech.com header.b="IAvMdQtN" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=uniontech.com; s=onoh2408; t=1726109777; bh=+EnDZRERSOAudDg8409eRPVKFThSaZM/l4cgteHHwUQ=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=IAvMdQtNFKyxJffmyPZm/gAPpxjP2zq1ukdF0VlkphcexPIf5pfLVACjTGHVlYLgm REByB1PYPsT2ECZv/l3ERrGZ5qmuyDEY106VdwPJqTu7CPEeYjq2lMeqvCrUsnANy6 nYoAILiQT2novgHeUKRksmxrCm/sEaRDfpKkaSmM= X-QQ-mid: bizesmtp81t1726109760tiaowpx1 X-QQ-Originating-IP: jQNHIan+DZA+z5jFRT8s8Ee02LLQhkFG/dOmOvDtljM= Received: from localhost.localdomain ( [113.57.152.160]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 12 Sep 2024 10:55:55 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 1 X-BIZMAIL-ID: 17270031002842427660 From: WangYuli To: stable@vger.kernel.org, gregkh@linuxfoundation.org, sashal@kernel.org, william.qiu@starfivetech.com, emil.renner.berthing@canonical.com, conor.dooley@microchip.com, wangyuli@uniontech.com, xingyu.wu@starfivetech.com, walker.chen@starfivetech.com, robh@kernel.org, hal.feng@starfivetech.com Cc: kernel@esmil.dk, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, richardcochran@gmail.com, netdev@vger.kernel.org Subject: [PATCH 6.6 v2 3/4] riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1 Date: Thu, 12 Sep 2024 10:55:07 +0800 Message-ID: X-Mailer: git-send-email 2.43.4 In-Reply-To: <20240912025539.1928223-1-wangyuli@uniontech.com> References: <20240912025539.1928223-1-wangyuli@uniontech.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:uniontech.com:qybglogicsvrgz:qybglogicsvrgz8a-1 From: Xingyu Wu [ Upstream commit 92cfc35838b2a4006abb9e3bafc291b56f135d01 ] Add I2Srx/I2Stx0/I2Stx1 nodes and pins configuration for the StarFive JH7110 SoC. Signed-off-by: Xingyu Wu Reviewed-by: Walker Chen Signed-off-by: Conor Dooley Signed-off-by: WangYuli --- .../jh7110-starfive-visionfive-2.dtsi | 58 +++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 65 +++++++++++++++++++ 2 files changed, 123 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 4874e3bb42ab..caa59b9b2f19 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -202,6 +202,24 @@ &i2c6 { status = "okay"; }; +&i2srx { + pinctrl-names = "default"; + pinctrl-0 = <&i2srx_pins>; + status = "okay"; +}; + +&i2stx0 { + pinctrl-names = "default"; + pinctrl-0 = <&mclk_ext_pins>; + status = "okay"; +}; + +&i2stx1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2stx1_pins>; + status = "okay"; +}; + &mmc0 { max-frequency = <100000000>; assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; @@ -340,6 +358,46 @@ GPOEN_SYS_I2C6_DATA, }; }; + i2srx_pins: i2srx-0 { + clk-sd-pins { + pinmux = , + , + , + , + ; + input-enable; + }; + }; + + i2stx1_pins: i2stx1-0 { + sd-pins { + pinmux = ; + bias-disable; + input-disable; + }; + }; + + mclk_ext_pins: mclk-ext-0 { + mclk-ext-pins { + pinmux = ; + input-enable; + }; + }; + mmc0_pins: mmc0-0 { rst-pins { pinmux = ; + clocks = <&syscrg JH7110_SYSCLK_I2SRX_BCLK_MST>, + <&syscrg JH7110_SYSCLK_I2SRX_APB>, + <&syscrg JH7110_SYSCLK_MCLK>, + <&syscrg JH7110_SYSCLK_MCLK_INNER>, + <&mclk_ext>, + <&syscrg JH7110_SYSCLK_I2SRX_BCLK>, + <&syscrg JH7110_SYSCLK_I2SRX_LRCK>, + <&i2srx_bclk_ext>, + <&i2srx_lrck_ext>; + clock-names = "i2sclk", "apb", "mclk", + "mclk_inner", "mclk_ext", "bclk", + "lrck", "bclk_ext", "lrck_ext"; + resets = <&syscrg JH7110_SYSRST_I2SRX_APB>, + <&syscrg JH7110_SYSRST_I2SRX_BCLK>; + dmas = <0>, <&dma 24>; + dma-names = "tx", "rx"; + starfive,syscon = <&sys_syscon 0x18 0x2>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + usb0: usb@10100000 { compatible = "starfive,jh7110-usb"; ranges = <0x0 0x0 0x10100000 0x100000>; @@ -736,6 +760,47 @@ spi6: spi@120a0000 { status = "disabled"; }; + i2stx0: i2s@120b0000 { + compatible = "starfive,jh7110-i2stx0"; + reg = <0x0 0x120b0000 0x0 0x1000>; + clocks = <&syscrg JH7110_SYSCLK_I2STX0_BCLK_MST>, + <&syscrg JH7110_SYSCLK_I2STX0_APB>, + <&syscrg JH7110_SYSCLK_MCLK>, + <&syscrg JH7110_SYSCLK_MCLK_INNER>, + <&mclk_ext>; + clock-names = "i2sclk", "apb", "mclk", + "mclk_inner","mclk_ext"; + resets = <&syscrg JH7110_SYSRST_I2STX0_APB>, + <&syscrg JH7110_SYSRST_I2STX0_BCLK>; + dmas = <&dma 47>; + dma-names = "tx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2stx1: i2s@120c0000 { + compatible = "starfive,jh7110-i2stx1"; + reg = <0x0 0x120c0000 0x0 0x1000>; + clocks = <&syscrg JH7110_SYSCLK_I2STX1_BCLK_MST>, + <&syscrg JH7110_SYSCLK_I2STX1_APB>, + <&syscrg JH7110_SYSCLK_MCLK>, + <&syscrg JH7110_SYSCLK_MCLK_INNER>, + <&mclk_ext>, + <&syscrg JH7110_SYSCLK_I2STX1_BCLK>, + <&syscrg JH7110_SYSCLK_I2STX1_LRCK>, + <&i2stx_bclk_ext>, + <&i2stx_lrck_ext>; + clock-names = "i2sclk", "apb", "mclk", + "mclk_inner", "mclk_ext", "bclk", + "lrck", "bclk_ext", "lrck_ext"; + resets = <&syscrg JH7110_SYSRST_I2STX1_APB>, + <&syscrg JH7110_SYSRST_I2STX1_BCLK>; + dmas = <&dma 48>; + dma-names = "tx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + sfctemp: temperature-sensor@120e0000 { compatible = "starfive,jh7110-temp"; reg = <0x0 0x120e0000 0x0 0x10000>; From patchwork Thu Sep 12 02:55:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WangYuli X-Patchwork-Id: 13801310 Received: from smtpbguseast3.qq.com (smtpbguseast3.qq.com [54.243.244.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5509B126C19 for ; Thu, 12 Sep 2024 02:57:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.243.244.52 ARC-Seal: i=1; a=rsa-sha256; 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spf=pass smtp.mailfrom=uniontech.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=uniontech.com header.i=@uniontech.com header.b="FxDPPOww" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=uniontech.com; s=onoh2408; t=1726109783; bh=fuJldeFwoBfDtWnj6iOEtuABcrF6h38R0IgDAihTt+8=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=FxDPPOwwHwGZm0L3y3Xh+tNnbUu8qywcjTCwA6Lvarq0NjFeHFqyCIpa2CmTIRyMA JI7mDLGTNDmrnnilaOTUjYRQ1WYBPWo1GDbgDi36vJjZ3GUW2mqGk8FVs4LYgns7xR bRj/bnZAvP0PHsUDd+p9/6d/HZjjklawu9lH5O8A= X-QQ-mid: bizesmtp81t1726109767twoddh5u X-QQ-Originating-IP: rsJS78F8Lxt9WZcr11/PxrwMaQy1gfDbNwUdwXxhx/o= Received: from localhost.localdomain ( [113.57.152.160]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 12 Sep 2024 10:56:04 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 1 X-BIZMAIL-ID: 17950901985423376830 From: WangYuli To: stable@vger.kernel.org, gregkh@linuxfoundation.org, sashal@kernel.org, william.qiu@starfivetech.com, emil.renner.berthing@canonical.com, conor.dooley@microchip.com, wangyuli@uniontech.com, xingyu.wu@starfivetech.com, walker.chen@starfivetech.com, robh@kernel.org, hal.feng@starfivetech.com Cc: kernel@esmil.dk, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, richardcochran@gmail.com, netdev@vger.kernel.org Subject: [PATCH 6.6 v2 4/4] riscv: dts: starfive: Add JH7110 PWM-DAC support Date: Thu, 12 Sep 2024 10:55:08 +0800 Message-ID: X-Mailer: git-send-email 2.43.4 In-Reply-To: <20240912025539.1928223-1-wangyuli@uniontech.com> References: <20240912025539.1928223-1-wangyuli@uniontech.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:uniontech.com:qybglogicsvrgz:qybglogicsvrgz8a-1 From: Hal Feng [ Upstream commit be326bee09374a2ebd18cb5af8fcd6f1e7825260 ] Add PWM-DAC support for StarFive JH7110 SoC. Reviewed-by: Walker Chen Signed-off-by: Hal Feng Signed-off-by: Conor Dooley Signed-off-by: WangYuli --- .../jh7110-starfive-visionfive-2.dtsi | 49 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 13 +++++ 2 files changed, 62 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index caa59b9b2f19..0e077f2f02d1 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -40,6 +40,33 @@ gpio-restart { gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>; priority = <224>; }; + + pwmdac_codec: pwmdac-codec { + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + }; + + sound-pwmdac { + compatible = "simple-audio-card"; + simple-audio-card,name = "StarFive-PWMDAC-Sound-Card"; + #address-cells = <1>; + #size-cells = <0>; + + simple-audio-card,dai-link@0 { + reg = <0>; + format = "left_j"; + bitclock-master = <&sndcpu0>; + frame-master = <&sndcpu0>; + + sndcpu0: cpu { + sound-dai = <&pwmdac>; + }; + + codec { + sound-dai = <&pwmdac_codec>; + }; + }; + }; }; &dvp_clk { @@ -253,6 +280,12 @@ &mmc1 { status = "okay"; }; +&pwmdac { + pinctrl-names = "default"; + pinctrl-0 = <&pwmdac_pins>; + status = "okay"; +}; + &qspi { #address-cells = <1>; #size-cells = <0>; @@ -463,6 +496,22 @@ GPOEN_SYS_SDIO1_DATA3, }; }; + pwmdac_pins: pwmdac-0 { + pwmdac-pins { + pinmux = , + ; + bias-disable; + drive-strength = <2>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + spi0_pins: spi0-0 { mosi-pins { pinmux = ; + clocks = <&syscrg JH7110_SYSCLK_PWMDAC_APB>, + <&syscrg JH7110_SYSCLK_PWMDAC_CORE>; + clock-names = "apb", "core"; + resets = <&syscrg JH7110_SYSRST_PWMDAC_APB>; + dmas = <&dma 22>; + dma-names = "tx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + usb0: usb@10100000 { compatible = "starfive,jh7110-usb"; ranges = <0x0 0x0 0x10100000 0x100000>;