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So if one request span more than one dTDs and only the last dTD set IOC, the usb request will pending there if no more data comes. 2. the controller can't accurately deliver data to differtent usb requests in some cases due to short packet. For example: one usb request span 3 dTDs, then if the controller received a short packet the next packet will go to 2nd dTD of current request rather than the first dTD of next request. To let the device controller work properly, one usb request should only correspond to one dTD. Then every dTD will set IOC. In theory, each dTD support up to 20KB data transfer if the offset is 0. Due to we cannot predetermine the offset, this will limit the usb request length to max 16KB. This should be fine since most of the user transfer data based on this size policy. Although these limitations found on OUT eps, we can put the request to IN eps too, this will benefit the following patches. Signed-off-by: Xu Yang --- drivers/usb/chipidea/ci.h | 1 + drivers/usb/chipidea/udc.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h index 2a38e1eb6546..f8deccfc8713 100644 --- a/drivers/usb/chipidea/ci.h +++ b/drivers/usb/chipidea/ci.h @@ -25,6 +25,7 @@ #define TD_PAGE_COUNT 5 #define CI_HDRC_PAGE_SIZE 4096ul /* page size for TD's */ #define ENDPT_MAX 32 +#define CI_MAX_REQ_SIZE (4 * CI_HDRC_PAGE_SIZE) #define CI_MAX_BUF_SIZE (TD_PAGE_COUNT * CI_HDRC_PAGE_SIZE) /****************************************************************************** diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c index b1a1be6439b6..5d9369d01065 100644 --- a/drivers/usb/chipidea/udc.c +++ b/drivers/usb/chipidea/udc.c @@ -969,6 +969,11 @@ static int _ep_queue(struct usb_ep *ep, struct usb_request *req, return -EMSGSIZE; } + if (hwreq->req.length > CI_MAX_REQ_SIZE) { + dev_err(hwep->ci->dev, "request length too big (max 16KB)\n"); + return -EMSGSIZE; + } + /* first nuke then test link, e.g. previous status has not sent */ if (!list_empty(&hwreq->queue)) { dev_err(hwep->ci->dev, "request already in queue\n"); From patchwork Thu Sep 12 04:51:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xu Yang X-Patchwork-Id: 13801358 Received: from DU2PR03CU002.outbound.protection.outlook.com (mail-northeuropeazon11012028.outbound.protection.outlook.com [52.101.66.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F4058187877 for ; Thu, 12 Sep 2024 04:51:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.66.28 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726116664; cv=fail; b=M9WJ6tarusv/mqwWeqECaVlbBsLidgffIg4giqeSjxoxZK3huMBPm107x9Dc9It0Ho9fey25ktpkXZWQCmrayLablTX6roTN02bNLCgcQSHG3EZRU/s8kk2wA0ztYVU09UxAPEQmOa/fMgpJKVvCIC8Zt55jscvPigG7bjHze/E= ARC-Message-Signature: i=2; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 5cX36YJdSn4RILW+DiWn1epKD9P+e+uhfsRvK6kClWB4ZFKezg+9b2qJz6FwiPLack+uaBsa3ETCioc/GyY2FC4gMEcSKKZAvNe4ChzczFCPSta0siRCDKqQFGfUg3KgcOH7P3z0MqF0yRvwRzD8dsi81uyKx8Z2lJwZKBctRElv0SxoQMQ9FltmPN631qr55LPTWJW1HlHnFFSKXPBqE/pyCbK346CSh9YgvK1Fcc2YatzMKykC4fYGCpRXIMQkFmzOA88EwcbEg4axUSMeXcGIvZN9MId+9npsD52V6jrduAxgxxEe0vJ4IGx//s/yN3MU7olMowUJjxLi7pGNr/AqcupD3sl09jSFFYuNMtWf/MTW0muNk8G5mCK2s1Ck0itAZynE8r4fdUgvDBP5b5s6TYjv3Wsym5wrd3rJablK6RwUEI/44fmo/9w1YWiWG2y6ZhTc77/m2xQ06Y/g//IcZkazrFP85aROTE3ep3gvtvheQDCDgnORwtqd/Sl2obE32GIf0Y5TTgDOooJf7gAH4khNO8puZGkiivEvu6tpczFxRAOVeRZO4hS6lwtAYfAS54eTBRaIOgnTbdUQH8KEGHj4UM8de4Uotwg47bmrDj4agC1QcKUG6C+KLsvhNwkTTTrqVup3CCuoQbdjXz75bfsOdWOwY5ymYSMZoe/tPP5hBDRjvbDY6TwOhKGVUTLSn4uULDRBqmJiy3UNNZ/UgTJg6NV8v5AcJppTkd9aG1icyo/0RE9HD1NaJ4rYZAvANrA3s3BWmpB7qzkX+Ga6IIENlsGJWYxIS+Mh7zwxC9kJAbdZUjGabauBRxX3l+1y/3eA5BjeCkxpmmPVwSVIuEINoVRERSSfa+9uG/x62IcDjBOLQ3X0r0SeVJkMEpXwhl10jnO7Ccc6niJICv8l/NkZt39fItfV0CYj8bp7xTW8vjz/YM+BEf7RhYcdTQYCwkc6cgQHDFtUlAypfS2PcKJTjIG/kJdPJdDp4cDWp8P1iJ1TcL4NzzKo0P0Wi5f01GxkoWaJmtl4i5le6uRNj9HJb6e3o5bUsrbGTRMy9T4JjQuW2S2TrxgLQtMw11oC4c0KQcSLIRoYDW3zQwzoxVFq/TKSHZO8qkUEH2Ysz+qd0R9XrOSGBKbX7BqOkCVlXC4Y4kANykPbMNXUFPhUTNhIBOdtWFm5uC7oT4vUeLLpEo0RekP5KAUNHWN0hx8H8tKHUtbdcCIIIiRWAhn01H+7jKFKqqsBRRLRi2By5Fo/9JYlW0jnCwRG6F2QpmNdLXw6eXutIP6LtW4aRo0sz7cwWc1FEniQ0qpP9KA7ih8zGHINBlQ6F3D4cTNEXpL3aScb7Sj5PDcGRgmCSU5DePTVFcrXROfhUunGINFWx9l8bDLlcuMa1oqzh5906VouQRO+mozKF3d4QV7Oc4c5UH0tKI0JRPmsHGcBPwpJnu54oMxwsN5bkLfYSZODJjtzhn+gJr9cil3N1QI81tUtIk8jRo8LrMqf7Jcnv3KPZNKzAlfzHWpzK9UkbCMfIAeDu2BRyDqw09mXlRcavMoX4Qr5r3Xg6wwFVsYeryYOUUoTF3K5JNC0boCS+0Gr X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f6498d79-d345-475c-1c98-08dcd2e67e09 X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8822.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2024 04:50:58.0223 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ISw33SJPP8AyogwCrEgIk3/TqVdizTq4o6EpGveUMKfjzQ36PEx83EAfIQyJ/6ASX4DI0uP4dORELHD8CDg7Zg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB8555 The chipidea controller doesn't fully support sglist, such as it can not transfer data spanned more dTDs to form a bus packet, so it can only work on very limited cases. The limitations as below: 1. the end address of the first sg buffer must be 4KB aligned. 2. the start and end address of the middle sg buffer must be 4KB aligned. 3. the start address of the first sg buffer must be 4KB aligned. However, not all the use cases violate these limitations. To make the controller compatible with most of the cases, this will try to bounce the problem sglist entries which can be found by sglist_get_invalid_entry(). Then a bounced line buffer (the size will roundup to page size) will be allocated to replace the remaining problem sg entries. The data will be copied between problem sg entries and bounce buffer according to the transfer direction. The bounce buffer will be freed when the request completed. Signed-off-by: Xu Yang Acked-by: Peter Chen --- drivers/usb/chipidea/udc.c | 147 +++++++++++++++++++++++++++++++++++++ drivers/usb/chipidea/udc.h | 2 + 2 files changed, 149 insertions(+) diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c index 5d9369d01065..dc4dae2c31b4 100644 --- a/drivers/usb/chipidea/udc.c +++ b/drivers/usb/chipidea/udc.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -540,6 +541,126 @@ static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) return ret; } +/* + * Verify if the scatterlist is valid by iterating each sg entry. + * Return invalid sg entry index which is less than num_sgs. + */ +static int sglist_get_invalid_entry(struct device *dma_dev, u8 dir, + struct usb_request *req) +{ + int i; + struct scatterlist *s = req->sg; + + if (req->num_sgs == 1) + return 1; + + dir = dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE; + + for (i = 0; i < req->num_sgs; i++, s = sg_next(s)) { + /* Only small sg (generally last sg) may be bounced. If + * that happens. we can't ensure the addr is page-aligned + * after dma map. + */ + if (dma_kmalloc_needs_bounce(dma_dev, s->length, dir)) + break; + + /* Make sure each sg start address (except first sg) is + * page-aligned and end address (except last sg) is also + * page-aligned. + */ + if (i == 0) { + if (!IS_ALIGNED(s->offset + s->length, + CI_HDRC_PAGE_SIZE)) + break; + } else { + if (s->offset) + break; + if (!sg_is_last(s) && !IS_ALIGNED(s->length, + CI_HDRC_PAGE_SIZE)) + break; + } + } + + return i; +} + +static int sglist_do_bounce(struct ci_hw_req *hwreq, int index, + bool copy, unsigned int *bounced) +{ + void *buf; + int i, ret, nents, num_sgs; + unsigned int rest, rounded; + struct scatterlist *sg, *src, *dst; + + nents = index + 1; + ret = sg_alloc_table(&hwreq->sgt, nents, GFP_KERNEL); + if (ret) + return ret; + + sg = src = hwreq->req.sg; + num_sgs = hwreq->req.num_sgs; + rest = hwreq->req.length; + dst = hwreq->sgt.sgl; + + for (i = 0; i < index; i++) { + memcpy(dst, src, sizeof(*src)); + rest -= src->length; + src = sg_next(src); + dst = sg_next(dst); + } + + /* create one bounce buffer */ + rounded = round_up(rest, CI_HDRC_PAGE_SIZE); + buf = kmalloc(rounded, GFP_KERNEL); + if (!buf) { + sg_free_table(&hwreq->sgt); + return -ENOMEM; + } + + sg_set_buf(dst, buf, rounded); + + hwreq->req.sg = hwreq->sgt.sgl; + hwreq->req.num_sgs = nents; + hwreq->sgt.sgl = sg; + hwreq->sgt.nents = num_sgs; + + if (copy) + sg_copy_to_buffer(src, num_sgs - index, buf, rest); + + *bounced = rest; + + return 0; +} + +static void sglist_do_debounce(struct ci_hw_req *hwreq, bool copy) +{ + void *buf; + int i, nents, num_sgs; + struct scatterlist *sg, *src, *dst; + + sg = hwreq->req.sg; + num_sgs = hwreq->req.num_sgs; + src = sg_last(sg, num_sgs); + buf = sg_virt(src); + + if (copy) { + dst = hwreq->sgt.sgl; + for (i = 0; i < num_sgs - 1; i++) + dst = sg_next(dst); + + nents = hwreq->sgt.nents - num_sgs + 1; + sg_copy_from_buffer(dst, nents, buf, sg_dma_len(src)); + } + + hwreq->req.sg = hwreq->sgt.sgl; + hwreq->req.num_sgs = hwreq->sgt.nents; + hwreq->sgt.sgl = sg; + hwreq->sgt.nents = num_sgs; + + kfree(buf); + sg_free_table(&hwreq->sgt); +} + /** * _hardware_enqueue: configures a request at hardware level * @hwep: endpoint @@ -552,6 +673,8 @@ static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) struct ci_hdrc *ci = hwep->ci; int ret = 0; struct td_node *firstnode, *lastnode; + unsigned int bounced_size; + struct scatterlist *sg; /* don't queue twice */ if (hwreq->req.status == -EALREADY) @@ -559,11 +682,28 @@ static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) hwreq->req.status = -EALREADY; + if (hwreq->req.num_sgs && hwreq->req.length) { + ret = sglist_get_invalid_entry(ci->dev->parent, hwep->dir, + &hwreq->req); + if (ret < hwreq->req.num_sgs) { + ret = sglist_do_bounce(hwreq, ret, hwep->dir == TX, + &bounced_size); + if (ret) + return ret; + } + } + ret = usb_gadget_map_request_by_dev(ci->dev->parent, &hwreq->req, hwep->dir); if (ret) return ret; + if (hwreq->sgt.sgl) { + /* We've mapped a bigger buffer, now recover the actual size */ + sg = sg_last(hwreq->req.sg, hwreq->req.num_sgs); + sg_dma_len(sg) = min(sg_dma_len(sg), bounced_size); + } + if (hwreq->req.num_mapped_sgs) ret = prepare_td_for_sg(hwep, hwreq); else @@ -742,6 +882,10 @@ static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent, &hwreq->req, hwep->dir); + /* sglist bounced */ + if (hwreq->sgt.sgl) + sglist_do_debounce(hwreq, hwep->dir == RX); + hwreq->req.actual += actual; if (hwreq->req.status) @@ -1588,6 +1732,9 @@ static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); + if (hwreq->sgt.sgl) + sglist_do_debounce(hwreq, false); + req->status = -ECONNRESET; if (hwreq->req.complete != NULL) { diff --git a/drivers/usb/chipidea/udc.h b/drivers/usb/chipidea/udc.h index 5193df1e18c7..c8a47389a46b 100644 --- a/drivers/usb/chipidea/udc.h +++ b/drivers/usb/chipidea/udc.h @@ -69,11 +69,13 @@ struct td_node { * @req: request structure for gadget drivers * @queue: link to QH list * @tds: link to TD list + * @sgt: hold original sglist when bounce sglist */ struct ci_hw_req { struct usb_request req; struct list_head queue; struct list_head tds; + struct sg_table sgt; }; #ifdef CONFIG_USB_CHIPIDEA_UDC