From patchwork Thu Sep 12 07:22:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Zhan X-Patchwork-Id: 13801561 X-Patchwork-Delegate: viresh.linux@gmail.com Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB8141885A0; Thu, 12 Sep 2024 07:28:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.190 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726126108; cv=none; b=EYsx/rN2GvPXe7oBSDPr2qZ3n+7ezcB3mBfPX1ZjsvHB9t0HlrgOcT5bf4Bid4Hyr/ZfS8YCqsBlC5rqROUgfJMSnaYDpNGZJS6mpxzOXmUIzTZ5X/nWAmxzSuDQOE2D0ho0KDarm58HmGhygF7rnJ8QcdmAjBnYfC5QIndwzr4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726126108; c=relaxed/simple; bh=/H2YIJw5ievGhAEmnlbP90Lt0MUxvAMLUfrQg9NxiD4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Xhr4OAo7nbpLBgnIc6LjKeYBDBnYoCrxERiYWAyCLmpSUs1IUOSaMKKNjL4i4QaBbcyYqt58lLv7K8b/Wapu3fu+a77CQoGVEJhGtmwN4CLIsf1DnkuX3xkmHHB+Yo4B1pOu6kMVimckNJ5yLaifNyYsqz0Ra3JdlAyNAfU5zUg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=hisilicon.com; spf=pass smtp.mailfrom=hisilicon.com; arc=none smtp.client-ip=45.249.212.190 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=hisilicon.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=hisilicon.com Received: from mail.maildlp.com (unknown [172.19.88.214]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4X48Dc5k62z20nvl; Thu, 12 Sep 2024 15:28:16 +0800 (CST) Received: from dggpeml500019.china.huawei.com (unknown [7.185.36.137]) by mail.maildlp.com (Postfix) with ESMTPS id B32DC1A016C; Thu, 12 Sep 2024 15:28:23 +0800 (CST) Received: from localhost.localdomain (10.90.30.45) by dggpeml500019.china.huawei.com (7.185.36.137) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Thu, 12 Sep 2024 15:28:23 +0800 From: Jie Zhan To: , , , , CC: , , , , , , , , , , , Subject: [PATCH v2 1/3] cppc_cpufreq: Return desired perf in ->get() if feedback counters are 0 Date: Thu, 12 Sep 2024 15:22:29 +0800 Message-ID: <20240912072231.439332-2-zhanjie9@hisilicon.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20240912072231.439332-1-zhanjie9@hisilicon.com> References: <20240912072231.439332-1-zhanjie9@hisilicon.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To dggpeml500019.china.huawei.com (7.185.36.137) The CPPC performance feedback counters could return 0 when the target cpu is in a deep idle state, e.g. powered off, and those counters are not powered. In this case, cppc_cpufreq_get_rate() returns 0, and hence, cpufreq_online() gets a false error and doesn't generate a cpufreq policy, which happens in cpufreq_add_dev() when a new cpu device is added. Don't take it as an error and return the frequency corresponding to the desired perf when the feedback counters are 0. Fixes: 6a4fec4f6d30 ("cpufreq: cppc: cppc_cpufreq_get_rate() returns zero in all error cases.") Signed-off-by: Jie Zhan Reviewed-by: Zeng Heng Reviewed-by: Ionela Voinescu --- drivers/cpufreq/cppc_cpufreq.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c index bafa32dd375d..6aa3af56924b 100644 --- a/drivers/cpufreq/cppc_cpufreq.c +++ b/drivers/cpufreq/cppc_cpufreq.c @@ -748,18 +748,33 @@ static unsigned int cppc_cpufreq_get_rate(unsigned int cpu) ret = cppc_get_perf_ctrs(cpu, &fb_ctrs_t0); if (ret) - return 0; + goto out_err; udelay(2); /* 2usec delay between sampling */ ret = cppc_get_perf_ctrs(cpu, &fb_ctrs_t1); if (ret) - return 0; + goto out_err; delivered_perf = cppc_perf_from_fbctrs(cpu_data, &fb_ctrs_t0, &fb_ctrs_t1); return cppc_perf_to_khz(&cpu_data->perf_caps, delivered_perf); + +out_err: + /* + * Feedback counters could be 0 when cores are powered down. + * Take desired perf for reflecting frequency in this case. + */ + if (ret == -EFAULT) { + ret = cppc_get_desired_perf(cpu, &delivered_perf); + if (ret) + return 0; + + return cppc_perf_to_khz(&cpu_data->perf_caps, delivered_perf); + } + + return 0; } static int cppc_cpufreq_set_boost(struct cpufreq_policy *policy, int state) From patchwork Thu Sep 12 07:22:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Zhan X-Patchwork-Id: 13801559 X-Patchwork-Delegate: viresh.linux@gmail.com Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 991A3126BFC; Thu, 12 Sep 2024 07:28:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.190 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726126107; cv=none; b=q3hyYaex3hvYR9xLQGBlFm/XxX2dQBYP3Tw8jUlTNpzi4cGI4YGPYRK4YAkpXefbCfypLG17NQ2/9YkwVRCsT6dzSWwf8cqAwrigusvzundCEczz27OSrcmlxdlFdRrRDPnIcGtjCU9muYaj8lAYhLFrUtELi5f2GNQBxBC2bwA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726126107; c=relaxed/simple; bh=JotTQJcuWSc00JIJPC8d+bnar+Q9+Y541r+0jRM3BAI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pQ3xLqR0wv/Pmq9j4IYGckI9TNtyhwMeKmnupjF56UmXpGFGhUsTYoCtgnI1IOepJYgMGyq7bgq90g/ce+f0e258okizVwXSNap1cH71MwMTGRnHeZimgliA/qNfhIpXdu1UYqJrHWCIw9I0i50TTVckgptCnct0oORLuUm+CRw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=hisilicon.com; spf=pass smtp.mailfrom=hisilicon.com; arc=none smtp.client-ip=45.249.212.190 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=hisilicon.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=hisilicon.com Received: from mail.maildlp.com (unknown [172.19.88.234]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4X48Dc6ycjz20nvn; Thu, 12 Sep 2024 15:28:16 +0800 (CST) Received: from dggpeml500019.china.huawei.com (unknown [7.185.36.137]) by mail.maildlp.com (Postfix) with ESMTPS id DE3951401F4; Thu, 12 Sep 2024 15:28:23 +0800 (CST) Received: from localhost.localdomain (10.90.30.45) by dggpeml500019.china.huawei.com (7.185.36.137) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Thu, 12 Sep 2024 15:28:23 +0800 From: Jie Zhan To: , , , , CC: , , , , , , , , , , , Subject: [PATCH v2 2/3] cppc_cpufreq: Return latest desired perf if feedback counters don't change Date: Thu, 12 Sep 2024 15:22:30 +0800 Message-ID: <20240912072231.439332-3-zhanjie9@hisilicon.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20240912072231.439332-1-zhanjie9@hisilicon.com> References: <20240912072231.439332-1-zhanjie9@hisilicon.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To dggpeml500019.china.huawei.com (7.185.36.137) The existing cppc_perf_from_fbctrs() returns a cached desired perf if the delta of feedback counters is 0. Some platforms may update the real frequency back to the desired perf reg. Try getting the latest desired perf first; if failed, return the cached desired perf. Signed-off-by: Jie Zhan Reviewed-by: Zeng Heng --- drivers/cpufreq/cppc_cpufreq.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c index 6aa3af56924b..c8fe0f1fc22b 100644 --- a/drivers/cpufreq/cppc_cpufreq.c +++ b/drivers/cpufreq/cppc_cpufreq.c @@ -715,7 +715,8 @@ static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data, struct cppc_perf_fb_ctrs *fb_ctrs_t1) { u64 delta_reference, delta_delivered; - u64 reference_perf; + u64 reference_perf, desired_perf; + int cpu, ret; reference_perf = fb_ctrs_t0->reference_perf; @@ -725,8 +726,14 @@ static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data, fb_ctrs_t0->delivered); /* Check to avoid divide-by zero and invalid delivered_perf */ - if (!delta_reference || !delta_delivered) - return cpu_data->perf_ctrls.desired_perf; + if (!delta_reference || !delta_delivered) { + cpu = cpumask_first(cpu_data->shared_cpu_map); + ret = cppc_get_desired_perf(cpu, &desired_perf); + if (ret) + return cpu_data->perf_ctrls.desired_perf; + + return desired_perf; + } return (reference_perf * delta_delivered) / delta_reference; } From patchwork Thu Sep 12 07:22:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Zhan X-Patchwork-Id: 13801562 X-Patchwork-Delegate: viresh.linux@gmail.com Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B423018C90C; Thu, 12 Sep 2024 07:28:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.187 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726126108; cv=none; b=kBAPpG3DZfTzemkTc/dl1+Ws6YQhk1SstcEcDE0ULju6kzQ3HArhbkRjJHdmqucgRLyjmtd/9Fij6zQWN9Vl+0rgH8u+dMWG4GczaKhjVJFuqht14nf3CY3QNf9+yzEIlceoc5e4VFy5X6yHXfqDxFNcq0ybIDXMoefQYqGo8Yw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726126108; c=relaxed/simple; bh=c4ioEqFecD5E/kf42IBvdX0jUCQz95/TA9LubfcCzhU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=UK8J0Wqo3UDTA1WBAEqeaETWg0f6EqYhzQ8+Qv5RVYC+M0xMV2J2rNYiVMz2cBNv7IdVb7qAi/tqJRK8K6RC6V52mDkbsKQ161kxS4HfR+wBY67/l21rDxr30cS/s0amGZK7wpK9Ae86CEmGcvvYuBkVcJqraXjqGgUri9F8wOQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=hisilicon.com; spf=pass smtp.mailfrom=hisilicon.com; arc=none smtp.client-ip=45.249.212.187 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=hisilicon.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=hisilicon.com Received: from mail.maildlp.com (unknown [172.19.163.252]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4X48Cs3KxqzyRj4; Thu, 12 Sep 2024 15:27:37 +0800 (CST) Received: from dggpeml500019.china.huawei.com (unknown [7.185.36.137]) by mail.maildlp.com (Postfix) with ESMTPS id 25D8C1800D4; Thu, 12 Sep 2024 15:28:24 +0800 (CST) Received: from localhost.localdomain (10.90.30.45) by dggpeml500019.china.huawei.com (7.185.36.137) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Thu, 12 Sep 2024 15:28:23 +0800 From: Jie Zhan To: , , , , CC: , , , , , , , , , , , Subject: [PATCH v2 3/3] cppc_cpufreq: Remove HiSilicon CPPC workaround Date: Thu, 12 Sep 2024 15:22:31 +0800 Message-ID: <20240912072231.439332-4-zhanjie9@hisilicon.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20240912072231.439332-1-zhanjie9@hisilicon.com> References: <20240912072231.439332-1-zhanjie9@hisilicon.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To dggpeml500019.china.huawei.com (7.185.36.137) Since 6c8d750f9784 ("cpufreq / cppc: Work around for Hisilicon CPPC cpufreq"), we introduce a workround for HiSilicon platforms that do not support performance feedback counters to get the actual frequency from the desired performance register. Later on, FIE is disabled in that workaround as well. Now the workround can be handled by the common code. Desired perf would be read and converted to frequency if feedback counters don't change. FIE would be disabled if the CPPC regs are in PCC region. Hence, the workaround is no longer needed and can be safely removed, in an effort to consolidate the cppc_cpufreq driver procedure. Signed-off-by: Jie Zhan --- drivers/cpufreq/cppc_cpufreq.c | 71 ---------------------------------- 1 file changed, 71 deletions(-) diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c index c8fe0f1fc22b..f48fc2a21fa8 100644 --- a/drivers/cpufreq/cppc_cpufreq.c +++ b/drivers/cpufreq/cppc_cpufreq.c @@ -36,24 +36,6 @@ static LIST_HEAD(cpu_data_list); static bool boost_supported; -struct cppc_workaround_oem_info { - char oem_id[ACPI_OEM_ID_SIZE + 1]; - char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1]; - u32 oem_revision; -}; - -static struct cppc_workaround_oem_info wa_info[] = { - { - .oem_id = "HISI ", - .oem_table_id = "HIP07 ", - .oem_revision = 0, - }, { - .oem_id = "HISI ", - .oem_table_id = "HIP08 ", - .oem_revision = 0, - } -}; - static struct cpufreq_driver cppc_cpufreq_driver; static enum { @@ -78,7 +60,6 @@ struct cppc_freq_invariance { static DEFINE_PER_CPU(struct cppc_freq_invariance, cppc_freq_inv); static struct kthread_worker *kworker_fie; -static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu); static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data, struct cppc_perf_fb_ctrs *fb_ctrs_t0, struct cppc_perf_fb_ctrs *fb_ctrs_t1); @@ -834,57 +815,6 @@ static struct cpufreq_driver cppc_cpufreq_driver = { .name = "cppc_cpufreq", }; -/* - * HISI platform does not support delivered performance counter and - * reference performance counter. It can calculate the performance using the - * platform specific mechanism. We reuse the desired performance register to - * store the real performance calculated by the platform. - */ -static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu) -{ - struct cpufreq_policy *policy = cpufreq_cpu_get(cpu); - struct cppc_cpudata *cpu_data; - u64 desired_perf; - int ret; - - if (!policy) - return -ENODEV; - - cpu_data = policy->driver_data; - - cpufreq_cpu_put(policy); - - ret = cppc_get_desired_perf(cpu, &desired_perf); - if (ret < 0) - return -EIO; - - return cppc_perf_to_khz(&cpu_data->perf_caps, desired_perf); -} - -static void cppc_check_hisi_workaround(void) -{ - struct acpi_table_header *tbl; - acpi_status status = AE_OK; - int i; - - status = acpi_get_table(ACPI_SIG_PCCT, 0, &tbl); - if (ACPI_FAILURE(status) || !tbl) - return; - - for (i = 0; i < ARRAY_SIZE(wa_info); i++) { - if (!memcmp(wa_info[i].oem_id, tbl->oem_id, ACPI_OEM_ID_SIZE) && - !memcmp(wa_info[i].oem_table_id, tbl->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) && - wa_info[i].oem_revision == tbl->oem_revision) { - /* Overwrite the get() callback */ - cppc_cpufreq_driver.get = hisi_cppc_cpufreq_get_rate; - fie_disabled = FIE_DISABLED; - break; - } - } - - acpi_put_table(tbl); -} - static int __init cppc_cpufreq_init(void) { int ret; @@ -892,7 +822,6 @@ static int __init cppc_cpufreq_init(void) if (!acpi_cpc_valid()) return -ENODEV; - cppc_check_hisi_workaround(); cppc_freq_invariance_init(); populate_efficiency_class();