From patchwork Fri Sep 13 14:57:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13803580 X-Patchwork-Delegate: kuba@kernel.org Received: from out-173.mta1.migadu.com (out-173.mta1.migadu.com [95.215.58.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7172C2EB02 for ; Fri, 13 Sep 2024 14:57:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726239441; cv=none; b=NEDuW3w5bA5H0te31GhEOp1nAOv0d8cQQ0gUnh2u3KegjRkBD2OtGSVnRjVzEmfBmhuX6LYX/C+AQ5eZ3L7vn9f/GEfHy/GALDZep24GbUXkEAVg9Vf1Tug/3nUsd28AhAcekDKWxqFHQ4nMLu3BD/F0khkB4mEKS3uTXAoeH04= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726239441; c=relaxed/simple; bh=9ypuQrSVvfxeeJhMmpbTSY+TsDH8/u/9ZkPhzlDgw6o=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=B+Yz5pjMvWEfNlzr/YlVjKpjPSCvwO+R90tTtXSLYwoSdIsbvLG37OHRClryKFqA2JdRsYLtmuxJpX/RZZuoe6zdUVmliF4WMNeJRkK4U0XwE5G6bosqlsa3DeO6XlPgKjiCKuoni0VH8EbG6GpbV+/aZkJcjAEpc8N65CFyO+k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=OzGqYlt1; arc=none smtp.client-ip=95.215.58.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="OzGqYlt1" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1726239437; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=sqPwZBdOFC2kmYnJsv9Gtj6yUf0eG7sqHAFicEZ9CaI=; b=OzGqYlt1JQB4wNJbgyO+3/IIt5HwxQxW0nWnVrcxOxOULsLZPzrEXvLPp8Q9OQ38JmcC78 FemuATVLeUp6nIzvYR23VpA4wGOMfTxc5nnSYsOfKAibHmj/rZBCwmGngHxncfhtmw0lBo tRWP9CadEN4K1s+3csOpOSn76LZV6nc= From: Sean Anderson To: Radhey Shyam Pandey , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Michal Simek , linux-kernel@vger.kernel.org, Robert Hancock , Sean Anderson , Shannon Nelson Subject: [PATCH net v2] net: xilinx: axienet: Schedule NAPI in two steps Date: Fri, 13 Sep 2024 10:57:11 -0400 Message-Id: <20240913145711.2284295-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Patchwork-Delegate: kuba@kernel.org As advised by Documentation/networking/napi.rst, masking IRQs after calling napi_schedule can be racy. Avoid this by only masking/scheduling if napi_schedule_prep returns true. Fixes: 9e2bc267e780 ("net: axienet: Use NAPI for TX completion path") Fixes: cc37610caaf8 ("net: axienet: implement NAPI and GRO receive") Signed-off-by: Sean Anderson Reviewed-by: Shannon Nelson Reviewed-by: Eric Dumazet --- Changes in v2: - Don't use the irqoff variant of __napi_schedule drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c index 9eb300fc3590..3de6559ceea6 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c @@ -1222,9 +1222,10 @@ static irqreturn_t axienet_tx_irq(int irq, void *_ndev) u32 cr = lp->tx_dma_cr; cr &= ~(XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK); - axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); - - napi_schedule(&lp->napi_tx); + if (napi_schedule_prep(&lp->napi_tx)) { + axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); + __napi_schedule(&lp->napi_tx); + } } return IRQ_HANDLED; @@ -1266,9 +1267,10 @@ static irqreturn_t axienet_rx_irq(int irq, void *_ndev) u32 cr = lp->rx_dma_cr; cr &= ~(XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK); - axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); - - napi_schedule(&lp->napi_rx); + if (napi_schedule_prep(&lp->napi_rx)) { + axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); + __napi_schedule(&lp->napi_rx); + } } return IRQ_HANDLED;