From patchwork Fri Sep 13 19:11:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13803962 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33CF312A14C; Fri, 13 Sep 2024 19:11:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726254683; cv=none; b=O+NntyJOrynjF7y2eNC+4nGs53x/ppsGRuc0VkIGBDB7Dk+cnh9ANqgfbkViMSv1czGLPtAL4O/MNd84mGgmD0JwUjnxdbZh+tZsLLunY2fMcAYlVSzotw+FPNifffPCnt9f1FhoS2V8RmGcvc72eU7yQD26hXEBt4ZR3pg3Q04= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726254683; c=relaxed/simple; bh=Es8JdwSQ9ax+pU0G5tFUE5Jhn8umXUmkWnJWw1Ctqn4=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=kReyO7JwGJ7rh2knIpB9oMS9D89OOVQ9FCuC+xYykXqH6xSRTlblCWtsjrUQMYyuJtZ8b2F0B+ejhIL8hyEwtzU9CF74a4d9Z6tM9kS0g/fsDLlsrVNARkgIxByp0Fuy6jgRrWEI00k9XrH9LmNNg9sVphnFz5GKhKuV0kDqBNw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com; spf=pass smtp.mailfrom=protonmail.com; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b=aPWUXV3r; arc=none smtp.client-ip=185.70.43.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=protonmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b="aPWUXV3r" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1726254680; x=1726513880; bh=nGDqcT9scXiqdNA7FshndttvVc1Jc6qKkBgVZRzZuSA=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=aPWUXV3rm6JwVtBOuX8Q5bH6YzYwhJWaGBtDDzzIva2vPUz3vajv/R6MCTPpzb4AD F94H20dDleoONzCD5MD6drB54jNyqDtGBwsuwqjN+SJ85d2PIEDyAFLILic9mABQyn 1M7mh1pnP3kzyf/mWugzQJEv5+Iot6di2J1cQ6i3v0klO1lDiL/DDKPAgbg8YkQYJH Ue58OueloV7PIBpyqpu/bipWmJ1lmRRLtwLsPljCJ270B9l8Zd3L50WYteXYhPedlo 5jLtYPPz5e0uiKrhQlry970JUubjl+mOSkrxZDfOOy30jPGzCTATp2SkXwXgywYgrb W5wWlNMT3zSHg== Date: Fri, 13 Sep 2024 19:11:14 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek From: Harry Austen Cc: Shubhrajyoti Datta , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen Subject: [PATCH v2 1/6] clk: clocking-wizard: simplify probe/remove with devres helpers Message-ID: <20240913191037.2690-2-hpausten@protonmail.com> In-Reply-To: <20240913191037.2690-1-hpausten@protonmail.com> References: <20240913191037.2690-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: bcd8f4103bdcf1f5f0841c737fc2650f2cd52353 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Remove need to do various operations in remove callback and error paths by utilising device managed versions of clock and notifier APIs. Signed-off-by: Harry Austen Reviewed-by: Stephen Boyd --- v1 -> v2: No change drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 48 ++++++---------------- 1 file changed, 13 insertions(+), 35 deletions(-) diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index 19eb3fb7ae319..0ca045849ea3e 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -1001,21 +1001,15 @@ static int clk_wzrd_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1), "clk_in1 not found\n"); - clk_wzrd->axi_clk = devm_clk_get(&pdev->dev, "s_axi_aclk"); + clk_wzrd->axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); if (IS_ERR(clk_wzrd->axi_clk)) return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk), "s_axi_aclk not found\n"); - ret = clk_prepare_enable(clk_wzrd->axi_clk); - if (ret) { - dev_err(&pdev->dev, "enabling s_axi_aclk failed\n"); - return ret; - } rate = clk_get_rate(clk_wzrd->axi_clk); if (rate > WZRD_ACLK_MAX_FREQ) { dev_err(&pdev->dev, "s_axi_aclk frequency (%lu) too high\n", rate); - ret = -EINVAL; - goto err_disable_clk; + return -EINVAL; } data = device_get_match_data(&pdev->dev); @@ -1023,16 +1017,12 @@ static int clk_wzrd_probe(struct platform_device *pdev) is_versal = data->is_versal; ret = of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs); - if (ret || nr_outputs > WZRD_NUM_OUTPUTS) { - ret = -EINVAL; - goto err_disable_clk; - } + if (ret || nr_outputs > WZRD_NUM_OUTPUTS) + return -EINVAL; clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_out0", dev_name(&pdev->dev)); - if (!clkout_name) { - ret = -ENOMEM; - goto err_disable_clk; - } + if (!clkout_name) + return -ENOMEM; if (is_versal) { if (nr_outputs == 1) { @@ -1090,18 +1080,15 @@ static int clk_wzrd_probe(struct platform_device *pdev) div = 1000; } clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul", dev_name(&pdev->dev)); - if (!clk_name) { - ret = -ENOMEM; - goto err_disable_clk; - } + if (!clk_name) + return -ENOMEM; clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor (&pdev->dev, clk_name, __clk_get_name(clk_wzrd->clk_in1), 0, mult, div); if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul])) { dev_err(&pdev->dev, "unable to register fixed-factor clock\n"); - ret = PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul]); - goto err_disable_clk; + return PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul]); } clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul_div", dev_name(&pdev->dev)); @@ -1197,13 +1184,14 @@ static int clk_wzrd_probe(struct platform_device *pdev) if (clk_wzrd->speed_grade) { clk_wzrd->nb.notifier_call = clk_wzrd_clk_notifier; - ret = clk_notifier_register(clk_wzrd->clk_in1, - &clk_wzrd->nb); + ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->clk_in1, + &clk_wzrd->nb); if (ret) dev_warn(&pdev->dev, "unable to register clock notifier\n"); - ret = clk_notifier_register(clk_wzrd->axi_clk, &clk_wzrd->nb); + ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->axi_clk, + &clk_wzrd->nb); if (ret) dev_warn(&pdev->dev, "unable to register clock notifier\n"); @@ -1215,9 +1203,6 @@ static int clk_wzrd_probe(struct platform_device *pdev) clk_unregister(clk_wzrd->clks_internal[1]); err_rm_int_clk: clk_unregister(clk_wzrd->clks_internal[0]); -err_disable_clk: - clk_disable_unprepare(clk_wzrd->axi_clk); - return ret; } @@ -1232,13 +1217,6 @@ static void clk_wzrd_remove(struct platform_device *pdev) clk_unregister(clk_wzrd->clkout[i]); for (i = 0; i < wzrd_clk_int_max; i++) clk_unregister(clk_wzrd->clks_internal[i]); - - if (clk_wzrd->speed_grade) { - clk_notifier_unregister(clk_wzrd->axi_clk, &clk_wzrd->nb); - clk_notifier_unregister(clk_wzrd->clk_in1, &clk_wzrd->nb); - } - - clk_disable_unprepare(clk_wzrd->axi_clk); } static const struct of_device_id clk_wzrd_ids[] = { From patchwork Fri Sep 13 19:11:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13803963 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 086EF145B38; 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Signed-off-by: Harry Austen --- v1 -> v2: No change drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 77 +++++++++++----------- 1 file changed, 40 insertions(+), 37 deletions(-) diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index 0ca045849ea3e..cd795a4952099 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -121,26 +122,24 @@ enum clk_wzrd_int_clks { /** * struct clk_wzrd - Clock wizard private data structure * - * @clk_data: Clock data * @nb: Notifier block * @base: Memory base * @clk_in1: Handle to input clock 'clk_in1' * @axi_clk: Handle to input clock 's_axi_aclk' * @clks_internal: Internal clocks - * @clkout: Output clocks * @speed_grade: Speed grade of the device * @suspended: Flag indicating power state of the device + * @clk_data: Output clock data */ struct clk_wzrd { - struct clk_onecell_data clk_data; struct notifier_block nb; void __iomem *base; struct clk *clk_in1; struct clk *axi_clk; - struct clk *clks_internal[wzrd_clk_int_max]; - struct clk *clkout[WZRD_NUM_OUTPUTS]; + struct clk_hw *clks_internal[wzrd_clk_int_max]; unsigned int speed_grade; bool suspended; + struct clk_hw_onecell_data clk_data; }; /** @@ -765,7 +764,7 @@ static const struct clk_ops clk_wzrd_clk_divider_ops_f = { .recalc_rate = clk_wzrd_recalc_ratef, }; -static struct clk *clk_wzrd_register_divf(struct device *dev, +static struct clk_hw *clk_wzrd_register_divf(struct device *dev, const char *name, const char *parent_name, unsigned long flags, @@ -805,10 +804,10 @@ static struct clk *clk_wzrd_register_divf(struct device *dev, if (ret) return ERR_PTR(ret); - return hw->clk; + return hw; } -static struct clk *clk_wzrd_ver_register_divider(struct device *dev, +static struct clk_hw *clk_wzrd_ver_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, @@ -852,10 +851,10 @@ static struct clk *clk_wzrd_ver_register_divider(struct device *dev, if (ret) return ERR_PTR(ret); - return hw->clk; + return hw; } -static struct clk *clk_wzrd_register_divider(struct device *dev, +static struct clk_hw *clk_wzrd_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, @@ -898,7 +897,7 @@ static struct clk *clk_wzrd_register_divider(struct device *dev, if (ret) return ERR_PTR(ret); - return hw->clk; + return hw; } static int clk_wzrd_clk_notifier(struct notifier_block *nb, unsigned long event, @@ -978,7 +977,12 @@ static int clk_wzrd_probe(struct platform_device *pdev) int nr_outputs; int i, ret; - clk_wzrd = devm_kzalloc(&pdev->dev, sizeof(*clk_wzrd), GFP_KERNEL); + ret = of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs); + if (ret || nr_outputs > WZRD_NUM_OUTPUTS) + return -EINVAL; + + clk_wzrd = devm_kzalloc(&pdev->dev, struct_size(clk_wzrd, clk_data.hws, nr_outputs), + GFP_KERNEL); if (!clk_wzrd) return -ENOMEM; platform_set_drvdata(pdev, clk_wzrd); @@ -1016,17 +1020,13 @@ static int clk_wzrd_probe(struct platform_device *pdev) if (data) is_versal = data->is_versal; - ret = of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs); - if (ret || nr_outputs > WZRD_NUM_OUTPUTS) - return -EINVAL; - clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_out0", dev_name(&pdev->dev)); if (!clkout_name) return -ENOMEM; if (is_versal) { if (nr_outputs == 1) { - clk_wzrd->clkout[0] = clk_wzrd_ver_register_divider + clk_wzrd->clk_data.hws[0] = clk_wzrd_ver_register_divider (&pdev->dev, clkout_name, __clk_get_name(clk_wzrd->clk_in1), 0, clk_wzrd->base, WZRD_CLK_CFG_REG(is_versal, 3), @@ -1059,7 +1059,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) div = 64; } else { if (nr_outputs == 1) { - clk_wzrd->clkout[0] = clk_wzrd_register_divider + clk_wzrd->clk_data.hws[0] = clk_wzrd_register_divider (&pdev->dev, clkout_name, __clk_get_name(clk_wzrd->clk_in1), 0, clk_wzrd->base, WZRD_CLK_CFG_REG(is_versal, 3), @@ -1082,7 +1082,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul", dev_name(&pdev->dev)); if (!clk_name) return -ENOMEM; - clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor + clk_wzrd->clks_internal[wzrd_clk_mul] = clk_hw_register_fixed_factor (&pdev->dev, clk_name, __clk_get_name(clk_wzrd->clk_in1), 0, mult, div); @@ -1108,15 +1108,15 @@ static int clk_wzrd_probe(struct platform_device *pdev) if (!div) div = 1; - clk_mul_name = __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]); + clk_mul_name = clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]); clk_wzrd->clks_internal[wzrd_clk_mul_div] = - clk_register_fixed_factor(&pdev->dev, clk_name, - clk_mul_name, 0, 1, div); + clk_hw_register_fixed_factor(&pdev->dev, clk_name, + clk_mul_name, 0, 1, div); } else { ctrl_reg = clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0); - clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_register_divider + clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_hw_register_divider (&pdev->dev, clk_name, - __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), + clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), flags, ctrl_reg, 0, 8, CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, &clkwzrd_lock); } @@ -1136,7 +1136,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) } if (is_versal) { - clk_wzrd->clkout[i] = clk_wzrd_ver_register_divider + clk_wzrd->clk_data.hws[i] = clk_wzrd_ver_register_divider (&pdev->dev, clkout_name, clk_name, 0, clk_wzrd->base, @@ -1148,7 +1148,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) DIV_O, &clkwzrd_lock); } else { if (!i) - clk_wzrd->clkout[i] = clk_wzrd_register_divf + clk_wzrd->clk_data.hws[i] = clk_wzrd_register_divf (&pdev->dev, clkout_name, clk_name, flags, clk_wzrd->base, (WZRD_CLK_CFG_REG(is_versal, 2) + i * 12), WZRD_CLKOUT_DIVIDE_SHIFT, @@ -1156,7 +1156,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, DIV_O, &clkwzrd_lock); else - clk_wzrd->clkout[i] = clk_wzrd_register_divider + clk_wzrd->clk_data.hws[i] = clk_wzrd_register_divider (&pdev->dev, clkout_name, clk_name, 0, clk_wzrd->base, (WZRD_CLK_CFG_REG(is_versal, 2) + i * 12), WZRD_CLKOUT_DIVIDE_SHIFT, @@ -1164,22 +1164,25 @@ static int clk_wzrd_probe(struct platform_device *pdev) CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, DIV_O, &clkwzrd_lock); } - if (IS_ERR(clk_wzrd->clkout[i])) { + if (IS_ERR(clk_wzrd->clk_data.hws[i])) { int j; for (j = i + 1; j < nr_outputs; j++) - clk_unregister(clk_wzrd->clkout[j]); + clk_hw_unregister(clk_wzrd->clk_data.hws[j]); dev_err(&pdev->dev, "unable to register divider clock\n"); - ret = PTR_ERR(clk_wzrd->clkout[i]); + ret = PTR_ERR(clk_wzrd->clk_data.hws[i]); goto err_rm_int_clks; } } out: - clk_wzrd->clk_data.clks = clk_wzrd->clkout; - clk_wzrd->clk_data.clk_num = ARRAY_SIZE(clk_wzrd->clkout); - of_clk_add_provider(np, of_clk_src_onecell_get, &clk_wzrd->clk_data); + clk_wzrd->clk_data.num = nr_outputs; + ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get, &clk_wzrd->clk_data); + if (ret) { + dev_err(&pdev->dev, "unable to register clock provider\n"); + return ret; + } if (clk_wzrd->speed_grade) { clk_wzrd->nb.notifier_call = clk_wzrd_clk_notifier; @@ -1200,9 +1203,9 @@ static int clk_wzrd_probe(struct platform_device *pdev) return 0; err_rm_int_clks: - clk_unregister(clk_wzrd->clks_internal[1]); + clk_hw_unregister(clk_wzrd->clks_internal[1]); err_rm_int_clk: - clk_unregister(clk_wzrd->clks_internal[0]); + clk_hw_unregister(clk_wzrd->clks_internal[0]); return ret; } @@ -1214,9 +1217,9 @@ static void clk_wzrd_remove(struct platform_device *pdev) of_clk_del_provider(pdev->dev.of_node); for (i = 0; i < WZRD_NUM_OUTPUTS; i++) - clk_unregister(clk_wzrd->clkout[i]); + clk_hw_unregister(clk_wzrd->clk_data.hws[i]); for (i = 0; i < wzrd_clk_int_max; i++) - clk_unregister(clk_wzrd->clks_internal[i]); + clk_hw_unregister(clk_wzrd->clks_internal[i]); } static const struct of_device_id clk_wzrd_ids[] = { From patchwork Fri Sep 13 19:11:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13803964 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3D2D1465BB; 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Signed-off-by: Harry Austen --- v1 -> v2: No change drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 52 +++++----------------- 1 file changed, 11 insertions(+), 41 deletions(-) diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index cd795a4952099..f332e0eee56c8 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -1082,7 +1082,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul", dev_name(&pdev->dev)); if (!clk_name) return -ENOMEM; - clk_wzrd->clks_internal[wzrd_clk_mul] = clk_hw_register_fixed_factor + clk_wzrd->clks_internal[wzrd_clk_mul] = devm_clk_hw_register_fixed_factor (&pdev->dev, clk_name, __clk_get_name(clk_wzrd->clk_in1), 0, mult, div); @@ -1092,10 +1092,8 @@ static int clk_wzrd_probe(struct platform_device *pdev) } clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul_div", dev_name(&pdev->dev)); - if (!clk_name) { - ret = -ENOMEM; - goto err_rm_int_clk; - } + if (!clk_name) + return -ENOMEM; if (is_versal) { edged = !!(readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 20)) & @@ -1110,11 +1108,11 @@ static int clk_wzrd_probe(struct platform_device *pdev) clk_mul_name = clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]); clk_wzrd->clks_internal[wzrd_clk_mul_div] = - clk_hw_register_fixed_factor(&pdev->dev, clk_name, - clk_mul_name, 0, 1, div); + devm_clk_hw_register_fixed_factor(&pdev->dev, clk_name, + clk_mul_name, 0, 1, div); } else { ctrl_reg = clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0); - clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_hw_register_divider + clk_wzrd->clks_internal[wzrd_clk_mul_div] = devm_clk_hw_register_divider (&pdev->dev, clk_name, clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), flags, ctrl_reg, 0, 8, CLK_DIVIDER_ONE_BASED | @@ -1122,18 +1120,15 @@ static int clk_wzrd_probe(struct platform_device *pdev) } if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div])) { dev_err(&pdev->dev, "unable to register divider clock\n"); - ret = PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]); - goto err_rm_int_clk; + return PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]); } /* register div per output */ for (i = nr_outputs - 1; i >= 0 ; i--) { clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_out%d", dev_name(&pdev->dev), i); - if (!clkout_name) { - ret = -ENOMEM; - goto err_rm_int_clk; - } + if (!clkout_name) + return -ENOMEM; if (is_versal) { clk_wzrd->clk_data.hws[i] = clk_wzrd_ver_register_divider @@ -1165,20 +1160,15 @@ static int clk_wzrd_probe(struct platform_device *pdev) DIV_O, &clkwzrd_lock); } if (IS_ERR(clk_wzrd->clk_data.hws[i])) { - int j; - - for (j = i + 1; j < nr_outputs; j++) - clk_hw_unregister(clk_wzrd->clk_data.hws[j]); dev_err(&pdev->dev, "unable to register divider clock\n"); - ret = PTR_ERR(clk_wzrd->clk_data.hws[i]); - goto err_rm_int_clks; + return PTR_ERR(clk_wzrd->clk_data.hws[i]); } } out: clk_wzrd->clk_data.num = nr_outputs; - ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get, &clk_wzrd->clk_data); + ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get, &clk_wzrd->clk_data); if (ret) { dev_err(&pdev->dev, "unable to register clock provider\n"); return ret; @@ -1201,25 +1191,6 @@ static int clk_wzrd_probe(struct platform_device *pdev) } return 0; - -err_rm_int_clks: - clk_hw_unregister(clk_wzrd->clks_internal[1]); -err_rm_int_clk: - clk_hw_unregister(clk_wzrd->clks_internal[0]); - return ret; -} - -static void clk_wzrd_remove(struct platform_device *pdev) -{ - int i; - struct clk_wzrd *clk_wzrd = platform_get_drvdata(pdev); - - of_clk_del_provider(pdev->dev.of_node); - - for (i = 0; i < WZRD_NUM_OUTPUTS; i++) - clk_hw_unregister(clk_wzrd->clk_data.hws[i]); - for (i = 0; i < wzrd_clk_int_max; i++) - clk_hw_unregister(clk_wzrd->clks_internal[i]); } static const struct of_device_id clk_wzrd_ids[] = { @@ -1238,7 +1209,6 @@ static struct platform_driver clk_wzrd_driver = { .pm = &clk_wzrd_dev_pm_ops, }, .probe = clk_wzrd_probe, - .remove_new = clk_wzrd_remove, }; module_platform_driver(clk_wzrd_driver); From patchwork Fri Sep 13 19:11:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13803965 Received: from mail-4316.protonmail.ch (mail-4316.protonmail.ch [185.70.43.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C21271465A4; Fri, 13 Sep 2024 19:11:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726254698; cv=none; b=PWfNStE0N9+ZG51xCCOGMtM10l3gbuK7UdUIGKx2e+Si5InR49KHdwaBdJXGCoRgfoaS1BraJ+DANoH0iu/OI37BtMS62LmnTXdnHfJuJv6aD7y+1IIFCOrYWkx5dzeYI6IxQj8DuE2i2yDHHuH9uCgBg+D/j2sVK0sbF/i4uw8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726254698; c=relaxed/simple; bh=Cmvb9v7ErBT+zz3Mh/JY2S9DNhwAg9EYNg152PFLStc=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; 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b=ed7tRmubYQkQtdaEmrO5iwMl/B06EXnYZLVxvJR4BA8MpCFVhMy/AzTJqgv5gbGyg P+Ajqhb7IeLq/moq4LIffKIrH6UGDaBePjxIdedVT26KXhLOIPLtxnuFMMi67qIL8z 5k+GV34e4gVhj6o7SEoontlGAUzOwDJvwspb+valWFAGzp33/5Y7Rj+KsiYfisASlx nQTCdk1AYLWnt9f9jIQuaPC6X5R+n3TbFGF6PTJRXDejJNvkk53mvML3NtQAWQxEEi tcjpRf6YaZOQCR7/c5AaNuSMAopAZzua3BoSghULnqg+9MYZuEOtQzy7lv+DBimSQI qbxxxwuhjBAdA== Date: Fri, 13 Sep 2024 19:11:32 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek From: Harry Austen Cc: Shubhrajyoti Datta , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen Subject: [PATCH v2 4/6] clk: clocking-wizard: move clock registration to separate function Message-ID: <20240913191037.2690-5-hpausten@protonmail.com> In-Reply-To: <20240913191037.2690-1-hpausten@protonmail.com> References: <20240913191037.2690-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: 36ca9d4e2c22f23203d6e50fe690f1a364ddcdd8 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Provide clear separation of dynamic reconfiguration logic, by moving its setup procedure to its own dedicated function. Signed-off-by: Harry Austen --- v1 -> v2: No change drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 143 +++++++++++---------- 1 file changed, 75 insertions(+), 68 deletions(-) diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index f332e0eee56c8..1a65a7d153c35 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -962,72 +962,30 @@ static const struct versal_clk_data versal_data = { .is_versal = true, }; -static int clk_wzrd_probe(struct platform_device *pdev) +static int clk_wzrd_register_output_clocks(struct device *dev, int nr_outputs) { const char *clkout_name, *clk_name, *clk_mul_name; + struct clk_wzrd *clk_wzrd = dev_get_drvdata(dev); u32 regl, regh, edge, regld, reghd, edged, div; - struct device_node *np = pdev->dev.of_node; const struct versal_clk_data *data; - struct clk_wzrd *clk_wzrd; unsigned long flags = 0; + bool is_versal = false; void __iomem *ctrl_reg; u32 reg, reg_f, mult; - bool is_versal = false; - unsigned long rate; - int nr_outputs; - int i, ret; - - ret = of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs); - if (ret || nr_outputs > WZRD_NUM_OUTPUTS) - return -EINVAL; - - clk_wzrd = devm_kzalloc(&pdev->dev, struct_size(clk_wzrd, clk_data.hws, nr_outputs), - GFP_KERNEL); - if (!clk_wzrd) - return -ENOMEM; - platform_set_drvdata(pdev, clk_wzrd); - - clk_wzrd->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(clk_wzrd->base)) - return PTR_ERR(clk_wzrd->base); - - ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade); - if (!ret) { - if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) { - dev_warn(&pdev->dev, "invalid speed grade '%d'\n", - clk_wzrd->speed_grade); - clk_wzrd->speed_grade = 0; - } - } - - clk_wzrd->clk_in1 = devm_clk_get(&pdev->dev, "clk_in1"); - if (IS_ERR(clk_wzrd->clk_in1)) - return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1), - "clk_in1 not found\n"); + int i; - clk_wzrd->axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); - if (IS_ERR(clk_wzrd->axi_clk)) - return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk), - "s_axi_aclk not found\n"); - rate = clk_get_rate(clk_wzrd->axi_clk); - if (rate > WZRD_ACLK_MAX_FREQ) { - dev_err(&pdev->dev, "s_axi_aclk frequency (%lu) too high\n", - rate); - return -EINVAL; - } - - data = device_get_match_data(&pdev->dev); + data = device_get_match_data(dev); if (data) is_versal = data->is_versal; - clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_out0", dev_name(&pdev->dev)); + clkout_name = devm_kasprintf(dev, GFP_KERNEL, "%s_out0", dev_name(dev)); if (!clkout_name) return -ENOMEM; if (is_versal) { if (nr_outputs == 1) { clk_wzrd->clk_data.hws[0] = clk_wzrd_ver_register_divider - (&pdev->dev, clkout_name, + (dev, clkout_name, __clk_get_name(clk_wzrd->clk_in1), 0, clk_wzrd->base, WZRD_CLK_CFG_REG(is_versal, 3), WZRD_CLKOUT_DIVIDE_SHIFT, @@ -1035,7 +993,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, DIV_ALL, &clkwzrd_lock); - goto out; + return 0; } /* register multiplier */ edge = !!(readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0)) & @@ -1060,7 +1018,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) } else { if (nr_outputs == 1) { clk_wzrd->clk_data.hws[0] = clk_wzrd_register_divider - (&pdev->dev, clkout_name, + (dev, clkout_name, __clk_get_name(clk_wzrd->clk_in1), 0, clk_wzrd->base, WZRD_CLK_CFG_REG(is_versal, 3), WZRD_CLKOUT_DIVIDE_SHIFT, @@ -1068,7 +1026,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, DIV_ALL, &clkwzrd_lock); - goto out; + return 0; } reg = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0)); reg_f = reg & WZRD_CLKFBOUT_FRAC_MASK; @@ -1079,19 +1037,19 @@ static int clk_wzrd_probe(struct platform_device *pdev) mult = (reg * 1000) + reg_f; div = 1000; } - clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul", dev_name(&pdev->dev)); + clk_name = devm_kasprintf(dev, GFP_KERNEL, "%s_mul", dev_name(dev)); if (!clk_name) return -ENOMEM; clk_wzrd->clks_internal[wzrd_clk_mul] = devm_clk_hw_register_fixed_factor - (&pdev->dev, clk_name, + (dev, clk_name, __clk_get_name(clk_wzrd->clk_in1), 0, mult, div); if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul])) { - dev_err(&pdev->dev, "unable to register fixed-factor clock\n"); + dev_err(dev, "unable to register fixed-factor clock\n"); return PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul]); } - clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul_div", dev_name(&pdev->dev)); + clk_name = devm_kasprintf(dev, GFP_KERNEL, "%s_mul_div", dev_name(dev)); if (!clk_name) return -ENOMEM; @@ -1108,31 +1066,29 @@ static int clk_wzrd_probe(struct platform_device *pdev) clk_mul_name = clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]); clk_wzrd->clks_internal[wzrd_clk_mul_div] = - devm_clk_hw_register_fixed_factor(&pdev->dev, clk_name, - clk_mul_name, 0, 1, div); + devm_clk_hw_register_fixed_factor(dev, clk_name, clk_mul_name, 0, 1, div); } else { ctrl_reg = clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0); clk_wzrd->clks_internal[wzrd_clk_mul_div] = devm_clk_hw_register_divider - (&pdev->dev, clk_name, + (dev, clk_name, clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), flags, ctrl_reg, 0, 8, CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, &clkwzrd_lock); } if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div])) { - dev_err(&pdev->dev, "unable to register divider clock\n"); + dev_err(dev, "unable to register divider clock\n"); return PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]); } /* register div per output */ for (i = nr_outputs - 1; i >= 0 ; i--) { - clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, - "%s_out%d", dev_name(&pdev->dev), i); + clkout_name = devm_kasprintf(dev, GFP_KERNEL, "%s_out%d", dev_name(dev), i); if (!clkout_name) return -ENOMEM; if (is_versal) { clk_wzrd->clk_data.hws[i] = clk_wzrd_ver_register_divider - (&pdev->dev, + (dev, clkout_name, clk_name, 0, clk_wzrd->base, (WZRD_CLK_CFG_REG(is_versal, 3) + i * 8), @@ -1144,7 +1100,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) } else { if (!i) clk_wzrd->clk_data.hws[i] = clk_wzrd_register_divf - (&pdev->dev, clkout_name, clk_name, flags, clk_wzrd->base, + (dev, clkout_name, clk_name, flags, clk_wzrd->base, (WZRD_CLK_CFG_REG(is_versal, 2) + i * 12), WZRD_CLKOUT_DIVIDE_SHIFT, WZRD_CLKOUT_DIVIDE_WIDTH, @@ -1152,7 +1108,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) DIV_O, &clkwzrd_lock); else clk_wzrd->clk_data.hws[i] = clk_wzrd_register_divider - (&pdev->dev, clkout_name, clk_name, 0, clk_wzrd->base, + (dev, clkout_name, clk_name, 0, clk_wzrd->base, (WZRD_CLK_CFG_REG(is_versal, 2) + i * 12), WZRD_CLKOUT_DIVIDE_SHIFT, WZRD_CLKOUT_DIVIDE_WIDTH, @@ -1160,13 +1116,64 @@ static int clk_wzrd_probe(struct platform_device *pdev) DIV_O, &clkwzrd_lock); } if (IS_ERR(clk_wzrd->clk_data.hws[i])) { - dev_err(&pdev->dev, - "unable to register divider clock\n"); + dev_err(dev, "unable to register divider clock\n"); return PTR_ERR(clk_wzrd->clk_data.hws[i]); } } -out: + return 0; +} + +static int clk_wzrd_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct clk_wzrd *clk_wzrd; + unsigned long rate; + int nr_outputs; + int ret; + + ret = of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs); + if (ret || nr_outputs > WZRD_NUM_OUTPUTS) + return -EINVAL; + + clk_wzrd = devm_kzalloc(&pdev->dev, struct_size(clk_wzrd, clk_data.hws, nr_outputs), + GFP_KERNEL); + if (!clk_wzrd) + return -ENOMEM; + platform_set_drvdata(pdev, clk_wzrd); + + clk_wzrd->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(clk_wzrd->base)) + return PTR_ERR(clk_wzrd->base); + + ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade); + if (!ret) { + if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) { + dev_warn(&pdev->dev, "invalid speed grade '%d'\n", + clk_wzrd->speed_grade); + clk_wzrd->speed_grade = 0; + } + } + + clk_wzrd->clk_in1 = devm_clk_get(&pdev->dev, "clk_in1"); + if (IS_ERR(clk_wzrd->clk_in1)) + return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1), + "clk_in1 not found\n"); + + clk_wzrd->axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); + if (IS_ERR(clk_wzrd->axi_clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk), + "s_axi_aclk not found\n"); + rate = clk_get_rate(clk_wzrd->axi_clk); + if (rate > WZRD_ACLK_MAX_FREQ) { + dev_err(&pdev->dev, "s_axi_aclk frequency (%lu) too high\n", rate); + return -EINVAL; + } + + ret = clk_wzrd_register_output_clocks(&pdev->dev, nr_outputs); + if (ret) + return ret; + clk_wzrd->clk_data.num = nr_outputs; ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get, &clk_wzrd->clk_data); if (ret) { From patchwork Fri Sep 13 19:11:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13803966 Received: from mail-4316.protonmail.ch (mail-4316.protonmail.ch [185.70.43.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CBFE146D6D; Fri, 13 Sep 2024 19:11:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726254704; cv=none; b=WkIm67YVklnnOp251UdSATknCxmtNgjlwSkLIEMOXs8hp7Hz4t0dqd2AyXBNLyW0TwuyS1pBDrexlcz0lozL5KH9bW8EgE99JHcSD8pqbGWH7cY+CwEKk9TL1wbmzCMVbFR8xuDO1D58DFqeOyPSXEp+mwg/5TrgN8Uu8uHtfqw= ARC-Message-Signature: i=1; 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a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1726254701; x=1726513901; bh=BO5F8gZ2+XQmMySVgluXmKZCMf7FHSNQE9WqjQCRqXM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=RLccJbI1VyGdM8MwrH96/pvdRmGy5mCuYCBoAOUEUVet9Nz07M+SnLzzkdYUKuV1y Da6CYpvhxS74hW4RXItAMI2kLxG65JFN5qXT2CIO77m3ijfl+wMhTWZPG6dpu6jA3A fQ0Seubh8hVtaFLeTf0ek4vOUGsgZEUwYYBDAk9U/l6flDCZztdI3Vxm+F0Gd74upQ LykWZaY3oSlYlt7uHHtZ0bpmxwkp+7W5tXpHAtlpiNxdo6awmR1ox670f2LebU7lrq yJcVZA1U/CuHB2pl8U9aAelzrsIHHQtosAqfS5JtTirF4KtnsxQUECJ0ZVvDEtV2+Q V4z8bzu4LnYQQ== Date: Fri, 13 Sep 2024 19:11:37 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek From: Harry Austen Cc: Shubhrajyoti Datta , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen Subject: [PATCH v2 5/6] dt-bindings: clock: xilinx: describe whether dynamic reconfig is enabled Message-ID: <20240913191037.2690-6-hpausten@protonmail.com> In-Reply-To: <20240913191037.2690-1-hpausten@protonmail.com> References: <20240913191037.2690-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: 2221ecd0086cec656555c1c3be1f8b4e576c5eef Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Xilinx clocking wizard IP core's dynamic reconfiguration support is optionally enabled at build time. Add a devicetree boolean property to describe whether the hardware supports this feature or not. Since dynamic reconfiguration support was previously assumed enabled, introduce a property to indicate the inverse, in order to maintain devicetree backwards compatibility. Hence, this new xlnx,static-config property should be specified when dynamic reconfiguration support is disabled in the IP core configuration. Signed-off-by: Harry Austen Acked-by: Rob Herring (Arm) --- v1 -> v2: - Invert meaning of the new DT property - Renamed from xlnx,dynamic-reconfig to xlnx,static-config .../devicetree/bindings/clock/xlnx,clocking-wizard.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml index 9d5324dc1027a..b44a76a958f4e 100644 --- a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml @@ -39,6 +39,11 @@ properties: - const: clk_in1 - const: s_axi_aclk + xlnx,static-config: + $ref: /schemas/types.yaml#/definitions/flag + description: + Indicate whether the core has been configured without support for dynamic + runtime reconfguration of the clocking primitive MMCM/PLL. xlnx,speed-grade: $ref: /schemas/types.yaml#/definitions/uint32 @@ -70,6 +75,7 @@ examples: compatible = "xlnx,clocking-wizard"; reg = <0xb0000000 0x10000>; #clock-cells = <1>; + xlnx,static-config; xlnx,speed-grade = <1>; xlnx,nr-outputs = <6>; clock-names = "clk_in1", "s_axi_aclk"; From patchwork Fri Sep 13 19:11:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harry Austen X-Patchwork-Id: 13803967 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B242F155757; Fri, 13 Sep 2024 19:11:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726254708; cv=none; b=o64qnT8KyQT+3HHShX2ZjjgbuIa6QsInil+hQQ9ivGB9KEWqtpz6/VYiWR2VlwKR24akG2LskScFe5Q6wMDzdl1Bk2a4uY6likJFHuMpWGbFhf5BLhb3V8MCsbjxdhgxdpNsKvpoGHCv0lR+mn9tDeqNeWhi4chSQYJmh6D1roU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726254708; c=relaxed/simple; bh=FSP8+aZvygGlFdnBS0yY0alytQkKXdz2tdXRla1srC4=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=LOFluyJCO6hlvMUeC98chhbh4VtPxmOlyCgHidNItT1kp3oxp1V1Y/1T4WxbfNi3j+r6bJ4RqHflBmw674IcIx8YUNy4xYpeb9ozUqXBi9a6twNoqE51wOmfcrmWJNQJ000EYbU5xXg77fyyxWOE+13GQgrzpvFoB9ugunM1mw0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com; spf=pass smtp.mailfrom=protonmail.com; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b=uPgWAy7z; arc=none smtp.client-ip=185.70.43.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=protonmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b="uPgWAy7z" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1726254704; x=1726513904; bh=6/lBrZ2oDDRZvVUHlxFsYvMr6aYJJQrOCFEf51HfHeg=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=uPgWAy7zSjTBka6AISIp1jmQ42aVGA8jKYC2DYVpZxx9rqR7tLO6EjK75ego4B5m8 V3CFAY0C85OszAvyxLMbhJeSR8FGTgdoEhdXFkEzs3GlUleGiGb0N1C2wn6RaKv1hd hKBOur9wA4+gIygtUEB4u1HLguqlU3ZH1p38asyQ19lTCMG5AZzCORU2l+yp6DR9+f vXjKTLJnkl6YM6t7Z4627b75+XLSUfQ4WxO97cupmNVyx1sb8rKQ4QQatnvxZ290Ty 8ks1Zw/DD+/qI8osw832p+c54JoctYTNufEWZJoOqDhy1dPLGwElPvddwGX0Rb79J5 sRT6B1wl4nEIw== Date: Fri, 13 Sep 2024 19:11:42 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek From: Harry Austen Cc: Shubhrajyoti Datta , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen Subject: [PATCH v2 6/6] clk: clocking-wizard: move dynamic reconfig setup behind flag Message-ID: <20240913191037.2690-7-hpausten@protonmail.com> In-Reply-To: <20240913191037.2690-1-hpausten@protonmail.com> References: <20240913191037.2690-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: 5bf6a2b04b808efc1b0da601da58340992b043d8 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Xilinx clocking wizard IP core's dynamic reconfiguration support is optionally enabled at build time. Use the new boolean devicetree property to indicate whether the hardware supports this feature or not. Signed-off-by: Harry Austen --- v1 -> v2: - Update if condition with renamed inverted DT property drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 73 +++++++++++----------- 1 file changed, 38 insertions(+), 35 deletions(-) diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index 1a65a7d153c35..b2233d3ff9a99 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -1146,20 +1146,6 @@ static int clk_wzrd_probe(struct platform_device *pdev) if (IS_ERR(clk_wzrd->base)) return PTR_ERR(clk_wzrd->base); - ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade); - if (!ret) { - if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) { - dev_warn(&pdev->dev, "invalid speed grade '%d'\n", - clk_wzrd->speed_grade); - clk_wzrd->speed_grade = 0; - } - } - - clk_wzrd->clk_in1 = devm_clk_get(&pdev->dev, "clk_in1"); - if (IS_ERR(clk_wzrd->clk_in1)) - return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1), - "clk_in1 not found\n"); - clk_wzrd->axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); if (IS_ERR(clk_wzrd->axi_clk)) return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk), @@ -1170,31 +1156,48 @@ static int clk_wzrd_probe(struct platform_device *pdev) return -EINVAL; } - ret = clk_wzrd_register_output_clocks(&pdev->dev, nr_outputs); - if (ret) - return ret; - - clk_wzrd->clk_data.num = nr_outputs; - ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get, &clk_wzrd->clk_data); - if (ret) { - dev_err(&pdev->dev, "unable to register clock provider\n"); - return ret; - } + if (!of_property_present(np, "xlnx,static-config")) { + ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade); + if (!ret) { + if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) { + dev_warn(&pdev->dev, "invalid speed grade '%d'\n", + clk_wzrd->speed_grade); + clk_wzrd->speed_grade = 0; + } + } - if (clk_wzrd->speed_grade) { - clk_wzrd->nb.notifier_call = clk_wzrd_clk_notifier; + clk_wzrd->clk_in1 = devm_clk_get(&pdev->dev, "clk_in1"); + if (IS_ERR(clk_wzrd->clk_in1)) + return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1), + "clk_in1 not found\n"); - ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->clk_in1, - &clk_wzrd->nb); + ret = clk_wzrd_register_output_clocks(&pdev->dev, nr_outputs); if (ret) - dev_warn(&pdev->dev, - "unable to register clock notifier\n"); + return ret; + + clk_wzrd->clk_data.num = nr_outputs; + ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get, + &clk_wzrd->clk_data); + if (ret) { + dev_err(&pdev->dev, "unable to register clock provider\n"); + return ret; + } - ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->axi_clk, - &clk_wzrd->nb); - if (ret) - dev_warn(&pdev->dev, - "unable to register clock notifier\n"); + if (clk_wzrd->speed_grade) { + clk_wzrd->nb.notifier_call = clk_wzrd_clk_notifier; + + ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->clk_in1, + &clk_wzrd->nb); + if (ret) + dev_warn(&pdev->dev, + "unable to register clock notifier\n"); + + ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->axi_clk, + &clk_wzrd->nb); + if (ret) + dev_warn(&pdev->dev, + "unable to register clock notifier\n"); + } } return 0;