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AJvYcCUmrrlzzZFjU475ibUAxFa0xwaValcdJz6c2xJKkINwDYfPrVDWdxgerKoewt2ePkrw2zo5rb3hoSJqC/se4Pwd@lists.infradead.org X-Gm-Message-State: AOJu0YwQmKjp+HxKYMOzBJuibpM6ETcoZR9y19eoWD2YsrWlUWTfToZy sl6vEI/Xzzq7AOEoKJJR/7hktAy0uD2l6ETDIS0eUKn3aYvtWM91j57/Ha/o X-Google-Smtp-Source: AGHT+IH51uSUbdMQ9iCrRl2QRy9eX4aXfLw9P5cCMHdLWzhxrn4FSJyPmohY2Oyu5NtEd1wLer9ijg== X-Received: by 2002:a17:90a:68ce:b0:2c9:61ad:dcd9 with SMTP id 98e67ed59e1d1-2dbb9ee0450mr17054190a91.27.1726550340871; Mon, 16 Sep 2024 22:19:00 -0700 (PDT) Received: from amenon-us-dl.hsd1.ca.comcast.net ([2601:646:a002:44b0:14db:b6fb:c5a7:2dd7]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2dbb9d95b42sm8382324a91.48.2024.09.16.22.18.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Sep 2024 22:19:00 -0700 (PDT) From: Aakash Menon X-Google-Original-From: Aakash Menon To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, lars.povlsen@microchip.com, Steen.Hegelund@microchip.com, daniel.machon@microchip.com, UNGLinuxDriver@microchip.com, aakash.menon@protempis.com, horms@kernel.org, horatiu.vultur@microchip.com Cc: netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH net v2] net: sparx5: Fix invalid timestamps Date: Mon, 16 Sep 2024 22:18:29 -0700 Message-ID: <20240917051829.7235-1-aakash.menon@protempis.com> X-Mailer: git-send-email 2.46.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240916_221902_772654_85E7A934 X-CRM114-Status: GOOD ( 13.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Bit 270-271 are occasionally unexpectedly set by the hardware. This issue was observed with 10G SFPs causing huge time errors (> 30ms) in PTP. Only 30 bits are needed for the nanosecond part of the timestamp, clear 2 most significant bits before extracting timestamp from the internal frame header. Fixes: 70dfe25cd866 ("net: sparx5: Update extraction/injection for timestamping") Signed-off-by: Aakash Menon Reviewed-by: Horatiu Vultur --- v2: - Wrap patch descriptions at 75 characters wide. - Use GENMASK(5,0) instead of masking with 0x3F - Update Fixes tag to be on the same line - Link to v1 -https://lore.kernel.org/r/20240913193357.21899-1-aakash.menon@protempis.com drivers/net/ethernet/microchip/sparx5/sparx5_packet.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c b/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c index f3f5fb420468..70427643f777 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c @@ -45,8 +45,12 @@ void sparx5_ifh_parse(u32 *ifh, struct frame_info *info) fwd = (fwd >> 5); info->src_port = FIELD_GET(GENMASK(7, 1), fwd); + /* + * Bit 270-271 are occasionally unexpectedly set by the hardware, + * clear bits before extracting timestamp + */ info->timestamp = - ((u64)xtr_hdr[2] << 24) | + ((u64)(xtr_hdr[2] & GENMASK(5, 0)) << 24) | ((u64)xtr_hdr[3] << 16) | ((u64)xtr_hdr[4] << 8) | ((u64)xtr_hdr[5] << 0);