From patchwork Wed Sep 18 22:57:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13807240 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D0C71CBE9E; Wed, 18 Sep 2024 22:57:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700274; cv=none; b=A0hgcQnaSOGT76U3XeUy1FW+mmAJwbaNP9s1CJfK9A6EfKN0k44YDlF56I2DNAV/PrjT67xdVYN7w+9LxXt/2tiNge0Arcfv7NBu7U1OP2b7hFHMQvzuik6jG0vIpa/A9vHa+HhpmJyVimd0vmTTeLWv54rVv92NJZVuF89fT4U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700274; c=relaxed/simple; bh=lVs3+P3PVrfKB1JE19rE1ggJhR6Tbzok6Qn7Eo06ZJ4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QDaBVMAYX309fmGixsqljqKBIIhjb8PH07GIaAdi6gioJ6zbQDaBii0govWeO9/xGWmawZ/Ppv8JUAYbq6ez52h+ND2ZdNJPsW4PBNVQaQGdAeUcqFxaK6b3K9lxxqLAk9V9S7ySCXP8mNIJngglqUdSeZ22pf0y2Kc4CSxS2kM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=g5EkbuqV; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="g5EkbuqV" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 92898C4CECD; Wed, 18 Sep 2024 22:57:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700274; bh=lVs3+P3PVrfKB1JE19rE1ggJhR6Tbzok6Qn7Eo06ZJ4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=g5EkbuqVDKigUqamayGDiuaic3SDOCNVn3LD1qio8Z3zzqJunRod6q8A9kGOA52Rc sspH9e46icBIrCmulUQCaWBa7pR0/NEr2sALWlDzUiWENcm0m98wTSMnXdh8L3bTD5 dULfXOEi2vKNmT00f+IgkcVXe0oh6C3AxWEzYSnjm8LVqkk/Zmgj1wF48CxMAA3Y15 zF3KwySntjvZFGn1aR4nkPfIRmN8NN9CZLHIU5tMeVleEleW+ZwcPTQcP9KaqVcFYJ s5RXv6sET5uqjh9u1j0apcEg9kmN+RcEVwV7PVN3VHkuaOD/Vd61A8eb7wSdB++H8J CGYKrRjZY8Kqg== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:14 +0200 Subject: [PATCH RFC 01/11] arm64: dts: qcom: qdu1000: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-1-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=1004; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=LyUvQG/s6kpNprKcZlTnppyjCx1IfqQG0TxgrW9JrFA=; b=ehhL9CgScd00H79XIv3UwRWv8jYtHtchqFTi9H8/6yOmI8jZ8rj6erqT4vSN930BC4KF6SVRD GQ9s4GEfQnfB1/5IWPxMAPhaDKJVv/Om5XPkFTkWWRAzxGlIXzKJal5 X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index 642ca8f0236b3944c5962e5b12b5959cd349812f..1dd760e97794877bae35d19ca264f8fc70f96c8b 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -1412,6 +1412,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; intc: interrupt-controller@17200000 { From patchwork Wed Sep 18 22:57:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13807241 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E53B1CB515; Wed, 18 Sep 2024 22:57:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700278; cv=none; b=FR0x5hthvlNYVVDS/IGOUBKMFAacZXgJ68w9IeCkrOAqt+ImQ0EIXgAWvavSX9hyiiyqfRY0BqI5/ERvzDwvfXezsL6UAxyAjb6oLhBgUk50tVyL0ALlxevktEGk3LCWkrA4iK/z3IlZP7rVvHDJ9gMupoA4/O/dnV0txAQxzL8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700278; c=relaxed/simple; bh=9Xbdr1pTl7lYm6kqYHAJ7Pr5h+ltrNyYvsLJzKXgVnM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=h2B2hYkWGfAsMj7EA6RvFpOolKXBp45f9fixatDaYsglR/SyeAp4MEI8iyRavpvZxk3qvIeLAbpxidcheTvVJoJbDnn0hr/a1FdBTy29iN1eJ4lfMUqlfVSkk2R1c3OgAH89MnuoJtx/FEdQe0rzOtkiQTJX93gInFdYyFwSKw0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=no1i+sPF; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="no1i+sPF" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BA1DBC4CEC2; Wed, 18 Sep 2024 22:57:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700277; bh=9Xbdr1pTl7lYm6kqYHAJ7Pr5h+ltrNyYvsLJzKXgVnM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=no1i+sPFDWzZuHZsFi0rWmfwoc5a8IUh4Jia8nY7EgVF+Np5lmcgeuMcf0M/JZIaS wpchAEbUvJgHQKDXRAL78AV9E61Cu7Lko2Xr014dASRoUT8VVFSE4uXxGiuiAfFqZL DOprQO/9IaJNs9F6MvJNJkvgcnWcwnGeCzJhH0C1DpWTnmsPk7jy1A+qE9VEChj0jP b2AXbpDu8Ai6p2V+BeJoamns4PCP6EmI9OTrqFJWVSS3EYr9B+zWRRCMxMvdUB56/r JJaNcOipOUw9dMveSRUDwXEhaTHYPS0yPT96DE+CE2MOABrgjIn3n5wbRlWc0HocAU yPLjAsTS3nuhA== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:15 +0200 Subject: [PATCH RFC 02/11] arm64: dts: qcom: sc7180: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-2-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=999; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=TocsrPaJ8I1VAyg6H1MUXOkr4BtJGYiVHFeGO5oxys4=; b=GD2PXDTF6K9gyC92vamg0mELPyevvegAlpXgPdzvUxMVJ4d8VF2VfwRwyR3SXK4jSiNNGBMVk kJHbwk+Tt4IDckyA6jc7I8c8IrvvMCpfeRb7YmQliMJWRARIWWSNmGJ X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index b5ebf89803251203a8d38f6a4690aa052a9e8e61..ed258b4ab486af1765b882164962c56935210898 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3625,6 +3625,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; intc: interrupt-controller@17a00000 { From patchwork Wed Sep 18 22:57:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13807242 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F65A1CBE8C; Wed, 18 Sep 2024 22:58:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700282; cv=none; b=Uc2M3dwzwLn3dca8CMwYD3KfLyLne6MSY1bMv8Cocln/jO/15mkpgPlhnkjDtF14ymdA8tudA/LjQ7ywhxOgjh7RM1tl3586l9sIvVc8/xeJOmY1rQb0TgrEcoEaA9RC909F9qRt95eWncoJy8ZedS7dsuZCgnG9BWdibzs/IB0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700282; c=relaxed/simple; bh=RxoVMorh+hK91OedQ3oJtU04SwGPUyhRyw7jRuHQqKQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ODgm/hkO3d1tOkj+OwkQdlT1cXMUsz76BIrbuZkM4889goDmQpgPE60g7K+zkCTl9ueMAa1pShKFzBEIVy6c73vWW2kR3aGLZfs8Mymk3iGkJBvflyeqmBP5fSTPSdOBcEFcNlzQNfA5w5Plx/8/cnLfbnhz+8ec/gGCXx4VeJY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=UdeHZIn5; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UdeHZIn5" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 512EBC4CEC3; Wed, 18 Sep 2024 22:57:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700281; bh=RxoVMorh+hK91OedQ3oJtU04SwGPUyhRyw7jRuHQqKQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=UdeHZIn5om9zcpLGa1kawQoowfgE+DNwuRPuNxxfDdmQP4oAkaiQkRH56UmKCK8qS LG1YwD3UxuOq+nQtMblSYjZJ1YjZvjvN7fWxTo/RBOP62QbnaL1pFU0hCZiKCPiYPu 1YEF8xISljWIeTfICJ9VSYanOA66u4uP1qLcDzvzHTok3BF/0Jv/B+pOyIle5DwnXt Wtkv7XgWC8DpcHTbF+RhbKCe+V9GKuDLYWIJYW4F70YuBT7VGLOr0eXvctqzy8Fpo9 2InSNlDD2MthJAoH6IgjYVyUy3TFtASqKbG6/3i3MOARKCvwdHzhj7CnY7SYbIRCz8 lSxFPgMbgquTA== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:16 +0200 Subject: [PATCH RFC 03/11] arm64: dts: qcom: sc8180x: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-3-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=1024; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=nZa/xUmq3r52HYMY7fxYqAZh4cZqvM5bkwdh/Dv0esI=; b=x74CW9FDZ7H/Frno3aNJqG3Y37LNH9IC5pnp4Qw5Tp+iStzd7Eok5hHkR0zPHcOmX3LUmiwPH giQlaM8Og/8DISBBroxypKNW59frB7w5Yi/Wn81Y15fBlI0NM4+BQoq X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index 0e9429684dd97bc2d93185815b29e9db0fad892b..e80e0d3b77329836ec3c97e707c5659b9ad83325 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -3662,7 +3662,7 @@ apps_smmu: iommu@15000000 { , , ; - + dma-coherent; }; remoteproc_adsp: remoteproc@17300000 { From patchwork Wed Sep 18 22:57:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13807243 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DB021CC172; Wed, 18 Sep 2024 22:58:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700285; cv=none; b=EufsRgJzsoAily4IvnkF+5FSjd5jyabZV6lEcZu87E2pwEbwYYdl0G+xkFCdtd3/GSr42t7mYPWJHPNczGqT/IEQPXJ6L8zNuLIbSyMIIH71dJSGsb13l7F/+DrEhgfjPPVw8QVVTkb+E1rTFVu6RhPTc7fAbRPQG+QHZun5A7M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700285; c=relaxed/simple; bh=yxkJqeag+cHRDOW655uJqun2ar+bn6DrpicUSLT0eAk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WitZNAQ9oxNk6bAej49Qy9RvxRkc6uAKv7tIevcU+kbAysIlZ5GxxuPIHdJqCDvl/Q4wMk1dO8xwsscCf5CY6DQbpQ90DbwFW652XqDqUgq4pdsPw3qHsGjjyJPEtVVmFs+qd3FpqM76JtSBbImnaQywUzEC2Tt0m685lu/2p8w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LKxKYpKf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LKxKYpKf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 60510C4CECF; Wed, 18 Sep 2024 22:58:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700285; bh=yxkJqeag+cHRDOW655uJqun2ar+bn6DrpicUSLT0eAk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=LKxKYpKfRcpxQAY8yuTwYz7eKJiG9H7TTC2Vft9ehdcUOt5CGiA4f3Bq29A1DsRJ1 /iZYp0Qm5DkO+oHkM+Kr4ufVkBMjvJVDFkW3KFgyqKqLuL35PCyAD3cfgdRUt2Selx EH0Z9g1z9lkVZ15zu0uUbgG5xIXgzCRpuIHYn3Qg1HK27ROhWG2Jc5N3maF/OFgT/c 0bl20mkK3dmJ8P+DlP1uwV2F2fpJJGtTaS9zlOlEnv32TmiiEhJwk0+13tq3lUVwRT SiXat3mp79F6N7l98hSwLmZgugjizUj3PimU2KlHnEcQgx41oAP+jRQSEpoZQ+eLES QFWeTLBrzmEYA== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:17 +0200 Subject: [PATCH RFC 04/11] arm64: dts: qcom: sc8280xp: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-4-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=1009; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=QpUw8ZaJCUB4takBAlqMpvVgFRDLxf4g8S0BjQz9WeQ=; b=w/tvXpvFBerXuTddXSslIncKx1/PjB6TbrQ/q9cmad5MzljTy/MspsUdC3WpomcZOxqc8p7qS xqH9/4CSHO5A1IrPvVDGoGk/DmSoDnQj9Yz8Lz+ZHo7qRTvNJ3oFoLA X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 80a57aa228397e23e3e2d5643c0b563a60d71170..d36f677ae4cd857388dcd5821160a6472a0904b4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -5008,6 +5008,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; intc: interrupt-controller@17a00000 { From patchwork Wed Sep 18 22:57:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13807244 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5D141CC88C; Wed, 18 Sep 2024 22:58:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700288; cv=none; b=O9cGNTdG1EclPsqyegIXbgEPiD1EEw9S0yKVDyTGAT2Uf1itf2S2Y8oaEBAgA9dvLqluTSRTVVnm678KTDi5wzSzGHHVzSnZSG7jf3lD/WLz5Y+96YGkxHc7N2j2cf9l7+Bb/iRw7op0eN1+41b9aAOIj+73d1JrEpjoHI15xf8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700288; c=relaxed/simple; bh=aGbFusPDI63Fm+CFi0ZmI+xAVQzIkHsdozHQd35Vles=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DoVwTxlsHiC9lKjJVSBi5tk4MRZQGj6d8ezqj6lyR3o7I2QtEb9ut8pguTcHRKrV+xjx3pqVJUv6ZERDy5/NLfuVbLvTkpKTUz3KGtBZH9BVrPDB3S6ONWWhhOpk7HeerCvioFzP+YLjSBfVq5r+2dQZW/evvLWsc5C8xVkCRQc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YqN5Dk4Q; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YqN5Dk4Q" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 78435C4CEC2; Wed, 18 Sep 2024 22:58:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700288; bh=aGbFusPDI63Fm+CFi0ZmI+xAVQzIkHsdozHQd35Vles=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=YqN5Dk4QvZMUQYcXRPqsVCN+MXu2GZbljX1ui6Kssig4hS4GsUrpXQLtBdFIq142K d9VKegBCjTa3EujSwibgcpwYfTNf3874Wrw5toK/N5mithafa8WKj9EXEBnNImFNH0 IcluuTGWl3oaSBBnUMw4AuGzZjv4IjNklyYJ9IQNtcMvV2hztmnMDVEESb3PEc4gSl tCYsB9FG9V5D9jRvMVXHcxfZAZBpqru1SjuTBBwoKMTkFsF991y5G2oAmWXdGhzpKC MdCtQG5RGsgrrgP7P1sMXF3Po9+R5ZKsqGgQe1s+IDOJ3VHmZ/w0r8o6tLjz1tC4uF tkIQOkTWiEHtg== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:18 +0200 Subject: [PATCH RFC 05/11] arm64: dts: qcom: sdm670: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-5-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=1000; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=JG8EJoLAHahav7rFKM04sHWlWdZU1KXmxqIrjdhaM9o=; b=OTi32NdVAKltLS/SCktu9a/1mc2OngOpUqxGdCwvJFJoG6P+hrkJa63St3SMx1Pq2GYKJhM0X 2mjypiXGaU3An3oL06JXlk8vBREKG/yx7jFWCat5l/vQOgrnWUj4eC2 X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 187c6698835d34e617aeb83309b6d5926eb57198..a08a64bc033ffdea283645c6bf4ed835a59c3366 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1737,6 +1737,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; gladiator_noc: interconnect@17900000 { From patchwork Wed Sep 18 22:57:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13807245 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A98A1CBEAC; Wed, 18 Sep 2024 22:58:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700293; cv=none; b=pzg1x+U4XmaMn6fFKVU9jRJrMePJ6/mdThvOsP5G9wC1WWvd5PPc4Apyg2hxNNoWrc9coRuDj4KOgwco2yq6Teew4E2NJIv2QtC1TxMYYqm/cH0ZaS9kb0FzN80sgiiANBjSE+9gmkQBIIuel8LUT7R8nPB/XhwPfPzQgLmkyqc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700293; c=relaxed/simple; bh=mmj9k/5wzoOZV6DQSW73lInky+Ha7Es9GsL3JQUu8D0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Uclc5gTU0WIkX+DfNL7TXdGEADTZGQl8lUrJXSRgC0k1fKEtHJAkcHFA5h6JfH0IIU7wj7y0XVfmUskG8N7EaCoC+BazdxNYcDHFsQu/rE93bdGqioQWjfqFDeFFgRDNMNUWZDnaec8Q38mwttj18ToWe/CNDNC17CeUj/4279Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OfWebyUY; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OfWebyUY" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 315C5C4CED1; Wed, 18 Sep 2024 22:58:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700293; bh=mmj9k/5wzoOZV6DQSW73lInky+Ha7Es9GsL3JQUu8D0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=OfWebyUYkjxcfZWV/YwUfqYglTa3lVOn0FuJ7qX8LUIzrEps3EUOPEy4qAhCexVq8 zSWSS1nNv6tQZYSiSB02KoK+N2+cPqYuVrIVLSe/miovHmHRF16IJlqpLF9KYfg+uu djDBPZZF7GKOE/4Uh2jN3TmojoPrl7tbhmwqdSrkX1YuwgKjhb0b8T5rNHUaN4Vd6F n5F4SCVdG7/Uc8DALAzk6XvrX9ETWywIiJYnXKgM4JkoUT5xOv3SGwEuh8H86LlFUp z0R+FroEjLxqm+PcCVuwrOOyvMabLTJMW3s1AveXcVt8vXvAK4iWw4ORxLJ/S/kvvO fG68ZXfarifgQ== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:19 +0200 Subject: [PATCH RFC 06/11] arm64: dts: qcom: sdm845: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-6-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=988; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=UZMF5MnsUbzsHMthR4Ow1hPxixbpxGwRvIlbTvumHUE=; b=6KbOYn1tyI0IsSLsMiQ+CqJCuSkm2gOZxp+N/YJNZqAK/sIKvIDjAgVN8kD9ph5kx+fJVrZDd XUjX1534QJSCINCfBmwayJsfRg1/c6PszsQ2xilBVe5a+ys0yP290uv X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 54077549b9da7f0ece69a01d370692d9d716bbb5..49440d1b2cf6caf6da9d97c635cbd751f0700326 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -5159,6 +5159,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; anoc_1_tbu: tbu@150c5000 { From patchwork Wed Sep 18 22:57:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13807246 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 852871CC8B8; Wed, 18 Sep 2024 22:58:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700296; cv=none; b=pJOaW3YunYQMo9ZxY5UKPzyB+frKDliUjWTunh3VSwh0930USCUu7RQeP4Hf7kIlDGAegImjq9iXppoZENH7ZVgIAgwAuRtAg9LNAhhbq9obR0LnKL4dZtw+AG7IDgbWterpZDPiQP9ZSWJEoANL6gAmBWXDZmhE3kUf8O8NmIE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700296; c=relaxed/simple; bh=HwgYbAoeeuxP+0YGncCc+jFyal9DAfjf/+Xg0+QlNIo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QjqePRCKMgzj7COXHC+4r+KhdNORrt9it4wHaZKFl/lUF36oNRdtKVWqcQm7L+a883F9EVYm+nScMxORx5+dx/D+rqNZDuLMj+REHOSoCnXb4UiRScO9Y7/r/DxhtzVz69WbHBhLTYrMQj8qZeii69D2k0phoh+88bk+oWRScwQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GbnqqK84; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GbnqqK84" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 93C6DC4CEC2; Wed, 18 Sep 2024 22:58:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700296; bh=HwgYbAoeeuxP+0YGncCc+jFyal9DAfjf/+Xg0+QlNIo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=GbnqqK84LcFI14boXv4oJaHLQlVVJilueT94ydvxlbTwv8haWxUQIN83IBJHnMYBr 1kZbHf8K/MdXvcB4fEWbOZ1AAlMSxzAh1D6G/xpUL8j0RufGQhMkj2wia4lDL7ipOT hCKBeVUAPACWjEBkFYPQulp+c6s1sXKrKzW87CaEVREcsrFN8pNuUk0LZpZeLZgMkA ZzYUyfhr7Jc8ATijC2XLtneP+7miicvYcwZFEpZcL5Hzti7/AnDFQv8dcJ/c729FHi d6o7h2y1wShAz/c14mb7CPTdTkeSu/TePiJnE/3hitgFmA+8PbmQlcpall9m4hJ+Po gFGmrFc7xhfnA== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:20 +0200 Subject: [PATCH RFC 07/11] arm64: dts: qcom: sm6350: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-7-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=999; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=WDSobhu5cZf6LUkFYpRDvkoj/aXymJ0ZoDrptncMGIQ=; b=aEi0Plw+Qtu8ZbuLpHZ+ymojjYZtcuVmC2BMTImNN5VObzbQSACAKuL2prjuY8hwlcBqFypRa KKWh3JO5lKBDjNBeWHZS2pMoH0XlkHLNZwepTQqZ6VauBoijyfTux4Y X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 7986ddb30f6e8ce6ceeb0f90772b0243aed6bffe..54cfe99006613f8ccc5bf6d83bcb4bf8e72f3cfe 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -2685,6 +2685,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; intc: interrupt-controller@17a00000 { From patchwork Wed Sep 18 22:57:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13807247 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF7B61CBEBE; Wed, 18 Sep 2024 22:58:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700299; cv=none; b=bLhDuYITrBlfRVFqJfVJzkQp7xrkLw15HEvvNFb8DTuhsgsrRNQRo6Mgkj0LbkIdMK/KcVo8z33rvoFVXGuwpZ+CgGHSL9ccUUvW8iCRTon36jslAi/rEaUDCMIRUvqQwshPSpiHMXpMeGlgk607fSp5I6FU1WK7vwxoEfYrJqc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700299; c=relaxed/simple; bh=QBoB4Ot7K+O4Obyl3HKNUXhThAi16EowUegHMtqCUIM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eiqOeDfStMLgcGlEcVcE2JUPEsHs+ZWYV7t+kLolREhwLltQceWUlZ1BQJPXPUOeHASqBr5n6W1d0wu/Fi06Kj3HRegduKd+AcnIszAQt+PqjIZsCxg1XHqO+z6Vl+lRtdUHSPVhTwV0GmjpCZQZ28WkqqJe4gF09FCP+o/qa3o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SzSM6405; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SzSM6405" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E1712C4CEC3; Wed, 18 Sep 2024 22:58:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700299; bh=QBoB4Ot7K+O4Obyl3HKNUXhThAi16EowUegHMtqCUIM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=SzSM6405yLBVU1koWb31yvaReURCjG9mqfPJFtEX49SRRBykYHwylAZ6DVgHtoVB3 //9W0HTWgyKPmCiju/MJAK1rn8ZCr16h9NpL19CZeDcNW7tiUuu981QV+U+4O/fyrp YNZzx5jIHfpoStjIBf6R2bnAleg8p7kUvp/gp6uvMqW5QhYmKvHAQHec1NJMnJGs7l IsAdaQS8fehXRp5XL0KUy5ejagwlA+WNkjt6sxAgJD90LP3OvNetHQH85W4x3ZexgZ XrPEL3F2kQcd8YkyyQKqd5q1ukPa4ZtArGxxgec01i59yJog308C5QGLyWi+2t5sGJ UDBo4ZKioOsLw== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:21 +0200 Subject: [PATCH RFC 08/11] arm64: dts: qcom: sm8150: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-8-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=1000; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=bNTOagUjuIT9eHqmrzEiDX4QJTZgAhZ+fZt6gBTJGDA=; b=ba3+Ql0LiulBh7MP0mcaWqcqciZl8E4CMnoVuMDLBTRibQ7K+Boz0AE1d58KwaIEp74f/T7zt XZ64hG7JZKLDF7FJIu9sN8VHEt7xsIJlLGWQL6SWsNp7WMtn2ovlG7V X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 27f87835bc5595f5023319f77878a8ea4090a3f6..28e57ad885f4f64abbf429c337d45504ff2830ad 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -4296,6 +4296,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; remoteproc_adsp: remoteproc@17300000 { From patchwork Wed Sep 18 22:57:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13807248 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 51A691CCB4C; Wed, 18 Sep 2024 22:58:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700303; cv=none; b=Cvpk9Hx5LKPAXeANYWiz5I+Wz0qGf2kAdp2zOyg7nHNuVe1T1Qu2vwOhUoVyPWpNVlh4ZUQz3fgPv4yw+HMYs66vVWAKEjI7oi2AYvs2wzjsvHdWQpTBnQDcih9n1/23gZfupAXVd8U4TE5cwi9AiEojj9/VvJmO5JhvRfbX2/0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700303; c=relaxed/simple; bh=fvbcgqAs1rsyvlilfy+Y0MNH7szTK4zdztzefiGCpxg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Wi0cEa97ZirdL7VFQWqfyzDjLNFtwgj0ASBGWd2JebJm8ZowMQDDQIZNf/cnnTwhLIJlsVgxcsxht6Au/nAo/0Urn4w/T4fdUAeO9KK3P1QbSYdjMViYU4VbfwehhXi1doOqX23jwsCbzIdxDlBt82N4eaVYYWDOo/ZYpIxnTeg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TaZLE0hJ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TaZLE0hJ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 38335C4CECE; Wed, 18 Sep 2024 22:58:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700302; bh=fvbcgqAs1rsyvlilfy+Y0MNH7szTK4zdztzefiGCpxg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=TaZLE0hJIt7f4EeU+k6Iww3zmiqifmV8/I5sTFRVyb+JbRSYPu4HQ08Vh4/Qf6Dqs +NoWyG87fLONPt/3ttla7HUVJmxRNq1cuq7tQdKlVEvmSCoe+Mv9s8zc2WRKgNDnst GF/blXpZym0TJcNPmYRw6AzZvKBKFpRATIN8CN8e30ElR+bw5LHNixvUAOI9uAsR95 eI2CuQZIm69L1q83aATr7y9xtoKCBSFTd6mEvF+pEr+9+1Nmx2n/sxerK9P9dEgucm ECkmedMbDN6JxHhelu6cjvRqEF/1gZKGKM+rNdczHTxb2Ko80bh7MgMaFUx1a2hBaf OFRzAEkPNertg== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:22 +0200 Subject: [PATCH RFC 09/11] arm64: dts: qcom: sm8350: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-9-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=989; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=wTWitVw9dc+KqMmrRNavgfSxif6bVcuzlfUqH1vW+mQ=; b=ywwQxolO+k2AHxStq7ykh/1Ojo36V4y4wtU/Ku7ejhgeZxAXl8ZSmPM0CSDv51tAABya+Obib oglCDXg5j94C2/G6oyJgR6jrv+WHun6UFvfR8Ut/ygpFde2sI8f1/I7 X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 37a2aba0d4cae0421c8ddc09d70373836dac8b33..3156aff90f16b32e8458bcc9a93e6fa6084c5a09 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -3282,6 +3282,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; adsp: remoteproc@17300000 { From patchwork Wed Sep 18 22:57:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13807249 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 034781CCEC4; Wed, 18 Sep 2024 22:58:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700306; cv=none; b=owz5+SpLaE2euRZM/w0FtBfO6M2Dg1FsepMmun2UxPIMKsAdYNkcnY8VJ1NS2AWy0y3B7aWj5nP2k5yBkO1RMWJuwvjqOwCcQYFkaQRBAY6g9yD0rkpM4JoR6KtcVOfjgqdI6dySFC9XjrDYRJ0G4++oyRrRfnhQoG5ubxl5eEc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700306; c=relaxed/simple; bh=ZcAFn2XSRIW73riEtufmOHMyBIaaTuxA2BmJWLS6aMA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RWWednfCDZRnCqDEYAVdi3xwXYC4RpjX+yrttylpiujJPG4yeTKEJSpg6+fR/DwKjSkHQf9V5BsQIZwgDSmYEjImfrNKRDpa71DAVtZQwfaKBFBu1h0XpHdSvJUBZNRVNXmt7LeBTDU7AQdlmcKnE6zINqUV1Ta8Hc2Lo2JdCRY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=pl+/Wge8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="pl+/Wge8" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5D8CBC4CEC2; Wed, 18 Sep 2024 22:58:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700305; bh=ZcAFn2XSRIW73riEtufmOHMyBIaaTuxA2BmJWLS6aMA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=pl+/Wge8stfTkbXUv7jeJ7MYCicj7dHcskhgSmrrETEsPvzBM4iNPWShsbcm4+sJf 7FZquLMwQ/jjco8GV4Rz4YS39ZySNd3UttxN682eFaebEwxODWSG8GlFWlb8rLp3gZ Iy8QQTIIMk0N+JJ8OqPndLnmQcAgUtsanW4QsCznFBBMdor29TK0XRoxFd2kEQgs+y 95He8oUUdujdcgiWIfYIhf6ZSj8Ul25weS60B1FOGiPg79tJ3e1GgSwmT1fi8aUvtp eUtGXZH3sDUCnaB65RgVLtJn7LY4imUI6KV0rabpDwzNlnL2nydjbwYVBcWECtCLjy jKgdi0PiVq0PQ== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:23 +0200 Subject: [PATCH RFC 10/11] arm64: dts: qcom: sm8450: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-10-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=999; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=7lG88rwMoxIAeoJSLU9mOYtSapn72lOPZLltuZ/GUsY=; b=Q1yrT3u0v4bzdrFXFTSFStWb/zZ0SBZaFefbJ1Dtf6FP5qbqRUEKLdsaMPMcp2KTVZ24Z/Nfz BW/A4nD0r2TB0LmuNDTURwj5rOiToeQN6tUQyMIr4514eLMqcmadg2o X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 9bafb3b350ff627277514be83910b72a283c1935..a22112cb4bb5ba2f20e45f8136d9ec2d75dd7571 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -4257,6 +4257,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; intc: interrupt-controller@17100000 { From patchwork Wed Sep 18 22:57:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13807250 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36A621CBE88; Wed, 18 Sep 2024 22:58:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700309; cv=none; b=gSSdG403WKFTgrj2uwQtdjEF82Xnl6AVMVLsQN2UUwh8Ftq9qwu1z3LhKg7lbF5OMaikjTltEP6VWoZjvECpMc5oywJahSANBF5Xz0hPommOK11eh1N76gchxGY2ah8FUsKsde8fBg7kV55Av7kaTOyxz6ox7+e9PKsjNHpGtUk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700309; c=relaxed/simple; bh=tUZrk1EdPiVct+xXtl78SvbxSva0eNKjrB1/B3ttXh0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ip4KafvoiVzeE7s0jrsITVeKOCYjtj9sajvJI5GaH0tVLXJpmWUklJGAWKE1em+f9jmdAx5Uk1iXkz94oUsw9CHdtzNWetOSEA0bMzPrlBL2x7juzkP4DhjGEXsUnIFylEGaYwRXOPF+mT3kDBx5zkdaOL+nqOng2M3+JC5TkUQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=a7lxUEju; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="a7lxUEju" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5B2F9C4CEC2; Wed, 18 Sep 2024 22:58:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700308; bh=tUZrk1EdPiVct+xXtl78SvbxSva0eNKjrB1/B3ttXh0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=a7lxUEjuQ4nWVnUmGo8im+agu4zBW/o2eC2/eafXjTRUYeunMkyTRietWrj8K3885 rDlkrzU4PMgpyjat/jObLtwt+DgWtxFVDJBkINoIapG2UROjD+q2VmSX2m7aJs0Hx3 tJ+zZMuISPuPePBjSPXhyKC4Ch/pwwsK/mFrJQlUYSphSDdRztmDMcS6UQH+SNNBEc OHrbd80Pjp6dXq82/EWBLSKyfeLyMzFvIgRxR5X83SZ79IiwNfF2bwls1toIPvo31j ue7FvfUF3x+AYaGU91qCLQxw3aqhb/QfUUr6fJeQDSpXOOkjsh7WyKX8B4F7gBy88J IRjqhBOE4kc5w== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:24 +0200 Subject: [PATCH RFC 11/11] arm64: dts: qcom: x1e80100: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-11-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=935; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=UAAkU5ua+PTQ82gzLCcWIGiK3QLtBYTAdTr5qxOv2jE=; b=5B5qw6At0aNX6CPN3gDyjDuFFQ2Vb23yg0iXDCgb9qc34C/dVt8LkBg+NWLFqFoInMNrsgKHy rtm9aAnE9zaDPJ8c7uPIk9Llyw6FSlvYye9HQ6F+Tewc5N4T7b3aGFD X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index a36076e3c56b5b8815eb41ec55e2e1e5bd878201..d364d5ebdaaf6aa1935d42e49819b02e03e32fe9 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -5738,6 +5738,8 @@ apps_smmu: iommu@15000000 { #iommu-cells = <2>; #global-interrupts = <1>; + + dma-coherent; }; intc: interrupt-controller@17000000 {