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The structures are very similar, which means we can reuse most of the implementation. See PCIe r4.0, sec 9.3.7.4. Signed-off-by: Michał Winiarski --- drivers/pci/iov.c | 28 ++++++++++++++++++++++ drivers/pci/pci.c | 40 ++++++++++++++++++++++++++++++- drivers/pci/pci.h | 14 ++++++++++- drivers/pci/setup-res.c | 44 ++++++++++++++++++++++++++++++----- include/uapi/linux/pci_regs.h | 1 + 5 files changed, 119 insertions(+), 8 deletions(-) diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c index aaa33e8dc4c97..e8ccd2ae0f024 100644 --- a/drivers/pci/iov.c +++ b/drivers/pci/iov.c @@ -153,6 +153,34 @@ resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; } +bool pci_resource_is_iov(struct pci_dev *dev, int resno) +{ + if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) + return true; + + return false; +} + +void pci_iov_resource_set_size(struct pci_dev *dev, int resno, resource_size_t size) +{ + if (!pci_resource_is_iov(dev, resno)) { + dev_WARN(&dev->dev, "%s is not an IOV resource\n", + pci_resource_name(dev, resno)); + return; + } + + dev->sriov->barsz[resno - PCI_IOV_RESOURCES] = size; +} + +bool pci_iov_memory_decoding_enabled(struct pci_dev *dev) +{ + u16 cmd; + + pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_CTRL, &cmd); + + return cmd & PCI_SRIOV_CTRL_MSE; +} + static void pci_read_vf_config_common(struct pci_dev *virtfn) { struct pci_dev *physfn = virtfn->physfn; diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index ffaaca0978cbc..d4522e365e7ba 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1901,6 +1901,35 @@ static void pci_restore_rebar_state(struct pci_dev *pdev) } } +static void pci_restore_vf_rebar_state(struct pci_dev *pdev) +{ + unsigned int pos, nbars, i; + u32 ctrl; + + if (!pdev->is_physfn) + return; + + pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_VF_REBAR); + if (!pos) + return; + + pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl); + nbars = FIELD_GET(PCI_REBAR_CTRL_NBAR_MASK, ctrl); + + for (i = 0; i < nbars; i++, pos += 8) { + struct resource *res; + int bar_idx, size; + + pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl); + bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX; + res = pdev->resource + bar_idx; + size = pci_rebar_bytes_to_size(pdev->sriov->barsz[bar_idx]); + ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE; + ctrl |= FIELD_PREP(PCI_REBAR_CTRL_BAR_SIZE, size); + pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl); + } +} + /** * pci_restore_state - Restore the saved state of a PCI device * @dev: PCI device that we're dealing with @@ -1916,6 +1945,7 @@ void pci_restore_state(struct pci_dev *dev) pci_restore_ats_state(dev); pci_restore_vc_state(dev); pci_restore_rebar_state(dev); + pci_restore_vf_rebar_state(dev); pci_restore_dpc_state(dev); pci_restore_ptm_state(dev); @@ -3703,10 +3733,18 @@ void pci_acs_init(struct pci_dev *dev) */ static int pci_rebar_find_pos(struct pci_dev *pdev, int bar) { + int cap = PCI_EXT_CAP_ID_REBAR; unsigned int pos, nbars, i; u32 ctrl; - pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_REBAR); +#ifdef CONFIG_PCI_IOV + if (pci_resource_is_iov(pdev, bar)) { + cap = PCI_EXT_CAP_ID_VF_REBAR; + bar -= PCI_IOV_RESOURCES; + } +#endif + + pos = pci_find_ext_capability(pdev, cap); if (!pos) return -ENOTSUPP; diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 79c8398f39384..e763b3fd4c7a2 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -556,6 +556,9 @@ void pci_restore_iov_state(struct pci_dev *dev); int pci_iov_bus_range(struct pci_bus *bus); extern const struct attribute_group sriov_pf_dev_attr_group; extern const struct attribute_group sriov_vf_dev_attr_group; +bool pci_resource_is_iov(struct pci_dev *dev, int resno); +bool pci_iov_memory_decoding_enabled(struct pci_dev *dev); +void pci_iov_resource_set_size(struct pci_dev *dev, int resno, resource_size_t size); #else static inline int pci_iov_init(struct pci_dev *dev) { @@ -568,7 +571,16 @@ static inline int pci_iov_bus_range(struct pci_bus *bus) { return 0; } - +static inline bool pci_iov_memory_decoding_enabled(struct pci_dev *dev) +{ + return false; +} +static inline bool pci_resource_is_iov(struct pci_dev *dev, int resno) +{ + return false; +} +static inline void pci_iov_resource_set_size(struct pci_dev *dev, int resno, + resource_size_t size) { } #endif /* CONFIG_PCI_IOV */ #ifdef CONFIG_PCIE_PTM diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index c6d933ddfd464..87a952a114f38 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -427,13 +427,44 @@ void pci_release_resource(struct pci_dev *dev, int resno) } EXPORT_SYMBOL(pci_release_resource); +static bool pci_memory_decoding_enabled(struct pci_dev *dev) +{ + u16 cmd; + + pci_read_config_word(dev, PCI_COMMAND, &cmd); + + return cmd & PCI_COMMAND_MEMORY; +} + +static int pci_resize_check_memory_decoding(struct pci_dev *dev, int resno) +{ + if (!pci_resource_is_iov(dev, resno) && pci_memory_decoding_enabled(dev)) + return -EBUSY; + else if (pci_resource_is_iov(dev, resno) && pci_iov_memory_decoding_enabled(dev)) + return -EBUSY; + + return 0; +} + +static void pci_resize_resource_set_size(struct pci_dev *dev, int resno, int size) +{ + resource_size_t res_size = pci_rebar_size_to_bytes(size); + struct resource *res = dev->resource + resno; + + if (!pci_resource_is_iov(dev, resno)) { + res->end = res->start + res_size - 1; + } else { + res->end = res->start + res_size * pci_sriov_get_totalvfs(dev) - 1; + pci_iov_resource_set_size(dev, resno, res_size); + } +} + int pci_resize_resource(struct pci_dev *dev, int resno, int size) { struct resource *res = dev->resource + resno; struct pci_host_bridge *host; int old, ret; u32 sizes; - u16 cmd; /* Check if we must preserve the firmware's resource assignment */ host = pci_find_host_bridge(dev->bus); @@ -444,9 +475,9 @@ int pci_resize_resource(struct pci_dev *dev, int resno, int size) if (!(res->flags & IORESOURCE_UNSET)) return -EBUSY; - pci_read_config_word(dev, PCI_COMMAND, &cmd); - if (cmd & PCI_COMMAND_MEMORY) - return -EBUSY; + ret = pci_resize_check_memory_decoding(dev, resno); + if (ret) + return ret; sizes = pci_rebar_get_possible_sizes(dev, resno); if (!sizes) @@ -463,7 +494,7 @@ int pci_resize_resource(struct pci_dev *dev, int resno, int size) if (ret) return ret; - res->end = res->start + pci_rebar_size_to_bytes(size) - 1; + pci_resize_resource_set_size(dev, resno, size); /* Check if the new config works by trying to assign everything. */ if (dev->bus->self) { @@ -475,7 +506,8 @@ int pci_resize_resource(struct pci_dev *dev, int resno, int size) error_resize: pci_rebar_set_size(dev, resno, old); - res->end = res->start + pci_rebar_size_to_bytes(old) - 1; + pci_resize_resource_set_size(dev, resno, old); + return ret; } EXPORT_SYMBOL(pci_resize_resource); diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 94c00996e633e..cb010008c6bb3 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -738,6 +738,7 @@ #define PCI_EXT_CAP_ID_L1SS 0x1E /* L1 PM Substates */ #define PCI_EXT_CAP_ID_PTM 0x1F /* Precision Time Measurement */ #define PCI_EXT_CAP_ID_DVSEC 0x23 /* Designated Vendor-Specific */ +#define PCI_EXT_CAP_ID_VF_REBAR 0x24 /* VF Resizable BAR */ #define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */ #define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */ #define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */ From patchwork Thu Sep 19 22:35:56 2024 Content-Type: text/plain; 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This can be leveraged when the device is exposing lower than optimal BAR size as a default, allowing access to the entire resource when lower number of VFs are created. It is achieved by dynamically resizing the BAR to largest possible value that allows to fit all newly created VFs within the original resource boundary. Signed-off-by: Michał Winiarski --- drivers/pci/iov.c | 92 ++++++++++++++++++++++++++++++++++++++++++++- drivers/pci/pci.h | 1 + include/linux/pci.h | 3 ++ 3 files changed, 95 insertions(+), 1 deletion(-) diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c index e8ccd2ae0f024..d88efbfa70e42 100644 --- a/drivers/pci/iov.c +++ b/drivers/pci/iov.c @@ -181,6 +181,86 @@ bool pci_iov_memory_decoding_enabled(struct pci_dev *dev) return cmd & PCI_SRIOV_CTRL_MSE; } +static void pci_iov_resource_do_extend(struct pci_dev *dev, int resno, u16 num_vfs) +{ + resource_size_t size; + int ret, old, i; + u32 sizes; + + pci_config_pm_runtime_get(dev); + + if (pci_iov_memory_decoding_enabled(dev)) { + ret = -EBUSY; + goto err; + } + + sizes = pci_rebar_get_possible_sizes(dev, resno); + if (!sizes) { + ret = -ENOTSUPP; + goto err; + } + + old = pci_rebar_get_current_size(dev, resno); + if (old < 0) { + ret = old; + goto err; + } + + while (sizes > 0) { + i = __fls(sizes); + size = pci_rebar_size_to_bytes(i); + if (size * num_vfs <= pci_resource_len(dev, resno)) { + if (i != old) { + ret = pci_rebar_set_size(dev, resno, size); + if (ret) + goto err; + + pci_iov_resource_set_size(dev, resno, size); + pci_iov_update_resource(dev, resno); + } + break; + } + sizes &= ~BIT(i); + } + + pci_config_pm_runtime_put(dev); + + return; + +err: + dev_WARN(&dev->dev, "Failed to extend %s: %d\n", + pci_resource_name(dev, resno), ret); + + pci_config_pm_runtime_put(dev); +} + +static void pci_iov_resource_do_restore(struct pci_dev *dev, int resno) +{ + if (dev->sriov->rebar_extend[resno - PCI_IOV_RESOURCES]) + pci_iov_resource_do_extend(dev, resno, dev->sriov->total_VFs); +} + +int pci_iov_resource_extend(struct pci_dev *dev, int resno, bool enable) +{ + if (!pci_resource_is_iov(dev, resno)) { + dev_WARN(&dev->dev, "%s is not an IOV resource\n", + pci_resource_name(dev, resno)); + + return -ENODEV; + } + + if (!pci_rebar_get_possible_sizes(dev, resno)) + return -ENOTSUPP; + + if (!enable) + pci_iov_resource_do_restore(dev, resno); + + dev->sriov->rebar_extend[resno - PCI_IOV_RESOURCES] = enable; + + return 0; +} +EXPORT_SYMBOL_GPL(pci_iov_resource_extend); + static void pci_read_vf_config_common(struct pci_dev *virtfn) { struct pci_dev *physfn = virtfn->physfn; @@ -445,7 +525,7 @@ static ssize_t sriov_numvfs_store(struct device *dev, const char *buf, size_t count) { struct pci_dev *pdev = to_pci_dev(dev); - int ret = 0; + int i, ret = 0; u16 num_vfs; if (kstrtou16(buf, 0, &num_vfs) < 0) @@ -487,6 +567,11 @@ static ssize_t sriov_numvfs_store(struct device *dev, goto exit; } + for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { + if (pdev->sriov->rebar_extend[i]) + pci_iov_resource_do_extend(pdev, i + PCI_IOV_RESOURCES, num_vfs); + } + ret = pdev->driver->sriov_configure(pdev, num_vfs); if (ret < 0) goto exit; @@ -881,8 +966,13 @@ static int sriov_init(struct pci_dev *dev, int pos) static void sriov_release(struct pci_dev *dev) { + int i; + BUG_ON(dev->sriov->num_VFs); + for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) + pci_iov_resource_do_restore(dev, i + PCI_IOV_RESOURCES); + if (dev != dev->sriov->dev) pci_dev_put(dev->sriov->dev); diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index e763b3fd4c7a2..47ed2633232aa 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -385,6 +385,7 @@ struct pci_sriov { u16 subsystem_vendor; /* VF subsystem vendor */ u16 subsystem_device; /* VF subsystem device */ resource_size_t barsz[PCI_SRIOV_NUM_BARS]; /* VF BAR size */ + bool rebar_extend[PCI_SRIOV_NUM_BARS]; /* Resize VF BAR */ bool drivers_autoprobe; /* Auto probing of VFs by driver */ }; diff --git a/include/linux/pci.h b/include/linux/pci.h index 4cf89a4b4cbcf..c007119da7b3d 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -2364,6 +2364,7 @@ int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs); int pci_sriov_get_totalvfs(struct pci_dev *dev); int pci_sriov_configure_simple(struct pci_dev *dev, int nr_virtfn); resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno); +int pci_iov_resource_extend(struct pci_dev *dev, int resno, bool enable); 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LMEM is partitioned between multiple VFs, and we expect that the more VFs we have, the less LMEM is assigned to each VF. This means that we can achieve full LMEM BAR access without the need to attempt full VF LMEM BAR resize via pci_resize_resource(). Signed-off-by: Michał Winiarski --- drivers/gpu/drm/xe/regs/xe_bars.h | 1 + drivers/gpu/drm/xe/xe_sriov_pf.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/xe/regs/xe_bars.h b/drivers/gpu/drm/xe/regs/xe_bars.h index ce05b6ae832f1..880140d6ccdca 100644 --- a/drivers/gpu/drm/xe/regs/xe_bars.h +++ b/drivers/gpu/drm/xe/regs/xe_bars.h @@ -7,5 +7,6 @@ #define GTTMMADR_BAR 0 /* MMIO + GTT */ #define LMEM_BAR 2 /* VRAM */ +#define VF_LMEM_BAR 9 /* VF VRAM */ #endif diff --git a/drivers/gpu/drm/xe/xe_sriov_pf.c b/drivers/gpu/drm/xe/xe_sriov_pf.c index 0f721ae17b266..a26719b87ac1e 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf.c @@ -4,7 +4,9 @@ */ #include +#include +#include "regs/xe_bars.h" #include "xe_assert.h" #include "xe_device.h" #include "xe_module.h" @@ -80,8 +82,14 @@ bool xe_sriov_pf_readiness(struct xe_device *xe) */ int xe_sriov_pf_init_early(struct xe_device *xe) { + int err; + xe_assert(xe, IS_SRIOV_PF(xe)); + err = pci_iov_resource_extend(to_pci_dev(xe->drm.dev), VF_LMEM_BAR, true); + if (err) + xe_sriov_info(xe, "Failed to extend VF LMEM BAR: %d", err); + return drmm_mutex_init(&xe->drm, &xe->sriov.pf.master_lock); }