From patchwork Sun Sep 22 17:42:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13809180 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 070A3CF9C69 for ; Sun, 22 Sep 2024 17:45:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=sAjYhVQ4C8qjWITifRAvYNMOE8p4qGOmbG7rB+b/sOU=; b=MV6tMUSiEi6DXNpPeov4EcLzro DXnnlQ0dhWyQ4T0lWSqTqbVG6B1Fh0A2oFmK819fqaqtZ+P6uDY6hkrkO70YdDH9YBizXaYIjtYhx Uqxjw6XstkuVh83BuiNdlFt7iHMmpgdCz1mo2obSn0LI8pnfngrvEi8ny90ZquCz6At+frYi0HRC0 zGUnGV2y/6Qf5So90Deh0CMqW00fC14qD/CI51pikoxTkSAsJ+O2mQOuXPLtB0y08m4Grv2558ryb +XPX+7d3y0iDh3UwhSfmfPGZpmjzRQc0IS7GYQNbGsaWmAUkBOL1iCTH/H4hcDHBmL4oliqXwJRDP yGNnUThw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1ssQeD-0000000FVqv-3CYj; Sun, 22 Sep 2024 17:45:25 +0000 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1ssQcH-0000000FVZV-42KL for linux-arm-kernel@lists.infradead.org; Sun, 22 Sep 2024 17:43:27 +0000 Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-42cb6f3a5bcso46045005e9.2 for ; Sun, 22 Sep 2024 10:43:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1727027004; x=1727631804; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sAjYhVQ4C8qjWITifRAvYNMOE8p4qGOmbG7rB+b/sOU=; b=ep8vHSwoHuzrONZzgTER0wHQyzLwHreVcLSwcXLwnnzGk+Px7FfTSE471W5ew1ohAX 6NiIeEVuAbF9SI/fLtP01qUqFMRptJ9sEhIE5qXt6ATQQBm27M/QP9eIt2Hr95eL49mP eKxw+hFREamDuFRwUKJmueQVw+VHJsW2Vv/UgawWKZxuBuBZv1/BiSWEQTZ0pABGXHzo BGSF5zGM8/ELDdSYbfNL1X+67hDKbhbMaJah0COzHvQ1RgqyXexLX4PqtMss7H11UIvZ UNKKjykxVqYD/4gFG5ZTvuMNLGNrLGjwqjawnwcoQYxS4uI7bAqbaTd/QU91OHicnp94 VWrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727027004; x=1727631804; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sAjYhVQ4C8qjWITifRAvYNMOE8p4qGOmbG7rB+b/sOU=; b=AwMIbziLELCNCVSDGvX+7EVae6ZQOf27st0adyE65+2viw6cNAccYRxWIqwdt4gL24 hth6+fxKIXwIPmc69ChvAs8rBM3P/rMwhZblZGIIBZQqe8H6Ac31E1c3fd66ZyCyPp1t Y6AMjRE9kCLcU3ZjhNP2ql6Tr6B4qB/SH1Vvc87SHyMGp17LBcNsvFmSzooVfaa7XGcP PuWvpVxMN7pTzoemexIzToTcoqmF8DHEm7d9ms/nZYElYLzkYZ0ggr3QtRL83YFjLSd0 Hr7BrqwylZbJbi0YEO8HlEi+/gmIurMJLTs+jjUuFxAS7UIKRzr168Q9MSEaluOZ2e7B mY+g== X-Forwarded-Encrypted: i=1; AJvYcCXMkHpfyx1QFnX5on1bNV/kkTw2zQoczwu6mBESNE0NukK75jNz3QQoIY+1Xs+E4EGvZO5EHPYR+ZQYtHH3M0UY@lists.infradead.org X-Gm-Message-State: AOJu0YwBwhGMfX/ThAed9XcREqb8MY1iED5HqXMXjh6HpODBgU3kNBrH us0pgX3K7EcEcQOJqIUjDBXJcbLAFeeBvqyqwdwZ1E/NVgnhK+FG X-Google-Smtp-Source: AGHT+IHp7HvXth4+/t06EUgh6Jxqi0dI/PkunLPhvuAKvjxVJB+S7Y/BjsFPWYMR3mh0rKxVkNkSRA== X-Received: by 2002:a05:600c:1e23:b0:42c:bcc8:5882 with SMTP id 5b1f17b1804b1-42e7abe418fmr105816945e9.7.1727027003879; Sun, 22 Sep 2024 10:43:23 -0700 (PDT) Received: from playground.localdomain ([86.127.146.72]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42e7ae60ad0sm80758535e9.1.2024.09.22.10.43.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Sep 2024 10:43:22 -0700 (PDT) From: Laurentiu Mihalcea To: Rob Herring , Krzysztof Kozlowski , Shawn Guo , Philipp Zabel , Liu Ying , Sascha Hauer , Conor Dooley Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 1/3] dt-bindings: reset: add schema for imx8ulp SIM reset Date: Sun, 22 Sep 2024 13:42:23 -0400 Message-Id: <20240922174225.75948-2-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240922174225.75948-1-laurentiumihalcea111@gmail.com> References: <20240922174225.75948-1-laurentiumihalcea111@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240922_104326_013587_FCACD789 X-CRM114-Status: GOOD ( 13.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Laurentiu Mihalcea Add schema for imx8ulp's SIM reset controller. Signed-off-by: Liu Ying Signed-off-by: Laurentiu Mihalcea Reviewed-by: Krzysztof Kozlowski --- .../reset/nxp,imx8ulp-avd-sim-reset.yaml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml diff --git a/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml b/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml new file mode 100644 index 000000000000..f6797966fd35 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/nxp,imx8ulp-avd-sim-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8ULP System Integration Module Reset Controller + +maintainers: + - Liu Ying + +description: + Some instances of i.MX8ULP's SIM may offer control over the reset of some + components of a certain domain (example - AVD-SIM). + +properties: + compatible: + items: + - enum: + - nxp,imx8ulp-avd-sim-reset + - const: syscon + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + '#reset-cells': + const: 1 + + mux-controller: + $ref: /schemas/mux/reg-mux.yaml# + +required: + - compatible + - reg + - clocks + - '#reset-cells' + - mux-controller + +additionalProperties: false + +examples: + - | + #include + syscon@2da50000 { + compatible = "nxp,imx8ulp-avd-sim-reset", "syscon"; + reg = <0x2da50000 0x38>; + clocks = <&pcc5 IMX8ULP_CLK_AVD_SIM>; + #reset-cells = <1>; + + mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x8 0x00000200>; + }; + }; From patchwork Sun Sep 22 17:42:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13809181 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 89263CF9C69 for ; Sun, 22 Sep 2024 17:46:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=bwzmLNpjWJRdVldJqN02tTMnPCndIPTBIEsSbyh7yKo=; b=xVQd1xbdW/2dFoMOMCMOb8cadr 7pr9h1OAnkn4zd9gHJAt9AKJpaanpxt6pqsYmbCzL5Jbq0NIqsf0cmLMh1P/pj8mqjPnLf9vGVyrA gOnG8Ttq6Uvqb1SnF9aa5rGAacQ8ma0hVbEienoG5SqardjiRhqYcw2zbOLWpsVyivBbrthXh6Avv ydY69JpqesQJ0cqUOSjdjwthmyjiWhftWr+xpXSQ7IrGxWhn9pZn/BNlM9NjwqRbtWYPokEQpkf+a fkz708MoRSw7A6GOCZLXtu/TA8CPZnlPk+cABlSD9inbSLJTO1C5FgFqKtQw3zAWimk+G/sNhDDt0 tNmlki1w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1ssQfI-0000000FVwB-0OaQ; Sun, 22 Sep 2024 17:46:32 +0000 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1ssQcN-0000000FVZx-2a99 for linux-arm-kernel@lists.infradead.org; Sun, 22 Sep 2024 17:43:32 +0000 Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-374ba78f192so2620608f8f.3 for ; Sun, 22 Sep 2024 10:43:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1727027010; x=1727631810; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bwzmLNpjWJRdVldJqN02tTMnPCndIPTBIEsSbyh7yKo=; b=NS+WydR4jbioA3lNweft7v4rbR8MRLj7ki9wIlvR9TRR4H7c3fSBX/GfTxqTMTbwnz v94FqXzSYHEqQAgnM059cDSXegzNfXw2viTrPWd+LqE+4UXfZEj+Udd4woCf4JSnSDN6 plZnl41iGcaWmlR3iokgqRjvOAQTuRUdqfdLGRM/qH0soSf8LS/N3b/WiVuZtzcd43+X u3ctAFcP8XUvFY2Rc2wTAU5cBIyvN4TONMkEaXWSL2n4nQUieirBOkb7GO8j161nuDF6 U5ZXL/47FBIr0iNvmUzPSq8qrl+ZKjqSeMZPiVGkLofGYGFCVXHyJ60+JjBiNYWY10RO 2ZVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727027010; x=1727631810; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bwzmLNpjWJRdVldJqN02tTMnPCndIPTBIEsSbyh7yKo=; b=Wx6GW9Gcy9A9sYqVuKKFGxgdRsVWZLCE+FvuHom9QvtCQ0f5kGTx6DmWteg6jXoNcL gysG+MQCOzG8mi/HXeZ3ugLPGVmu05XwuYQeB8yMIkY/UeI4e4XUj6QyxR4T0GvM6o2E ICVkRf1XXx+dfbI3RnCdEnU/aRTo3i8dcFHl0IFsXnWEagRTtX5U4kBBJMdicZ+u0CiC SIhXok878Om4BgwjtuqKTprT4Al3s6hFqStGXKaH/mqlrPqiJ4vgXRSk5YagS4uUa3AV bI/2j1mU4nrh6GpzWs5KTmR5658dTRwQOQ6d4/78HDe+nqPZwmn8DMOgIXDU/FLqnWTI CclQ== X-Forwarded-Encrypted: i=1; AJvYcCUgh2FI8GVn5/1Bpqe+jzRy58b6TJWjAMlkSAqLZHjSis6ZdCZcXsYAbJ4G6y6scahr0ArRMHhxpgb+fxcJXMVP@lists.infradead.org X-Gm-Message-State: AOJu0YwYsYtaCdjFbdtu6jrnv+j2r2CoIhW5N/8mCC6Zr76DUGzp644x Dis2tVqdfPBuljcy+4Hvjea/pGt/sl8AxbNt9VHO91cO7vR5u/+P X-Google-Smtp-Source: AGHT+IGmf+SEoc4Nnw3sjCTGVuvVFiaxnZHqQwUZud8R56zHPcES+eUxclGIeTe0JCAzyU1BBYYN8w== X-Received: by 2002:a5d:6947:0:b0:374:c040:b015 with SMTP id ffacd0b85a97d-37a43197c90mr4221315f8f.57.1727027009474; Sun, 22 Sep 2024 10:43:29 -0700 (PDT) Received: from playground.localdomain ([86.127.146.72]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42e7ae60ad0sm80758535e9.1.2024.09.22.10.43.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Sep 2024 10:43:28 -0700 (PDT) From: Laurentiu Mihalcea To: Rob Herring , Krzysztof Kozlowski , Shawn Guo , Philipp Zabel , Liu Ying , Sascha Hauer , Conor Dooley Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 2/3] reset: add driver for imx8ulp SIM reset controller Date: Sun, 22 Sep 2024 13:42:24 -0400 Message-Id: <20240922174225.75948-3-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240922174225.75948-1-laurentiumihalcea111@gmail.com> References: <20240922174225.75948-1-laurentiumihalcea111@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240922_104331_670979_0710C456 X-CRM114-Status: GOOD ( 21.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Laurentiu Mihalcea Certain components can be reset via the SIM module. Add reset controller driver for the SIM module to allow drivers for said components to control the reset signal(s). Signed-off-by: Liu Ying Signed-off-by: Laurentiu Mihalcea --- drivers/reset/Kconfig | 7 ++ drivers/reset/Makefile | 1 + drivers/reset/reset-imx8ulp-sim.c | 106 ++++++++++++++++++++++++++++++ 3 files changed, 114 insertions(+) create mode 100644 drivers/reset/reset-imx8ulp-sim.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 5484a65f66b9..492081354d03 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -113,6 +113,13 @@ config RESET_IMX8MP_AUDIOMIX help This enables the reset controller driver for i.MX8MP AudioMix +config RESET_IMX8ULP_SIM + tristate "i.MX8ULP SIM Reset Driver" + depends on ARCH_MXC + help + This enables the SIM (System Integration Module) reset driver + for i.MX8ULP SoC. + config RESET_INTEL_GW bool "Intel Reset Controller Driver" depends on X86 || COMPILE_TEST diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 4411a2a124d7..38354e701811 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_RESET_GPIO) += reset-gpio.o obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o obj-$(CONFIG_RESET_IMX7) += reset-imx7.o obj-$(CONFIG_RESET_IMX8MP_AUDIOMIX) += reset-imx8mp-audiomix.o +obj-$(CONFIG_RESET_IMX8ULP_SIM) += reset-imx8ulp-sim.o obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o obj-$(CONFIG_RESET_K210) += reset-k210.o obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o diff --git a/drivers/reset/reset-imx8ulp-sim.c b/drivers/reset/reset-imx8ulp-sim.c new file mode 100644 index 000000000000..04ff11d41e10 --- /dev/null +++ b/drivers/reset/reset-imx8ulp-sim.c @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/* + * Copyright 2024 NXP + */ + +#include +#include +#include +#include +#include +#include +#include + +#define IMX8ULP_SIM_RESET_MIPI_DSI_RST_DPI_N 0 +#define IMX8ULP_SIM_RESET_MIPI_DSI_RST_ESC_N 1 +#define IMX8ULP_SIM_RESET_MIPI_DSI_RST_BYTE_N 2 + +#define IMX8ULP_SIM_RESET_NUM 3 + +#define AVD_SIM_SYSCTRL0 0x8 + +struct imx8ulp_sim_reset { + struct reset_controller_dev rcdev; + struct regmap *regmap; +}; + +static const u32 imx8ulp_sim_reset_bits[IMX8ULP_SIM_RESET_NUM] = { + [IMX8ULP_SIM_RESET_MIPI_DSI_RST_DPI_N] = BIT(3), + [IMX8ULP_SIM_RESET_MIPI_DSI_RST_ESC_N] = BIT(4), + [IMX8ULP_SIM_RESET_MIPI_DSI_RST_BYTE_N] = BIT(5), +}; + +static inline struct imx8ulp_sim_reset * +to_imx8ulp_sim_reset(struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct imx8ulp_sim_reset, rcdev); +} + +static int imx8ulp_sim_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct imx8ulp_sim_reset *simr = to_imx8ulp_sim_reset(rcdev); + const u32 bit = imx8ulp_sim_reset_bits[id]; + + return regmap_update_bits(simr->regmap, AVD_SIM_SYSCTRL0, bit, 0); +} + +static int imx8ulp_sim_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct imx8ulp_sim_reset *simr = to_imx8ulp_sim_reset(rcdev); + const u32 bit = imx8ulp_sim_reset_bits[id]; + + return regmap_update_bits(simr->regmap, AVD_SIM_SYSCTRL0, bit, bit); +} + +static const struct reset_control_ops imx8ulp_sim_reset_ops = { + .assert = imx8ulp_sim_reset_assert, + .deassert = imx8ulp_sim_reset_deassert, +}; + +static const struct of_device_id imx8ulp_sim_reset_dt_ids[] = { + { .compatible = "nxp,imx8ulp-avd-sim-reset", }, + { /* sentinel */ }, +}; + +static int imx8ulp_sim_reset_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct imx8ulp_sim_reset *simr; + int ret; + + simr = devm_kzalloc(dev, sizeof(*simr), GFP_KERNEL); + if (!simr) + return -ENOMEM; + + simr->regmap = syscon_node_to_regmap(dev->of_node); + if (IS_ERR(simr->regmap)) + return dev_err_probe(&pdev->dev, PTR_ERR(simr->regmap), + "failed to get regmap\n"); + + simr->rcdev.owner = THIS_MODULE; + simr->rcdev.nr_resets = IMX8ULP_SIM_RESET_NUM; + simr->rcdev.ops = &imx8ulp_sim_reset_ops; + simr->rcdev.of_node = dev->of_node; + + ret = devm_of_platform_populate(dev); + if (ret) + return ret; + + return devm_reset_controller_register(dev, &simr->rcdev); +} + +static struct platform_driver imx8ulp_sim_reset_driver = { + .probe = imx8ulp_sim_reset_probe, + .driver = { + .name = KBUILD_MODNAME, + .of_match_table = imx8ulp_sim_reset_dt_ids, + }, +}; +module_platform_driver(imx8ulp_sim_reset_driver); + +MODULE_AUTHOR("Liu Ying "); +MODULE_DESCRIPTION("NXP i.MX8ULP System Integration Module Reset driver"); +MODULE_LICENSE("GPL"); From patchwork Sun Sep 22 17:42:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13809182 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A5907CF9C69 for ; Sun, 22 Sep 2024 17:47:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=wXLPtmmwbw0kH9maBt8kI0QUZhZ3U60BovT7L6yY3xs=; b=Odvq/cVs/8MmWMUC1US3Igyyiu W5TTJpTTby8UGVBuM08ggApHgjSepyqvDhcT+SpWQtLpWrg48kapalfwhaG4+JLXprvjM0uEzcLTH 0KUAl8hL3Na0VDOorB399tNtqCKDy6LGJRwj24oKh10CyyvMWpGH4XthdPMbBPVwEwzX1lfrcxcIh UswMwHDhLD5d9JlcA752odI7qEpUA42yOYHBv+a2SQyVUg5xx0C+7jPnfuu5FVHFBkvPgTZ9HIZoZ yVW0q8cjE6vizs2/j4i2i+YSHWTy4DZVVRO+GPMd6C3uB6i9uRkcFYtyGQaZ2RKpkUH8Ip0rNEVqY xo0ha1cA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1ssQgO-0000000FW7J-0tGO; Sun, 22 Sep 2024 17:47:40 +0000 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1ssQcR-0000000FVaN-0uoj for linux-arm-kernel@lists.infradead.org; Sun, 22 Sep 2024 17:43:36 +0000 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-42cba6cdf32so31834675e9.1 for ; Sun, 22 Sep 2024 10:43:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1727027014; x=1727631814; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wXLPtmmwbw0kH9maBt8kI0QUZhZ3U60BovT7L6yY3xs=; b=c369NtglWq+EXJnRa+iU94SdJ4Agf674XF5OzLfusS+VOeOiIxUBhpUo1WTTcMoCLM JNt3T0OmsEwMKhBNFoQ0RpeQ8lX6Wb6hmQKWX+tODuipaRZnuX/bJGw76weL+g1bW4wA gxzN0lFIs+/5DzuDLddS14cgouphZNQXH1h7CjlxbXuV8Xweeo3p9vchTaqkjwurYD9z 4Fc58Ywhdo2gr3O3ZiMUh2r0RE9a24O5YKah6jQmtJcPTd2GmN/uoawhiiJw9M+FsQnV Rdv92Ge/COKv9521RdkQ+KEzeRYZUmsjVM5NeUg+dLeBQzaZdIOOr07QOgt26mexy4tc tfPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727027014; x=1727631814; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wXLPtmmwbw0kH9maBt8kI0QUZhZ3U60BovT7L6yY3xs=; b=NkUBRl1HMw3VD9qy/5HAI1MRvuLNEO9ykHGypwTdTL9wJPUa5lNGKXm9tRPvy2bt4I zQf900jvdk6L3MMQIJzdvtDkm/IvhvXTJUuMTecG6e+Xj9bwtCGRzq84SPh4IV+OqLtG gLeqgeGQ8j/knwfGcHAo44Lew3Ky3GLDKXFgwJRRUS07Co3JJyR6Lz/NgcWPYQvm1aaj OWckLho/IQgqcpOZME8R0wcnt1UmmBsz1Xia9e3xpw8vzpyutKbNb+Gy5U1Cu6nk+5li xObKwxmbdwsVH8ADjEgwCEYfBECG17ctsz0EoL02Gy+/SVGzQJ/VeFP0NAOfmSoZR9mn 9ctw== X-Forwarded-Encrypted: i=1; AJvYcCVGHllGNri++aTbzkySwW8QEXqsu/5qkYh6haUw9IPFCqj8g/NmKN6/Q+PdTjcr1OMcQNBECxLuMc74Oo8uyi+w@lists.infradead.org X-Gm-Message-State: AOJu0YxSenXaMP4ADsonqXSQyk1bpLmZdlmNEeuKEiNMHkEmvNoHMFtB /vkjDUx//EGscftoAJkBXlP5Qpziqd7fmdf2Fq3dtyQhQYulOfP3 X-Google-Smtp-Source: AGHT+IHphXu0dGNfZ9BDNAw2gAnN60BBDuqllWZxOcm2vfWqG7Fy/AldhWq3sNJHPEbqGKEbIpHQ2w== X-Received: by 2002:a05:600c:4695:b0:42c:ae30:fc4d with SMTP id 5b1f17b1804b1-42e7abe12b1mr74954615e9.7.1727027013486; Sun, 22 Sep 2024 10:43:33 -0700 (PDT) Received: from playground.localdomain ([86.127.146.72]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42e7ae60ad0sm80758535e9.1.2024.09.22.10.43.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Sep 2024 10:43:32 -0700 (PDT) From: Laurentiu Mihalcea To: Rob Herring , Krzysztof Kozlowski , Shawn Guo , Philipp Zabel , Liu Ying , Sascha Hauer , Conor Dooley Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 3/3] arm64: dts: imx8ulp: add AVD-SIM node Date: Sun, 22 Sep 2024 13:42:25 -0400 Message-Id: <20240922174225.75948-4-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240922174225.75948-1-laurentiumihalcea111@gmail.com> References: <20240922174225.75948-1-laurentiumihalcea111@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240922_104335_286608_17ADDA4B X-CRM114-Status: GOOD ( 10.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Laurentiu Mihalcea Add node for imx8ulp's AVD-SIM module. This also includes its children. Signed-off-by: Liu Ying Signed-off-by: Laurentiu Mihalcea --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index e32d5afcf4a9..1ffa4da23042 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -614,6 +614,19 @@ per_bridge5: bus@2d800000 { #size-cells = <1>; ranges; + avd_sim: syscon@2da50000 { + compatible = "nxp,imx8ulp-avd-sim-reset", "syscon"; + reg = <0x2da50000 0x38>; + clocks = <&pcc5 IMX8ULP_CLK_AVD_SIM>; + #reset-cells = <1>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x8 0x00000200>; + }; + }; + cgc2: clock-controller@2da60000 { compatible = "fsl,imx8ulp-cgc2"; reg = <0x2da60000 0x10000>;