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[34.127.75.226]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-71afc9c7a14sm2923078b3a.218.2024.09.25.09.25.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 Sep 2024 09:25:19 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org Cc: jthies@google.com, pmalani@chromium.org, akuchynski@google.com, Abhishek Pandit-Subedi , Benson Leung , Guenter Roeck , chrome-platform@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 5/8] platform/chrome: cros_ec_typec: Update partner altmode active Date: Wed, 25 Sep 2024 09:25:06 -0700 Message-ID: <20240925092505.5.I083bf9188947be8cb7460211cfdf3233370a28f6@changeid> X-Mailer: git-send-email 2.46.0.792.g87dc391469-goog In-Reply-To: <20240925162513.435177-1-abhishekpandit@chromium.org> References: <20240925162513.435177-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Mux configuration is often the final piece of mode entry and can be used to determine whether a partner altmode is active. When mux configuration is done, use the active port altmode's SVID to set the partner active field for all partner alt modes. Signed-off-by: Abhishek Pandit-Subedi --- drivers/platform/chrome/cros_ec_typec.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c index 4d305876ec08..6c0228981627 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -618,6 +618,7 @@ static int cros_typec_configure_mux(struct cros_typec_data *typec, int port_num, }; struct ec_params_usb_pd_mux_ack mux_ack; enum typec_orientation orientation; + struct cros_typec_altmode_node *node, *n; int ret; ret = cros_ec_cmd(typec->ec, 0, EC_CMD_USB_PD_MUX_INFO, @@ -676,6 +677,16 @@ static int cros_typec_configure_mux(struct cros_typec_data *typec, int port_num, port->mux_flags); } + /* Iterate all partner alt-modes and set the active alternate mode. */ + list_for_each_entry_safe(node, n, &port->partner_mode_list, list) { + if (port->state.alt != NULL && + node->amode->svid == port->state.alt->svid) { + typec_altmode_update_active(node->amode, true); + } else { + typec_altmode_update_active(node->amode, false); + } + } + mux_ack: if (!typec->needs_mux_ack) return ret; From patchwork Wed Sep 25 16:25:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Pandit-Subedi X-Patchwork-Id: 13812319 Received: from mail-pf1-f173.google.com (mail-pf1-f173.google.com [209.85.210.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD5C912E1C2 for ; Wed, 25 Sep 2024 16:25:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727281525; cv=none; b=LEMVd4h0Xfa0uudzd+Kkc7MBwhZEb+aOSQPEEQXA9jLwjaUw2TywIvpaicpsNkWZeSXxjn/fSs9sA0xDfrdgxrC6qrGfGbiGOP2EmE4aQ9wDhHnNks3Vq0V7MSotcWe3SkGDeRbNVO+E6pP5gtFRZMqfZyHR4rVcNKDZ31rR9aQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727281525; c=relaxed/simple; bh=bkyZ9ZDSwtJW3YVcxQDnmy3QDNnpmwj3JZoEu7Pj5cs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=C6K3nVeXMNbY6/ylYq62W3qMOny7u7Dw1m4qTo7q3VQxHOUgnL95iuzzaOYd+/tVLBm0jU/V7nsugW6eWaYD1swUGl1wa56UnYMZHexFcPI48NjG2m6DbZzCxBEba7kQaUePgqlSFCctFNjnWxE0rALfkWd4iytO6Mn/9wzzLpI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org; spf=pass smtp.mailfrom=chromium.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b=T3/VDU0I; arc=none smtp.client-ip=209.85.210.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="T3/VDU0I" Received: by mail-pf1-f173.google.com with SMTP id d2e1a72fcca58-718d91eef2eso64569b3a.1 for ; Wed, 25 Sep 2024 09:25:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1727281521; x=1727886321; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+7njd5uGAB08nW3CyyAe8XQE/+AB60p3g0lfb6j9aI4=; b=T3/VDU0I7eM2g57FrqpegqF9uuNt9n6aGSeR8/Jt45zf8Qxlxw0jMQxzsD4J3dwSpt xbkMBJ0jMLEMTkfOegRfeFVJuSIVVNbrsqUBsIDllfZe8VpW8ORDtq+q/AfqAhhBUX6C 56nSMQYeZHDrNNm7fbdqsp2AJMorAUc+Z/VpM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727281521; x=1727886321; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+7njd5uGAB08nW3CyyAe8XQE/+AB60p3g0lfb6j9aI4=; b=tjzapSNpaJsF40Pcv8RWw+22U2odbNZ4SUvJUfHurqpTnKgtWcl125ebE0xfMFHg4H gBQrhKl650BFT8iSK2JJbs3zLcGQ8Um8K190O5WWyTfb5aPj9YA33Jm/WTKW5bAiDsiJ H23CODE6hTu6+l6w88+UJdCjNIlEBZtqpguZF2nvH/sLuNLYni/2n2dw5ZiyApwB9d+f U0MuO9Pe1sH12n6nYrmzClhCtFLD/CeZ8RAm/597i8DWIDpaUTl8hrNC/diu0KuJXJm7 0Fvsd911KA3vJoGD09j/Wk6i6eovifR0I82rrdDeXUwTHkRwlpqJUgOyQ8D2uafinLlq Y44A== X-Forwarded-Encrypted: i=1; AJvYcCVGCYUqbWTrJEYpU7/lih7pZxKe+0hs7HqxjPDxYWVIWipxQnfv/39QPajBa0uyntjIxouMEKayUsMk49qSTxg=@lists.linux.dev X-Gm-Message-State: AOJu0YzCDHAq2/5b0WcEeHGwEfTX+/dRlnIpNCAaEFMEGD6PBN+W6XF9 G/loXYXX3PB402ruxVJX/IWUcG1QQJ2mraXOrKUeIwIsqjj252xoPJ1Rgf20zg== X-Google-Smtp-Source: AGHT+IEaVeEK6z0ZYLb5SCEy1Mb0P3dcErpBaGT2V8h4jllv9PEeYo8ay6xtZlOSUTmdt0lIwAG7HA== X-Received: by 2002:a05:6a00:10d0:b0:70d:2a1b:422c with SMTP id d2e1a72fcca58-71b1931af7dmr302805b3a.7.1727281521035; Wed, 25 Sep 2024 09:25:21 -0700 (PDT) Received: from localhost (226.75.127.34.bc.googleusercontent.com. [34.127.75.226]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-71afc834196sm3045610b3a.13.2024.09.25.09.25.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 Sep 2024 09:25:20 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org Cc: jthies@google.com, pmalani@chromium.org, akuchynski@google.com, Abhishek Pandit-Subedi , Benson Leung , Guenter Roeck , chrome-platform@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 6/8] platform/chrome: cros_ec_typec: Displayport support Date: Wed, 25 Sep 2024 09:25:07 -0700 Message-ID: <20240925092505.6.I142fc0c09df58689b98f0cebf1c5e48b9d4fa800@changeid> X-Mailer: git-send-email 2.46.0.792.g87dc391469-goog In-Reply-To: <20240925162513.435177-1-abhishekpandit@chromium.org> References: <20240925162513.435177-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support for entering and exiting displayport alt-mode on systems using AP driven alt-mode. Signed-off-by: Abhishek Pandit-Subedi --- MAINTAINERS | 5 +- drivers/platform/chrome/Makefile | 2 + drivers/platform/chrome/cros_ec_typec.c | 13 +- drivers/platform/chrome/cros_ec_typec.h | 1 + drivers/platform/chrome/cros_typec_altmode.h | 34 +++ .../platform/chrome/cros_typec_displayport.c | 247 ++++++++++++++++++ 6 files changed, 299 insertions(+), 3 deletions(-) create mode 100644 drivers/platform/chrome/cros_typec_altmode.h create mode 100644 drivers/platform/chrome/cros_typec_displayport.c diff --git a/MAINTAINERS b/MAINTAINERS index 10430778c998..d8baf38cacc6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5282,11 +5282,12 @@ F: include/linux/platform_data/cros_usbpd_notify.h CHROMEOS EC USB TYPE-C DRIVER M: Prashant Malani +M: Benson Leung +M: Abhishek Pandit-Subedi L: chrome-platform@lists.linux.dev S: Maintained F: drivers/platform/chrome/cros_ec_typec.* -F: drivers/platform/chrome/cros_typec_switch.c -F: drivers/platform/chrome/cros_typec_vdm.* +F: drivers/platform/chrome/cros_typec_* CHROMEOS HPS DRIVER M: Dan Callaghan diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile index 2dcc6ccc2302..fe6c5234ac27 100644 --- a/drivers/platform/chrome/Makefile +++ b/drivers/platform/chrome/Makefile @@ -18,7 +18,9 @@ obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o obj-$(CONFIG_CROS_EC_UART) += cros_ec_uart.o cros_ec_lpcs-objs := cros_ec_lpc.o cros_ec_lpc_mec.o cros-ec-typec-objs := cros_ec_typec.o cros_typec_vdm.o +cros-ec-typec-$(CONFIG_TYPEC_DP_ALTMODE) += cros_typec_displayport.o obj-$(CONFIG_CROS_EC_TYPEC) += cros-ec-typec.o + obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpcs.o obj-$(CONFIG_CROS_EC_PROTO) += cros_ec_proto.o cros_ec_trace.o obj-$(CONFIG_CROS_KBD_LED_BACKLIGHT) += cros_kbd_led_backlight.o diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c index 6c0228981627..f9221d0d95f5 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -18,6 +18,7 @@ #include "cros_ec_typec.h" #include "cros_typec_vdm.h" +#include "cros_typec_altmode.h" #define DRV_NAME "cros-ec-typec" @@ -293,12 +294,16 @@ static int cros_typec_register_port_altmodes(struct cros_typec_data *typec, desc.svid = USB_TYPEC_DP_SID; desc.mode = USB_TYPEC_DP_MODE; desc.vdo = DP_PORT_VDO; - amode = typec_port_register_altmode(port->port, &desc); + amode = cros_typec_register_displayport(port, &desc, + typec->ap_driven_altmode); if (IS_ERR(amode)) return PTR_ERR(amode); port->port_altmode[CROS_EC_ALTMODE_DP] = amode; + +#if !IS_ENABLED(CONFIG_TYPEC_DP_ALTMODE) typec_altmode_set_drvdata(amode, port); amode->ops = &port_amode_ops; +#endif /* * Register TBT compatibility alt mode. The EC will not enter the mode @@ -575,6 +580,10 @@ static int cros_typec_enable_dp(struct cros_typec_data *typec, if (!ret) ret = typec_mux_set(port->mux, &port->state); + if (!ret) + cros_typec_displayport_status_update(port->state.alt, + port->state.data); + return ret; } @@ -1254,6 +1263,8 @@ static int cros_typec_probe(struct platform_device *pdev) typec->typec_cmd_supported = cros_ec_check_features(ec_dev, EC_FEATURE_TYPEC_CMD); typec->needs_mux_ack = cros_ec_check_features(ec_dev, EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK); + typec->ap_driven_altmode = cros_ec_check_features( + ec_dev, EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY); ret = cros_ec_cmd(typec->ec, 0, EC_CMD_USB_PD_PORTS, NULL, 0, &resp, sizeof(resp)); diff --git a/drivers/platform/chrome/cros_ec_typec.h b/drivers/platform/chrome/cros_ec_typec.h index deda180a646f..9fd5342bb0ad 100644 --- a/drivers/platform/chrome/cros_ec_typec.h +++ b/drivers/platform/chrome/cros_ec_typec.h @@ -39,6 +39,7 @@ struct cros_typec_data { struct work_struct port_work; bool typec_cmd_supported; bool needs_mux_ack; + bool ap_driven_altmode; }; /* Per port data. */ diff --git a/drivers/platform/chrome/cros_typec_altmode.h b/drivers/platform/chrome/cros_typec_altmode.h new file mode 100644 index 000000000000..a8b37a18c83a --- /dev/null +++ b/drivers/platform/chrome/cros_typec_altmode.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __CROS_TYPEC_ALTMODE_H__ +#define __CROS_TYPEC_ALTMODE_H__ + +struct cros_typec_port; +struct typec_altmode; +struct typec_altmode_desc; +struct typec_displayport_data; + +#if IS_ENABLED(CONFIG_TYPEC_DP_ALTMODE) +struct typec_altmode * +cros_typec_register_displayport(struct cros_typec_port *port, + struct typec_altmode_desc *desc, + bool ap_mode_entry); + +int cros_typec_displayport_status_update(struct typec_altmode *altmode, + struct typec_displayport_data *data); +#else +struct typec_altmode * +cros_typec_register_displayport(struct cros_typec_port *port, + struct typec_altmode_desc *desc, + bool ap_mode_entry) +{ + return typec_port_register_altmode(port->port, desc); +} + +int cros_typec_displayport_status_update(struct typec_altmode *altmode, + struct typec_displayport_data *data) +{ + return 0; +} +#endif +#endif /* __CROS_TYPEC_ALTMODE_H__ */ diff --git a/drivers/platform/chrome/cros_typec_displayport.c b/drivers/platform/chrome/cros_typec_displayport.c new file mode 100644 index 000000000000..bccd57290601 --- /dev/null +++ b/drivers/platform/chrome/cros_typec_displayport.c @@ -0,0 +1,247 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Alt-mode implementation for Displayport on ChromeOS EC. + * + * Copyright 2024 Google LLC + * Author: Abhishek Pandit-Subedi + */ +#include "cros_ec_typec.h" + +#include +#include + +#include "cros_typec_altmode.h" + +struct typec_dp_data { + struct typec_displayport_data data; + struct work_struct work; + + struct cros_typec_port *port; + struct typec_altmode *alt; + bool ap_mode_entry; + bool configured; + bool pending_status_update; + + u32 header; + u32 *vdo_data; + u8 vdo_size; +}; + +static void cros_typec_displayport_work(struct work_struct *work) +{ + struct typec_dp_data *data = + container_of(work, struct typec_dp_data, work); + + if (typec_altmode_vdm(data->alt, data->header, data->vdo_data, + data->vdo_size)) + dev_err(&data->alt->dev, "VDM 0x%x failed", data->header); + + data->header = 0; + data->vdo_data = NULL; + data->vdo_size = 0; +} + +static int cros_typec_displayport_enter(struct typec_altmode *alt, u32 *vdo) +{ + struct typec_dp_data *data = typec_altmode_get_drvdata(alt); + struct ec_params_typec_control req = { + .port = data->port->port_num, + .command = TYPEC_CONTROL_COMMAND_ENTER_MODE, + .mode_to_enter = CROS_EC_ALTMODE_DP, + }; + int svdm_version; + int ret; + + if (!data->ap_mode_entry) { + const struct typec_altmode *partner = + typec_altmode_get_partner(alt); + dev_warn(&partner->dev, + "EC does not support ap driven mode entry\n"); + return -EOPNOTSUPP; + } + + ret = cros_ec_cmd(data->port->typec_data->ec, 0, EC_CMD_TYPEC_CONTROL, + &req, sizeof(req), NULL, 0); + if (ret < 0) + return ret; + + svdm_version = typec_altmode_get_svdm_version(alt); + if (svdm_version < 0) + return svdm_version; + + data->header = VDO(USB_TYPEC_DP_SID, 1, svdm_version, CMD_ENTER_MODE); + data->header |= VDO_OPOS(USB_TYPEC_DP_MODE); + data->header |= VDO_CMDT(CMDT_RSP_ACK); + + data->vdo_data = NULL; + data->vdo_size = 1; + + schedule_work(&data->work); + + return ret; +} + +static int cros_typec_displayport_exit(struct typec_altmode *alt) +{ + struct typec_dp_data *data = typec_altmode_get_drvdata(alt); + struct ec_params_typec_control req = { + .port = data->port->port_num, + .command = TYPEC_CONTROL_COMMAND_EXIT_MODES, + }; + int svdm_version; + int ret; + + if (!data->ap_mode_entry) { + const struct typec_altmode *partner = + typec_altmode_get_partner(alt); + dev_warn(&partner->dev, + "EC does not support ap driven mode entry\n"); + return -EOPNOTSUPP; + } + + ret = cros_ec_cmd(data->port->typec_data->ec, 0, EC_CMD_TYPEC_CONTROL, + &req, sizeof(req), NULL, 0); + + if (ret < 0) + return ret; + + svdm_version = typec_altmode_get_svdm_version(alt); + if (svdm_version < 0) + return svdm_version; + + data->header = VDO(USB_TYPEC_DP_SID, 1, svdm_version, CMD_EXIT_MODE); + data->header |= VDO_OPOS(USB_TYPEC_DP_MODE); + data->header |= VDO_CMDT(CMDT_RSP_ACK); + + data->vdo_data = NULL; + data->vdo_size = 1; + + schedule_work(&data->work); + + return ret; +} + +int cros_typec_displayport_status_update(struct typec_altmode *altmode, + struct typec_displayport_data *data) +{ + struct typec_dp_data *dp_data = typec_altmode_get_drvdata(altmode); + + if (!dp_data->pending_status_update) { + dev_dbg(&altmode->dev, + "Got DPStatus without a pending request"); + return 0; + } + + if (dp_data->configured && dp_data->data.conf != data->conf) + dev_dbg(&altmode->dev, + "DP Conf doesn't match. Requested 0x%04x, Actual 0x%04x", + dp_data->data.conf, data->conf); + + dp_data->header |= VDO_CMDT(CMDT_RSP_ACK); + dp_data->data = *data; + dp_data->vdo_data = &dp_data->data.status; + dp_data->vdo_size = 2; + dp_data->pending_status_update = false; + + schedule_work(&dp_data->work); + return 0; +} + +static int cros_typec_displayport_vdm(struct typec_altmode *alt, u32 header, + const u32 *data, int count) +{ + struct typec_dp_data *dp_data = typec_altmode_get_drvdata(alt); + + int cmd_type = PD_VDO_CMDT(header); + int cmd = PD_VDO_CMD(header); + int svdm_version; + + if (!dp_data->ap_mode_entry) { + const struct typec_altmode *partner = + typec_altmode_get_partner(alt); + dev_warn(&partner->dev, + "EC does not support ap driven mode entry\n"); + return -EOPNOTSUPP; + } + + svdm_version = typec_altmode_get_svdm_version(alt); + if (svdm_version < 0) + return svdm_version; + + switch (cmd_type) { + case CMDT_INIT: + if (PD_VDO_SVDM_VER(header) < svdm_version) { + typec_partner_set_svdm_version(dp_data->port->partner, + PD_VDO_SVDM_VER(header)); + svdm_version = PD_VDO_SVDM_VER(header); + } + + dp_data->header = VDO(USB_TYPEC_DP_SID, 1, svdm_version, cmd); + dp_data->header |= VDO_OPOS(USB_TYPEC_DP_MODE); + + /* + * DP_CMD_CONFIGURE: We can't actually do anything with the + * provided VDO yet so just send back an ACK. + * + * DP_CMD_STATUS_UPDATE: We wait for Mux changes to send + * DPStatus Acks. + */ + switch (cmd) { + case DP_CMD_CONFIGURE: + dp_data->data.conf = *data; + dp_data->header |= VDO_CMDT(CMDT_RSP_ACK); + dp_data->configured = true; + schedule_work(&dp_data->work); + break; + case DP_CMD_STATUS_UPDATE: + dp_data->pending_status_update = true; + break; + default: + dp_data->header |= VDO_CMDT(CMDT_RSP_ACK); + schedule_work(&dp_data->work); + break; + } + + break; + default: + break; + } + + return 0; +} + +static const struct typec_altmode_ops cros_typec_displayport_ops = { + .enter = cros_typec_displayport_enter, + .exit = cros_typec_displayport_exit, + .vdm = cros_typec_displayport_vdm, +}; + +struct typec_altmode * +cros_typec_register_displayport(struct cros_typec_port *port, + struct typec_altmode_desc *desc, + bool ap_mode_entry) +{ + struct typec_altmode *alt; + struct typec_dp_data *data; + + alt = typec_port_register_altmode(port->port, desc); + if (IS_ERR(alt)) + return alt; + + data = devm_kzalloc(&alt->dev, sizeof(*data), GFP_KERNEL); + if (!data) { + typec_unregister_altmode(alt); + return ERR_PTR(-ENOMEM); + } + + INIT_WORK(&data->work, cros_typec_displayport_work); + data->alt = alt; + data->port = port; + data->ap_mode_entry = ap_mode_entry; + data->configured = false; + + typec_altmode_set_ops(alt, &cros_typec_displayport_ops); + typec_altmode_set_drvdata(alt, data); + + return alt; +} From patchwork Wed Sep 25 16:25:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Pandit-Subedi X-Patchwork-Id: 13812317 Received: from mail-pj1-f48.google.com (mail-pj1-f48.google.com [209.85.216.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5F1613B2B6 for ; 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[34.127.75.226]) by smtp.gmail.com with UTF8SMTPSA id 98e67ed59e1d1-2e06ccf0505sm1750144a91.0.2024.09.25.09.25.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 Sep 2024 09:25:21 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org Cc: jthies@google.com, pmalani@chromium.org, akuchynski@google.com, Abhishek Pandit-Subedi , Benson Leung , Guenter Roeck , chrome-platform@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 7/8] platform/chrome: cros_ec_typec: Thunderbolt support Date: Wed, 25 Sep 2024 09:25:08 -0700 Message-ID: <20240925092505.7.Ic61ced3cdfb5d6776435356061f12307da719829@changeid> X-Mailer: git-send-email 2.46.0.792.g87dc391469-goog In-Reply-To: <20240925162513.435177-1-abhishekpandit@chromium.org> References: <20240925162513.435177-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support for entering and exiting Thunderbolt alt-mode using AP driven alt-mode. Signed-off-by: Abhishek Pandit-Subedi --- drivers/platform/chrome/Makefile | 1 + drivers/platform/chrome/cros_ec_typec.c | 29 +-- drivers/platform/chrome/cros_typec_altmode.h | 14 ++ .../platform/chrome/cros_typec_thunderbolt.c | 184 ++++++++++++++++++ 4 files changed, 216 insertions(+), 12 deletions(-) create mode 100644 drivers/platform/chrome/cros_typec_thunderbolt.c diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile index fe6c5234ac27..da7a44738171 100644 --- a/drivers/platform/chrome/Makefile +++ b/drivers/platform/chrome/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_CROS_EC_UART) += cros_ec_uart.o cros_ec_lpcs-objs := cros_ec_lpc.o cros_ec_lpc_mec.o cros-ec-typec-objs := cros_ec_typec.o cros_typec_vdm.o cros-ec-typec-$(CONFIG_TYPEC_DP_ALTMODE) += cros_typec_displayport.o +cros-ec-typec-$(CONFIG_TYPEC_TBT_ALTMODE) += cros_typec_thunderbolt.o obj-$(CONFIG_CROS_EC_TYPEC) += cros-ec-typec.o obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpcs.o diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c index f9221d0d95f5..ec13d84d11b8 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -304,21 +304,26 @@ static int cros_typec_register_port_altmodes(struct cros_typec_data *typec, typec_altmode_set_drvdata(amode, port); amode->ops = &port_amode_ops; #endif - /* * Register TBT compatibility alt mode. The EC will not enter the mode - * if it doesn't support it, so it's safe to register it unconditionally - * here for now. + * if it doesn't support it and it will not enter automatically by + * design so we can use the |ap_driven_altmode| feature to check if we + * should register it. */ - memset(&desc, 0, sizeof(desc)); - desc.svid = USB_TYPEC_TBT_SID; - desc.mode = TYPEC_ANY_MODE; - amode = typec_port_register_altmode(port->port, &desc); - if (IS_ERR(amode)) - return PTR_ERR(amode); - port->port_altmode[CROS_EC_ALTMODE_TBT] = amode; - typec_altmode_set_drvdata(amode, port); - amode->ops = &port_amode_ops; + if (typec->ap_driven_altmode) { + memset(&desc, 0, sizeof(desc)); + desc.svid = USB_TYPEC_TBT_SID; + desc.mode = TYPEC_ANY_MODE; + amode = cros_typec_register_thunderbolt(port, &desc); + if (IS_ERR(amode)) + return PTR_ERR(amode); + port->port_altmode[CROS_EC_ALTMODE_TBT] = amode; + +#if !IS_ENABLED(CONFIG_TYPEC_TBT_ALTMODE) + typec_altmode_set_drvdata(amode, port); + amode->ops = &port_amode_ops; +#endif + } port->state.alt = NULL; port->state.mode = TYPEC_STATE_USB; diff --git a/drivers/platform/chrome/cros_typec_altmode.h b/drivers/platform/chrome/cros_typec_altmode.h index a8b37a18c83a..24e766189211 100644 --- a/drivers/platform/chrome/cros_typec_altmode.h +++ b/drivers/platform/chrome/cros_typec_altmode.h @@ -31,4 +31,18 @@ int cros_typec_displayport_status_update(struct typec_altmode *altmode, return 0; } #endif + +#if IS_ENABLED(CONFIG_TYPEC_TBT_ALTMODE) +struct typec_altmode * +cros_typec_register_thunderbolt(struct cros_typec_port *port, + struct typec_altmode_desc *desc); +#else +struct typec_altmode * +cros_typec_register_thunderbolt(struct cros_typec_port *port, + struct typec_altmode_desc *desc) +{ + return typec_port_register_altmode(port->port, desc); +} +#endif + #endif /* __CROS_TYPEC_ALTMODE_H__ */ diff --git a/drivers/platform/chrome/cros_typec_thunderbolt.c b/drivers/platform/chrome/cros_typec_thunderbolt.c new file mode 100644 index 000000000000..b399237b773f --- /dev/null +++ b/drivers/platform/chrome/cros_typec_thunderbolt.c @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Alt-mode implementation for Thunderbolt on ChromeOS EC. + * + * Copyright 2024 Google LLC + * Author: Abhishek Pandit-Subedi + */ +#include "cros_ec_typec.h" + +#include +#include + +#include "cros_typec_altmode.h" + +struct typec_tbt_data { + struct work_struct work; + + struct cros_typec_port *port; + struct typec_altmode *alt; + + u32 header; + u32 *vdo_data; + u8 vdo_size; +}; + +static void cros_typec_thunderbolt_work(struct work_struct *work) +{ + struct typec_tbt_data *data = + container_of(work, struct typec_tbt_data, work); + + if (typec_altmode_vdm(data->alt, data->header, data->vdo_data, + data->vdo_size)) + dev_err(&data->alt->dev, "VDM 0x%x failed", data->header); + + data->header = 0; + data->vdo_data = NULL; + data->vdo_size = 0; +} + +static int cros_typec_thunderbolt_enter(struct typec_altmode *alt, u32 *vdo) +{ + struct typec_tbt_data *data = typec_altmode_get_drvdata(alt); + struct ec_params_typec_control req = { + .port = data->port->port_num, + .command = TYPEC_CONTROL_COMMAND_ENTER_MODE, + .mode_to_enter = CROS_EC_ALTMODE_TBT, + }; + int svdm_version; + int ret; + + ret = cros_ec_cmd(data->port->typec_data->ec, 0, EC_CMD_TYPEC_CONTROL, + &req, sizeof(req), NULL, 0); + if (ret < 0) + return ret; + + svdm_version = typec_altmode_get_svdm_version(alt); + if (svdm_version < 0) + return svdm_version; + + data->header = VDO(USB_TYPEC_TBT_SID, 1, svdm_version, CMD_ENTER_MODE); + data->header |= VDO_OPOS(TYPEC_TBT_MODE); + data->header |= VDO_CMDT(CMDT_RSP_ACK); + + data->vdo_data = NULL; + data->vdo_size = 1; + + schedule_work(&data->work); + + return ret; +} + +static int cros_typec_thunderbolt_exit(struct typec_altmode *alt) +{ + struct typec_tbt_data *data = typec_altmode_get_drvdata(alt); + struct ec_params_typec_control req = { + .port = data->port->port_num, + .command = TYPEC_CONTROL_COMMAND_EXIT_MODES, + }; + int svdm_version; + int ret; + + ret = cros_ec_cmd(data->port->typec_data->ec, 0, EC_CMD_TYPEC_CONTROL, + &req, sizeof(req), NULL, 0); + + if (ret < 0) + return ret; + + svdm_version = typec_altmode_get_svdm_version(alt); + if (svdm_version < 0) + return svdm_version; + + data->header = VDO(USB_TYPEC_TBT_SID, 1, svdm_version, CMD_EXIT_MODE); + data->header |= VDO_OPOS(TYPEC_TBT_MODE); + data->header |= VDO_CMDT(CMDT_RSP_ACK); + + data->vdo_data = NULL; + data->vdo_size = 1; + + schedule_work(&data->work); + + return ret; +} + +static int cros_typec_thunderbolt_vdm(struct typec_altmode *alt, u32 header, + const u32 *data, int count) +{ + struct typec_tbt_data *tbt_data = typec_altmode_get_drvdata(alt); + + int cmd_type = PD_VDO_CMDT(header); + int cmd = PD_VDO_CMD(header); + int svdm_version; + + svdm_version = typec_altmode_get_svdm_version(alt); + if (svdm_version < 0) + return svdm_version; + + switch (cmd_type) { + case CMDT_INIT: + if (PD_VDO_SVDM_VER(header) < svdm_version) { + typec_partner_set_svdm_version(tbt_data->port->partner, + PD_VDO_SVDM_VER(header)); + svdm_version = PD_VDO_SVDM_VER(header); + } + + tbt_data->header = VDO(USB_TYPEC_TBT_SID, 1, svdm_version, cmd); + tbt_data->header |= VDO_OPOS(TYPEC_TBT_MODE); + + /* + * TODO - Just always reply to the VDMs that we are done. + */ + switch (cmd) { + case CMD_ENTER_MODE: + /* Don't respond to the enter mode vdm because it + * triggers mux configuration. This is handled directly + * by the cros_ec_typec driver so the Thunderbolt driver + * doesn't need to be involved. + */ + break; + default: + tbt_data->header |= VDO_CMDT(CMDT_RSP_ACK); + schedule_work(&tbt_data->work); + break; + } + + break; + default: + break; + } + + return 0; +} + +static const struct typec_altmode_ops cros_typec_thunderbolt_ops = { + .enter = cros_typec_thunderbolt_enter, + .exit = cros_typec_thunderbolt_exit, + .vdm = cros_typec_thunderbolt_vdm, +}; + +struct typec_altmode * +cros_typec_register_thunderbolt(struct cros_typec_port *port, + struct typec_altmode_desc *desc) +{ + struct typec_altmode *alt; + struct typec_tbt_data *data; + + alt = typec_port_register_altmode(port->port, desc); + if (IS_ERR(alt)) + return alt; + + data = devm_kzalloc(&alt->dev, sizeof(*data), GFP_KERNEL); + if (!data) { + typec_unregister_altmode(alt); + return ERR_PTR(-ENOMEM); + } + + INIT_WORK(&data->work, cros_typec_thunderbolt_work); + data->alt = alt; + data->port = port; + + typec_altmode_set_ops(alt, &cros_typec_thunderbolt_ops); + typec_altmode_set_drvdata(alt, data); + + return alt; +} From patchwork Wed Sep 25 16:25:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Pandit-Subedi X-Patchwork-Id: 13812318 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71F6E13C8F4 for ; Wed, 25 Sep 2024 16:25:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727281524; cv=none; b=KWlbfTJ4FiPED+ihBOEq/00C6SWicYbNzSTZ6rNSGBdiQzL0pkH+TCY2Q9CuxOeKpsoxikHDyxcRsnBbx5jlUYpK3dVsN3yLaDTtX704bTi3ZDbros7t97cDzjUFbVaVDP//jTcPzztpFdA7iaqkVC/1lybs1xGuSnI70rOU9/E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727281524; c=relaxed/simple; bh=4IztXoDnmzedD/DGGwCbWuMnFco0zL0LtDzIkgaMdFQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rsE0nwJrDdAxKEq0p4VDrwQufVwuTT/JnJQzS9vnIdHocBv0M4+HREjt/KD5QOD4dHEAxB+sQG4txy7ekB+OHVFIrWgoJgnEZW+q7NNJvkVvewQG07L/xtEL1/FJeQeoJRKLej6Bi4fR3Qx2v0P5lVKUcIQIv+P7NZw/XzzfaEM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org; spf=pass smtp.mailfrom=chromium.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b=hGFAzjZ6; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="hGFAzjZ6" Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-20792913262so81639395ad.3 for ; Wed, 25 Sep 2024 09:25:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1727281523; x=1727886323; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/FZ5g7QcrBKoaqiirz8r6L7CjueOS/LSXhKJhnt7qrY=; b=hGFAzjZ6Gz1j5zzbr4fJqABRe9gvKXtf8FNLUm9f957zbB+Lcecxd2jkms1plj6tnN AqJ8Re6X8LbIsRbQeP8lR+IXNmWvGX+ZyyGGzMZLyq+dL0YJMq4Rfh6Q+ox+gbkRcvMT XFqL0VmpN3lNEFP/6yQvelIZ1I7aaIu2nTQgE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727281523; x=1727886323; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/FZ5g7QcrBKoaqiirz8r6L7CjueOS/LSXhKJhnt7qrY=; b=XPf1nUMNzjFrBJhx32g+AUBz9UbzDsBTkCGOwgvVqbz2CVCGPPsZrCWetThmg2Ce0h 6d4ZMf/pOGHx0Sw6/eRiJY5OuIHVK1oJI0N+UhRMOpKQILAS06V4OGUJtRjrxfG6emEo ejG6tWwgcGHymJIS1AV2NMvzgIZdaDq21y6kbAhuJDuy2DTIAsjgf5pN5iRKed1GiERi 5mS9770gYf33cVevtD8U6312jkEAFUVlY0nvZIlDPvKcTFy1dauTJyXTrxOfh4xJAkAH aIN2eQApLzl4LCWK+X8ACRgMGC61/HbSe2tX3pq7bjQV2RBF83XowDxXzPB0nv18Ysal zkfQ== X-Forwarded-Encrypted: i=1; AJvYcCWKh+a+Hf07csHzH25YEw2RmzkcGs/dxdLvNUe3PWZPn/schO3K0uOI98fK5Do7WdF1rnk2njD5KQfsHLG4RLk=@lists.linux.dev X-Gm-Message-State: AOJu0YwiBIkjsRgj6kqLVM1zHUYni3nXvDdGiv37QalZxC536r20yIFf KjCSu2mq3y0s39cpgu6Pu8XTj/V0R/t5c1MRRLxgcONQ/8NbgBU6SzZ6Pffjgg== X-Google-Smtp-Source: AGHT+IEuLsG3mUIBakDR0Qtj5wgz2xldoqosHu1rfjf/OYnO62itqm43VkTh6/qg5gZfBIHNmBOf9A== X-Received: by 2002:a17:903:1cc:b0:1fd:791d:1437 with SMTP id d9443c01a7336-20afc415addmr48913755ad.6.1727281522770; Wed, 25 Sep 2024 09:25:22 -0700 (PDT) Received: from localhost (226.75.127.34.bc.googleusercontent.com. [34.127.75.226]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-20af1858b4dsm26217325ad.263.2024.09.25.09.25.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 Sep 2024 09:25:22 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org Cc: jthies@google.com, pmalani@chromium.org, akuchynski@google.com, Abhishek Pandit-Subedi , Benson Leung , Guenter Roeck , chrome-platform@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 8/8] platform/chrome: cros_ec_typec: Disable auto_enter Date: Wed, 25 Sep 2024 09:25:09 -0700 Message-ID: <20240925092505.8.Ic14738918e3d026fa2d85e95fb68f8e07a0828d0@changeid> X-Mailer: git-send-email 2.46.0.792.g87dc391469-goog In-Reply-To: <20240925162513.435177-1-abhishekpandit@chromium.org> References: <20240925162513.435177-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Altmodes with cros_ec are either automatically entered by the EC or entered by typecd in userspace so we should not auto enter from the kernel. Signed-off-by: Abhishek Pandit-Subedi --- drivers/platform/chrome/cros_ec_typec.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c index ec13d84d11b8..e06a0f2712ce 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -294,6 +294,7 @@ static int cros_typec_register_port_altmodes(struct cros_typec_data *typec, desc.svid = USB_TYPEC_DP_SID; desc.mode = USB_TYPEC_DP_MODE; desc.vdo = DP_PORT_VDO; + desc.no_auto_enter = true; amode = cros_typec_register_displayport(port, &desc, typec->ap_driven_altmode); if (IS_ERR(amode)) @@ -314,6 +315,7 @@ static int cros_typec_register_port_altmodes(struct cros_typec_data *typec, memset(&desc, 0, sizeof(desc)); desc.svid = USB_TYPEC_TBT_SID; desc.mode = TYPEC_ANY_MODE; + desc.no_auto_enter = true; amode = cros_typec_register_thunderbolt(port, &desc); if (IS_ERR(amode)) return PTR_ERR(amode);