From patchwork Fri Sep 27 03:39:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yonghong Song X-Patchwork-Id: 13813824 X-Patchwork-Delegate: bpf@iogearbox.net Received: from 69-171-232-180.mail-mxout.facebook.com (69-171-232-180.mail-mxout.facebook.com [69.171.232.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39FCA320B for ; Fri, 27 Sep 2024 03:39:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=69.171.232.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727408365; cv=none; b=XY4aCx8fHE8PtqKBoLf63NHmSGSyFRDnw1rYCTdIi2O4ygEFKhxl9zYB5S2eoAM+hvRfc2/m5Gf45Hh2kbzW/LyHoUifBTAORJkEeu2loCfB4yKvv2r6Vp03iqyXgUQ2zSGgfVxGF1Pmo3MsB2hXUmyBjjfgNgdW6hs3X1Kyzc4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727408365; c=relaxed/simple; bh=qqAklpzyNvmPH/KuCNEI1b8sd7SS5hXegfs9pC+HeqI=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=E+3e8yFObcoM4+KArpgoe1T9IkK8i9mslvRVKZiR1PTc1XLDHC9mnRTkotQWQYY0hLJtUDZN61GG6qikEw72WHaTMLzcJoMHpmA1kORJIklVHmQ6dPdFQDtzSurgeSn2mWtooyh7EXKYr/i8I5RZk8wE/roYUU8LO5XLpz5FZu4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.dev; spf=fail smtp.mailfrom=linux.dev; arc=none smtp.client-ip=69.171.232.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=linux.dev Received: by devbig309.ftw3.facebook.com (Postfix, from userid 128203) id 023D49694D29; Thu, 26 Sep 2024 20:39:05 -0700 (PDT) From: Yonghong Song To: bpf@vger.kernel.org Cc: Alexei Starovoitov , Andrii Nakryiko , Daniel Borkmann , kernel-team@fb.com, Martin KaFai Lau Subject: [PATCH bpf-next] docs/bpf: Document some special sdiv/smod operations Date: Thu, 26 Sep 2024 20:39:04 -0700 Message-ID: <20240927033904.2702474-1-yonghong.song@linux.dev> X-Mailer: git-send-email 2.43.5 Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: bpf@iogearbox.net Patch [1] fixed possible kernel crash due to specific sdiv/smod operations in bpf program. The following are related operations and the expected results of those operations: - LLONG_MIN/-1 = LLONG_MIN - INT_MIN/-1 = INT_MIN - LLONG_MIN%-1 = 0 - INT_MIN%-1 = 0 Those operations are replaced with codes which won't cause kernel crash. This patch documents what operations may cause exception and what replacement operations are. [1] https://lore.kernel.org/all/20240913150326.1187788-1-yonghong.song@linux.dev/ Signed-off-by: Yonghong Song --- .../bpf/standardization/instruction-set.rst | 25 +++++++++++++++---- 1 file changed, 20 insertions(+), 5 deletions(-) diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst index ab820d565052..d150c1d7ad3b 100644 --- a/Documentation/bpf/standardization/instruction-set.rst +++ b/Documentation/bpf/standardization/instruction-set.rst @@ -347,11 +347,26 @@ register. ===== ===== ======= ========================================================== Underflow and overflow are allowed during arithmetic operations, meaning -the 64-bit or 32-bit value will wrap. If BPF program execution would -result in division by zero, the destination register is instead set to zero. -If execution would result in modulo by zero, for ``ALU64`` the value of -the destination register is unchanged whereas for ``ALU`` the upper -32 bits of the destination register are zeroed. +the 64-bit or 32-bit value will wrap. There are also a few arithmetic operations +which may cause exception for certain architectures. Since crashing the kernel +is not an option, those operations are replaced with alternative operations. + +.. table:: Arithmetic operations with possible exceptions + + ===== ========== ============================= ========================== + name class original replacement + ===== ========== ============================= ========================== + DIV ALU64/ALU dst /= 0 dst = 0 + SDIV ALU64/ALU dst s/= 0 dst = 0 + MOD ALU64 dst %= 0 dst = dst (no replacement) + MOD ALU dst %= 0 dst = (u32)dst + SMOD ALU64 dst s%= 0 dst = dst (no replacement) + SMOD ALU dst s%= 0 dst = (u32)dst + SDIV ALU64 dst s/= -1 (dst = LLONG_MIN) dst = LLONG_MIN + SDIV ALU dst s/= -1 (dst = INT_MIN) dst = (u32)INT_MIN + SMOD ALU64 dst s%= -1 (dst = LLONG_MIN) dst = 0 + SMOD ALU dst s%= -1 (dst = INT_MIN) dst = 0 + ===== ========== ============================= =========================== ``{ADD, X, ALU}``, where 'code' = ``ADD``, 'source' = ``X``, and 'class' = ``ALU``, means::