From patchwork Fri Sep 27 08:00:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "S.J. Wang" X-Patchwork-Id: 13813985 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71DCD18893E; Fri, 27 Sep 2024 08:23:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727425402; cv=none; b=E7MUI0bYNmH79ZYgvK95chZu78u48Bqj6cGuwFFLASJ/b7ULe1lHot2gyExE7WMstPfo4gx+rEPAfi4Q0bdb0AhWyxyz3MkFVpLS75Un5EthCAbs1QhUaCSOV/kSs3cM85IMQSZsgkvb668ikd+CjhsKs0qEzwZPkfPi9Ic6sCc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727425402; c=relaxed/simple; bh=m3HR8JAhGMtJqW4ACqU+RSyuJIXq75B7pLcnddQQ5wU=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References; b=ZTh3l8Qy6fBzAxbHGF59nhfaPef4BoImeep8XKiRikZcFJJcCs6TiFwt92VQrelTz+rjBn+wt6APu2vDvG1J32XAg/rfWyi1Idp/xSVzge769o0czaHgnnpXEFg270k+uRA4TzMFXQtejjaRQ5NJMatCdQ7tNA+H0qJgNdCcZpE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A6E9C201A4B; Fri, 27 Sep 2024 10:23:13 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 75F5D201A45; Fri, 27 Sep 2024 10:23:13 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id BF066183DC04; Fri, 27 Sep 2024 16:23:11 +0800 (+08) From: Shengjiu Wang To: shengjiu.wang@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, nicoleotsuka@gmail.com, lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] ASoC: fsl_micfil: fix regmap_write_bits usage Date: Fri, 27 Sep 2024 16:00:29 +0800 Message-Id: <1727424031-19551-2-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1727424031-19551-1-git-send-email-shengjiu.wang@nxp.com> References: <1727424031-19551-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: The last parameter 1 means BIT(0), which should be the correct BIT(X). Fixes: 47a70e6fc9a8 ("ASoC: Add MICFIL SoC Digital Audio Interface driver.") Signed-off-by: Shengjiu Wang Reviewed-by: Daniel Baluta --- sound/soc/fsl/fsl_micfil.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c index 193be098fa5e..c347cb3a4712 100644 --- a/sound/soc/fsl/fsl_micfil.c +++ b/sound/soc/fsl/fsl_micfil.c @@ -988,7 +988,7 @@ static irqreturn_t micfil_isr(int irq, void *devid) regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, MICFIL_STAT_CHXF(i), - 1); + MICFIL_STAT_CHXF(i)); } for (i = 0; i < MICFIL_FIFO_NUM; i++) { @@ -1023,7 +1023,7 @@ static irqreturn_t micfil_err_isr(int irq, void *devid) if (stat_reg & MICFIL_STAT_LOWFREQF) { dev_dbg(&pdev->dev, "isr: ipg_clk_app is too low\n"); regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, - MICFIL_STAT_LOWFREQF, 1); + MICFIL_STAT_LOWFREQF, MICFIL_STAT_LOWFREQF); } return IRQ_HANDLED; From patchwork Fri Sep 27 08:00:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "S.J. Wang" X-Patchwork-Id: 13813986 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 644AC17E44F; Fri, 27 Sep 2024 08:23:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727425403; cv=none; b=DDMFVaipvCTLfeC/wxYhlWzsO8rQpKJHb3QKjBXKGmogVu6kNRa1d0NsF/fj50JL+ban+Fet1f3CkwpBS6wJmQxDYrBaxPx76v1iamCsqaXeOKeuU7wsE9VILKRnnP/1c5HUADxjMLF2y86aIccwMjSN/OWfENewygc1GfsxGU4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727425403; c=relaxed/simple; bh=1/MpVD+7+dOCpQgXs3U4X3eSEUe5h3A8K/qR3gDuJRU=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References; b=CnHFGE6VTACmDwd/5sGQ3BUwsHa+Oz+olTwzo0JZ9Q3i3vWvAf3NPKHEnmTFUqKWNCvWkT3rKt2GgLQ0Ck/N8B4IR7teLl3jA5476j//90V2hI764scup/6Q50KVhoHgdpFu0ZXsj3X9xZSW6qBk0zCrwJEzrpz7kwxo769mErU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 6814A1A1B60; Fri, 27 Sep 2024 10:23:14 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 379251A1B45; Fri, 27 Sep 2024 10:23:14 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id ED3DA183DC02; Fri, 27 Sep 2024 16:23:12 +0800 (+08) From: Shengjiu Wang To: shengjiu.wang@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, nicoleotsuka@gmail.com, lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] ASoC: fsl_micfil: Add mclk enable flag Date: Fri, 27 Sep 2024 16:00:30 +0800 Message-Id: <1727424031-19551-3-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1727424031-19551-1-git-send-email-shengjiu.wang@nxp.com> References: <1727424031-19551-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Previously the mclk is enabled in probe() stage, which is not necessary. Move mclk enablement to hw_params() and mclk disablement to hw_free() will be more efficient. 'mclk_flag' is used for this case. Signed-off-by: Shengjiu Wang --- sound/soc/fsl/fsl_micfil.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c index c347cb3a4712..6ecf46e9ac4c 100644 --- a/sound/soc/fsl/fsl_micfil.c +++ b/sound/soc/fsl/fsl_micfil.c @@ -58,6 +58,7 @@ struct fsl_micfil { int vad_detected; struct fsl_micfil_verid verid; struct fsl_micfil_param param; + bool mclk_flag; /* mclk enable flag */ }; struct fsl_micfil_soc_data { @@ -693,7 +694,6 @@ static int fsl_micfil_reparent_rootclk(struct fsl_micfil *micfil, unsigned int s clk = micfil->mclk; /* Disable clock first, for it was enabled by pm_runtime */ - clk_disable_unprepare(clk); fsl_asoc_reparent_pll_clocks(dev, clk, micfil->pll8k_clk, micfil->pll11k_clk, ratio); ret = clk_prepare_enable(clk); @@ -730,6 +730,8 @@ static int fsl_micfil_hw_params(struct snd_pcm_substream *substream, if (ret) return ret; + micfil->mclk_flag = true; + ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8); if (ret) return ret; @@ -764,6 +766,17 @@ static int fsl_micfil_hw_params(struct snd_pcm_substream *substream, return 0; } +static int fsl_micfil_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct fsl_micfil *micfil = snd_soc_dai_get_drvdata(dai); + + clk_disable_unprepare(micfil->mclk); + micfil->mclk_flag = false; + + return 0; +} + static int fsl_micfil_dai_probe(struct snd_soc_dai *cpu_dai) { struct fsl_micfil *micfil = dev_get_drvdata(cpu_dai->dev); @@ -806,6 +819,7 @@ static const struct snd_soc_dai_ops fsl_micfil_dai_ops = { .startup = fsl_micfil_startup, .trigger = fsl_micfil_trigger, .hw_params = fsl_micfil_hw_params, + .hw_free = fsl_micfil_hw_free, }; static struct snd_soc_dai_driver fsl_micfil_dai = { @@ -1279,7 +1293,8 @@ static int fsl_micfil_runtime_suspend(struct device *dev) regcache_cache_only(micfil->regmap, true); - clk_disable_unprepare(micfil->mclk); + if (micfil->mclk_flag) + clk_disable_unprepare(micfil->mclk); clk_disable_unprepare(micfil->busclk); return 0; @@ -1294,10 +1309,12 @@ static int fsl_micfil_runtime_resume(struct device *dev) if (ret < 0) return ret; - ret = clk_prepare_enable(micfil->mclk); - if (ret < 0) { - clk_disable_unprepare(micfil->busclk); - return ret; + if (micfil->mclk_flag) { + ret = clk_prepare_enable(micfil->mclk); + if (ret < 0) { + clk_disable_unprepare(micfil->busclk); + return ret; + } } regcache_cache_only(micfil->regmap, false); From patchwork Fri Sep 27 08:00:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "S.J. Wang" X-Patchwork-Id: 13813987 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C642189B91; Fri, 27 Sep 2024 08:23:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727425404; cv=none; b=fOFbfN3sPooKF8tgx2x07XbT4uGxY12hKwp0O4PWA9LuY6TuXlhhMlG9Z2Xmzv8UuLPKGLDISAZRz45W9TPe4qNhet3Z0vI+CIfAP6+8YUSWbUsRAq1cZ+n4Y2BAX3U0pcZrE0pivFT70Il5h73AUwwcUmCm+7H8Kh31I5W6WUs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727425404; c=relaxed/simple; bh=uAZu7jgOYOp5A+s3eueNH7j+KtpbzDNYf4Ayr4G5EaY=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References; b=hNtQ3xJenvXGQjrXV+5zpjfo2PhaXUTnvMDPNdc+07LI0CZMqG2Wxfhok9C6tV9jeRDxMCSahwu+1RcQbZSvuHvY3xKuYlf0vGofIwhID2eCopxW88McuqhOc1DN6E9fOCD9DfXYtMRE1Fl+vpngbevCozwaRL7Bh779QBJHicM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id EC9A2201A2A; Fri, 27 Sep 2024 10:23:15 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B0453201A52; Fri, 27 Sep 2024 10:23:15 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 18AAD183DC03; Fri, 27 Sep 2024 16:23:14 +0800 (+08) From: Shengjiu Wang To: shengjiu.wang@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, nicoleotsuka@gmail.com, lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] ASoC: fsl_micfil: Enable micfil error interrupt Date: Fri, 27 Sep 2024 16:00:31 +0800 Message-Id: <1727424031-19551-4-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1727424031-19551-1-git-send-email-shengjiu.wang@nxp.com> References: <1727424031-19551-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Enable micfil error interrupt, in the error handler, FIFO state and OUT state need to be cleared. Signed-off-by: Shengjiu Wang --- sound/soc/fsl/fsl_micfil.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c index 6ecf46e9ac4c..0930d8c9b8d7 100644 --- a/sound/soc/fsl/fsl_micfil.c +++ b/sound/soc/fsl/fsl_micfil.c @@ -651,7 +651,7 @@ static int fsl_micfil_trigger(struct snd_pcm_substream *substream, int cmd, /* Enable the module */ ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, - MICFIL_CTRL1_PDMIEN); + MICFIL_CTRL1_PDMIEN | MICFIL_CTRL1_ERREN); if (ret) return ret; @@ -667,7 +667,7 @@ static int fsl_micfil_trigger(struct snd_pcm_substream *substream, int cmd, /* Disable the module */ ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, - MICFIL_CTRL1_PDMIEN); + MICFIL_CTRL1_PDMIEN | MICFIL_CTRL1_ERREN); if (ret) return ret; @@ -940,6 +940,7 @@ static bool fsl_micfil_volatile_reg(struct device *dev, unsigned int reg) { switch (reg) { case REG_MICFIL_STAT: + case REG_MICFIL_FIFO_STAT: case REG_MICFIL_DATACH0: case REG_MICFIL_DATACH1: case REG_MICFIL_DATACH2: @@ -948,6 +949,7 @@ static bool fsl_micfil_volatile_reg(struct device *dev, unsigned int reg) case REG_MICFIL_DATACH5: case REG_MICFIL_DATACH6: case REG_MICFIL_DATACH7: + case REG_MICFIL_OUT_STAT: case REG_MICFIL_VERID: case REG_MICFIL_PARAM: case REG_MICFIL_VAD0_STAT: @@ -1024,6 +1026,8 @@ static irqreturn_t micfil_err_isr(int irq, void *devid) { struct fsl_micfil *micfil = (struct fsl_micfil *)devid; struct platform_device *pdev = micfil->pdev; + u32 fifo_stat_reg; + u32 out_stat_reg; u32 stat_reg; regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); @@ -1040,6 +1044,14 @@ static irqreturn_t micfil_err_isr(int irq, void *devid) MICFIL_STAT_LOWFREQF, MICFIL_STAT_LOWFREQF); } + regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg); + regmap_write_bits(micfil->regmap, REG_MICFIL_FIFO_STAT, + fifo_stat_reg, fifo_stat_reg); + + regmap_read(micfil->regmap, REG_MICFIL_OUT_STAT, &out_stat_reg); + regmap_write_bits(micfil->regmap, REG_MICFIL_OUT_STAT, + out_stat_reg, out_stat_reg); + return IRQ_HANDLED; }