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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e16d6d2sm5671744a91.2.2024.09.27.06.41.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2024 06:41:55 -0700 (PDT) From: Max Hsu Date: Fri, 27 Sep 2024 21:41:43 +0800 Subject: [PATCH RFC v2 1/3] dt-bindings: riscv: Add Svukte entry MIME-Version: 1.0 Message-Id: <20240927-dev-maxh-svukte-rebase-2-v2-1-9afe57c33aee@sifive.com> References: <20240927-dev-maxh-svukte-rebase-2-v2-0-9afe57c33aee@sifive.com> In-Reply-To: <20240927-dev-maxh-svukte-rebase-2-v2-0-9afe57c33aee@sifive.com> To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Anup Patel , Atish Patra Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, Max Hsu , Samuel Holland X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1400; i=max.hsu@sifive.com; h=from:subject:message-id; bh=XsOuWsWpqVzpxzz/w3pcnSsgncUk3xwQYitc8ZK3GFY=; b=owEB7QES/pANAwAKAdID/Z0HeUC9AcsmYgBm9rYeTLWAR9pZKiWLummELHNbZhIZQkILgESlN iRqIuM7IhiJAbMEAAEKAB0WIQTqXmcbOhS2KZE9X2jSA/2dB3lAvQUCZva2HgAKCRDSA/2dB3lA vR+HC/9KGdQ6PKTGsSX3TfsLbKKWZ1lFeeifrd/sMimbs4PIFd5M9UlxuNQsYVaLgEWlglc7nuN h8MH24n7taE21jwP6HP077oUVr7GxdZlrcUO3LEYz6wgtb1FwNQJxL3YuQVz1dwLGuyjyzCtzcx WTR9sIt/zvLe5biK81Gp+Fm1s16mvQ8+XSICFqNVzdmw36GMnBWiyqjYeFlDxYqAw3aloe/Fgpm 3lQDhfOEqhLC8IO7yvzvmnlVqQMLZMIaEgbtEKoYID9SrbKL0XtpFOHEcszDpota5jhKa3kACZq SnQfLEbRqDqhF7GL1WJqAYDUAhP6sVtH0XSh1ybvPdBtB/bU7An1vNxUSFCN7YgI7keeLDxQ/Gg /POODPG+Td6PjxCCrw/yLzMGSk3wcKQqspqSSBjsCmXITT1G+VGp8HeZbM0YKzFRPb+WGo1KmvR 7GyKrrCfNj3x4lJUNwCfR5pVaPot5O2a/RtfucPg/03tRk8HLU0ZXc03zdqHDxv0Q1pdw= X-Developer-Key: i=max.hsu@sifive.com; a=openpgp; fpr=EA5E671B3A14B629913D5F68D203FD9D077940BD X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240927_064157_660790_F76D3746 X-CRM114-Status: UNSURE ( 8.32 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add an entry for the Svukte extension to the riscv,isa-extensions property. Reviewed-by: Samuel Holland Signed-off-by: Max Hsu Reviewed-by: Deepak Gupta --- Documentation/devicetree/bindings/riscv/extensions.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 2cf2026cff574d39793157418a4d4211df87315f..9f730e3aaae949debc18396183b989b504dcb899 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -171,6 +171,15 @@ properties: memory types as ratified in the 20191213 version of the privileged ISA specification. + - const: svukte + description: + The standard Svukte supervisor-level extensions for making user-mode + accesses to supervisor memory raise page faults in constant time, + mitigating attacks that attempt to discover the supervisor + software's address-space layout. Currently under review as Pull + Request number 1564 at commit 81dc9277 ("Svukte v0.3") of + riscv-isa-manual. + - const: svvptc description: The standard Svvptc supervisor-level extension for From patchwork Fri Sep 27 13:41:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Hsu X-Patchwork-Id: 13814328 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E39A5CDD1B1 for ; Fri, 27 Sep 2024 13:42:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6jmZnWSRKwsb9j0PgH1A2Q2XTmbwT+TmfaVv76ho0FU=; b=c8rAzyqPIwnOfV zOD5fghgO1l5fP+sSRy9Nry1STuSkpsaqJhMhEGADx9tRbkCOodPTrfYTwb0tMe84kK3DVtNtB0UP zKNniqq0F2EC35yWpI88AXSbvZZM0s64G+wi8u/gBueT3Z51EnWMz2SnhSWEYGFTZo7d0Fsp2KRcw Oc9z7gjCLQowvpKACP7AC8KP4dGQbN5zXesTNdOqMCDEvPsZ9M/O/JuhHK3Xy5Ig/TPslFAyEMPsT 7LdrMaFk+Q9e4kTyMSlmhUXj+FStLT5TWfmumA2Xm0X4Bd3CruwdikgNwNbm5knMMOOXAMZX1Cz5D MuGPPIoCLhmgJwT1/OMQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1suBES-0000000BKTs-0Q8I; Fri, 27 Sep 2024 13:42:04 +0000 Received: from mail-pj1-x1043.google.com ([2607:f8b0:4864:20::1043]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1suBEO-0000000BKRG-2tRm for linux-riscv@lists.infradead.org; Fri, 27 Sep 2024 13:42:02 +0000 Received: by mail-pj1-x1043.google.com with SMTP id 98e67ed59e1d1-2e08085596eso1944009a91.3 for ; Fri, 27 Sep 2024 06:42:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1727444519; x=1728049319; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=w/yqPChQyX7MOum1UYAETN40UEWggulMYnRGOrfdjTw=; b=P9EujWa5QbdnN2DQ4twUxa+2cmSd620ybYGtLB5mSA4O2KKl9j4WWBGwQ5sPQbfXgR D4dXixpsc241UJx7ZR8+XFcjmq+pv2GFz4IkgLerdnDuWyjSPMoutsr+8Rfy7gwTpoqz hpKRDJF3kOSZIMrYOnaLIpr4Clia+ufgeBMd3MIPFn1zTUWDuyP9o/1GwDtHG+0UIP7j fmRs3T6V5DwpkaRp/s4CEZ8HU4DfjS7w9j7z9xXLyVfQMN2m4j3k4wd6Ds4uoeI3mNQU KYM0zsweq3pV/cYj/zDyUWaPOILIgoP9l/d8gImEIF6Sac+mTDfsDWPMUkWDSHZituA2 oKpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727444519; x=1728049319; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=w/yqPChQyX7MOum1UYAETN40UEWggulMYnRGOrfdjTw=; b=N1d2nHZPW4Ngmm+xDv/7TVtow0+EWzca7fU/QIoZXhS+sCKDLZZR2VtZwC4gdbKPmb FoxfH+BskUV/RcL3AzlT4GoXOZvnOOup7I/uYdJSesLpRPF1ywBiAWdJsl9aYDewYAKn iO2doYUPodSoCSOQwq/yr/g2+cAZwS7UfTuOIr9dP94a/CX7xVvkLFsxpeUGTpK0xshi ViLEDgDmuGXE0GneKtNpfBk17ZNmPKnRzMWYqq4Exm8BNFI2kVcsmjfmCVFJ7Nsrb8VT kRpXeUlSuJGzRhiRJZrLcCEUb07z+GqKKtMWTw31UXNZe1hdRgdyeMFa5bz65HUUCNtR xviA== X-Forwarded-Encrypted: i=1; AJvYcCXef8VxjU5xTnpIk5wBWgX7/VmRfAo6RZ4ySvHh+z6vYVN66GqxyJPSywgfgpJnQV+r6By0D56hGvggaQ==@lists.infradead.org X-Gm-Message-State: AOJu0YwZfhFfJ6kz0hi2Pr5EYyXoMbU3UgdKcrJNv/T9sAJAve639oYq TRGBuuNxK56dcl0eZkI5GS5BsozYscODjZjVHqJc9VC3X9ENj58qSMmXTG1DF/k= X-Google-Smtp-Source: AGHT+IHabM478iaczeNhXVUodHzrMPBemfKWA5fTgJkjCbr2r/xavEqWXUBcqPn4lkdWJWZph5i48Q== X-Received: by 2002:a17:90a:8d10:b0:2d2:453:12cb with SMTP id 98e67ed59e1d1-2e0b8879624mr4212103a91.2.1727444519527; Fri, 27 Sep 2024 06:41:59 -0700 (PDT) Received: from [127.0.1.1] (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e16d6d2sm5671744a91.2.2024.09.27.06.41.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2024 06:41:58 -0700 (PDT) From: Max Hsu Date: Fri, 27 Sep 2024 21:41:44 +0800 Subject: [PATCH RFC v2 2/3] riscv: Add Svukte extension support MIME-Version: 1.0 Message-Id: <20240927-dev-maxh-svukte-rebase-2-v2-2-9afe57c33aee@sifive.com> References: <20240927-dev-maxh-svukte-rebase-2-v2-0-9afe57c33aee@sifive.com> In-Reply-To: <20240927-dev-maxh-svukte-rebase-2-v2-0-9afe57c33aee@sifive.com> To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Anup Patel , Atish Patra Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, Max Hsu , Samuel Holland X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3103; i=max.hsu@sifive.com; h=from:subject:message-id; bh=2iAOqQjnUXTcZ5Cs8EpYQntXVuHf3Et98OZwyjYbx+4=; b=owEB7QES/pANAwAKAdID/Z0HeUC9AcsmYgBm9rYemwDJvWM0Es7Z0BdQVJl6wPqKNr+icYn8S ixNxmwo4PSJAbMEAAEKAB0WIQTqXmcbOhS2KZE9X2jSA/2dB3lAvQUCZva2HgAKCRDSA/2dB3lA vcTVC/9ZFgIJK+oxCZZJE7Vz0znghLwi7WZa3X3R3Oqf1yywBf3G37oy1p5ti/thDZgLMXxS6Tq hPXpTrYShGZRznXe9vclpZaFnaboitKby3ugrzpm6Q+y58OboJoP0ml+GP7cSms6Tl/uLJuOc7F g4mtWMwiqacecSkekyhswbCvL7lAOMBzW0lqiQ+I4hCxrh7/zJ+i6bGe1CJ/tdwlTc+PxZwcC3x eIJVccd2Hf1c15KRYMsaFK85hiiWzn/D+38vKxfAvP5pEPRCmhbNbnhQ/sgUG/6OlRL8BRYsyu8 bhGUkRnP4DA/rthVm/hqQ8xefxIlrC94xa9Kh3g7LPe8Noc4Jv+kC+Yb7zHUZXCO3UzvdrhhMO/ C9ooqjtoz/fDVqcV6VXY+Oqb3QvadyPTAiBTiDya9vQTqyQxmWUxzdQhOMFCHGKloihnXpB58Sn 9oeYze98ONfxd9i83FVmco+5C01cnnYYMdcu7zUr2nT2HDwKpFt4vaFOrAt/j2xxkrc4s= X-Developer-Key: i=max.hsu@sifive.com; a=openpgp; fpr=EA5E671B3A14B629913D5F68D203FD9D077940BD X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240927_064200_805521_F6983FA0 X-CRM114-Status: GOOD ( 11.66 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Svukte extension introduce senvcfg.UKTE, hstatus.HUKTE. This patch add CSR bit definition, and detects if Svukte ISA extension is available, cpufeature will set the correspond bit field so the svukte-qualified memory accesses are protected in a manner that is timing-independent of the faulting virtual address. Since hstatus.HU is not enabled by linux, enabling hstatus.HUKTE will not be affective. This patch depends on patch "riscv: Per-thread envcfg CSR support" [1] Link: https://lore.kernel.org/linux-riscv/20240814081126.956287-1-samuel.holland@sifive.com/ [1] Reviewed-by: Samuel Holland Signed-off-by: Max Hsu Reviewed-by: Deepak Gupta --- arch/riscv/include/asm/csr.h | 2 ++ arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/kernel/cpufeature.c | 4 ++++ 3 files changed, 7 insertions(+) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 25966995da04e090ff22a11e35be9bc24712f1a8..62b50667d539c50a0bfdadd1c6ab06cda948f6a8 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -122,6 +122,7 @@ #define HSTATUS_VSXL _AC(0x300000000, UL) #define HSTATUS_VSXL_SHIFT 32 #endif +#define HSTATUS_HUKTE _AC(0x01000000, UL) #define HSTATUS_VTSR _AC(0x00400000, UL) #define HSTATUS_VTW _AC(0x00200000, UL) #define HSTATUS_VTVM _AC(0x00100000, UL) @@ -195,6 +196,7 @@ /* xENVCFG flags */ #define ENVCFG_STCE (_AC(1, ULL) << 63) #define ENVCFG_PBMTE (_AC(1, ULL) << 62) +#define ENVCFG_UKTE (_AC(1, UL) << 8) #define ENVCFG_CBZE (_AC(1, UL) << 7) #define ENVCFG_CBCFE (_AC(1, UL) << 6) #define ENVCFG_CBIE_SHIFT 4 diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 46d9de54179ed40aa7b1ea0ec011fd6eea7218df..3591a4f40131ff5958c07857a1bd1624723d6550 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -93,6 +93,7 @@ #define RISCV_ISA_EXT_ZCMOP 84 #define RISCV_ISA_EXT_ZAWRS 85 #define RISCV_ISA_EXT_SVVPTC 86 +#define RISCV_ISA_EXT_SVUKTE 87 #define RISCV_ISA_EXT_XLINUXENVCFG 127 diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 3a8eeaa9310c32fce2141aff534dc4432b32abbe..e0853cae1dc0ba844d5969a42c30d44287e3250a 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -381,6 +381,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { __RISCV_ISA_EXT_DATA(svinval, RISCV_ISA_EXT_SVINVAL), __RISCV_ISA_EXT_DATA(svnapot, RISCV_ISA_EXT_SVNAPOT), __RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT), + __RISCV_ISA_EXT_SUPERSET(svukte, RISCV_ISA_EXT_SVUKTE, riscv_xlinuxenvcfg_exts), __RISCV_ISA_EXT_DATA(svvptc, RISCV_ISA_EXT_SVVPTC), }; @@ -921,6 +922,9 @@ void riscv_user_isa_enable(void) { if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICBOZ)) csr_set(CSR_ENVCFG, ENVCFG_CBZE); + + if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SVUKTE)) + current->thread.envcfg |= ENVCFG_UKTE; } #ifdef CONFIG_RISCV_ALTERNATIVE From patchwork Fri Sep 27 13:41:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Hsu X-Patchwork-Id: 13814329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6E305CDD1B1 for ; Fri, 27 Sep 2024 13:42:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; 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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e16d6d2sm5671744a91.2.2024.09.27.06.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2024 06:42:02 -0700 (PDT) From: Max Hsu Date: Fri, 27 Sep 2024 21:41:45 +0800 Subject: [PATCH RFC v2 3/3] riscv: KVM: Add Svukte extension support for Guest/VM MIME-Version: 1.0 Message-Id: <20240927-dev-maxh-svukte-rebase-2-v2-3-9afe57c33aee@sifive.com> References: <20240927-dev-maxh-svukte-rebase-2-v2-0-9afe57c33aee@sifive.com> In-Reply-To: <20240927-dev-maxh-svukte-rebase-2-v2-0-9afe57c33aee@sifive.com> To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Anup Patel , Atish Patra Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, Max Hsu , Samuel Holland X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1319; i=max.hsu@sifive.com; h=from:subject:message-id; bh=H2dmJr8hpjnnkdgnm3AAwF3pNuKwnFfGeFFtmmrBeZo=; b=owEB7QES/pANAwAKAdID/Z0HeUC9AcsmYgBm9rYes4sJwaW1iTmWxKG3SLRJr5Z3fDOKp/nPP r1gPAYhIkqJAbMEAAEKAB0WIQTqXmcbOhS2KZE9X2jSA/2dB3lAvQUCZva2HgAKCRDSA/2dB3lA vZKLDACjqALjcui0yixfAk8cbQoV1qFAyPq+nTRdcdPTXxLhILdaqfUlPv9CLYgqa7eAaH552UC NiUQhYWFy8tMiCIXlrWxyd0Iqb6MA0pWfK4theLS387K53ksc+zOqyi6CTn577rOnPSQwj8fyQp R7ZHBbhrmhVX/5utgfHYq5/fBZidQZ1TQ3IpZAHhnvZnPyIU+UK6VmYWvX6nV07vWdrKav38cdE KhFePJCjH8+PlBFcZ0MiT+aNLuuDXR/XThWVMmKYFWbHsNid8CpsT3RiLQ0L2xts5+CNcCj5RYR ghY8YIOYAo0G1DnOFuHzScYZJR3o8kDOyjN8IC1MoC8Ij1Jr3lssqox+LO6DpcW1AntxX6MBxdv eRYh5zaGEUxNPyM/02zDRaeWP7ALiEW/0AQDcE8nftpjJW9HHTTxYrlqa4r8ZanX1BDbf+tRdvc X1j6INMFoYcTVCW0n07gCVQbEQsERGTori81rVtD3yyrzMZwJypmrcXisQIa2KzG/NN+I= X-Developer-Key: i=max.hsu@sifive.com; a=openpgp; fpr=EA5E671B3A14B629913D5F68D203FD9D077940BD X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240927_064204_068961_BB251AF5 X-CRM114-Status: UNSURE ( 8.95 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add KVM ISA extension ONE_REG interface to allow VMM tools to detect and enable Svukte extension for Guest/VM. Reviewed-by: Samuel Holland Signed-off-by: Max Hsu --- arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/vcpu_onereg.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h index e97db3296456e19f79ca02e4c4f70ae1b4abb48b..41b466b7ffaec421e8389d3f5b178580091a2c98 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -175,6 +175,7 @@ enum KVM_RISCV_ISA_EXT_ID { KVM_RISCV_ISA_EXT_ZCF, KVM_RISCV_ISA_EXT_ZCMOP, KVM_RISCV_ISA_EXT_ZAWRS, + KVM_RISCV_ISA_EXT_SVUKTE, KVM_RISCV_ISA_EXT_MAX, }; diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index b319c4c13c54ce22d2a7552f4c9f256a0c50780e..67237d6e53882a9fcd2cf265aa1704f25cc4a701 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -41,6 +41,7 @@ static const unsigned long kvm_isa_ext_arr[] = { KVM_ISA_EXT_ARR(SVINVAL), KVM_ISA_EXT_ARR(SVNAPOT), KVM_ISA_EXT_ARR(SVPBMT), + KVM_ISA_EXT_ARR(SVUKTE), KVM_ISA_EXT_ARR(ZACAS), KVM_ISA_EXT_ARR(ZAWRS), KVM_ISA_EXT_ARR(ZBA),