From patchwork Fri Sep 27 14:14:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ian Dannapel X-Patchwork-Id: 13814346 Received: from mail-lf1-f50.google.com (mail-lf1-f50.google.com [209.85.167.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 79C9518B1A; Fri, 27 Sep 2024 14:14:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727446493; cv=none; b=TaHViEfMj+nxqMM+47EK2X7NrQMGxaw7lLlrNKGiJ0IQaxqglwKAWBhgcja5HrPlVX4WgkhnaiWD1Cge/3sdnGK9d1Kvy+WMg7SJl5UkoomOzEwNQro2FuRyO+3bRI9q5IV6JjjN7kyUAIYWSQ3hoXYY5Pgby0n7bkDsbqI/Rds= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727446493; c=relaxed/simple; bh=lk3RhykLJngcEDVRXH/SDu1OOgxZLlk0DOm58JC78XU=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=av+SxBvF8budVOHtlMxNOcw+E8TVcVPmNzjgqAQTI9TQbxocIXTvx6h/p9ZRb3qlPn9yGudCtzxV39sQdjgTupYDCYHdN/xyY+NQ6GWHz/UpndSIgEEDQzZrM/J5RkF+pLp1qVbhudIzjHT+c9Hi/6bQZzR6MUNGjlZU1NKfHLo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ETiZAzw8; arc=none smtp.client-ip=209.85.167.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ETiZAzw8" Received: by mail-lf1-f50.google.com with SMTP id 2adb3069b0e04-53959a88668so991049e87.2; Fri, 27 Sep 2024 07:14:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1727446490; x=1728051290; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:to :from:from:to:cc:subject:date:message-id:reply-to; bh=C72TPhpbh5i3Zhaa7WL58puaC2zZDkgeX/W2cYZyPHk=; b=ETiZAzw80xkzAeeAIIukRnOhmChTD5ufbiHSQZWDrMi3p3rMnw3yETnilc5gOFsKYk 0zI6ZgLS/86ISfl2UmHoM1ecR4DWSMGQy7cyGgw5O1KvSasxwTlWH6oesljxmX5a9noq BtgBqSroCdRyl38kYslKY8Abxy3EWJzCJye86AoF4+4kv+gL/NMxK3YIxREsGJJ8cIE6 WWmynxG/QueC8YWjSwODD5dEpHQz1ar5a4jqXxF1L6asS8f/Pnlj1+8mguGnipOb4rSH Bvl9KOxP1TP/NyZDBZ/ZJrp7fxL5boaEjHqZCnujmu6+JQ+iwz89suE4FyKa3Pi6PdfW U8/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727446490; x=1728051290; h=content-transfer-encoding:mime-version:message-id:date:subject:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=C72TPhpbh5i3Zhaa7WL58puaC2zZDkgeX/W2cYZyPHk=; b=jA9/Pj+CiHX+4FNjQQsL97Y1fM+/vh/mQH6EDDsf9tLks2PwamjXUNjUdq4UFYCvtf suLBxaapKNNEmFyNZJqdAP+sbU6uWvFHkUbIIMYcGi+liXM+6VcFF0nyjpPv34YDcKG9 aVtem+oYOIEuSx8KwbkC27ro1YVnSmIqMghKAKV86cuH/6/KrKgQHd96gm/NQlu1kt6C Izix2WHB0Av0okOMG5wajtyjv/HlGSnVRFowrEo4DeSruZBl9zDlE3ZQd3TjJd4HJdB6 Wqzss3ErRtWNa6aZ8yWd8GrM8JNpBQRYzGSTNQo53OcjTMkakAxcIiMt+SMM/KPjFf4S vwjQ== X-Forwarded-Encrypted: i=1; AJvYcCUs/q74poTvFmA/Afx272tKDcW7SgROk3fad6GCvKlb9MvxWQotMa248h4B/kn4cU1NYawxAMDXHGz9@vger.kernel.org, AJvYcCV4OI9YHU//vcTCd8p5J9PygjD7z+X3ZpxB1IBr06/Rz2tDsCpVSDbZ5ZUfMOTrf/HKafVwaxcoeOTI1kZ9@vger.kernel.org, AJvYcCXdxtujOaLiTgbu8sxeq9nnyje91z5a7riQsrRungCSKj0xj7b/QsFwDPNiEuMYIuHMHTx+5yXfGjZIEw==@vger.kernel.org X-Gm-Message-State: AOJu0YxKuS5NPNqXdLPsafkiczkpLhggXmRK2NMR59OtPWPKzp4HrxmB VsF5oOpZh0w1di/kVJa1Q0JvRWYZIpG9BZ8uvgqr4Yw1KZxVrWfrgnBXOXzd X-Google-Smtp-Source: AGHT+IHQtsgZddhEas31MPYGzYur0N324IQ6rvA5FqFZTxyiZgn/59YkhLz1uPOEqsn2kCPJtNxxXQ== X-Received: by 2002:a05:6512:3b0e:b0:52f:2ea:499f with SMTP id 2adb3069b0e04-5389fc46c96mr2566206e87.24.1727446489121; Fri, 27 Sep 2024 07:14:49 -0700 (PDT) Received: from iris-Ian.fritz.box (p200300eb5f4f030052bd6081d2396adf.dip0.t-ipconnect.de. [2003:eb:5f4f:300:52bd:6081:d239:6adf]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c88248af00sm1184519a12.67.2024.09.27.07.14.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2024 07:14:48 -0700 (PDT) From: iansdannapel@gmail.com To: mdf@kernel.org, hao.wu@intel.com, yilun.xu@intel.com, trix@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, neil.armstrong@linaro.org, heiko.stuebner@cherry.de, rafal@milecki.pl, linus.walleij@linaro.org, iansdannapel@gmail.com, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] fpga: Add Efinix Trion & Titanium serial SPI programming driver Date: Fri, 27 Sep 2024 16:14:42 +0200 Message-Id: <20240927141445.157234-1-iansdannapel@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-fpga@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ian Dannapel Add a new driver for loading binary firmware to volatile configuration RAM using "SPI passive programming" on Efinix FPGAs. Signed-off-by: Ian Dannapel --- drivers/fpga/Kconfig | 10 ++ drivers/fpga/Makefile | 1 + drivers/fpga/efinix-trion-spi-passive.c | 211 ++++++++++++++++++++++++ 3 files changed, 222 insertions(+) create mode 100644 drivers/fpga/efinix-trion-spi-passive.c diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 37b35f58f0df..eb1e44c4e3e0 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -83,6 +83,16 @@ config FPGA_MGR_XILINX_SPI FPGA manager driver support for Xilinx FPGA configuration over slave serial interface. +config FPGA_MGR_EFINIX_SPI + tristate "Efinix FPGA configuration over SPI passive" + depends on SPI + help + This option enables support for the FPGA manager driver to + configure Efinix Trion and Titanium Series FPGAs over SPI + using passive serial mode. + Warning: Do not activate this if there are other SPI devices + on the same bus as it might interfere with the transmission. + config FPGA_MGR_ICE40_SPI tristate "Lattice iCE40 SPI" depends on OF && SPI diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index aeb89bb13517..1a95124ff847 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o obj-$(CONFIG_FPGA_MGR_XILINX_CORE) += xilinx-core.o obj-$(CONFIG_FPGA_MGR_XILINX_SELECTMAP) += xilinx-selectmap.o obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o +obj-$(CONFIG_FPGA_MGR_EFINIX_SPI) += efinix-trion-spi-passive.o obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o diff --git a/drivers/fpga/efinix-trion-spi-passive.c b/drivers/fpga/efinix-trion-spi-passive.c new file mode 100644 index 000000000000..87ff645265ca --- /dev/null +++ b/drivers/fpga/efinix-trion-spi-passive.c @@ -0,0 +1,211 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Trion and Titanium Series FPGA SPI Passive Programming Driver + * + * Copyright (C) 2024 iris-GmbH infrared & intelligent sensors + * + * Ian Dannapel + * + * Manage Efinix FPGA firmware that is loaded over SPI using + * the serial configuration interface. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct efinix_spi_conf { + struct spi_device *spi; + struct gpio_desc *cdone; + struct gpio_desc *creset; + struct gpio_desc *cs; +}; + +static int efinix_spi_get_cdone_gpio(struct efinix_spi_conf *conf) +{ + int ret; + + ret = gpiod_get_value(conf->cdone); + return ret; +} + +static void efinix_spi_reset(struct efinix_spi_conf *conf) +{ + gpiod_set_value(conf->creset, 1); + /* wait tCRESET_N */ + usleep_range(5, 15); + gpiod_set_value(conf->creset, 0); +} + +static enum fpga_mgr_states efinix_spi_state(struct fpga_manager *mgr) +{ + struct efinix_spi_conf *conf = mgr->priv; + + if (conf->cdone && efinix_spi_get_cdone_gpio(conf) == 1) + return FPGA_MGR_STATE_OPERATING; + + return FPGA_MGR_STATE_UNKNOWN; +} + +static int efinix_spi_apply_clk_cycles(struct efinix_spi_conf *conf) +{ + char data[13] = {0}; + + return spi_write(conf->spi, data, sizeof(data)); +} + +static int efinix_spi_write_init(struct fpga_manager *mgr, + struct fpga_image_info *info, + const char *buf, size_t count) +{ + struct efinix_spi_conf *conf = mgr->priv; + + if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) { + dev_err(&mgr->dev, "Partial reconfiguration not supported\n"); + return -EINVAL; + } + + /* reset with chip select active */ + gpiod_set_value(conf->cs, 1); + usleep_range(5, 15); + efinix_spi_reset(conf); + + /* wait tDMIN */ + usleep_range(100, 150); + + return 0; +} + +static int efinix_spi_write(struct fpga_manager *mgr, const char *buf, + size_t count) +{ + struct efinix_spi_conf *conf = mgr->priv; + int ret; + + ret = spi_write(conf->spi, buf, count); + if (ret) { + dev_err(&mgr->dev, "SPI error in firmware write: %d\n", + ret); + return ret; + } + + return 0; +} + +static int efinix_spi_write_complete(struct fpga_manager *mgr, + struct fpga_image_info *info) +{ + struct efinix_spi_conf *conf = mgr->priv; + unsigned long timeout = + jiffies + usecs_to_jiffies(info->config_complete_timeout_us); + bool expired = false; + int done; + + /* append at least 100 clock cycles */ + efinix_spi_apply_clk_cycles(conf); + + /* release chip select */ + gpiod_set_value(conf->cs, 0); + + if (conf->cdone) { + while (!expired) { + expired = time_after(jiffies, timeout); + + done = efinix_spi_get_cdone_gpio(conf); + if (done < 0) + return done; + + if (done) + break; + } + } + + if (expired) + return -ETIMEDOUT; + + /* wait tUSER */ + usleep_range(75, 125); + + return 0; +} + +static const struct fpga_manager_ops efinix_spi_ops = { + .state = efinix_spi_state, + .write_init = efinix_spi_write_init, + .write = efinix_spi_write, + .write_complete = efinix_spi_write_complete, +}; + +static int efinix_spi_probe(struct spi_device *spi) +{ + struct efinix_spi_conf *conf; + struct fpga_manager *mgr; + + conf = devm_kzalloc(&spi->dev, sizeof(*conf), GFP_KERNEL); + if (!conf) + return -ENOMEM; + + conf->spi = spi; + + conf->creset = devm_gpiod_get(&spi->dev, "creset", GPIOD_OUT_HIGH); + if (IS_ERR(conf->creset)) + return dev_err_probe(&spi->dev, PTR_ERR(conf->creset), + "Failed to get RESET gpio\n"); + + conf->cs = devm_gpiod_get(&spi->dev, "cs", GPIOD_OUT_HIGH); + if (IS_ERR(conf->cs)) + return dev_err_probe(&spi->dev, PTR_ERR(conf->cs), + "Failed to get CHIP_SELECT gpio\n"); + + if (!(spi->mode & SPI_CPHA) || !(spi->mode & SPI_CPOL)) + return dev_err_probe(&spi->dev, -EINVAL, + "Unsupported SPI mode, set CPHA and CPOL\n"); + + conf->cdone = devm_gpiod_get_optional(&spi->dev, "cdone", GPIOD_IN); + if (IS_ERR(conf->cdone)) + return dev_err_probe(&spi->dev, PTR_ERR(conf->cdone), + "Failed to get CDONE gpio\n"); + + mgr = devm_fpga_mgr_register(&spi->dev, + "Efinix SPI Passive Programming FPGA Manager", + &efinix_spi_ops, conf); + + return PTR_ERR_OR_ZERO(mgr); +} + +#ifdef CONFIG_OF +static const struct of_device_id efinix_spi_of_match[] = { + { .compatible = "efinix,trion-spi-passive", }, + { .compatible = "efinix,titanium-spi-passive", }, + {} +}; +MODULE_DEVICE_TABLE(of, efinix_spi_of_match); +#endif + +static const struct spi_device_id efinix_ids[] = { + { "trion-spi-passive", 0 }, + { "titanium-spi-passive", 0 }, + {}, +}; +MODULE_DEVICE_TABLE(spi, efinix_ids); + +static struct spi_driver efinix_spi_passive_driver = { + .driver = { + .name = "efinix-fpga-spi-passive", + .of_match_table = of_match_ptr(efinix_spi_of_match), + }, + .probe = efinix_spi_probe, + .id_table = efinix_ids, +}; + +module_spi_driver(efinix_spi_passive_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Ian Dannapel "); +MODULE_DESCRIPTION("Load Efinix FPGA firmware over SPI passive"); From patchwork Fri Sep 27 14:14:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ian Dannapel X-Patchwork-Id: 13814347 Received: from mail-ed1-f44.google.com (mail-ed1-f44.google.com [209.85.208.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE1D08175B; Fri, 27 Sep 2024 14:14:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727446495; cv=none; b=CdIWIc8qD8dGEix70MMR0BGZ8awmBfkg7bOExPH8JiDx+BSsOqzdPlmmyeYxNMN5NH+qFlOnvctTsStnoXa2KgxOJ13mplEde0sFViBvn4cSuTnpX4Hob77OzqDzpOr40gVBAde+3MfmjCSK+1mX2C4KJv2XtMLWFG+2awEkrU4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727446495; c=relaxed/simple; bh=vMHdXezo8F6NytIi0yVum/WQLuQ1mWg0no4EG5bxbc0=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DPXGGEuqR/JrgPcuqqCf8JZmbQiOBPPw1+bB+Pjygzxgilm8TR7ghS5BPO5bTLXW8vBUQmkiau7aDtxuXf9tolSfofF5pC4doDVe1XvynCvN0FmBhd4tnqUN7qhEqsmj4SNrhL+1y530775PJ4yQD2Kh/DSUw2x075HRJLUnrSc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=NC28D+2z; arc=none smtp.client-ip=209.85.208.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="NC28D+2z" Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-5c26815e174so2708244a12.0; Fri, 27 Sep 2024 07:14:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1727446492; x=1728051292; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=bkWDrxtzPAW+5+5JFN9vXC+mzeQg0UTeJoT6Itk6ArM=; b=NC28D+2zDqBRZVx3X240kanRxaMbtSXgAUZyM6Hs+w0z0+ar473iV4MS32gczHnLXI FkbfuaCzLie5BzVlwzuD73sbhnYqQ1tcZJ/0utGHvliRh0qkPIf0a+7TksFF9yckOgaK PpT0SlBOJL613eBaZC23qVNvGAiwfk40wKbsa+DucybUsHragtiz9AUPJVZ1riWDZivG xtI7vwRj35Zzk/oB7KiFT0ZwPtSSEx7nBVm7b2I5chS8s/UiV82MOy78vJzSv+2IimGk 7UnqaZb7qqKySUeBTYTsubU8T2TYrFYPzX9HzCk8I+e1e0DuaizbYetFn8b0ghCqvP+b NXIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727446492; x=1728051292; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bkWDrxtzPAW+5+5JFN9vXC+mzeQg0UTeJoT6Itk6ArM=; b=WEUXvz0BESpdyyewmmWc5OBisG/GIy6uct99o/PuQSks2WmSWsdVeNFEkBpWs7bD1v wJWoXeyxyfbOnad8StIATid/jPv0x4P8PYypPd8KFKkid9I+841pYZeN1VgQm+owbFzZ xUZZBzykOp08Y/mVDjp7BZ/MPH3Qef/+7jbMeagIi2BWxyEa7djkdLrkyu5PBDyV9Yxk kEi6E8DTqB5jampdRP/zw/3j88D2r+WHFaW9fZ/sdS0P/XZjDQbzFycRYvHw7DaVfEqA 46B1zM87ABf7LXG33wCmREC2+W0oqOnjDj4Nh5ElcxvP5QzD7Z1ymS2I+zI/XMG025Oz kQWw== X-Forwarded-Encrypted: i=1; AJvYcCUPOgZ1a5B+BMvZ8nOMlW22QX5M+EVzfvaKhriErYTktKT1AqaGrdP8jmgnsWG/ji1DuZCrxwiIDIdCyJjo@vger.kernel.org, AJvYcCUiN0SpuF5tAo/t+Lu7c6j9hKmbVeOHswGvNS0jNn9f6AXQMrGhL7OWpNSMox6YXkiduZKsuGoWp249Kw==@vger.kernel.org, AJvYcCW550zqHk+umkfy/4OhQZRQ5i0KgUBiRw9+YvI0wMJC5Yv/7IM70b2Jmsn0GMsn2dmSUEZSoe5bwNsn@vger.kernel.org X-Gm-Message-State: AOJu0Yxtc9OM2hljwOslIQO5UCE/crJBbxZUcEIPCIvZcZXQNXQE4Ou0 HC7LlKHMo7elVApWxjRh8glVJwY07pkIQO8goZll4/ADPrDrbGYl X-Google-Smtp-Source: AGHT+IFFiPrpsZ8zE8pgQpl9fyuJ59VucFBfawSTkII78dFLJg7RDgX50vDzgkxINpW6j1+5lUnBQA== X-Received: by 2002:a05:6402:2318:b0:5c5:c060:420d with SMTP id 4fb4d7f45d1cf-5c882603693mr2265124a12.25.1727446491890; Fri, 27 Sep 2024 07:14:51 -0700 (PDT) Received: from iris-Ian.fritz.box (p200300eb5f4f030052bd6081d2396adf.dip0.t-ipconnect.de. [2003:eb:5f4f:300:52bd:6081:d239:6adf]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c88248af00sm1184519a12.67.2024.09.27.07.14.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2024 07:14:51 -0700 (PDT) From: iansdannapel@gmail.com To: mdf@kernel.org, hao.wu@intel.com, yilun.xu@intel.com, trix@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, neil.armstrong@linaro.org, heiko.stuebner@cherry.de, rafal@milecki.pl, linus.walleij@linaro.org, iansdannapel@gmail.com, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] dt-bindings: fpga: Add Efinix serial SPI programming bindings Date: Fri, 27 Sep 2024 16:14:43 +0200 Message-Id: <20240927141445.157234-2-iansdannapel@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240927141445.157234-1-iansdannapel@gmail.com> References: <20240927141445.157234-1-iansdannapel@gmail.com> Precedence: bulk X-Mailing-List: linux-fpga@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ian Dannapel Add device tree binding documentation for configuring Efinix FPGA using serial SPI passive programming mode. Signed-off-by: Ian Dannapel --- .../fpga/efinix,trion-spi-passive.yaml | 85 +++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/efinix,trion-spi-passive.yaml diff --git a/Documentation/devicetree/bindings/fpga/efinix,trion-spi-passive.yaml b/Documentation/devicetree/bindings/fpga/efinix,trion-spi-passive.yaml new file mode 100644 index 000000000000..ec6697fa6f44 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/efinix,trion-spi-passive.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fpga/efinix,trion-spi-passive.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Efinix SPI FPGA Manager + +maintainers: + - Ian Dannapel + +description: | + Efinix Trion and Titanium Series FPGAs support a method of loading the + bitstream over what is referred to as "SPI Passive Programming". + Only serial (1x bus width) is supported, setting the programming mode + is not in the scope the this manager and must be done elsewhere. + + Warning: The slave serial link is not technically SPI and therefore it is + not recommended to have other devices on the same bus since it might + interfere or be interfered by other transmissions. + + References: + - https://www.efinixinc.com/docs/an033-configuring-titanium-fpgas-v2.6.pdf + - https://www.efinixinc.com/docs/an006-configuring-trion-fpgas-v6.0.pdf + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + enum: + - efinix,trion-spi-passive + - efinix,titanium-spi-passive + + spi-cpha: true + + spi-cpol: true + + spi-max-frequency: + maximum: 25000000 + + reg: + maxItems: 1 + + creset-gpios: + description: + reset and re-configuration trigger pin (low active) + maxItems: 1 + + cs-gpios: + description: + chip-select pin (low active) + maxItems: 1 + + cdone-gpios: + description: + optional configuration done status pin (high active) + maxItems: 1 + +required: + - compatible + - reg + - creset-gpios + - cs-gpios + +additionalProperties: false + +examples: + - | + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + fpga-mgr@0 { + compatible = "efinix,trion-spi-passive"; + reg = <0>; + spi-max-frequency = <25000000>; + spi-cpha; + spi-cpol; + creset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + cdone-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + }; + }; +... From patchwork Fri Sep 27 14:14:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ian Dannapel X-Patchwork-Id: 13814348 Received: from mail-ed1-f48.google.com (mail-ed1-f48.google.com [209.85.208.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA1C013CFBC; Fri, 27 Sep 2024 14:14:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727446500; cv=none; b=Drnj9ZIf5pKW1MLYK6YMkfriTC8KkwN2yua4ow5mPQEspQksPkRLFNlCEdEsE3s8+Ds+jxrC3ZZ3xXSpVAJexhFGpE31h6q2zOdYb+4bHaavPnuJAMXHgcEzg35VwyhmIGzpBILm6uyiVz7QYZXJuRgZcH57HyW8kqGzvk6SlUY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727446500; c=relaxed/simple; bh=bQsKNhKpyy3xpYNMPofWZ74q+9a6v7WVDosFvn3fS0k=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=aB7KB747/ZlnRry5mYWtA51bz7Mfq8lN9J5cMCZzND+x5FwljbS4CEWl71h5zcjmVVvERIWa7lF3bPtKh38OOOfjfHUjf5Fpu5kDFhpEigrP4KUJIXl2XDPUynyDjHBWKlWyO2PVns0iDHU+9rozuunVeyd6qknExzGgKIKiPV4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=WBKdjqnf; arc=none smtp.client-ip=209.85.208.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WBKdjqnf" Received: by mail-ed1-f48.google.com with SMTP id 4fb4d7f45d1cf-5c881aa669fso1478888a12.0; Fri, 27 Sep 2024 07:14:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1727446497; x=1728051297; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=YFn/mhfbQIWTTJwtmXdMRSt0BoD/XbstVD6yvugNe6U=; b=WBKdjqnf++UNI76OvOvQb48DYZ+zapwr87X59a7RWIR4SHS9qGUwMurubSEjyF4bpH QeGcYPiDR9KRmTCRRFdFKsejL9YjJhuLbQdnIzvIzhPWotzSgh0xjnyhvIemaoJTDvnu RZDVMK2pL4brjgRns0olcclH9ShWCdpj4RQBrvKe8ZcfOFTJAmEOwN/2+nZQbVO2YgN3 7keLfhgOaGsep7ON7iEIxh9i0qSpU6eVjEJICBPSzUdFD80VB1ooluPCVc71vU3sCUDA w+QPiZBz50p20JmKVBI5Hp9A7ezSenzj3MMf19ZNNP7ZYGRZ/BDn+ZAn82cvCUcANtRK 7/ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727446497; x=1728051297; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YFn/mhfbQIWTTJwtmXdMRSt0BoD/XbstVD6yvugNe6U=; b=JOqLmPoOv0PIEj/q+MNfbajRlS8F5iuuSTYrKkUZ3w0o0MJ1IjxRxPOjgg5DYlvAC+ 4arAYjmUTZlvKmDyKxjraxTPLh8e6GbGXeo1FKjtWhN04UPAt4wTv64UMVZKHvHuIo4N fI+RcHS78U5q8FFlghBcz0Sg/2Fsly0Ot0M0hW62booBzBrkb54iNhb7Bqj8NWP++UHs buDpTJ2iQvttcnMWgcdDbTqwMPOud9hzWi7VOYSJP1jA6Q+btR4ta6sEBop5TS4CbXVV MwFNO7w14gePFcSauNA0CaO+g5j/eVEQVv7HdJ00ryMn+mFnSPhnSpPar9gwfnrj24Qb 02VA== X-Forwarded-Encrypted: i=1; AJvYcCUMrjFAhEUQrfN2LUj05QgUoZrW8+/fgPhL+wvtvN3cEzpcgwVWDnQTyHTuGGyvKo6HUMalAAvpIOpC@vger.kernel.org, AJvYcCWHWOS1dPUYYymnBWhGmFBGi55dIoaR+W+efvnh11oN1ioHWmNdmRJEjtrc3nNusysTlRUv8y5DpUDV2g==@vger.kernel.org, AJvYcCWKIbhXvRK+EICAk3ZAf2qUKSJS5U3OwllzTPmVqmiZvodvx9Otg8dt8/h0ZyCQ/cKGu5nEEFV67FHZewDK@vger.kernel.org X-Gm-Message-State: AOJu0YyzTY2ArZwmIGviEMKTQ9FtBXXV4xioZyH8aV3WGTS88hv7K2Po Cy13X9Uga4cCsIeInobRaxcu6w0L7VpjYxB1Ehy5xjGnqvdnaOgJ X-Google-Smtp-Source: AGHT+IHtztav/9O7O27fmQV4K2u2kScLMUvJ9FEjY9CIXam0GMXu695pl2EnOqlgCfiKzS/wj9u2Kw== X-Received: by 2002:a05:6402:42c7:b0:5c5:c454:a27b with SMTP id 4fb4d7f45d1cf-5c8824d4278mr2708229a12.12.1727446496677; Fri, 27 Sep 2024 07:14:56 -0700 (PDT) Received: from iris-Ian.fritz.box (p200300eb5f4f030052bd6081d2396adf.dip0.t-ipconnect.de. [2003:eb:5f4f:300:52bd:6081:d239:6adf]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c88248af00sm1184519a12.67.2024.09.27.07.14.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2024 07:14:56 -0700 (PDT) From: iansdannapel@gmail.com To: mdf@kernel.org, hao.wu@intel.com, yilun.xu@intel.com, trix@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, neil.armstrong@linaro.org, heiko.stuebner@cherry.de, rafal@milecki.pl, linus.walleij@linaro.org, iansdannapel@gmail.com, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] dt-bindings: vendor-prefix: Add prefix for Efinix, Inc. Date: Fri, 27 Sep 2024 16:14:44 +0200 Message-Id: <20240927141445.157234-3-iansdannapel@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240927141445.157234-1-iansdannapel@gmail.com> References: <20240927141445.157234-1-iansdannapel@gmail.com> Precedence: bulk X-Mailing-List: linux-fpga@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ian Dannapel Add entry for Efinix, Inc. (https://www.efinixinc.com/) Signed-off-by: Ian Dannapel Acked-by: Alexander Dahl --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index b320a39de7fe..cb92df951fa7 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -430,6 +430,8 @@ patternProperties: description: Emtop Embedded Solutions "^eeti,.*": description: eGalax_eMPIA Technology Inc + "^efinix,.*": + description: Efinix, Inc. "^einfochips,.*": description: Einfochips "^eink,.*":