From patchwork Mon Sep 30 12:31:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816100 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3BD9ACF6497 for ; Mon, 30 Sep 2024 12:31:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D429A10E415; Mon, 30 Sep 2024 12:31:42 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="UCMnQ9jT"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8E0A110E415; Mon, 30 Sep 2024 12:31:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727699501; x=1759235501; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EW2E9iUiByV8WiDIeKHEHvH0KSVz2+oEsT7EuXc5kgQ=; b=UCMnQ9jTGBnmMXKlhxEIvKWOhxol1wEqvYVq9ZaCJp+SsuCl/LWdzrEk 0Qfqdz5Fy/Bgy0nXMq5Dd/bLTJK6XXtktKKPfvcRYZ96TyUI3Zkj3jv2B Xfx9L2fQ2RFyqQ8R+rYss+pKKleHgTv+BPRUWo26f7dMS2ydFtY8Y7tdG VKR5TNGvdMazPILO7aS/PnaJ+tAaNubLFEj5CbiwIJ1feb9rnQjBP0t+J qre4DbAu8siCgxA7LNs9q91HMHhP3MYoZfvzggcWKL44q6bdV69IKuWuD mM8xzDwNaYhHPe0FXMQ5vxJHlJ7o44LlgzVR4Mi5DJrGAbfhxNiBUMXBY A==; X-CSE-ConnectionGUID: ckuWzkEmQ1WYpnc/cGhWTQ== X-CSE-MsgGUID: lDnC1zsqQFG/w+z721RlGQ== X-IronPort-AV: E=McAfee;i="6700,10204,11210"; a="14410304" X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="14410304" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:31:41 -0700 X-CSE-ConnectionGUID: uIxZWBXkQ16V03kGHgElag== X-CSE-MsgGUID: 5NbxRXnpQ2mbbU3SsaTQzA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="73258349" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:31:38 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 01/15] drm/i915/display: reindent subplatform initialization Date: Mon, 30 Sep 2024 15:31:02 +0300 Message-Id: <8dbb0fc4a979dba2b1030384f6dde20ac622d1ba.1727699233.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Make the subplatform initialization less cramped, and follow the coding style more closely. Initialize .pciidlist using designated initializers. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- .../drm/i915/display/intel_display_device.c | 116 +++++++++++++----- 1 file changed, 88 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c index f33062322c66..93c751fde1a9 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.c +++ b/drivers/gpu/drm/i915/display/intel_display_device.c @@ -497,8 +497,14 @@ static const u16 hsw_ulx_ids[] = { static const struct platform_desc hsw_desc = { PLATFORM(HASWELL), .subplatforms = (const struct subplatform_desc[]) { - { INTEL_DISPLAY_HASWELL_ULT, "ULT", hsw_ult_ids }, - { INTEL_DISPLAY_HASWELL_ULX, "ULX", hsw_ulx_ids }, + { + INTEL_DISPLAY_HASWELL_ULT, "ULT", + .pciidlist = hsw_ult_ids, + }, + { + INTEL_DISPLAY_HASWELL_ULX, "ULX", + .pciidlist = hsw_ulx_ids, + }, {}, }, .info = &(const struct intel_display_device_info) { @@ -541,8 +547,14 @@ static const u16 bdw_ulx_ids[] = { static const struct platform_desc bdw_desc = { PLATFORM(BROADWELL), .subplatforms = (const struct subplatform_desc[]) { - { INTEL_DISPLAY_BROADWELL_ULT, "ULT", bdw_ult_ids }, - { INTEL_DISPLAY_BROADWELL_ULX, "ULX", bdw_ulx_ids }, + { + INTEL_DISPLAY_BROADWELL_ULT, "ULT", + .pciidlist = bdw_ult_ids, + }, + { + INTEL_DISPLAY_BROADWELL_ULX, "ULX", + .pciidlist = bdw_ulx_ids, + }, {}, }, .info = &(const struct intel_display_device_info) { @@ -632,8 +644,14 @@ static const enum intel_step skl_steppings[] = { static const struct platform_desc skl_desc = { PLATFORM(SKYLAKE), .subplatforms = (const struct subplatform_desc[]) { - { INTEL_DISPLAY_SKYLAKE_ULT, "ULT", skl_ult_ids }, - { INTEL_DISPLAY_SKYLAKE_ULX, "ULX", skl_ulx_ids }, + { + INTEL_DISPLAY_SKYLAKE_ULT, "ULT", + .pciidlist = skl_ult_ids, + }, + { + INTEL_DISPLAY_SKYLAKE_ULX, "ULX", + .pciidlist = skl_ulx_ids, + }, {}, }, .info = &skl_display, @@ -667,8 +685,14 @@ static const enum intel_step kbl_steppings[] = { static const struct platform_desc kbl_desc = { PLATFORM(KABYLAKE), .subplatforms = (const struct subplatform_desc[]) { - { INTEL_DISPLAY_KABYLAKE_ULT, "ULT", kbl_ult_ids }, - { INTEL_DISPLAY_KABYLAKE_ULX, "ULX", kbl_ulx_ids }, + { + INTEL_DISPLAY_KABYLAKE_ULT, "ULT", + .pciidlist = kbl_ult_ids, + }, + { + INTEL_DISPLAY_KABYLAKE_ULX, "ULX", + .pciidlist = kbl_ulx_ids, + }, {}, }, .info = &skl_display, @@ -692,8 +716,14 @@ static const u16 cfl_ulx_ids[] = { static const struct platform_desc cfl_desc = { PLATFORM(COFFEELAKE), .subplatforms = (const struct subplatform_desc[]) { - { INTEL_DISPLAY_COFFEELAKE_ULT, "ULT", cfl_ult_ids }, - { INTEL_DISPLAY_COFFEELAKE_ULX, "ULX", cfl_ulx_ids }, + { + INTEL_DISPLAY_COFFEELAKE_ULT, "ULT", + .pciidlist = cfl_ult_ids, + }, + { + INTEL_DISPLAY_COFFEELAKE_ULX, "ULX", + .pciidlist = cfl_ulx_ids, + }, {}, }, .info = &skl_display, @@ -708,7 +738,10 @@ static const u16 cml_ult_ids[] = { static const struct platform_desc cml_desc = { PLATFORM(COMETLAKE), .subplatforms = (const struct subplatform_desc[]) { - { INTEL_DISPLAY_COMETLAKE_ULT, "ULT", cml_ult_ids }, + { + INTEL_DISPLAY_COMETLAKE_ULT, "ULT", + .pciidlist = cml_ult_ids, + }, {}, }, .info = &skl_display, @@ -824,7 +857,10 @@ static const enum intel_step icl_steppings[] = { static const struct platform_desc icl_desc = { PLATFORM(ICELAKE), .subplatforms = (const struct subplatform_desc[]) { - { INTEL_DISPLAY_ICELAKE_PORT_F, "Port F", icl_port_f_ids }, + { + INTEL_DISPLAY_ICELAKE_PORT_F, "Port F", + .pciidlist = icl_port_f_ids, + }, {}, }, .info = &(const struct intel_display_device_info) { @@ -921,8 +957,11 @@ static const enum intel_step tgl_uy_steppings[] = { static const struct platform_desc tgl_desc = { PLATFORM(TIGERLAKE), .subplatforms = (const struct subplatform_desc[]) { - { INTEL_DISPLAY_TIGERLAKE_UY, "UY", tgl_uy_ids, - STEP_INFO(tgl_uy_steppings) }, + { + INTEL_DISPLAY_TIGERLAKE_UY, "UY", + .pciidlist = tgl_uy_ids, + STEP_INFO(tgl_uy_steppings), + }, {}, }, .info = &(const struct intel_display_device_info) { @@ -998,8 +1037,11 @@ static const enum intel_step adl_s_rpl_s_steppings[] = { static const struct platform_desc adl_s_desc = { PLATFORM(ALDERLAKE_S), .subplatforms = (const struct subplatform_desc[]) { - { INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S, "RPL-S", adls_rpls_ids, - STEP_INFO(adl_s_rpl_s_steppings) }, + { + INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S, "RPL-S", + .pciidlist = adls_rpls_ids, + STEP_INFO(adl_s_rpl_s_steppings), + }, {}, }, .info = &(const struct intel_display_device_info) { @@ -1102,12 +1144,21 @@ static const enum intel_step adl_p_rpl_pu_steppings[] = { static const struct platform_desc adl_p_desc = { PLATFORM(ALDERLAKE_P), .subplatforms = (const struct subplatform_desc[]) { - { INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N, "ADL-N", adlp_adln_ids, - STEP_INFO(adl_p_adl_n_steppings) }, - { INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P, "RPL-P", adlp_rplp_ids, - STEP_INFO(adl_p_rpl_pu_steppings) }, - { INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U, "RPL-U", adlp_rplu_ids, - STEP_INFO(adl_p_rpl_pu_steppings) }, + { + INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N, "ADL-N", + .pciidlist = adlp_adln_ids, + STEP_INFO(adl_p_adl_n_steppings), + }, + { + INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P, "RPL-P", + .pciidlist = adlp_rplp_ids, + STEP_INFO(adl_p_rpl_pu_steppings), + }, + { + INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U, "RPL-U", + .pciidlist = adlp_rplu_ids, + STEP_INFO(adl_p_rpl_pu_steppings), + }, {}, }, .info = &xe_lpd_display, @@ -1161,12 +1212,21 @@ static const enum intel_step dg2_g12_steppings[] = { static const struct platform_desc dg2_desc = { PLATFORM(DG2), .subplatforms = (const struct subplatform_desc[]) { - { INTEL_DISPLAY_DG2_G10, "G10", dg2_g10_ids, - STEP_INFO(dg2_g10_steppings) }, - { INTEL_DISPLAY_DG2_G11, "G11", dg2_g11_ids, - STEP_INFO(dg2_g11_steppings) }, - { INTEL_DISPLAY_DG2_G12, "G12", dg2_g12_ids, - STEP_INFO(dg2_g12_steppings) }, + { + INTEL_DISPLAY_DG2_G10, "G10", + .pciidlist = dg2_g10_ids, + STEP_INFO(dg2_g10_steppings), + }, + { + INTEL_DISPLAY_DG2_G11, "G11", + .pciidlist = dg2_g11_ids, + STEP_INFO(dg2_g11_steppings), + }, + { + INTEL_DISPLAY_DG2_G12, "G12", + .pciidlist = dg2_g12_ids, + STEP_INFO(dg2_g12_steppings), + }, {}, }, .info = &xe_hpd_display, From patchwork Mon Sep 30 12:31:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816101 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3D01ACF6497 for ; Mon, 30 Sep 2024 12:31:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D3DFA10E418; Mon, 30 Sep 2024 12:31:48 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ltu4fWlp"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8F02010E416; Mon, 30 Sep 2024 12:31:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727699507; x=1759235507; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SyfsIFJG+qyV0OeBk3MkSF4BZP4HlhZOx2FiPoF/jFY=; b=ltu4fWlpySMpJlUrfqdB+70NNnlHp9MtmMWxX2QMX18C0P/yzm4v/FQn /hQbfUSLCTKOTefOl3RbM5Vm0su5K4T+wo8nBfKUVejs3aJJvotSG/4An NtJoxCvFnpjsLWIsZXbUKgEYDn0jzOR5Pjh9W5e2TfHanTpFQl2ox6FUT uJ+1FnR3+LdeqEbVZgLlznZh2zvLarsNUHUjB5L9yWsIvVTcOySnc5aH0 ry11GjvavFt6Mj7lT6kOJJJ6nb//Yvag44bpJZzOscAbBWSEpwK6Fnwud lX2TPccyYzKe1FkGgwfJCM9NnZqiiCCk+aJdqpZbEdVfItd8h4yOTi5uX Q==; X-CSE-ConnectionGUID: YCOU3g+STq6NvSkIeplY5A== X-CSE-MsgGUID: +QuGLHSsR16NJyTi4zzuKA== X-IronPort-AV: E=McAfee;i="6700,10204,11210"; a="14410313" X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="14410313" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:31:47 -0700 X-CSE-ConnectionGUID: +itm1Q3RTXyzOpSVZIRVug== X-CSE-MsgGUID: feEUcvpAQP2YbybpkXu6UA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="73258387" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:31:44 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 02/15] drm/i915/display: use a macro to initialize subplatforms Date: Mon, 30 Sep 2024 15:31:03 +0300 Message-Id: <8a2fb625fbc3623089e36fea3d09a6343c2a468c.1727699233.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Make it easier to change the underlying structures by using a macro similar to PLATFORM() for initialization. The subplatform names in debug logs change slightly as they now reflect the enum rather than manually entered names. For example, RAPTORLAKE_S rather than RPL-S. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- .../drm/i915/display/intel_display_device.c | 44 ++++++++++--------- 1 file changed, 24 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c index 93c751fde1a9..d311edbfc069 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.c +++ b/drivers/gpu/drm/i915/display/intel_display_device.c @@ -37,6 +37,10 @@ struct subplatform_desc { struct stepping_desc step_info; }; +#define SUBPLATFORM(_platform, _subplatform) \ + .subplatform = (INTEL_DISPLAY_##_platform##_##_subplatform), \ + .name = #_subplatform + struct platform_desc { enum intel_display_platform platform; const char *name; @@ -498,11 +502,11 @@ static const struct platform_desc hsw_desc = { PLATFORM(HASWELL), .subplatforms = (const struct subplatform_desc[]) { { - INTEL_DISPLAY_HASWELL_ULT, "ULT", + SUBPLATFORM(HASWELL, ULT), .pciidlist = hsw_ult_ids, }, { - INTEL_DISPLAY_HASWELL_ULX, "ULX", + SUBPLATFORM(HASWELL, ULX), .pciidlist = hsw_ulx_ids, }, {}, @@ -548,11 +552,11 @@ static const struct platform_desc bdw_desc = { PLATFORM(BROADWELL), .subplatforms = (const struct subplatform_desc[]) { { - INTEL_DISPLAY_BROADWELL_ULT, "ULT", + SUBPLATFORM(BROADWELL, ULT), .pciidlist = bdw_ult_ids, }, { - INTEL_DISPLAY_BROADWELL_ULX, "ULX", + SUBPLATFORM(BROADWELL, ULX), .pciidlist = bdw_ulx_ids, }, {}, @@ -645,11 +649,11 @@ static const struct platform_desc skl_desc = { PLATFORM(SKYLAKE), .subplatforms = (const struct subplatform_desc[]) { { - INTEL_DISPLAY_SKYLAKE_ULT, "ULT", + SUBPLATFORM(SKYLAKE, ULT), .pciidlist = skl_ult_ids, }, { - INTEL_DISPLAY_SKYLAKE_ULX, "ULX", + SUBPLATFORM(SKYLAKE, ULX), .pciidlist = skl_ulx_ids, }, {}, @@ -686,11 +690,11 @@ static const struct platform_desc kbl_desc = { PLATFORM(KABYLAKE), .subplatforms = (const struct subplatform_desc[]) { { - INTEL_DISPLAY_KABYLAKE_ULT, "ULT", + SUBPLATFORM(KABYLAKE, ULT), .pciidlist = kbl_ult_ids, }, { - INTEL_DISPLAY_KABYLAKE_ULX, "ULX", + SUBPLATFORM(KABYLAKE, ULX), .pciidlist = kbl_ulx_ids, }, {}, @@ -717,11 +721,11 @@ static const struct platform_desc cfl_desc = { PLATFORM(COFFEELAKE), .subplatforms = (const struct subplatform_desc[]) { { - INTEL_DISPLAY_COFFEELAKE_ULT, "ULT", + SUBPLATFORM(COFFEELAKE, ULT), .pciidlist = cfl_ult_ids, }, { - INTEL_DISPLAY_COFFEELAKE_ULX, "ULX", + SUBPLATFORM(COFFEELAKE, ULX), .pciidlist = cfl_ulx_ids, }, {}, @@ -739,7 +743,7 @@ static const struct platform_desc cml_desc = { PLATFORM(COMETLAKE), .subplatforms = (const struct subplatform_desc[]) { { - INTEL_DISPLAY_COMETLAKE_ULT, "ULT", + SUBPLATFORM(COMETLAKE, ULT), .pciidlist = cml_ult_ids, }, {}, @@ -858,7 +862,7 @@ static const struct platform_desc icl_desc = { PLATFORM(ICELAKE), .subplatforms = (const struct subplatform_desc[]) { { - INTEL_DISPLAY_ICELAKE_PORT_F, "Port F", + SUBPLATFORM(ICELAKE, PORT_F), .pciidlist = icl_port_f_ids, }, {}, @@ -958,7 +962,7 @@ static const struct platform_desc tgl_desc = { PLATFORM(TIGERLAKE), .subplatforms = (const struct subplatform_desc[]) { { - INTEL_DISPLAY_TIGERLAKE_UY, "UY", + SUBPLATFORM(TIGERLAKE, UY), .pciidlist = tgl_uy_ids, STEP_INFO(tgl_uy_steppings), }, @@ -1038,7 +1042,7 @@ static const struct platform_desc adl_s_desc = { PLATFORM(ALDERLAKE_S), .subplatforms = (const struct subplatform_desc[]) { { - INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S, "RPL-S", + SUBPLATFORM(ALDERLAKE_S, RAPTORLAKE_S), .pciidlist = adls_rpls_ids, STEP_INFO(adl_s_rpl_s_steppings), }, @@ -1145,17 +1149,17 @@ static const struct platform_desc adl_p_desc = { PLATFORM(ALDERLAKE_P), .subplatforms = (const struct subplatform_desc[]) { { - INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N, "ADL-N", + SUBPLATFORM(ALDERLAKE_P, ALDERLAKE_N), .pciidlist = adlp_adln_ids, STEP_INFO(adl_p_adl_n_steppings), }, { - INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P, "RPL-P", + SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_P), .pciidlist = adlp_rplp_ids, STEP_INFO(adl_p_rpl_pu_steppings), }, { - INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U, "RPL-U", + SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_U), .pciidlist = adlp_rplu_ids, STEP_INFO(adl_p_rpl_pu_steppings), }, @@ -1213,17 +1217,17 @@ static const struct platform_desc dg2_desc = { PLATFORM(DG2), .subplatforms = (const struct subplatform_desc[]) { { - INTEL_DISPLAY_DG2_G10, "G10", + SUBPLATFORM(DG2, G10), .pciidlist = dg2_g10_ids, STEP_INFO(dg2_g10_steppings), }, { - INTEL_DISPLAY_DG2_G11, "G11", + SUBPLATFORM(DG2, G11), .pciidlist = dg2_g11_ids, STEP_INFO(dg2_g11_steppings), }, { - INTEL_DISPLAY_DG2_G12, "G12", + SUBPLATFORM(DG2, G12), .pciidlist = dg2_g12_ids, STEP_INFO(dg2_g12_steppings), }, From patchwork Mon Sep 30 12:31:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816102 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6BA51CF6499 for ; Mon, 30 Sep 2024 12:31:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 06B4B10E41F; Mon, 30 Sep 2024 12:31:54 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Uf3hdydS"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4969410E420; Mon, 30 Sep 2024 12:31:53 +0000 (UTC) DKIM-Signature: v=1; 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d="scan'208";a="73258425" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:31:50 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 03/15] drm/i915/display: use a macro to define platform enumerations Date: Mon, 30 Sep 2024 15:31:04 +0300 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We'll be needing a macro based list of platforms for more things in the future. Start by defining the platform enumerations with it. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- .../drm/i915/display/intel_display_device.h | 115 ++++++++++-------- 1 file changed, 61 insertions(+), 54 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h index 5306bbd13e59..1cc1a2de9e6a 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.h +++ b/drivers/gpu/drm/i915/display/intel_display_device.h @@ -15,63 +15,70 @@ struct drm_i915_private; struct drm_printer; /* Keep in gen based order, and chronological order within a gen */ +#define INTEL_DISPLAY_PLATFORMS(func) \ + func(PLATFORM_UNINITIALIZED) \ + /* Display ver 2 */ \ + func(I830) \ + func(I845G) \ + func(I85X) \ + func(I865G) \ + /* Display ver 3 */ \ + func(I915G) \ + func(I915GM) \ + func(I945G) \ + func(I945GM) \ + func(G33) \ + func(PINEVIEW) \ + /* Display ver 4 */ \ + func(I965G) \ + func(I965GM) \ + func(G45) \ + func(GM45) \ + /* Display ver 5 */ \ + func(IRONLAKE) \ + /* Display ver 6 */ \ + func(SANDYBRIDGE) \ + /* Display ver 7 */ \ + func(IVYBRIDGE) \ + func(VALLEYVIEW) \ + func(HASWELL) \ + /* Display ver 8 */ \ + func(BROADWELL) \ + func(CHERRYVIEW) \ + /* Display ver 9 */ \ + func(SKYLAKE) \ + func(BROXTON) \ + func(KABYLAKE) \ + func(GEMINILAKE) \ + func(COFFEELAKE) \ + func(COMETLAKE) \ + /* Display ver 11 */ \ + func(ICELAKE) \ + func(JASPERLAKE) \ + func(ELKHARTLAKE) \ + /* Display ver 12 */ \ + func(TIGERLAKE) \ + func(ROCKETLAKE) \ + func(DG1) \ + func(ALDERLAKE_S) \ + /* Display ver 13 */ \ + func(ALDERLAKE_P) \ + func(DG2) \ + /* Display ver 14 (based on GMD ID) */ \ + func(METEORLAKE) \ + /* Display ver 20 (based on GMD ID) */ \ + func(LUNARLAKE) \ + /* Display ver 14.1 (based on GMD ID) */ \ + func(BATTLEMAGE) + +#define __ENUM(x) INTEL_DISPLAY_ ## x, + enum intel_display_platform { - INTEL_DISPLAY_PLATFORM_UNINITIALIZED = 0, - /* Display ver 2 */ - INTEL_DISPLAY_I830, - INTEL_DISPLAY_I845G, - INTEL_DISPLAY_I85X, - INTEL_DISPLAY_I865G, - /* Display ver 3 */ - INTEL_DISPLAY_I915G, - INTEL_DISPLAY_I915GM, - INTEL_DISPLAY_I945G, - INTEL_DISPLAY_I945GM, - INTEL_DISPLAY_G33, - INTEL_DISPLAY_PINEVIEW, - /* Display ver 4 */ - INTEL_DISPLAY_I965G, - INTEL_DISPLAY_I965GM, - INTEL_DISPLAY_G45, - INTEL_DISPLAY_GM45, - /* Display ver 5 */ - INTEL_DISPLAY_IRONLAKE, - /* Display ver 6 */ - INTEL_DISPLAY_SANDYBRIDGE, - /* Display ver 7 */ - INTEL_DISPLAY_IVYBRIDGE, - INTEL_DISPLAY_VALLEYVIEW, - INTEL_DISPLAY_HASWELL, - /* Display ver 8 */ - INTEL_DISPLAY_BROADWELL, - INTEL_DISPLAY_CHERRYVIEW, - /* Display ver 9 */ - INTEL_DISPLAY_SKYLAKE, - INTEL_DISPLAY_BROXTON, - INTEL_DISPLAY_KABYLAKE, - INTEL_DISPLAY_GEMINILAKE, - INTEL_DISPLAY_COFFEELAKE, - INTEL_DISPLAY_COMETLAKE, - /* Display ver 11 */ - INTEL_DISPLAY_ICELAKE, - INTEL_DISPLAY_JASPERLAKE, - INTEL_DISPLAY_ELKHARTLAKE, - /* Display ver 12 */ - INTEL_DISPLAY_TIGERLAKE, - INTEL_DISPLAY_ROCKETLAKE, - INTEL_DISPLAY_DG1, - INTEL_DISPLAY_ALDERLAKE_S, - /* Display ver 13 */ - INTEL_DISPLAY_ALDERLAKE_P, - INTEL_DISPLAY_DG2, - /* Display ver 14 (based on GMD ID) */ - INTEL_DISPLAY_METEORLAKE, - /* Display ver 20 (based on GMD ID) */ - INTEL_DISPLAY_LUNARLAKE, - /* Display ver 14.1 (based on GMD ID) */ - INTEL_DISPLAY_BATTLEMAGE, + INTEL_DISPLAY_PLATFORMS(__ENUM) }; +#undef __ENUM + enum intel_display_subplatform { INTEL_DISPLAY_SUBPLATFORM_UNINITIALIZED = 0, INTEL_DISPLAY_HASWELL_ULT, From patchwork Mon Sep 30 12:31:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816103 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6B8C4CF6497 for ; Mon, 30 Sep 2024 12:32:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 14DC810E41E; Mon, 30 Sep 2024 12:32:01 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="hkl/19Tm"; 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d="scan'208";a="14410327" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:31:59 -0700 X-CSE-ConnectionGUID: hxr3WPxUQOW6byNr2viucQ== X-CSE-MsgGUID: Gr/5nmV0TVKARgMFf57lKA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="73258455" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:31:56 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 04/15] drm/i915/display: join the platform and subplatform enums Date: Mon, 30 Sep 2024 15:31:05 +0300 Message-Id: <0c385a0ff098d14116f7b2d0bd5de10dc5196d64.1727699233.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We'll want to use the subplatforms similar to platforms. Join the subplatforms next to their corresponding platforms. Update the comment while at it. v2: Put the subplatforms next to the platforms Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- .../drm/i915/display/intel_display_device.c | 2 +- .../drm/i915/display/intel_display_device.h | 54 +++++++++---------- 2 files changed, 28 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c index d311edbfc069..ab98a69b84a7 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.c +++ b/drivers/gpu/drm/i915/display/intel_display_device.c @@ -31,7 +31,7 @@ struct stepping_desc { .step_info.size = ARRAY_SIZE(_map) struct subplatform_desc { - enum intel_display_subplatform subplatform; + enum intel_display_platform subplatform; const char *name; const u16 *pciidlist; struct stepping_desc step_info; diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h index 1cc1a2de9e6a..dc425e2661bc 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.h +++ b/drivers/gpu/drm/i915/display/intel_display_device.h @@ -14,7 +14,11 @@ struct drm_i915_private; struct drm_printer; -/* Keep in gen based order, and chronological order within a gen */ +/* + * Display platforms and subplatforms. Keep platforms in display version based + * order, chronological order within a version, and subplatforms next to the + * platform. + */ #define INTEL_DISPLAY_PLATFORMS(func) \ func(PLATFORM_UNINITIALIZED) \ /* Display ver 2 */ \ @@ -42,28 +46,49 @@ struct drm_printer; func(IVYBRIDGE) \ func(VALLEYVIEW) \ func(HASWELL) \ + func(HASWELL_ULT) \ + func(HASWELL_ULX) \ /* Display ver 8 */ \ func(BROADWELL) \ + func(BROADWELL_ULT) \ + func(BROADWELL_ULX) \ func(CHERRYVIEW) \ /* Display ver 9 */ \ func(SKYLAKE) \ + func(SKYLAKE_ULT) \ + func(SKYLAKE_ULX) \ func(BROXTON) \ func(KABYLAKE) \ + func(KABYLAKE_ULT) \ + func(KABYLAKE_ULX) \ func(GEMINILAKE) \ func(COFFEELAKE) \ + func(COFFEELAKE_ULT) \ + func(COFFEELAKE_ULX) \ func(COMETLAKE) \ + func(COMETLAKE_ULT) \ + func(COMETLAKE_ULX) \ /* Display ver 11 */ \ func(ICELAKE) \ + func(ICELAKE_PORT_F) \ func(JASPERLAKE) \ func(ELKHARTLAKE) \ /* Display ver 12 */ \ func(TIGERLAKE) \ + func(TIGERLAKE_UY) \ func(ROCKETLAKE) \ func(DG1) \ func(ALDERLAKE_S) \ + func(ALDERLAKE_S_RAPTORLAKE_S) \ /* Display ver 13 */ \ func(ALDERLAKE_P) \ + func(ALDERLAKE_P_ALDERLAKE_N) \ + func(ALDERLAKE_P_RAPTORLAKE_P) \ + func(ALDERLAKE_P_RAPTORLAKE_U) \ func(DG2) \ + func(DG2_G10) \ + func(DG2_G11) \ + func(DG2_G12) \ /* Display ver 14 (based on GMD ID) */ \ func(METEORLAKE) \ /* Display ver 20 (based on GMD ID) */ \ @@ -79,31 +104,6 @@ enum intel_display_platform { #undef __ENUM -enum intel_display_subplatform { - INTEL_DISPLAY_SUBPLATFORM_UNINITIALIZED = 0, - INTEL_DISPLAY_HASWELL_ULT, - INTEL_DISPLAY_HASWELL_ULX, - INTEL_DISPLAY_BROADWELL_ULT, - INTEL_DISPLAY_BROADWELL_ULX, - INTEL_DISPLAY_SKYLAKE_ULT, - INTEL_DISPLAY_SKYLAKE_ULX, - INTEL_DISPLAY_KABYLAKE_ULT, - INTEL_DISPLAY_KABYLAKE_ULX, - INTEL_DISPLAY_COFFEELAKE_ULT, - INTEL_DISPLAY_COFFEELAKE_ULX, - INTEL_DISPLAY_COMETLAKE_ULT, - INTEL_DISPLAY_COMETLAKE_ULX, - INTEL_DISPLAY_ICELAKE_PORT_F, - INTEL_DISPLAY_TIGERLAKE_UY, - INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S, - INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N, - INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P, - INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U, - INTEL_DISPLAY_DG2_G10, - INTEL_DISPLAY_DG2_G11, - INTEL_DISPLAY_DG2_G12, -}; - #define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \ /* Keep in alphabetical order */ \ func(cursor_needs_physical); \ @@ -211,7 +211,7 @@ enum intel_display_subplatform { struct intel_display_runtime_info { enum intel_display_platform platform; - enum intel_display_subplatform subplatform; + enum intel_display_platform subplatform; struct intel_display_ip_ver { u16 ver; From patchwork Mon Sep 30 12:31:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816106 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9BA3CF6497 for ; Mon, 30 Sep 2024 12:32:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6010C10E420; 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X-CSE-ConnectionGUID: Y5cuFIveQNWAxfSkfg8DAw== X-CSE-MsgGUID: gOThpSQlR8KJoRBzEKU0Mw== X-IronPort-AV: E=McAfee;i="6700,10204,11210"; a="14410350" X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="14410350" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:05 -0700 X-CSE-ConnectionGUID: iBJcXxqISxOkvEKMZz2rtw== X-CSE-MsgGUID: aVMArtIiQza28WMWpsoIXA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="73258488" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:02 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 05/15] drm/i915/display: convert display platforms to lower case Date: Mon, 30 Sep 2024 15:31:06 +0300 Message-Id: <0574d8ad22b6899e01a0d84fcf32862ebe557dc5.1727699233.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This will be helpful for follow-up, where the names here become struct member names. This does impact debug logs as well, making everything lower case. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- .../drm/i915/display/intel_display_device.c | 120 +++++++++--------- .../drm/i915/display/intel_display_device.h | 120 +++++++++--------- 2 files changed, 120 insertions(+), 120 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c index ab98a69b84a7..b2610217f5c5 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.c +++ b/drivers/gpu/drm/i915/display/intel_display_device.c @@ -236,7 +236,7 @@ static const struct intel_display_device_info no_display = {}; .__runtime_defaults.cpu_transcoder_mask = BIT(TRANSCODER_A) static const struct platform_desc i830_desc = { - PLATFORM(I830), + PLATFORM(i830), .info = &(const struct intel_display_device_info) { I830_DISPLAY, @@ -245,7 +245,7 @@ static const struct platform_desc i830_desc = { }; static const struct platform_desc i845_desc = { - PLATFORM(I845G), + PLATFORM(i845g), .info = &(const struct intel_display_device_info) { I845_DISPLAY, @@ -254,7 +254,7 @@ static const struct platform_desc i845_desc = { }; static const struct platform_desc i85x_desc = { - PLATFORM(I85X), + PLATFORM(i85x), .info = &(const struct intel_display_device_info) { I830_DISPLAY, @@ -264,7 +264,7 @@ static const struct platform_desc i85x_desc = { }; static const struct platform_desc i865g_desc = { - PLATFORM(I865G), + PLATFORM(i865g), .info = &(const struct intel_display_device_info) { I845_DISPLAY, @@ -286,7 +286,7 @@ static const struct platform_desc i865g_desc = { .__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) /* SDVO B/C */ static const struct platform_desc i915g_desc = { - PLATFORM(I915G), + PLATFORM(i915g), .info = &(const struct intel_display_device_info) { GEN3_DISPLAY, I845_COLORS, @@ -296,7 +296,7 @@ static const struct platform_desc i915g_desc = { }; static const struct platform_desc i915gm_desc = { - PLATFORM(I915GM), + PLATFORM(i915gm), .info = &(const struct intel_display_device_info) { GEN3_DISPLAY, I9XX_COLORS, @@ -309,7 +309,7 @@ static const struct platform_desc i915gm_desc = { }; static const struct platform_desc i945g_desc = { - PLATFORM(I945G), + PLATFORM(i945g), .info = &(const struct intel_display_device_info) { GEN3_DISPLAY, I845_COLORS, @@ -320,7 +320,7 @@ static const struct platform_desc i945g_desc = { }; static const struct platform_desc i945gm_desc = { - PLATFORM(I915GM), + PLATFORM(i915gm), .info = &(const struct intel_display_device_info) { GEN3_DISPLAY, I9XX_COLORS, @@ -334,7 +334,7 @@ static const struct platform_desc i945gm_desc = { }; static const struct platform_desc g33_desc = { - PLATFORM(G33), + PLATFORM(g33), .info = &(const struct intel_display_device_info) { GEN3_DISPLAY, I845_COLORS, @@ -343,7 +343,7 @@ static const struct platform_desc g33_desc = { }; static const struct platform_desc pnv_desc = { - PLATFORM(PINEVIEW), + PLATFORM(pineview), .info = &(const struct intel_display_device_info) { GEN3_DISPLAY, I9XX_COLORS, @@ -364,7 +364,7 @@ static const struct platform_desc pnv_desc = { BIT(TRANSCODER_A) | BIT(TRANSCODER_B) static const struct platform_desc i965g_desc = { - PLATFORM(I965G), + PLATFORM(i965g), .info = &(const struct intel_display_device_info) { GEN4_DISPLAY, .has_overlay = 1, @@ -374,7 +374,7 @@ static const struct platform_desc i965g_desc = { }; static const struct platform_desc i965gm_desc = { - PLATFORM(I965GM), + PLATFORM(i965gm), .info = &(const struct intel_display_device_info) { GEN4_DISPLAY, .has_overlay = 1, @@ -386,7 +386,7 @@ static const struct platform_desc i965gm_desc = { }; static const struct platform_desc g45_desc = { - PLATFORM(G45), + PLATFORM(g45), .info = &(const struct intel_display_device_info) { GEN4_DISPLAY, @@ -395,7 +395,7 @@ static const struct platform_desc g45_desc = { }; static const struct platform_desc gm45_desc = { - PLATFORM(GM45), + PLATFORM(gm45), .info = &(const struct intel_display_device_info) { GEN4_DISPLAY, .supports_tv = 1, @@ -418,14 +418,14 @@ static const struct platform_desc gm45_desc = { .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */ static const struct platform_desc ilk_d_desc = { - PLATFORM(IRONLAKE), + PLATFORM(ironlake), .info = &(const struct intel_display_device_info) { ILK_DISPLAY, }, }; static const struct platform_desc ilk_m_desc = { - PLATFORM(IRONLAKE), + PLATFORM(ironlake), .info = &(const struct intel_display_device_info) { ILK_DISPLAY, @@ -434,7 +434,7 @@ static const struct platform_desc ilk_m_desc = { }; static const struct platform_desc snb_desc = { - PLATFORM(SANDYBRIDGE), + PLATFORM(sandybridge), .info = &(const struct intel_display_device_info) { .has_hotplug = 1, I9XX_PIPE_OFFSETS, @@ -451,7 +451,7 @@ static const struct platform_desc snb_desc = { }; static const struct platform_desc ivb_desc = { - PLATFORM(IVYBRIDGE), + PLATFORM(ivybridge), .info = &(const struct intel_display_device_info) { .has_hotplug = 1, IVB_PIPE_OFFSETS, @@ -468,7 +468,7 @@ static const struct platform_desc ivb_desc = { }; static const struct platform_desc vlv_desc = { - PLATFORM(VALLEYVIEW), + PLATFORM(valleyview), .info = &(const struct intel_display_device_info) { .has_gmch = 1, .has_hotplug = 1, @@ -499,14 +499,14 @@ static const u16 hsw_ulx_ids[] = { }; static const struct platform_desc hsw_desc = { - PLATFORM(HASWELL), + PLATFORM(haswell), .subplatforms = (const struct subplatform_desc[]) { { - SUBPLATFORM(HASWELL, ULT), + SUBPLATFORM(haswell, ult), .pciidlist = hsw_ult_ids, }, { - SUBPLATFORM(HASWELL, ULX), + SUBPLATFORM(haswell, ulx), .pciidlist = hsw_ulx_ids, }, {}, @@ -549,14 +549,14 @@ static const u16 bdw_ulx_ids[] = { }; static const struct platform_desc bdw_desc = { - PLATFORM(BROADWELL), + PLATFORM(broadwell), .subplatforms = (const struct subplatform_desc[]) { { - SUBPLATFORM(BROADWELL, ULT), + SUBPLATFORM(broadwell, ult), .pciidlist = bdw_ult_ids, }, { - SUBPLATFORM(BROADWELL, ULX), + SUBPLATFORM(broadwell, ulx), .pciidlist = bdw_ulx_ids, }, {}, @@ -583,7 +583,7 @@ static const struct platform_desc bdw_desc = { }; static const struct platform_desc chv_desc = { - PLATFORM(CHERRYVIEW), + PLATFORM(cherryview), .info = &(const struct intel_display_device_info) { .has_hotplug = 1, .has_gmch = 1, @@ -646,14 +646,14 @@ static const enum intel_step skl_steppings[] = { }; static const struct platform_desc skl_desc = { - PLATFORM(SKYLAKE), + PLATFORM(skylake), .subplatforms = (const struct subplatform_desc[]) { { - SUBPLATFORM(SKYLAKE, ULT), + SUBPLATFORM(skylake, ult), .pciidlist = skl_ult_ids, }, { - SUBPLATFORM(SKYLAKE, ULX), + SUBPLATFORM(skylake, ulx), .pciidlist = skl_ulx_ids, }, {}, @@ -687,14 +687,14 @@ static const enum intel_step kbl_steppings[] = { }; static const struct platform_desc kbl_desc = { - PLATFORM(KABYLAKE), + PLATFORM(kabylake), .subplatforms = (const struct subplatform_desc[]) { { - SUBPLATFORM(KABYLAKE, ULT), + SUBPLATFORM(kabylake, ult), .pciidlist = kbl_ult_ids, }, { - SUBPLATFORM(KABYLAKE, ULX), + SUBPLATFORM(kabylake, ulx), .pciidlist = kbl_ulx_ids, }, {}, @@ -718,14 +718,14 @@ static const u16 cfl_ulx_ids[] = { }; static const struct platform_desc cfl_desc = { - PLATFORM(COFFEELAKE), + PLATFORM(coffeelake), .subplatforms = (const struct subplatform_desc[]) { { - SUBPLATFORM(COFFEELAKE, ULT), + SUBPLATFORM(coffeelake, ult), .pciidlist = cfl_ult_ids, }, { - SUBPLATFORM(COFFEELAKE, ULX), + SUBPLATFORM(coffeelake, ulx), .pciidlist = cfl_ulx_ids, }, {}, @@ -740,10 +740,10 @@ static const u16 cml_ult_ids[] = { }; static const struct platform_desc cml_desc = { - PLATFORM(COMETLAKE), + PLATFORM(cometlake), .subplatforms = (const struct subplatform_desc[]) { { - SUBPLATFORM(COMETLAKE, ULT), + SUBPLATFORM(cometlake, ult), .pciidlist = cml_ult_ids, }, {}, @@ -782,7 +782,7 @@ static const enum intel_step bxt_steppings[] = { }; static const struct platform_desc bxt_desc = { - PLATFORM(BROXTON), + PLATFORM(broxton), .info = &(const struct intel_display_device_info) { GEN9_LP_DISPLAY, .dbuf.size = 512 - 4, /* 4 blocks for bypass path allocation */ @@ -797,7 +797,7 @@ static const enum intel_step glk_steppings[] = { }; static const struct platform_desc glk_desc = { - PLATFORM(GEMINILAKE), + PLATFORM(geminilake), .info = &(const struct intel_display_device_info) { GEN9_LP_DISPLAY, .dbuf.size = 1024 - 4, /* 4 blocks for bypass path allocation */ @@ -859,10 +859,10 @@ static const enum intel_step icl_steppings[] = { }; static const struct platform_desc icl_desc = { - PLATFORM(ICELAKE), + PLATFORM(icelake), .subplatforms = (const struct subplatform_desc[]) { { - SUBPLATFORM(ICELAKE, PORT_F), + SUBPLATFORM(icelake, port_f), .pciidlist = icl_port_f_ids, }, {}, @@ -887,13 +887,13 @@ static const enum intel_step jsl_ehl_steppings[] = { }; static const struct platform_desc jsl_desc = { - PLATFORM(JASPERLAKE), + PLATFORM(jasperlake), .info = &jsl_ehl_display, STEP_INFO(jsl_ehl_steppings), }; static const struct platform_desc ehl_desc = { - PLATFORM(ELKHARTLAKE), + PLATFORM(elkhartlake), .info = &jsl_ehl_display, STEP_INFO(jsl_ehl_steppings), }; @@ -959,10 +959,10 @@ static const enum intel_step tgl_uy_steppings[] = { }; static const struct platform_desc tgl_desc = { - PLATFORM(TIGERLAKE), + PLATFORM(tigerlake), .subplatforms = (const struct subplatform_desc[]) { { - SUBPLATFORM(TIGERLAKE, UY), + SUBPLATFORM(tigerlake, uy), .pciidlist = tgl_uy_ids, STEP_INFO(tgl_uy_steppings), }, @@ -987,7 +987,7 @@ static const enum intel_step dg1_steppings[] = { }; static const struct platform_desc dg1_desc = { - PLATFORM(DG1), + PLATFORM(dg1), .info = &(const struct intel_display_device_info) { XE_D_DISPLAY, @@ -1004,7 +1004,7 @@ static const enum intel_step rkl_steppings[] = { }; static const struct platform_desc rkl_desc = { - PLATFORM(ROCKETLAKE), + PLATFORM(rocketlake), .info = &(const struct intel_display_device_info) { XE_D_DISPLAY, .abox_mask = BIT(0), @@ -1039,10 +1039,10 @@ static const enum intel_step adl_s_rpl_s_steppings[] = { }; static const struct platform_desc adl_s_desc = { - PLATFORM(ALDERLAKE_S), + PLATFORM(alderlake_s), .subplatforms = (const struct subplatform_desc[]) { { - SUBPLATFORM(ALDERLAKE_S, RAPTORLAKE_S), + SUBPLATFORM(alderlake_s, raptorlake_s), .pciidlist = adls_rpls_ids, STEP_INFO(adl_s_rpl_s_steppings), }, @@ -1146,20 +1146,20 @@ static const enum intel_step adl_p_rpl_pu_steppings[] = { }; static const struct platform_desc adl_p_desc = { - PLATFORM(ALDERLAKE_P), + PLATFORM(alderlake_p), .subplatforms = (const struct subplatform_desc[]) { { - SUBPLATFORM(ALDERLAKE_P, ALDERLAKE_N), + SUBPLATFORM(alderlake_p, alderlake_n), .pciidlist = adlp_adln_ids, STEP_INFO(adl_p_adl_n_steppings), }, { - SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_P), + SUBPLATFORM(alderlake_p, raptorlake_p), .pciidlist = adlp_rplp_ids, STEP_INFO(adl_p_rpl_pu_steppings), }, { - SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_U), + SUBPLATFORM(alderlake_p, raptorlake_u), .pciidlist = adlp_rplu_ids, STEP_INFO(adl_p_rpl_pu_steppings), }, @@ -1214,20 +1214,20 @@ static const enum intel_step dg2_g12_steppings[] = { }; static const struct platform_desc dg2_desc = { - PLATFORM(DG2), + PLATFORM(dg2), .subplatforms = (const struct subplatform_desc[]) { { - SUBPLATFORM(DG2, G10), + SUBPLATFORM(dg2, g10), .pciidlist = dg2_g10_ids, STEP_INFO(dg2_g10_steppings), }, { - SUBPLATFORM(DG2, G11), + SUBPLATFORM(dg2, g11), .pciidlist = dg2_g11_ids, STEP_INFO(dg2_g11_steppings), }, { - SUBPLATFORM(DG2, G12), + SUBPLATFORM(dg2, g12), .pciidlist = dg2_g12_ids, STEP_INFO(dg2_g12_steppings), }, @@ -1305,15 +1305,15 @@ static const struct intel_display_device_info xe2_hpd_display = { * reported by the hardware. */ static const struct platform_desc mtl_desc = { - PLATFORM(METEORLAKE), + PLATFORM(meteorlake), }; static const struct platform_desc lnl_desc = { - PLATFORM(LUNARLAKE), + PLATFORM(lunarlake), }; static const struct platform_desc bmg_desc = { - PLATFORM(BATTLEMAGE), + PLATFORM(battlemage), }; __diag_pop(); diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h index dc425e2661bc..c4208c34cc31 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.h +++ b/drivers/gpu/drm/i915/display/intel_display_device.h @@ -22,79 +22,79 @@ struct drm_printer; #define INTEL_DISPLAY_PLATFORMS(func) \ func(PLATFORM_UNINITIALIZED) \ /* Display ver 2 */ \ - func(I830) \ - func(I845G) \ - func(I85X) \ - func(I865G) \ + func(i830) \ + func(i845g) \ + func(i85x) \ + func(i865g) \ /* Display ver 3 */ \ - func(I915G) \ - func(I915GM) \ - func(I945G) \ - func(I945GM) \ - func(G33) \ - func(PINEVIEW) \ + func(i915g) \ + func(i915gm) \ + func(i945g) \ + func(i945gm) \ + func(g33) \ + func(pineview) \ /* Display ver 4 */ \ - func(I965G) \ - func(I965GM) \ - func(G45) \ - func(GM45) \ + func(i965g) \ + func(i965gm) \ + func(g45) \ + func(gm45) \ /* Display ver 5 */ \ - func(IRONLAKE) \ + func(ironlake) \ /* Display ver 6 */ \ - func(SANDYBRIDGE) \ + func(sandybridge) \ /* Display ver 7 */ \ - func(IVYBRIDGE) \ - func(VALLEYVIEW) \ - func(HASWELL) \ - func(HASWELL_ULT) \ - func(HASWELL_ULX) \ + func(ivybridge) \ + func(valleyview) \ + func(haswell) \ + func(haswell_ult) \ + func(haswell_ulx) \ /* Display ver 8 */ \ - func(BROADWELL) \ - func(BROADWELL_ULT) \ - func(BROADWELL_ULX) \ - func(CHERRYVIEW) \ + func(broadwell) \ + func(broadwell_ult) \ + func(broadwell_ulx) \ + func(cherryview) \ /* Display ver 9 */ \ - func(SKYLAKE) \ - func(SKYLAKE_ULT) \ - func(SKYLAKE_ULX) \ - func(BROXTON) \ - func(KABYLAKE) \ - func(KABYLAKE_ULT) \ - func(KABYLAKE_ULX) \ - func(GEMINILAKE) \ - func(COFFEELAKE) \ - func(COFFEELAKE_ULT) \ - func(COFFEELAKE_ULX) \ - func(COMETLAKE) \ - func(COMETLAKE_ULT) \ - func(COMETLAKE_ULX) \ + func(skylake) \ + func(skylake_ult) \ + func(skylake_ulx) \ + func(broxton) \ + func(kabylake) \ + func(kabylake_ult) \ + func(kabylake_ulx) \ + func(geminilake) \ + func(coffeelake) \ + func(coffeelake_ult) \ + func(coffeelake_ulx) \ + func(cometlake) \ + func(cometlake_ult) \ + func(cometlake_ulx) \ /* Display ver 11 */ \ - func(ICELAKE) \ - func(ICELAKE_PORT_F) \ - func(JASPERLAKE) \ - func(ELKHARTLAKE) \ + func(icelake) \ + func(icelake_port_f) \ + func(jasperlake) \ + func(elkhartlake) \ /* Display ver 12 */ \ - func(TIGERLAKE) \ - func(TIGERLAKE_UY) \ - func(ROCKETLAKE) \ - func(DG1) \ - func(ALDERLAKE_S) \ - func(ALDERLAKE_S_RAPTORLAKE_S) \ + func(tigerlake) \ + func(tigerlake_uy) \ + func(rocketlake) \ + func(dg1) \ + func(alderlake_s) \ + func(alderlake_s_raptorlake_s) \ /* Display ver 13 */ \ - func(ALDERLAKE_P) \ - func(ALDERLAKE_P_ALDERLAKE_N) \ - func(ALDERLAKE_P_RAPTORLAKE_P) \ - func(ALDERLAKE_P_RAPTORLAKE_U) \ - func(DG2) \ - func(DG2_G10) \ - func(DG2_G11) \ - func(DG2_G12) \ + func(alderlake_p) \ + func(alderlake_p_alderlake_n) \ + func(alderlake_p_raptorlake_p) \ + func(alderlake_p_raptorlake_u) \ + func(dg2) \ + func(dg2_g10) \ + func(dg2_g11) \ + func(dg2_g12) \ /* Display ver 14 (based on GMD ID) */ \ - func(METEORLAKE) \ + func(meteorlake) \ /* Display ver 20 (based on GMD ID) */ \ - func(LUNARLAKE) \ + func(lunarlake) \ /* Display ver 14.1 (based on GMD ID) */ \ - func(BATTLEMAGE) + func(battlemage) #define __ENUM(x) INTEL_DISPLAY_ ## x, From patchwork Mon Sep 30 12:31:07 2024 Content-Type: text/plain; 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d="scan'208";a="72882475" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:08 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 06/15] drm/i915/display: add display platforms structure with platform members Date: Mon, 30 Sep 2024 15:31:07 +0300 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add a structure with a bitfield member for each platform and subplatform, and initialize them in platform and subplatform descs. The structure also contains a bitmap in a union for easier manipulation of the bits. Signed-off-by: Jani Nikula --- .../drm/i915/display/intel_display_device.c | 4 ++++ .../drm/i915/display/intel_display_device.h | 19 +++++++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c index b2610217f5c5..258660b49eba 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.c +++ b/drivers/gpu/drm/i915/display/intel_display_device.c @@ -31,6 +31,7 @@ struct stepping_desc { .step_info.size = ARRAY_SIZE(_map) struct subplatform_desc { + struct intel_display_platforms platforms; enum intel_display_platform subplatform; const char *name; const u16 *pciidlist; @@ -38,10 +39,12 @@ struct subplatform_desc { }; #define SUBPLATFORM(_platform, _subplatform) \ + .platforms._platform##_##_subplatform = 1, \ .subplatform = (INTEL_DISPLAY_##_platform##_##_subplatform), \ .name = #_subplatform struct platform_desc { + struct intel_display_platforms platforms; enum intel_display_platform platform; const char *name; const struct subplatform_desc *subplatforms; @@ -50,6 +53,7 @@ struct platform_desc { }; #define PLATFORM(_platform) \ + .platforms._platform = 1, \ .platform = (INTEL_DISPLAY_##_platform), \ .name = #_platform diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h index c4208c34cc31..f166d4698949 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.h +++ b/drivers/gpu/drm/i915/display/intel_display_device.h @@ -6,6 +6,7 @@ #ifndef __INTEL_DISPLAY_DEVICE_H__ #define __INTEL_DISPLAY_DEVICE_H__ +#include #include #include "intel_display_conversion.h" @@ -104,6 +105,24 @@ enum intel_display_platform { #undef __ENUM +#define __MEMBER(name) unsigned long name:1; +#define __COUNT(x) 1 + + +#define __NUM_PLATFORMS (INTEL_DISPLAY_PLATFORMS(__COUNT) 0) + +struct intel_display_platforms { + union { + struct { + INTEL_DISPLAY_PLATFORMS(__MEMBER); + }; + DECLARE_BITMAP(bitmap, __NUM_PLATFORMS); + }; +}; + +#undef __MEMBER +#undef __COUNT +#undef __NUM_PLATFORMS + #define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \ /* Keep in alphabetical order */ \ func(cursor_needs_physical); \ From patchwork Mon Sep 30 12:31:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816105 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CA6C7CF6499 for ; Mon, 30 Sep 2024 12:32:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6D00D10E421; Mon, 30 Sep 2024 12:32:20 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="XyUqTHls"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5D3FE10E421; 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30 Sep 2024 05:32:18 -0700 X-CSE-ConnectionGUID: dhKFltOITWe5aay5wu2VWQ== X-CSE-MsgGUID: aoU6n09kT22bu2roMN5LPQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="72882478" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:15 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 07/15] drm/i915/display: add platform member to struct intel_display Date: Mon, 30 Sep 2024 15:31:08 +0300 Message-Id: <83a5c8be2acc9eb8aa03b9a5a737fd9f79bbc0ac.1727699233.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Facilitate using display->platform.haswell and display->platform.haswell_ult etc. for identifying platforms and subplatforms. Merge the platform and subplatform bitmaps together, and check that there's no overlap. v4: - Lower case, s/is/platform/ v3: - Fix sanity check on display->is after merging subplatform members v2: - Use bitmap ops - Add some sanity checks with warnings Signed-off-by: Jani Nikula --- .../gpu/drm/i915/display/intel_display_core.h | 3 ++ .../drm/i915/display/intel_display_device.c | 35 +++++++++++++++++-- 2 files changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h index 982dd9469195..c19cc7e131e2 100644 --- a/drivers/gpu/drm/i915/display/intel_display_core.h +++ b/drivers/gpu/drm/i915/display/intel_display_core.h @@ -284,6 +284,9 @@ struct intel_display { /* drm device backpointer */ struct drm_device *drm; + /* Platform (and subplatform, if any) identification */ + struct intel_display_platforms platform; + /* Display functions */ struct { /* Top level crtc-ish functions */ diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c index 258660b49eba..be42f941900d 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.c +++ b/drivers/gpu/drm/i915/display/intel_display_device.c @@ -1519,6 +1519,25 @@ static enum intel_step get_pre_gmdid_step(struct intel_display *display, return step; } +/* Size of the entire bitmap, not the number of platforms */ +static unsigned int display_platforms_num_bits(void) +{ + return sizeof(((struct intel_display_platforms *)0)->bitmap) * BITS_PER_BYTE; +} + +/* Number of platform bits set */ +static unsigned int display_platforms_weight(const struct intel_display_platforms *p) +{ + return bitmap_weight(p->bitmap, display_platforms_num_bits()); +} + +/* Merge the subplatform information from src to dst */ +static void display_platforms_or(struct intel_display_platforms *dst, + const struct intel_display_platforms *src) +{ + bitmap_or(dst->bitmap, dst->bitmap, src->bitmap, display_platforms_num_bits()); +} + void intel_display_device_probe(struct drm_i915_private *i915) { struct intel_display *display = &i915->display; @@ -1558,13 +1577,25 @@ void intel_display_device_probe(struct drm_i915_private *i915) &DISPLAY_INFO(i915)->__runtime_defaults, sizeof(*DISPLAY_RUNTIME_INFO(i915))); - drm_WARN_ON(&i915->drm, !desc->platform || !desc->name); + drm_WARN_ON(&i915->drm, !desc->platform || !desc->name || + !display_platforms_weight(&desc->platforms)); DISPLAY_RUNTIME_INFO(i915)->platform = desc->platform; + display->platform = desc->platforms; + subdesc = find_subplatform_desc(pdev, desc); if (subdesc) { - drm_WARN_ON(&i915->drm, !subdesc->subplatform || !subdesc->name); + drm_WARN_ON(&i915->drm, !subdesc->subplatform || !subdesc->name || + !display_platforms_weight(&subdesc->platforms)); DISPLAY_RUNTIME_INFO(i915)->subplatform = subdesc->subplatform; + + display_platforms_or(&display->platform, &subdesc->platforms); + + /* Ensure platform and subplatform are distinct */ + drm_WARN_ON(&i915->drm, + display_platforms_weight(&display->platform) != + display_platforms_weight(&desc->platforms) + + display_platforms_weight(&subdesc->platforms)); } if (ip_ver.ver || ip_ver.rel || ip_ver.step) { From patchwork Mon Sep 30 12:31:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816107 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F378BCF6497 for ; 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X-CSE-ConnectionGUID: yCMi7XWDQFCRVQ7p9ghOTA== X-CSE-MsgGUID: 79kTxqdGTXW1dOb+v4XH4w== X-IronPort-AV: E=McAfee;i="6700,10204,11210"; a="26249445" X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="26249445" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:23 -0700 X-CSE-ConnectionGUID: u18NHc/DQE2f4RPChHtQ0A== X-CSE-MsgGUID: ofSB3nRjQCKOR2sGg5lZ7A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="72882482" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:21 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 08/15] drm/i915/display: remove the display platform enum as unnecessary Date: Mon, 30 Sep 2024 15:31:09 +0300 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The display platform enums are not really needed for anything. Remove. Without the enum, PLATFORM_UNINITIALIZED is also no longer needed for keeping the first enum 0. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_display_device.c | 12 +++--------- drivers/gpu/drm/i915/display/intel_display_device.h | 12 ------------ 2 files changed, 3 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c index be42f941900d..86d3ba26e66f 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.c +++ b/drivers/gpu/drm/i915/display/intel_display_device.c @@ -32,7 +32,6 @@ struct stepping_desc { struct subplatform_desc { struct intel_display_platforms platforms; - enum intel_display_platform subplatform; const char *name; const u16 *pciidlist; struct stepping_desc step_info; @@ -40,12 +39,10 @@ struct subplatform_desc { #define SUBPLATFORM(_platform, _subplatform) \ .platforms._platform##_##_subplatform = 1, \ - .subplatform = (INTEL_DISPLAY_##_platform##_##_subplatform), \ .name = #_subplatform struct platform_desc { struct intel_display_platforms platforms; - enum intel_display_platform platform; const char *name; const struct subplatform_desc *subplatforms; const struct intel_display_device_info *info; /* NULL for GMD ID */ @@ -54,7 +51,6 @@ struct platform_desc { #define PLATFORM(_platform) \ .platforms._platform = 1, \ - .platform = (INTEL_DISPLAY_##_platform), \ .name = #_platform #define ID(id) (id) @@ -1460,7 +1456,7 @@ find_subplatform_desc(struct pci_dev *pdev, const struct platform_desc *desc) const struct subplatform_desc *sp; const u16 *id; - for (sp = desc->subplatforms; sp && sp->subplatform; sp++) + for (sp = desc->subplatforms; sp && sp->pciidlist; sp++) for (id = sp->pciidlist; *id; id++) if (*id == pdev->device) return sp; @@ -1577,17 +1573,15 @@ void intel_display_device_probe(struct drm_i915_private *i915) &DISPLAY_INFO(i915)->__runtime_defaults, sizeof(*DISPLAY_RUNTIME_INFO(i915))); - drm_WARN_ON(&i915->drm, !desc->platform || !desc->name || + drm_WARN_ON(&i915->drm, !desc->name || !display_platforms_weight(&desc->platforms)); - DISPLAY_RUNTIME_INFO(i915)->platform = desc->platform; display->platform = desc->platforms; subdesc = find_subplatform_desc(pdev, desc); if (subdesc) { - drm_WARN_ON(&i915->drm, !subdesc->subplatform || !subdesc->name || + drm_WARN_ON(&i915->drm, !subdesc->name || !display_platforms_weight(&subdesc->platforms)); - DISPLAY_RUNTIME_INFO(i915)->subplatform = subdesc->subplatform; display_platforms_or(&display->platform, &subdesc->platforms); diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h index f166d4698949..2711c82f518b 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.h +++ b/drivers/gpu/drm/i915/display/intel_display_device.h @@ -21,7 +21,6 @@ struct drm_printer; * platform. */ #define INTEL_DISPLAY_PLATFORMS(func) \ - func(PLATFORM_UNINITIALIZED) \ /* Display ver 2 */ \ func(i830) \ func(i845g) \ @@ -97,14 +96,6 @@ struct drm_printer; /* Display ver 14.1 (based on GMD ID) */ \ func(battlemage) -#define __ENUM(x) INTEL_DISPLAY_ ## x, - -enum intel_display_platform { - INTEL_DISPLAY_PLATFORMS(__ENUM) -}; - -#undef __ENUM - #define __MEMBER(name) unsigned long name:1; #define __COUNT(x) 1 + @@ -229,9 +220,6 @@ struct intel_display_platforms { INTEL_DISPLAY_STEP(__i915) >= (since) && INTEL_DISPLAY_STEP(__i915) < (until)) struct intel_display_runtime_info { - enum intel_display_platform platform; - enum intel_display_platform subplatform; - struct intel_display_ip_ver { u16 ver; u16 rel; From patchwork Mon Sep 30 12:31:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816108 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CA979CF6497 for ; Mon, 30 Sep 2024 12:32:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 72D7E10E425; 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X-CSE-ConnectionGUID: rr4wYS9HTLizcxuvxRb5zg== X-CSE-MsgGUID: Oy1HtHzfT5erQstYGRFn5A== X-IronPort-AV: E=McAfee;i="6700,10204,11210"; a="26249453" X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="26249453" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:29 -0700 X-CSE-ConnectionGUID: ELjTROjfTKmsfjTTJnRN4g== X-CSE-MsgGUID: fu713mMgSmuDa20jLABydg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="72882487" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:27 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 09/15] drm/i915/display: add platform group for g4x Date: Mon, 30 Sep 2024 15:31:10 +0300 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add support for defining aliases for platform groups, such as g4x that covers both g45 and gm45. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_display_device.c | 9 +++++++++ drivers/gpu/drm/i915/display/intel_display_device.h | 1 + 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c index 86d3ba26e66f..73d4c9ed5a10 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.c +++ b/drivers/gpu/drm/i915/display/intel_display_device.c @@ -53,6 +53,13 @@ struct platform_desc { .platforms._platform = 1, \ .name = #_platform +/* + * Group platform alias that matches multiple platforms. For aliases such as g4x + * that covers both g45 and gm45. + */ +#define PLATFORM_GROUP(_platform) \ + .platforms._platform = 1 + #define ID(id) (id) static const struct intel_display_device_info no_display = {}; @@ -387,6 +394,7 @@ static const struct platform_desc i965gm_desc = { static const struct platform_desc g45_desc = { PLATFORM(g45), + PLATFORM_GROUP(g4x), .info = &(const struct intel_display_device_info) { GEN4_DISPLAY, @@ -396,6 +404,7 @@ static const struct platform_desc g45_desc = { static const struct platform_desc gm45_desc = { PLATFORM(gm45), + PLATFORM_GROUP(g4x), .info = &(const struct intel_display_device_info) { GEN4_DISPLAY, .supports_tv = 1, diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h index 2711c82f518b..d8d545ed552e 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.h +++ b/drivers/gpu/drm/i915/display/intel_display_device.h @@ -38,6 +38,7 @@ struct drm_printer; func(i965gm) \ func(g45) \ func(gm45) \ + func(g4x) /* group alias for g45 and gm45 */ \ /* Display ver 5 */ \ func(ironlake) \ /* Display ver 6 */ \ From patchwork Mon Sep 30 12:31:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816109 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1FC6BCF6497 for ; Mon, 30 Sep 2024 12:32:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BF40D10E423; Mon, 30 Sep 2024 12:32:37 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ie5qctE7"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1144610E422; Mon, 30 Sep 2024 12:32:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727699556; x=1759235556; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ccbwerag/QxE3JwCxXaa6AIyRMOHh+itRa3wsZazOoU=; b=ie5qctE7w74DBaARFJbw7mq8Qgux0HE0c6FrcKO0k/pyVLGv4kYwCEXr PWVt9bQEfSmiVtyo4mWmfY9qfywe5uX/ir6Ufrn4sJQsaE7BdmaQEnz5E 3faWWkUpDvMv6/XxKDjYGzFeWFNaXuVL4lH+HmerWPmlVDt81t8t2TNHc 4Z+0Tu4sZRIVxcbVaUTcb6ebDDwEECkqKnZzUm66irKiq3VHpWVa/a+jC eB8kpvq0etCBpd2y2vlsxePIRJ+CNr3ehJQJAxxe/ByG+MA1JqTZRXR/Q JoyM6teOxAf95tDZOcm9L4pS9H97iI1Y/cPzenfusOdX2WS+kouX9mHDe A==; X-CSE-ConnectionGUID: gYbmlOUsTUqSG9iwGVX1Ug== X-CSE-MsgGUID: sdZ3PcSXRLSGOKA83dZ6Uw== X-IronPort-AV: E=McAfee;i="6700,10204,11210"; a="26249457" X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="26249457" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:35 -0700 X-CSE-ConnectionGUID: 8jlrslt9QkCB+AbsToKfRQ== X-CSE-MsgGUID: 5OAdKkLfS0eRa11FZRrbNA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="72882496" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:32 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 10/15] drm/i915/display: add subplatform group for HSW/BDW ULT Date: Mon, 30 Sep 2024 15:31:11 +0300 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add support for defining aliases for subplatform groups, such as HSW/BDW ULT that covers both ULT and ULX. ULT is a special case, because we slightly abuse the ULT subplatform both as a subplatform and group, but with the way this is defined, it should be fairly clear. This follows i915 core and IS_HASWELL_ULT()/IS_BROADWELL_ULT() conventions, i.e. "is ULT" also matches ULX platforms. Note: Pedantically, this should have been done earlier, but it's only feasible now that we no longer have a subplatform enum and can actually initialize multiple subplatforms. v2: Use the subplatform group idea Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_display_device.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c index 73d4c9ed5a10..cfd7d0fdf934 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.c +++ b/drivers/gpu/drm/i915/display/intel_display_device.c @@ -41,6 +41,13 @@ struct subplatform_desc { .platforms._platform##_##_subplatform = 1, \ .name = #_subplatform +/* + * Group subplatform alias that matches multiple subplatforms. For making ult + * cover both ult and ulx on HSW/BDW. + */ +#define SUBPLATFORM_GROUP(_platform, _subplatform) \ + .platforms._platform##_##_subplatform = 1 + struct platform_desc { struct intel_display_platforms platforms; const char *name; @@ -510,12 +517,15 @@ static const u16 hsw_ulx_ids[] = { static const struct platform_desc hsw_desc = { PLATFORM(haswell), .subplatforms = (const struct subplatform_desc[]) { + /* Special case: Use ult both as group and subplatform. */ { SUBPLATFORM(haswell, ult), + SUBPLATFORM_GROUP(haswell, ult), .pciidlist = hsw_ult_ids, }, { SUBPLATFORM(haswell, ulx), + SUBPLATFORM_GROUP(haswell, ult), .pciidlist = hsw_ulx_ids, }, {}, @@ -560,12 +570,15 @@ static const u16 bdw_ulx_ids[] = { static const struct platform_desc bdw_desc = { PLATFORM(broadwell), .subplatforms = (const struct subplatform_desc[]) { + /* Special case: Use ult both as group and subplatform. */ { SUBPLATFORM(broadwell, ult), + SUBPLATFORM_GROUP(broadwell, ult), .pciidlist = bdw_ult_ids, }, { SUBPLATFORM(broadwell, ulx), + SUBPLATFORM_GROUP(broadwell, ult), .pciidlist = bdw_ulx_ids, }, {}, From patchwork Mon Sep 30 12:31:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816110 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 97627CF6497 for ; Mon, 30 Sep 2024 12:32:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3F40210E424; Mon, 30 Sep 2024 12:32:43 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Yn1QHo5E"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id EE1E210E42A; Mon, 30 Sep 2024 12:32:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727699562; x=1759235562; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mJtFh9dJdUgkAMunndA6DBW7UxVi/TVp3AyQPiQ8NXY=; b=Yn1QHo5ERkGjh8gAkHklz8ckJbtiI08RpBYvd6huqGNjuTxis0ttwaH1 waj7JkmZ5hIO+GLsLh2PF9FCT362y3d7ue11FMIlA9AZysuIo4w1L7Yfq d+Cyk30t5JEHuSLhLXmaBK/cnveEOfMo5vLHNMYRTH8pC6UkqtQ0F0ESa 9/swof+0hn3pCtUtorFaRojRwAmBimZubk3v/LANgsZgISFQoasx70qOj UP+MYFh1ThdoiISpfiRuC2c7stvypfjvBDQ2zjDdfm1jiQE5KOjD1a0ya m68Sz9m0YwMYMUJ3L7Z/eoVWmP/nlUoNllOYzwwLwahWWk4t9c9or/psK g==; X-CSE-ConnectionGUID: WhP897ZiR36XDNoH/zfp6A== X-CSE-MsgGUID: BouO97AMRr2ax3YXVG+jsA== X-IronPort-AV: E=McAfee;i="6700,10204,11210"; a="26249472" X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="26249472" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:41 -0700 X-CSE-ConnectionGUID: TKPDjgbvR6W0r4hbzCZteQ== X-CSE-MsgGUID: L2BZaLoWSg2PRd0FC7+B8Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="72882506" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:38 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 11/15] drm/i915/bios: use display->platform. instead of IS_() Date: Mon, 30 Sep 2024 15:31:12 +0300 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Switch to using the new display->platform. members for platform identification in display code. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_bios.c | 40 +++++++++-------------- 1 file changed, 15 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index daa4b9535123..cf1ba3ca57d3 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -1169,7 +1169,6 @@ static int intel_bios_ssc_frequency(struct intel_display *display, static void parse_general_features(struct intel_display *display) { - struct drm_i915_private *i915 = to_i915(display->drm); const struct bdb_general_features *general; general = bdb_find_section(display, BDB_GENERAL_FEATURES); @@ -1179,7 +1178,7 @@ parse_general_features(struct intel_display *display) display->vbt.int_tv_support = general->int_tv_support; /* int_crt_support can't be trusted on earlier platforms */ if (display->vbt.version >= 155 && - (HAS_DDI(display) || IS_VALLEYVIEW(i915))) + (HAS_DDI(display) || display->platform.valleyview)) display->vbt.int_crt_support = general->int_crt_support; display->vbt.lvds_use_ssc = general->enable_ssc; display->vbt.lvds_ssc_freq = @@ -1542,7 +1541,6 @@ static void parse_psr(struct intel_display *display, struct intel_panel *panel) { - struct drm_i915_private *i915 = to_i915(display->drm); const struct bdb_psr *psr; const struct psr_table *psr_table; int panel_type = panel->vbt.panel_type; @@ -1567,7 +1565,7 @@ parse_psr(struct intel_display *display, * Old decimal value is wake up time in multiples of 100 us. */ if (display->vbt.version >= 205 && - (DISPLAY_VER(display) >= 9 && !IS_BROXTON(i915))) { + (DISPLAY_VER(display) >= 9 && !display->platform.broxton)) { switch (psr_table->tp1_wakeup_time) { case 0: panel->vbt.psr.tp1_wakeup_time_us = 500; @@ -2029,11 +2027,9 @@ static void icl_fixup_mipi_sequences(struct intel_display *display, static void fixup_mipi_sequences(struct intel_display *display, struct intel_panel *panel) { - struct drm_i915_private *i915 = to_i915(display->drm); - if (DISPLAY_VER(display) >= 11) icl_fixup_mipi_sequences(display, panel); - else if (IS_VALLEYVIEW(i915)) + else if (display->platform.valleyview) vlv_fixup_mipi_sequences(display, panel); } @@ -2243,15 +2239,15 @@ static u8 map_ddc_pin(struct intel_display *display, u8 vbt_pin) const u8 *ddc_pin_map; int i, n_entries; - if (INTEL_PCH_TYPE(i915) >= PCH_MTL || IS_ALDERLAKE_P(i915)) { + if (INTEL_PCH_TYPE(i915) >= PCH_MTL || display->platform.alderlake_p) { ddc_pin_map = adlp_ddc_pin_map; n_entries = ARRAY_SIZE(adlp_ddc_pin_map); - } else if (IS_ALDERLAKE_S(i915)) { + } else if (display->platform.alderlake_s) { ddc_pin_map = adls_ddc_pin_map; n_entries = ARRAY_SIZE(adls_ddc_pin_map); } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { return vbt_pin; - } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { + } else if (display->platform.rocketlake && INTEL_PCH_TYPE(i915) == PCH_TGP) { ddc_pin_map = rkl_pch_tgp_ddc_pin_map; n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(display) == 9) { @@ -2334,7 +2330,6 @@ static enum port __dvo_port_to_port(int n_ports, int n_dvo, static enum port dvo_port_to_port(struct intel_display *display, u8 dvo_port) { - struct drm_i915_private *i915 = to_i915(display->drm); /* * Each DDI port can have more than one value on the "DVO Port" field, * so look for all the possible values for each port. @@ -2391,12 +2386,12 @@ static enum port dvo_port_to_port(struct intel_display *display, ARRAY_SIZE(xelpd_port_mapping[0]), xelpd_port_mapping, dvo_port); - else if (IS_ALDERLAKE_S(i915)) + else if (display->platform.alderlake_s) return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), ARRAY_SIZE(adls_port_mapping[0]), adls_port_mapping, dvo_port); - else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) + else if (display->platform.dg1 || display->platform.rocketlake) return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), ARRAY_SIZE(rkl_port_mapping[0]), rkl_port_mapping, @@ -2519,7 +2514,6 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata, enum port port) { struct intel_display *display = devdata->display; - struct drm_i915_private *i915 = to_i915(display->drm); if (!intel_bios_encoder_supports_dvi(devdata)) return; @@ -2529,7 +2523,7 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata, * with a HSW VBT where the level shifter value goes * up to 11, whereas the BDW max is 9. */ - if (IS_BROADWELL(i915) && devdata->child.hdmi_level_shifter_value > 9) { + if (display->platform.broadwell && devdata->child.hdmi_level_shifter_value > 9) { drm_dbg_kms(display->drm, "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n", port_name(port), devdata->child.hdmi_level_shifter_value, 9); @@ -2618,14 +2612,13 @@ int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata static bool is_port_valid(struct intel_display *display, enum port port) { - struct drm_i915_private *i915 = to_i915(display->drm); /* * On some ICL SKUs port F is not present, but broken VBTs mark * the port as present. Only try to initialize port F for the * SKUs that may actually have it. */ - if (port == PORT_F && IS_ICELAKE(i915)) - return IS_ICL_WITH_PORT_F(i915); + if (port == PORT_F && display->platform.icelake) + return display->platform.icelake_port_f; return true; } @@ -2723,9 +2716,7 @@ static void parse_ddi_port(struct intel_bios_encoder_data *devdata) static bool has_ddi_port_info(struct intel_display *display) { - struct drm_i915_private *i915 = to_i915(display->drm); - - return DISPLAY_VER(display) >= 5 || IS_G4X(i915); + return DISPLAY_VER(display) >= 5 || display->platform.g4x; } static void parse_ddi_ports(struct intel_display *display) @@ -2907,7 +2898,7 @@ init_vbt_missing_defaults(struct intel_display *display) unsigned int ports = DISPLAY_RUNTIME_INFO(display)->port_mask; enum port port; - if (!HAS_DDI(display) && !IS_CHERRYVIEW(i915)) + if (!HAS_DDI(display) && !display->platform.cherryview) return; for_each_port_masked(port, ports) { @@ -3672,17 +3663,16 @@ static const u8 direct_aux_ch_map[] = { static enum aux_ch map_aux_ch(struct intel_display *display, u8 aux_channel) { - struct drm_i915_private *i915 = to_i915(display->drm); const u8 *aux_ch_map; int i, n_entries; if (DISPLAY_VER(display) >= 13) { aux_ch_map = adlp_aux_ch_map; n_entries = ARRAY_SIZE(adlp_aux_ch_map); - } else if (IS_ALDERLAKE_S(i915)) { + } else if (display->platform.alderlake_s) { aux_ch_map = adls_aux_ch_map; n_entries = ARRAY_SIZE(adls_aux_ch_map); - } else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) { + } else if (display->platform.dg1 || display->platform.rocketlake) { aux_ch_map = rkl_aux_ch_map; n_entries = ARRAY_SIZE(rkl_aux_ch_map); } else { From patchwork Mon Sep 30 12:31:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816111 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 383CCCF649C for ; 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X-CSE-ConnectionGUID: 2v1aixRoQ0K6getIoV9OVA== X-CSE-MsgGUID: Mio2oGuTQW6DxCUsTbnz9A== X-IronPort-AV: E=McAfee;i="6700,10204,11210"; a="37346542" X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="37346542" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:49 -0700 X-CSE-ConnectionGUID: gncS023mSVetCjAhjlswWQ== X-CSE-MsgGUID: FwdWMwlVTyKJbWNBdAeEgg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="77672915" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:45 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 12/15] drm/i915/pps: use display->platform. instead of IS_() Date: Mon, 30 Sep 2024 15:31:13 +0300 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Switch to using the new display->platform. members for platform identification in display code. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_pps.c | 47 ++++++++++-------------- 1 file changed, 20 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c index 88abc4c7cda1..c42fc670a381 100644 --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -29,10 +29,9 @@ static void pps_init_registers(struct intel_dp *intel_dp, bool force_disable_vdd static const char *pps_name(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); - struct drm_i915_private *i915 = to_i915(display->drm); struct intel_pps *pps = &intel_dp->pps; - if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { + if (display->platform.valleyview || display->platform.cherryview) { switch (pps->vlv_pps_pipe) { case INVALID_PIPE: /* @@ -122,7 +121,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp) DP |= DP_PORT_WIDTH(1); DP |= DP_LINK_TRAIN_PAT_1; - if (IS_CHERRYVIEW(dev_priv)) + if (display->platform.cherryview) DP |= DP_PIPE_SEL_CHV(pipe); else DP |= DP_PIPE_SEL(pipe); @@ -134,7 +133,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp) * So enable temporarily it if it's not already enabled. */ if (!pll_enabled) { - release_cl_override = IS_CHERRYVIEW(dev_priv) && + release_cl_override = display->platform.cherryview && !chv_phy_powergate_ch(dev_priv, phy, ch, true); if (vlv_force_pll_on(dev_priv, pipe, vlv_get_dpll(dev_priv))) { @@ -356,10 +355,10 @@ static int intel_num_pps(struct intel_display *display) { struct drm_i915_private *i915 = to_i915(display->drm); - if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) + if (display->platform.valleyview || display->platform.cherryview) return 2; - if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) + if (display->platform.geminilake || display->platform.broxton) return 2; if (INTEL_PCH_TYPE(i915) >= PCH_MTL) @@ -406,11 +405,10 @@ pps_initial_setup(struct intel_dp *intel_dp) struct intel_display *display = to_intel_display(intel_dp); struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; struct intel_connector *connector = intel_dp->attached_connector; - struct drm_i915_private *i915 = to_i915(encoder->base.dev); lockdep_assert_held(&display->pps.mutex); - if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { + if (display->platform.valleyview || display->platform.cherryview) { vlv_initial_power_sequencer_setup(intel_dp); return true; } @@ -509,9 +507,9 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp, memset(regs, 0, sizeof(*regs)); - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) + if (display->platform.valleyview || display->platform.cherryview) pps_idx = vlv_power_sequencer_pipe(intel_dp); - else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) + else if (display->platform.geminilake || display->platform.broxton) pps_idx = bxt_power_sequencer_idx(intel_dp); else pps_idx = intel_dp->pps.pps_idx; @@ -522,7 +520,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp, regs->pp_off = PP_OFF_DELAYS(display, pps_idx); /* Cycle delay moved from PP_DIVISOR to PP_CONTROL */ - if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv) || + if (display->platform.geminilake || display->platform.broxton || INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) regs->pp_div = INVALID_MMIO_REG; else @@ -552,11 +550,10 @@ _pp_stat_reg(struct intel_dp *intel_dp) static bool edp_have_panel_power(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); - struct drm_i915_private *dev_priv = to_i915(display->drm); lockdep_assert_held(&display->pps.mutex); - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && + if ((display->platform.valleyview || display->platform.cherryview) && intel_dp->pps.vlv_pps_pipe == INVALID_PIPE) return false; @@ -566,11 +563,10 @@ static bool edp_have_panel_power(struct intel_dp *intel_dp) static bool edp_have_panel_vdd(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); - struct drm_i915_private *dev_priv = to_i915(display->drm); lockdep_assert_held(&display->pps.mutex); - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && + if ((display->platform.valleyview || display->platform.cherryview) && intel_dp->pps.vlv_pps_pipe == INVALID_PIPE) return false; @@ -953,7 +949,6 @@ void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync) void intel_pps_on_unlocked(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); - struct drm_i915_private *dev_priv = to_i915(display->drm); u32 pp; i915_reg_t pp_ctrl_reg; @@ -978,7 +973,7 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp) pp_ctrl_reg = _pp_ctrl_reg(intel_dp); pp = ilk_get_pp_control(intel_dp); - if (IS_IRONLAKE(dev_priv)) { + if (display->platform.ironlake) { /* ILK workaround: disable reset around power sequence */ pp &= ~PANEL_POWER_RESET; intel_de_write(display, pp_ctrl_reg, pp); @@ -994,7 +989,7 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp) 0, PCH_DPLSUNIT_CLOCK_GATE_DISABLE); pp |= PANEL_POWER_ON; - if (!IS_IRONLAKE(dev_priv)) + if (!display->platform.ironlake) pp |= PANEL_POWER_RESET; intel_de_write(display, pp_ctrl_reg, pp); @@ -1007,7 +1002,7 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp) intel_de_rmw(display, SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE, 0); - if (IS_IRONLAKE(dev_priv)) { + if (display->platform.ironlake) { pp |= PANEL_POWER_RESET; /* restore panel reset bit */ intel_de_write(display, pp_ctrl_reg, pp); intel_de_posting_read(display, pp_ctrl_reg); @@ -1627,7 +1622,7 @@ static void pps_init_registers(struct intel_dp *intel_dp, bool force_disable_vdd /* Haswell doesn't have any port selection bits for the panel * power sequencer any more. */ - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { + if (display->platform.valleyview || display->platform.cherryview) { port_sel = PANEL_PORT_SELECT_VLV(port); } else if (HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv)) { switch (port) { @@ -1674,7 +1669,6 @@ static void pps_init_registers(struct intel_dp *intel_dp, bool force_disable_vdd void intel_pps_encoder_reset(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); - struct drm_i915_private *i915 = to_i915(display->drm); intel_wakeref_t wakeref; if (!intel_dp_is_edp(intel_dp)) @@ -1685,7 +1679,7 @@ void intel_pps_encoder_reset(struct intel_dp *intel_dp) * Reinit the power sequencer also on the resume path, in case * BIOS did something nasty with it. */ - if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) + if (display->platform.valleyview || display->platform.cherryview) vlv_initial_power_sequencer_setup(intel_dp); pps_init_delays(intel_dp); @@ -1721,11 +1715,10 @@ bool intel_pps_init(struct intel_dp *intel_dp) static void pps_init_late(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); - struct drm_i915_private *i915 = to_i915(display->drm); struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; struct intel_connector *connector = intel_dp->attached_connector; - if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) + if (display->platform.valleyview || display->platform.cherryview) return; if (intel_num_pps(display) < 2) @@ -1783,9 +1776,9 @@ void intel_pps_setup(struct intel_display *display) { struct drm_i915_private *i915 = to_i915(display->drm); - if (HAS_PCH_SPLIT(i915) || IS_GEMINILAKE(i915) || IS_BROXTON(i915)) + if (HAS_PCH_SPLIT(i915) || display->platform.geminilake || display->platform.broxton) display->pps.mmio_base = PCH_PPS_BASE; - else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) + else if (display->platform.valleyview || display->platform.cherryview) display->pps.mmio_base = VLV_PPS_BASE; else display->pps.mmio_base = PPS_BASE; @@ -1857,7 +1850,7 @@ void assert_pps_unlocked(struct intel_display *display, enum pipe pipe) MISSING_CASE(port_sel); break; } - } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { + } else if (display->platform.valleyview || display->platform.cherryview) { /* presumably write lock depends on pipe, not port select */ pp_reg = PP_CONTROL(display, pipe); panel_pipe = pipe; From patchwork Mon Sep 30 12:31:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816112 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 360B2CF6499 for ; Mon, 30 Sep 2024 12:32:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CB8DC10E42A; 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Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_tv.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c index e40aff490486..bfd16054ca05 100644 --- a/drivers/gpu/drm/i915/display/intel_tv.c +++ b/drivers/gpu/drm/i915/display/intel_tv.c @@ -1093,7 +1093,6 @@ intel_tv_get_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config) { struct intel_display *display = to_intel_display(encoder); - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; struct drm_display_mode mode = {}; @@ -1167,7 +1166,7 @@ intel_tv_get_config(struct intel_encoder *encoder, adjusted_mode->crtc_clock /= 2; /* pixel counter doesn't work on i965gm TV output */ - if (IS_I965GM(dev_priv)) + if (display->platform.i965gm) pipe_config->mode_flags |= I915_MODE_FLAG_USE_SCANLINE_COUNTER; } @@ -1197,7 +1196,6 @@ intel_tv_compute_config(struct intel_encoder *encoder, struct intel_atomic_state *state = to_intel_atomic_state(pipe_config->uapi.state); struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_tv_connector_state *tv_conn_state = to_intel_tv_connector_state(conn_state); const struct tv_mode *tv_mode = intel_tv_mode_find(conn_state); @@ -1349,7 +1347,7 @@ intel_tv_compute_config(struct intel_encoder *encoder, adjusted_mode->name[0] = '\0'; /* pixel counter doesn't work on i965gm TV output */ - if (IS_I965GM(dev_priv)) + if (display->platform.i965gm) pipe_config->mode_flags |= I915_MODE_FLAG_USE_SCANLINE_COUNTER; @@ -1525,7 +1523,7 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state, tv_mode->dda3_inc << TV_SCDDA3_INC_SHIFT; /* Enable two fixes for the chips that need them. */ - if (IS_I915GM(dev_priv)) + if (display->platform.i915gm) tv_ctl |= TV_ENC_C0_FIX | TV_ENC_SDP_FIX; set_tv_mode_timings(display, tv_mode, burst_ena); @@ -1627,7 +1625,7 @@ intel_tv_detect_type(struct intel_tv *intel_tv, * The TV sense state should be cleared to zero on cantiga platform. Otherwise * the TV is misdetected. This is hardware requirement. */ - if (IS_GM45(dev_priv)) + if (display->platform.gm45) tv_dac &= ~(TVDAC_STATE_CHG_EN | TVDAC_A_SENSE_CTL | TVDAC_B_SENSE_CTL | TVDAC_C_SENSE_CTL); From patchwork Mon Sep 30 12:31:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816113 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CA665CF6497 for ; Mon, 30 Sep 2024 12:33:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7F40410E427; Mon, 30 Sep 2024 12:33:01 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="KD8BrZw6"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8E45010E429; Mon, 30 Sep 2024 12:33:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727699581; x=1759235581; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=p83u157weH66jkTd1BNhPxPUQQsEUgJLLy/mWpjKaZg=; b=KD8BrZw6+7RuovIwLGBlJUodfe8j3z7AwmffwRy/Cs7xwDft7NcAYstu udjueMalwTwkTj3RjJDt6XYe1CdwB1I/LnS23uVBs5AvLy6TZ8z0akMRw dSDlCaSaNz4cJjTQf71eNk2WL5S3cXCIDuJErmXEEAiN/xJoU91SZToKk gLki27hIvUkvX1mdQvG5xkyKBBiKxw90aAXtNoFg/5gmU6CodmZxdA50c DwB08xxQ2sm00pTlMt/4jwaumIPwShA2txSy/W/DG/yUmkM3dZJ+D0EvY Sh0P9U06q4jUxa9ZtwU4kiXuyv/KeXn1n0qJbARyUcnrMfrE9b58MxDxa w==; X-CSE-ConnectionGUID: AYcqMbDhSUCAnJrcmijcKQ== X-CSE-MsgGUID: ypmdtkrwQeyzEemLbyw5sQ== X-IronPort-AV: E=McAfee;i="6700,10204,11210"; a="37346575" X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="37346575" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:33:01 -0700 X-CSE-ConnectionGUID: NDvQIa4DSIezkHY4tCL/hQ== X-CSE-MsgGUID: lQnoiYhETgKf7EgXUwGzHQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="77672946" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:32:57 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 14/15] drm/i915/vga: use display->platform. instead of IS_() Date: Mon, 30 Sep 2024 15:31:15 +0300 Message-Id: <64f0037e9cfd12308cba23612b14583ac55864a4.1727699233.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Switch to using the new display->platform. members for platform identification in display code. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_vga.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index 2c76a0176a35..fd18dd07ae49 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -16,9 +16,7 @@ static i915_reg_t intel_vga_cntrl_reg(struct intel_display *display) { - struct drm_i915_private *i915 = to_i915(display->drm); - - if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) + if (display->platform.valleyview || display->platform.cherryview) return VLV_VGACNTRL; else if (DISPLAY_VER(display) >= 5) return CPU_VGACNTRL; From patchwork Mon Sep 30 12:31:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13816114 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DA537CF649C for ; Mon, 30 Sep 2024 12:33:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B60B10E42D; Mon, 30 Sep 2024 12:33:08 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="h+tVFPov"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id C927310E42D; Mon, 30 Sep 2024 12:33:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727699587; x=1759235587; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DgkRJFm1b1Gj2GS06H4jwjLWnHy/a1qfSwmA/EkYXIY=; b=h+tVFPovU0agvRiufpMmB+/fUzLLkfCb6m9WHamx/fvTmrdGu9Ch2MEl QL5K+8+BrA++R8hBpZe8F2mhYw3fh/qGYRoPUY5s8UjJLvT4XeJx4+zPu 8ku8xJHmMt9dzEoLVtTK3oOTHahBCjtrIWsSkpt6yQjKKxzHK9UQvsTAn 0ihN6jsKogSkP8D0h2LyXReU6K6tXPXyfPwtOk+GjKH/u6wMIrTm+My7T p59IGDve20M23sC5t1RbTJQZVGTxGGV9pOpje9NENUn0mIAkECwrjAXWq dzfJePSv3hv5ACu2bHJY0Q6O9pF2IBRBC5KeLsBRzsc8jwogAGP1awK7j Q==; X-CSE-ConnectionGUID: FiKsxO8eTliXKXnqfOPDzg== X-CSE-MsgGUID: MobjBIsJTfGrvQkIilx2PQ== X-IronPort-AV: E=McAfee;i="6700,10204,11210"; a="37346585" X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="37346585" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:33:07 -0700 X-CSE-ConnectionGUID: ISNn/5pqTIGpyGuLKSrXJQ== X-CSE-MsgGUID: LyBBGKrLQhSE0fEzHLpeJg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="77672988" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.93]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2024 05:33:03 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com, lucas.demarchi@intel.com, maarten.lankhorst@linux.intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 15/15] drm/i915/vblank: use display->platform. instead of IS_() Date: Mon, 30 Sep 2024 15:31:16 +0300 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Switch to using the new display->platform. members for platform identification in display code. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_vblank.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c index d18b8292be49..a95fb3349eba 100644 --- a/drivers/gpu/drm/i915/display/intel_vblank.c +++ b/drivers/gpu/drm/i915/display/intel_vblank.c @@ -195,7 +195,6 @@ static u32 __intel_get_crtc_scanline_from_timestamp(struct intel_crtc *crtc) int intel_crtc_scanline_offset(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); - struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); /* * The scanline counter increments at the leading edge of hsync. @@ -225,7 +224,7 @@ int intel_crtc_scanline_offset(const struct intel_crtc_state *crtc_state) */ if (DISPLAY_VER(display) == 2) return -1; - else if (HAS_DDI(i915) && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) + else if (HAS_DDI(display) && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) return 2; else return 1; @@ -327,14 +326,13 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc, const struct drm_display_mode *mode) { struct intel_display *display = to_intel_display(_crtc->dev); - struct drm_i915_private *dev_priv = to_i915(display->drm); struct intel_crtc *crtc = to_intel_crtc(_crtc); enum pipe pipe = crtc->pipe; int position; int vbl_start, vbl_end, hsync_start, htotal, vtotal; unsigned long irqflags; bool use_scanline_counter = DISPLAY_VER(display) >= 5 || - IS_G4X(dev_priv) || DISPLAY_VER(display) == 2 || + display->platform.g4x || DISPLAY_VER(display) == 2 || crtc->mode_flags & I915_MODE_FLAG_USE_SCANLINE_COUNTER; if (drm_WARN_ON(display->drm, !mode->crtc_clock)) { @@ -603,14 +601,15 @@ void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state, const struct intel_crtc_state *new_crtc_state, struct intel_vblank_evade_ctx *evade) { + struct intel_display *display = to_intel_display(new_crtc_state); struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); const struct intel_crtc_state *crtc_state; const struct drm_display_mode *adjusted_mode; evade->crtc = crtc; - evade->need_vlv_dsi_wa = (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) && + evade->need_vlv_dsi_wa = (display->platform.valleyview || + display->platform.cherryview) && intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI); /*