From patchwork Tue Oct 1 16:06:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818404 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A5CBCEACDF for ; Tue, 1 Oct 2024 16:07:06 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id B201128009C; Tue, 1 Oct 2024 12:07:05 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id AD029280068; Tue, 1 Oct 2024 12:07:05 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 8FBE928009C; Tue, 1 Oct 2024 12:07:05 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0013.hostedemail.com [216.40.44.13]) by kanga.kvack.org (Postfix) with ESMTP id 5B9DB280068 for ; Tue, 1 Oct 2024 12:07:05 -0400 (EDT) Received: from smtpin28.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id AC25016101F for ; Tue, 1 Oct 2024 16:07:04 +0000 (UTC) X-FDA: 82625512368.28.9D13B21 Received: from mail-pl1-f178.google.com (mail-pl1-f178.google.com [209.85.214.178]) by imf27.hostedemail.com (Postfix) with ESMTP id A7AEA4000F for ; Tue, 1 Oct 2024 16:07:02 +0000 (UTC) Authentication-Results: imf27.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=sABOIchT; dmarc=none; spf=pass (imf27.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.178 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798729; a=rsa-sha256; cv=none; b=vxr2xGfObSxTb3VZc/DXh4ziu8cPE/tccoWQ7aAtyoVhOMaDqtiG7uwo6aPAHghanJ+6I7 U5kr9j8DQOrGjEvwk/RRxLbBRBrJ02szUJjHu8wx1dGgBGjLdTe4rXp19QylPU67IuGtbm fb1uK5UPLDNIfDhu7Hw5kLB49/wXc/8= ARC-Authentication-Results: i=1; imf27.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=sABOIchT; dmarc=none; spf=pass (imf27.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.178 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798729; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=pcb1JUl7nxyzCR2L+K51gN2ROJJ8XrFInAPZeivTlr8=; b=fKqa1FmU3reBiIQlHFbk30/QTszdBEbGvysWF3nSR2wXuKszw4XJBjiWXSH0HmhURZ/1CO SIq7ufXF5suYG6VD2tPtLL+TTGNL5kV/hOLbC4ixfrWkFeHRYtzTC4uMCbKPdY17bwd9L+ KvljI+G3ez25V9zNl3FLdcsuUGvDxVA= Received: by mail-pl1-f178.google.com with SMTP id d9443c01a7336-20b86298710so22447765ad.1 for ; Tue, 01 Oct 2024 09:07:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798821; x=1728403621; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pcb1JUl7nxyzCR2L+K51gN2ROJJ8XrFInAPZeivTlr8=; b=sABOIchTNUxP3IOG5mPARWZxIIiNb4Po70BfDgxI7w+WxE09VNC/6JyMlUhZ1jKgkS W+cHFVka6FEJF53cFrriHQbbPvwjCsXPQhsQJ5a7Pw6ToWkPzmLXcHZBU1i60oG4gAAS wnVyImkfekkyXP5DRb3OwzQAuiWBU8TGaKR5MPROhCDPhreRAOI15PcEG8QBWvY/i4bq gLV6XJs0jaf1Pua90NRbfRKkWmGv6Xo6odM7ODrvcaM9rznKBC01S6YS50QCFHu+zy4r +WctILWiuvBQUgub8/TFfaEIa81odcQeILOIvXNtsQdx48dcITK9mDQTFM905OTtkk/b NZ2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798821; x=1728403621; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pcb1JUl7nxyzCR2L+K51gN2ROJJ8XrFInAPZeivTlr8=; b=gPYZHUG4UqOLLfVnQS1tWrrB0cohpdlMgtOHcnBNiF6IlCd6YuBm5odPJjy/KjaYRE RV1TgHGzYU8dW4zya5oYQOMN+bjyEOFCNUKV0BM5X8glYE4LK44N1hebzd1s7Yv/XpiA gGy3FI6XzusVJhzgPWCYoAOMZQNHPmcASWUSmy8+k+XbAX0NiVBGKfbY7lXx0jdqBwk+ PaU4OPY29S06fz+KTM0iGZgiSIdC/qXW1VeYvPpggnf83usE081xgMsAZcM53QHvK1Ic X4CFpx7+3YVRdPQr9boP5BRg3nUILKI0T7PBGern0i4LLgIM9rqqy6qhNtUAANBVpHDK RX8w== X-Forwarded-Encrypted: i=1; AJvYcCUl30mhN0I5/VDOqkGdHxzyVbLLU2ScN3qHrjZdY7p2H3NTU+a5kb4RpFyBu3/bdYqW1LHZjjjRmw==@kvack.org X-Gm-Message-State: AOJu0YyWejBHLWgP45sRHd0OzjZ00J5fcI3CHil4e9nbBdDePfe5TmpD 5lGjIg6tYKr2nKg3CeOPIvTjk9J3Fwe06dJ0ArOF7zwnbPOp78CR9oj9mI83q5w= X-Google-Smtp-Source: AGHT+IG/9AhOFkVlsb1ZH2XMKlQ6f717lLd7IRjhRM+ZTMobdV3S8kdqvcOsBq5NGgSC9+zelAG6Ow== X-Received: by 2002:a17:90a:650c:b0:2cc:ff56:5be1 with SMTP id 98e67ed59e1d1-2e184526f71mr233618a91.7.1727798821325; Tue, 01 Oct 2024 09:07:01 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.06.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:00 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:06 -0700 Subject: [PATCH 01/33] mm: Introduce ARCH_HAS_USER_SHADOW_STACK MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-1-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta , David Hildenbrand , Carlos Bilbao X-Mailer: b4 0.14.0 X-Rspamd-Queue-Id: A7AEA4000F X-Rspam-User: X-Rspamd-Server: rspam05 X-Stat-Signature: 1w58mxap5pg1shii67h7o46jasfd9zrh X-HE-Tag: 1727798822-941862 X-HE-Meta: U2FsdGVkX18OyJv+3YJ9sg8e2hmKQoWYgadtUzmvdbYIdN+9vi0jHDunJb1kBtiodTxWoI5yiczR9++KZ5TBff/Dtyv4UOxhjTMlLvh3l45+fiBatDGQlRx/cXsvyPai2z7twXVnNwAI7Een9K/09BUoA0C7hGSZPTI3KtuAY+nLKAL7bZQXeflA2M9tOAig2WzKt7SXz4YJaXNJysWq+/En0lryygUhS+QH/jbuII3LJe0Qvsm32PjVhdQonek2Wrq99Y8T+RuW0jnF2hjmpmCpRZ3JqtJo3+cwIadAlEvHY/QKj9pJZrJk5vN9CX7P2yFhmQ2GKLeGX3IG/K55c2AmQoMMqdFIz4RlMEsnnXoJSKxAHQzqzF6y6pqj1EcgDESH/0209koaXdoAAQf7JYElYgLxags406LxGSadXub/XUPnxojpBGoO3gWp4KOTS8L0AoPGC3xHmQnDNyc4EWODoD+61n+tctAOrX3Gz+hZncs2HjyvYKYM/2/qe9U7J30BtUugDlRkvVcYTnjmVdkDRjlg91BH3eGaE98lGKCPO9e5pRio6PfF1pLeRwLWd956QDal1DdWUgvEX+JuVOCac5WLKXgXVDmUMBKcSwF6WiZKZwKuoibMDAzyHYutX9bOHmoj3EY722M4HOdMOs2GdMXV0mH+2ZUWbbh8tGaX28JYWrL+kfsQgl7bBYffSIhQ9v6RfO2WqYoBnus1/CkztKDOtu2+HQnAgrA8aEUDaYYLeg9MCwJqQI3bEWpb/2i9aDueYfpG3cP8n62pYTo6wO/FP5wOJKLIEg9/omUtSrp7/GrcBqoiRgUgeJrJSKTH3J/vJyFFSrIIpGOOX+r+QLXMQ7CacWqj61vj1nkCiefiXALBVMrjrU6Yxf10sUcSh3Mf9CJjjTTZb+eCP+zdNcZyhXghfixdclRVsY9E40iG6YhlKR1DJxq93Nbn2lLaOqgCtukNy3YyRDh +3Kdg/DC ZcNNjqbMbXGRcSvRmsAguKGC+RUs96U1q1Jgq/F/WYjVTQdWXatt7qd7H+oyds6eH0uCN35Qi7oB9ZlbwbPHkBix4ijGBHBAQ9qm6kxA/hW5PBWHRSa7lOqeit4FhoJGMptVa8jBpzA61nmRVDa7nNn7xOz05V8nHnpJwFSkVvILK7JrPiI4MBPA2uR0jZv8AfHdgNIZ6x5yqLEXM+HGs2D10/39Gnmde72W+xN+BQhHbVNCjj2x5ujMVIxktWrF1R4zcgHkw28Cyi33MmMMCEteX5aVg1DJtHYDhXvEzYGdSlmedWiQqsU0/Ef+IS+y5EUhx0WrraLZWad4MFUJqPq29MJ3AtUznrvWtXV/TwkBXPXBDCBaC2O2sa/RLPWDcDPgqNU/izSft7UITZRyZ8PKwArIaCn2REutWZHwe9xO4KpJQ8POwNAaoE0TBM5smA0Qz9AKjpihJHfjMmuZ0mffDsALUhsGH6wLWNszDc60jN2DSFoCjEDmsZoblnl+FcssU72HuabqtO9KgWfVAwn4xtq5uqecF73kB/IPXgRo+Z9D4BjjZI09TDi5LsJtqK8E8pyibGTSE8s+WpDl9PoSarTPI4PJnMaMl X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Mark Brown Since multiple architectures have support for shadow stacks and we need to select support for this feature in several places in the generic code provide a generic config option that the architectures can select. Suggested-by: David Hildenbrand Acked-by: David Hildenbrand Signed-off-by: Mark Brown Reviewed-by: Rick Edgecombe Reviewed-by: Deepak Gupta Reviewed-by: Carlos Bilbao --- arch/x86/Kconfig | 1 + fs/proc/task_mmu.c | 2 +- include/linux/mm.h | 2 +- mm/Kconfig | 6 ++++++ 4 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 2852fcd82cbd..8ccae77d40f7 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1954,6 +1954,7 @@ config X86_USER_SHADOW_STACK depends on AS_WRUSS depends on X86_64 select ARCH_USES_HIGH_VMA_FLAGS + select ARCH_HAS_USER_SHADOW_STACK select X86_CET help Shadow stack protection is a hardware feature that detects function diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c index 72f14fd59c2d..23f875e78eae 100644 --- a/fs/proc/task_mmu.c +++ b/fs/proc/task_mmu.c @@ -971,7 +971,7 @@ static void show_smap_vma_flags(struct seq_file *m, struct vm_area_struct *vma) #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_MINOR [ilog2(VM_UFFD_MINOR)] = "ui", #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_MINOR */ -#ifdef CONFIG_X86_USER_SHADOW_STACK +#ifdef CONFIG_ARCH_HAS_USER_SHADOW_STACK [ilog2(VM_SHADOW_STACK)] = "ss", #endif #if defined(CONFIG_64BIT) || defined(CONFIG_PPC32) diff --git a/include/linux/mm.h b/include/linux/mm.h index ecf63d2b0582..57533b9cae95 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -354,7 +354,7 @@ extern unsigned int kobjsize(const void *objp); #endif #endif /* CONFIG_ARCH_HAS_PKEYS */ -#ifdef CONFIG_X86_USER_SHADOW_STACK +#ifdef CONFIG_ARCH_HAS_USER_SHADOW_STACK /* * VM_SHADOW_STACK should not be set with VM_SHARED because of lack of * support core mm. diff --git a/mm/Kconfig b/mm/Kconfig index 4c9f5ea13271..4b2a1ef9a161 100644 --- a/mm/Kconfig +++ b/mm/Kconfig @@ -1296,6 +1296,12 @@ config NUMA_EMU into virtual nodes when booted with "numa=fake=N", where N is the number of nodes. This is only useful for debugging. +config ARCH_HAS_USER_SHADOW_STACK + bool + help + The architecture has hardware support for userspace shadow call + stacks (eg, x86 CET, arm64 GCS or RISC-V Zicfiss). + source "mm/damon/Kconfig" endmenu From patchwork Tue Oct 1 16:06:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818405 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26F47CEACE4 for ; Tue, 1 Oct 2024 16:07:09 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 7787128009D; Tue, 1 Oct 2024 12:07:08 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 700DA280068; Tue, 1 Oct 2024 12:07:08 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 57B8328009D; Tue, 1 Oct 2024 12:07:08 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id 339C5280068 for ; Tue, 1 Oct 2024 12:07:08 -0400 (EDT) Received: from smtpin17.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay05.hostedemail.com (Postfix) with ESMTP id DBE82415D1 for ; Tue, 1 Oct 2024 16:07:07 +0000 (UTC) X-FDA: 82625512494.17.2FED94F Received: from mail-pj1-f45.google.com (mail-pj1-f45.google.com [209.85.216.45]) by imf28.hostedemail.com (Postfix) with ESMTP id CAAD9C000C for ; Tue, 1 Oct 2024 16:07:05 +0000 (UTC) Authentication-Results: imf28.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=zbbxLBxV; spf=pass (imf28.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.45 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798698; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=OwXMBbOWCv06xRC7kuAtikxfL3CuNBKfrSTtPkKqEqk=; b=YG+XDxd/ClanSaZfMrbXBpieLww3R4iyDam5dZwRQYvCg+63DkxvFt+L5lmCqxUE6OiOHo Wz2Uf5J65LCtVWh/Ata16eY8tIJxext7MkxTBvY6AqmyF70jA9wnonanHiWbwJq/SHjFBd h+XP0KImMfgqRLA5H6BkYEDOByqgZCM= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798698; a=rsa-sha256; cv=none; b=kIMyh1FVKEd2do9g7STIAlX9o4owOhb7gtEbRtYOpqUU0hsu8hV96Dol6Lq3GP7mBlHFUq Wx6E9MEzrF9mRtw/oKkl9BNxIRCuY8i3Nwa5ZV8a8EVOcyIfiw1oHe8cPogOGPeFkzlD0C xELidtG6/AZ58yWVZXiDJ4Tnui/uRyQ= ARC-Authentication-Results: i=1; imf28.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=zbbxLBxV; spf=pass (imf28.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.45 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none Received: by mail-pj1-f45.google.com with SMTP id 98e67ed59e1d1-2e0b93157caso3394523a91.0 for ; Tue, 01 Oct 2024 09:07:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798824; x=1728403624; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=OwXMBbOWCv06xRC7kuAtikxfL3CuNBKfrSTtPkKqEqk=; b=zbbxLBxVtdnldaTY3seKG546cRk92akiiV5wBKKUc5Ac4ubCWEmY6bKtgu50kuddw8 TJQ86PJyGdAWWbbQBJmzFLzEqo7iwd+y31i04okoSY9ERN1sZSbURcHfnGFiZJzxhLup bhqZjkoPWE8vHd7a+7NNNntfCeZFd8utIIyzVifnq89UMp8Bd7Kad9UXWNBp0sEHinDf CsGQG/rP7pD4Rpdr+e4q+SNN0Uh1+YNP0+k5NeEznv/3lVtKi3oyu3dAiE/BWgC9K2S9 b33DGWhmOrDFmpXOgzvCO20Wr7vOGMUGb+GeEPldd71B8VCN9DQLdOd8TnZxYTHsynP/ jGoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798824; x=1728403624; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OwXMBbOWCv06xRC7kuAtikxfL3CuNBKfrSTtPkKqEqk=; b=tzPNyxDNNgah3WHaASgWLR8pvCJEZtnfaDF/e1/8yLHL1zKn46jrHkP/xljV7/UBEw Tmb3kbzLm6sCDB/z8e2Y16oW0WuT23aaymmIlNbnGnls4ZUJBAvPS+8V8CcZTfYtn7oC LOx7VjMljmIYJ4GCiGfeUv+P2kRXjgk2vN50aAQLDppEv5v1Ysi3JdFX2R058mqajZo5 Tu7w8bZIu/5P6rYuTPS5H0/LHbXqX1fC71h5x70+a3y9d/p7WSpTUcuWXgqa9usZy5Wt K7vVCnZNEOc2SU3NTsxe/6VDy4aaTgIC0m5YfyeaYQLM7vV0Re+Goo2zV95XdmZT0Gj4 h3QA== X-Forwarded-Encrypted: i=1; AJvYcCW2VK0w7uqpS9m3FkOnxyRh8DuQ03OTZi1VC1T9eJ8QWWn/fR26n1cROHmiPzY5n9r5Ik9CH/IMsA==@kvack.org X-Gm-Message-State: AOJu0Ywz+zA013+Ii/HjANSJE4p8i/2WTRDBLj2BCEz8OBSnYa9uNVnn y+OPpMVFIN6Ak/SPRk5vZjxqfIdtOQRkNc+5Qb/0y6c91bfyWFPMj7BZYSlOvzQ= X-Google-Smtp-Source: AGHT+IHz3lo2CWK5+xlTScPaDZKtUmo8trno2Ltv0riHEvGYwt0AENfouR5jnL074g0esmpKOm5AYw== X-Received: by 2002:a17:90b:154:b0:2d8:e6d8:14c8 with SMTP id 98e67ed59e1d1-2e1853e1474mr122588a91.15.1727798824224; Tue, 01 Oct 2024 09:07:04 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:03 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:07 -0700 Subject: [PATCH 02/33] mm: helper `is_shadow_stack_vma` to check shadow stack vma MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-2-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Stat-Signature: cp39s948qoohjia4hofkwgezqjcofwx8 X-Rspamd-Queue-Id: CAAD9C000C X-Rspam-User: X-Rspamd-Server: rspam08 X-HE-Tag: 1727798825-546516 X-HE-Meta: U2FsdGVkX181AXi2zYTDJHn4+IZy9SJN7j80EumDfTBsgX+zhpJT5CeFUcOyMU/7SbjwsWBsfVWQ+7oNl7ccZ2v4M8uQX7TKj11yxfLdbg0y1jLMrSnlo57VQseHU9Q6WpBKzUN6ggvJx+D2meIVotJcsDBoMC1319XoNEM8rtplOUN/ATYvn6C/zHaSoPAjKqrc4Fmpij0QYIJS60YCNJLW0+fiw4qJE6cquxaEldeHbSZyzHCD0zaNMowlZMxCwPF9vxn/K7QaqwTEh0sh5rhbxSPN5I0N/6sctivtpe+/uKjb+owW8bx/LJLrTEMj3j8+u5F5p6rg0JAaxG/2a44BmoMAj7NwJORZ4/XVsG/yIgj/5toFBE39A5rwmCbwincnTlL4fQj/oUnL/wg+EBAif/k3GsFklUyPO5wSAIBMDpawGJxejecXo0Erqs2gpnLxCPXjLkKttjFQVGCRstlzfakZWtRGeZ0qhQlB9LmvgNCyxn8pVXWZF6kzRzrNcMagfXoJVhRpFouQ2ftlSw/3H+e/VJhe3hMOcMJcGSwdo2zFn2YuJZ8A4R9ByWm4TPueGQIDCSlhzFJHRBE2aWJfbtUOx554bNU9blKAqhKizIVWSrVUvgDBapuO/CVkBBt+RlW62sZo77C0irNKo+op5azPGpbDDX0MeoFXqqMrUd0y1pILoYr0ay2GbFj8mYjOjhFgASBtw4uzFLF0GIs67T0BFCKKnLiMjoZA2/T3eI9+PJSdAmmhXSJoLfDZluu1EuCUZqUDOpJi1BlpLzrLQZHrr+/aURI0nA+nhclhi6ApgwnG5D43gGj8farLec+ASDMWY6TES625cUmI7O1LjTnzePOiQlT2WugL7IHe71AWmK/n3tcTjgYchUzRetmULhbci+ZFkTTw72Q3wLWMZ5mFkiY4vcKp2PY6u7/2VFL79EU02G8WK4gp7W1PIe3KHRDhyPmsBErPO48 BbEHDsGL O1E2jdxzd1ajK2n3FgFdiFb0y49F+kSVY+biLr9fpOSOWxVdinQ7R7bW9RWdZzE6CuhOOZ2J7caHGxSTE8Dvnt4J8Ns7IXBx3qo1KAnUgtSY8xT0RP7pmUG43mct0DTh3tYC2ZpHbfXG359sEBzq1S4gyhILmMHQKI4Zn7A+78fdHLX24fXWbSsNJBhBAd+2YsP/luQp6qpSQzxAoWL37/3P8+lFyaRUHDt0E7NNd73+PuG21LT6o6YcK6UiFePrxriD9u0ZC4IXN6TfHRL/RP9zq9LuZf1UFiTTUmp2ndoC/7Snw/ykG6qSx+cNMIQxwRsfnFkEvS80VC52vsFswg3nr/Lg8lLvyOOs+jS/4p6brMOrKv3zO2KvImJp7ijUBUXylze5cWffnVTVNBrxlMHCq8zvtFec9a+TfzJ4j4fNsYOVjJe/UBrQGjgK2th2LTbnfeLBdKlkqsbz8NzahM0BgwCRSfg0w6+uj8MukfJXEEWIy0SxRD6cHzfKTq6/+nVM+ X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: VM_SHADOW_STACK (alias to VM_HIGH_ARCH_5) is used to encode shadow stack VMA on three architectures (x86 shadow stack, arm GCS and RISC-V shadow stack). In case architecture doesn't implement shadow stack, it's VM_NONE Introducing a helper `is_shadow_stack_vma` to determine shadow stack vma or not. Signed-off-by: Deepak Gupta --- mm/gup.c | 2 +- mm/vma.h | 10 +++++++--- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/mm/gup.c b/mm/gup.c index a82890b46a36..8e6e14179f6c 100644 --- a/mm/gup.c +++ b/mm/gup.c @@ -1282,7 +1282,7 @@ static int check_vma_flags(struct vm_area_struct *vma, unsigned long gup_flags) !writable_file_mapping_allowed(vma, gup_flags)) return -EFAULT; - if (!(vm_flags & VM_WRITE) || (vm_flags & VM_SHADOW_STACK)) { + if (!(vm_flags & VM_WRITE) || is_shadow_stack_vma(vm_flags)) { if (!(gup_flags & FOLL_FORCE)) return -EFAULT; /* hugetlb does not support FOLL_FORCE|FOLL_WRITE. */ diff --git a/mm/vma.h b/mm/vma.h index 819f994cf727..0f238dc37231 100644 --- a/mm/vma.h +++ b/mm/vma.h @@ -357,7 +357,7 @@ static inline struct vm_area_struct *vma_prev_limit(struct vma_iterator *vmi, } /* - * These three helpers classifies VMAs for virtual memory accounting. + * These four helpers classifies VMAs for virtual memory accounting. */ /* @@ -368,6 +368,11 @@ static inline bool is_exec_mapping(vm_flags_t flags) return (flags & (VM_EXEC | VM_WRITE | VM_STACK)) == VM_EXEC; } +static inline bool is_shadow_stack_vma(vm_flags_t vm_flags) +{ + return !!(vm_flags & VM_SHADOW_STACK); +} + /* * Stack area (including shadow stacks) * @@ -376,7 +381,7 @@ static inline bool is_exec_mapping(vm_flags_t flags) */ static inline bool is_stack_mapping(vm_flags_t flags) { - return ((flags & VM_STACK) == VM_STACK) || (flags & VM_SHADOW_STACK); + return ((flags & VM_STACK) == VM_STACK) || is_shadow_stack_vma(flags); } /* @@ -387,7 +392,6 @@ static inline bool is_data_mapping(vm_flags_t flags) return (flags & (VM_WRITE | VM_SHARED | VM_STACK)) == VM_WRITE; } - static inline void vma_iter_config(struct vma_iterator *vmi, unsigned long index, unsigned long last) { From patchwork Tue Oct 1 16:06:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818406 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6371CEACE7 for ; Tue, 1 Oct 2024 16:07:12 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 3F53528009E; Tue, 1 Oct 2024 12:07:12 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 2E06D280068; Tue, 1 Oct 2024 12:07:12 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 10DFA28009E; Tue, 1 Oct 2024 12:07:12 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0013.hostedemail.com [216.40.44.13]) by kanga.kvack.org (Postfix) with ESMTP id E338B280068 for ; Tue, 1 Oct 2024 12:07:11 -0400 (EDT) Received: from smtpin23.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id 9FBBE16174D for ; Tue, 1 Oct 2024 16:07:11 +0000 (UTC) X-FDA: 82625512662.23.2326794 Received: from mail-pj1-f54.google.com (mail-pj1-f54.google.com [209.85.216.54]) by imf14.hostedemail.com (Postfix) with ESMTP id A24EC100007 for ; Tue, 1 Oct 2024 16:07:08 +0000 (UTC) Authentication-Results: imf14.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=yHucswFl; dmarc=none; spf=pass (imf14.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.54 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798789; a=rsa-sha256; cv=none; b=kR+RM6hH8bCvM6cyaIeXPE7Nm2P/f0R5qA4qEtGvvkmbpCfpbItuCCDi5+om3++8iSTrQt GmV94mFPoHTcoip97enGZUDKNn52rzaHmfGnmMv7JBun9F9lRJWXFfs8+g/8nW9kbNzQjY Q4XOkuXuYfQrtUS3x2OqsJZnCKF+Ixk= ARC-Authentication-Results: i=1; imf14.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=yHucswFl; dmarc=none; spf=pass (imf14.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.54 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798789; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=TN/jwUyrk7nWeXz+2PkcX9PcP6JH0CIrLV6B3SOl4g0=; b=TZrWRRlJSrdYawr4ucd7/H7U6XYt6eU2YUEYBZ4Out3SFrnJ8Kpzy7BRCgh5UdonXJmyxa dRtKr4+zFidpKlekr62cl035Bw+6NgPmbDoitTyOoC6E/ji7ickmvQ9YWOPRvYd5ayNB8r t4lsQGFbCkja9qETIZnWwOTNGu2hatw= Received: by mail-pj1-f54.google.com with SMTP id 98e67ed59e1d1-2e0b0142bbfso3662012a91.1 for ; Tue, 01 Oct 2024 09:07:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798827; x=1728403627; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=TN/jwUyrk7nWeXz+2PkcX9PcP6JH0CIrLV6B3SOl4g0=; b=yHucswFl8RZDqnf9c4EnyB+3fUam1dFup2xWM2eMu5HvtdA/1Kkiob1VMwYGUJATpH uXxJVxQPnDCOlQu7pOszwPKB5soVHoPtOl2NbUTEC3A/K2VVEA4407I2uGTvh85Cfi2x TpESCdnuXx2C3sZ+ii611ucXUdqpGUGmsyO0Yt201AbYMyB/IsSqjvDMagGZ11Ciw3p4 TaJ91/ftAcaiEwJCtOheQkuj2HA5buKwT7WM7Qt/Go+mbdSMWbPnX3FQ/k7WBsV/A8Ui z2Nt1DZyRcilzPCXd11E691/EUHzjfk84KdZTSedozDYQELzptYVwoKGBZ5tEMtWayJr 7MLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798827; x=1728403627; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TN/jwUyrk7nWeXz+2PkcX9PcP6JH0CIrLV6B3SOl4g0=; b=avQrOHfhQmazzxnBFzuEGCa1SUauvueI3Zpy9JZ11zZL2p2U+uPeO0XRmCm9kzzeUQ t042VaYtkh/ki6SgfCmXLrsjl9YGJkTkLPoYu/j7//zjCU83Kyz8khbqHEUNe9kRyAOI AgxDxihWpKJdVZWg1OE26jhMoYyyRsMej5qW6n0TctnxB64r6boholJL2MSVJ5l92K8h f/zrkmyXsIRyxP6RiGwHdCKHNCqH771An5wkHZaKZH8lfpSp0xEE6OE13PFWC24PoDdo bcxuCxE/6CujtDASvkwx1+P4jOqEJ3QFCBTwe5pprDxWqIPEUZQaIPbr6cFO4O9FXRtf iM7w== X-Forwarded-Encrypted: i=1; AJvYcCVRHrmXVmq6d7UfdY98QAyXoVi88coZiT/Qi6XKj228vptqige7S5tdaDfGj8lBK1fDyA/mquRZrw==@kvack.org X-Gm-Message-State: AOJu0YzFbyHEHwpruni99KXeZHKq9E5B2G7jErzjAgZXgcOvZ3EnjPxs Cc4JzSlv6bG/Czu1F8bp5uAD0PHTmp88D9Ez4CKH0hO5zcBTBSpvbogr7mtYxcM= X-Google-Smtp-Source: AGHT+IGqLEH3PdcnOlfVjojRDIDEBcHW24GL0v1kFxG1jIxdQxmcVKqlOntROUvuoUxPrGiWv1Q9yg== X-Received: by 2002:a17:90a:cb8f:b0:2c9:36bf:ba6f with SMTP id 98e67ed59e1d1-2e1851496c6mr147502a91.3.1727798826977; Tue, 01 Oct 2024 09:07:06 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:06 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:08 -0700 Subject: [PATCH 03/33] riscv: Enable cbo.zero only when all harts support Zicboz MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-3-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta , Samuel Holland , Andrew Jones , Conor Dooley X-Mailer: b4 0.14.0 X-Rspam-User: X-Rspamd-Queue-Id: A24EC100007 X-Rspamd-Server: rspam01 X-Stat-Signature: mrjjptjq5qbs9s7kfzzpdrcijks7mqug X-HE-Tag: 1727798828-858985 X-HE-Meta: U2FsdGVkX1/RG9g5eMw5cKUUZq6JDOFhN3GOeFQBG8kqhvGAEywe9B8NtC9BiatlgNseRJg8BrxzCfeJF7qWJ9bTYnM8e1yzFJwvQTWHzZkqZgxdhCqWU0XuQ8OQSR2v0JWVIGkC+/+uG8KfwsNhZvEpkFZO1XtRh2jY1/kZiA42muPW6jP0A+D3ta/XF0QnK5Z7UhLA9GiUa/wUJlshdVY+RYA1kueI+br2KDdM1TkSGws01zOwOCS+sRODSdPZ8zQIYeQYBgz5uc2T0u7dLk68HZ6In+GuQSb4DdvH4YLMJ6L8Co/CnVkv1+EzqcEZ9Hiq8ruZCEd00WRvUUw1uJ97TvFJ+WLsi+dqc4eX5RyZzQA/lpbf0NDtVY2VChO89IIQyEKzpehS8GDGIYsm3JQpe8pz8TyFsD7mKs6HcZMhiZuLW1EbBtnxmgLByhPaiAQE8aHucb/iU7krFRqi9ezfWBx1OQnJ7VxK7icsR3oh8RHirMII7ssAexwj5FsSEY2G+8NoD9sz3M22tkBQ60HNDGJEfnium5DknVu1yAmQVtWDrrjrNn6Nh71b1zlAl5jEmtQNPbrpCCPfruafVVkDKztPEId1Vnd1DjD51WHpYeTNLnOkF712AoRZrd+ix4kDEFYLtObUKDgx7vxTSrPRCN1Zbo+vEz85sfb+94DZvmzLNPvAfnbK7fVhILY2tF4YeWi8A/fgV50Y82TObLEgbLoSWl6cN1JajtS0+xVXgAsvotZ8003ZPfE7rtU+MijfswBzI8TfyH8bHewfwo8GUxqJXkKxTRw+VCQVWB+Dpw4mf4fXbQwl1j9ELe62LFSTC05GhZwTKj211NdKi1Z/rRWlKcrNB+RwhjlL/30fec4+UhMFjp1SQ6g1OCRl5YGGNl0hiYzfYzo6aad8y+5EsIoGPTqKfUZKREBgVzcxCZa/dC2G/f+OnwGqjrurT05ikAC89qMoq1r8qL8 cLrZkqIt 5q8OcNLuoqnxXtoCx2lZSlkdKGKs/vGuDkUZ2MFeo2KmHb5EWyfjYkv6l5p/YR8Gkiqc+pTK16tS3rSzESQ5fyf6WiRzm515OAQVuLHA+mS5n59xWASbLnw6wpS7lJgGwrsx9eCebRtlYFYi0JbuXh5ZyFEIjoHrg9VAvOgPeygOSUnBbq57gwV+Txpt8vto3TD80BmCMyArztwSEk5bhSnZEPJR995y6fH12WJNHpRvQNde6uhMPVQl5wVV/b/jLG9vRBu2CT835UgcOO7BkZf0VcLeY0yVkUYBFSKoJ1b8C9h3fj1Kdfe1vS4TPxfa49CPaIKxeNnIcxHgZH9nPE1XSlhQSisrCZUgfs3n/oI9/wuFaeEKLUrqEn7BWBaUSEzTIl/qcQ3m19jwhjXhcKT2jkc0iNpbUZuTdNOqeUMk4mdx2xbln16/x4SHx0oX71GmngqKU/NJ6AxTvmHfAifKNE6+9NP65xUv1Hit2FTWV/542//j/InEnJ79GObinxME/z25yPmLWEm7SgFMQMj5G7AKVK/EnysjcRg3OLJ6DCmfDrY7g4S7HwMuPZEmUR022DVd3YNJ8AeI8dWmHX+f1ndjUmScbh+bFv6IdAraeipM8ogz8nA7jS/y/bBol7qB8RV/AVOE8li3CRaaBol5czhznUB+hGtoQ X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Samuel Holland Currently, we enable cbo.zero for usermode on each hart that supports the Zicboz extension. This means that the [ms]envcfg CSR value may differ between harts. Other features, such as pointer masking and CFI, require setting [ms]envcfg bits on a per-thread basis. The combination of these two adds quite some complexity and overhead to context switching, as we would need to maintain two separate masks for the per-hart and per-thread bits. Andrew Jones, who originally added Zicboz support, writes[1][2]: I've approached Zicboz the same way I would approach all extensions, which is to be per-hart. I'm not currently aware of a platform that is / will be composed of harts where some have Zicboz and others don't, but there's nothing stopping a platform like that from being built. So, how about we add code that confirms Zicboz is on all harts. If any hart does not have it, then we complain loudly and disable it on all the other harts. If it was just a hardware description bug, then it'll get fixed. If there's actually a platform which doesn't have Zicboz on all harts, then, when the issue is reported, we can decide to not support it, support it with defconfig, or support it under a Kconfig guard which must be enabled by the user. Let's follow his suggested solution and require the extension to be available on all harts, so the envcfg CSR value does not need to change when a thread migrates between harts. Since we are doing this for all extensions with fields in envcfg, the CSR itself only needs to be saved/ restored when it is present on all harts. This should not be a regression as no known hardware has asymmetric Zicboz support, but if anyone reports seeing the warning, we will re-evaluate our solution. Link: https://lore.kernel.org/linux-riscv/20240322-168f191eeb8479b2ea169a5e@orel/ [1] Link: https://lore.kernel.org/linux-riscv/20240323-28943722feb57a41fb0ff488@orel/ [2] Reviewed-by: Andrew Jones Reviewed-by: Conor Dooley Reviewed-by: Deepak Gupta Signed-off-by: Samuel Holland --- arch/riscv/kernel/cpufeature.c | 7 ++++++- arch/riscv/kernel/suspend.c | 4 ++-- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 3a8eeaa9310c..e560a253e99b 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -28,6 +28,8 @@ #define NUM_ALPHA_EXTS ('z' - 'a' + 1) +static bool any_cpu_has_zicboz; + unsigned long elf_hwcap __read_mostly; /* Host ISA bitmap */ @@ -98,6 +100,7 @@ static int riscv_ext_zicboz_validate(const struct riscv_isa_ext_data *data, pr_err("Zicboz disabled as cboz-block-size present, but is not a power-of-2\n"); return -EINVAL; } + any_cpu_has_zicboz = true; return 0; } @@ -919,8 +922,10 @@ unsigned long riscv_get_elf_hwcap(void) void riscv_user_isa_enable(void) { - if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICBOZ)) + if (riscv_has_extension_unlikely(RISCV_ISA_EXT_ZICBOZ)) csr_set(CSR_ENVCFG, ENVCFG_CBZE); + else if (any_cpu_has_zicboz) + pr_warn_once("Zicboz disabled as it is unavailable on some harts\n"); } #ifdef CONFIG_RISCV_ALTERNATIVE diff --git a/arch/riscv/kernel/suspend.c b/arch/riscv/kernel/suspend.c index c8cec0cc5833..9a8a0dc035b2 100644 --- a/arch/riscv/kernel/suspend.c +++ b/arch/riscv/kernel/suspend.c @@ -14,7 +14,7 @@ void suspend_save_csrs(struct suspend_context *context) { - if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_XLINUXENVCFG)) + if (riscv_has_extension_unlikely(RISCV_ISA_EXT_XLINUXENVCFG)) context->envcfg = csr_read(CSR_ENVCFG); context->tvec = csr_read(CSR_TVEC); context->ie = csr_read(CSR_IE); @@ -37,7 +37,7 @@ void suspend_save_csrs(struct suspend_context *context) void suspend_restore_csrs(struct suspend_context *context) { csr_write(CSR_SCRATCH, 0); - if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_XLINUXENVCFG)) + if (riscv_has_extension_unlikely(RISCV_ISA_EXT_XLINUXENVCFG)) csr_write(CSR_ENVCFG, context->envcfg); csr_write(CSR_TVEC, context->tvec); csr_write(CSR_IE, context->ie); From patchwork Tue Oct 1 16:06:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818407 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E221CEACE4 for ; Tue, 1 Oct 2024 16:07:15 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id E53CF28009F; Tue, 1 Oct 2024 12:07:13 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id E0742280068; Tue, 1 Oct 2024 12:07:13 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id C304628009F; Tue, 1 Oct 2024 12:07:13 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id A1E80280068 for ; Tue, 1 Oct 2024 12:07:13 -0400 (EDT) Received: from smtpin10.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay05.hostedemail.com (Postfix) with ESMTP id 164A64160A for ; Tue, 1 Oct 2024 16:07:13 +0000 (UTC) X-FDA: 82625512746.10.C6F64D0 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) by imf29.hostedemail.com (Postfix) with ESMTP id 08899120035 for ; Tue, 1 Oct 2024 16:07:10 +0000 (UTC) Authentication-Results: imf29.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=cI6e9YYr; dmarc=none; spf=pass (imf29.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.174 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798727; a=rsa-sha256; cv=none; b=Efv39gTQj34l5WUpH1XYdQF/7o5UFOzDtP2cMVVd+wjFIcGnYQZyMwwstnz0lX8P5DqkC1 YEyeNh1qg7jnzTIjf4QA436Vu0BfyJJ99KDLTKs/Nx+YhNRh6d2DJs3TeTCo/CeQZk8fWC aZN22GvtQRd0qm4jFw1gUizPFP+8tuU= ARC-Authentication-Results: i=1; imf29.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=cI6e9YYr; dmarc=none; spf=pass (imf29.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.174 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798727; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=VSJycIfYc39uVmA0S5cW1xf7lSeeHj3Up0tXaB++17w=; b=oVRhpQCljXzrz9/W1Vz966ekpsxoc/ALnxuGSJqn1LijXxwePcWHLXO+l1cJZ4a5qeEXHW Xo3k3nLEa3AfG98tXaQMw6Pgr/5ycbyvdMPUKrxDiDV3xwd73orDQpj9TCgktyq6r2t8hz Ev2md0XZjv92LkuBM4oPf5+FHSfqV/4= Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-20b78ee6298so18005485ad.2 for ; Tue, 01 Oct 2024 09:07:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798830; x=1728403630; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=VSJycIfYc39uVmA0S5cW1xf7lSeeHj3Up0tXaB++17w=; b=cI6e9YYrlKoY0sxIF3mLPyTTplX9ooyrnaynUviJEvZRGl0/+mSs8pb2N5wze4XX2Z j/Wo/Up19INSWskHUFfme99QvP0pqI6enoY0ukxqxZad8/kFnquzmyiYDfIJ3y+8sh6w tAgIEPy6GFdW5e9mpqkrgrPnFzE1OpuchIeswBX90pW3M5r2rc0BrN5dP1YY1Bv5Fv1y waBLw/8CVvMD5WrwtpEFQommx7O5lJFYyVMQmNYXllkUjHRLdk7oPKkvzGrZTEUakhRl ex+Ok7nrJs/I+/rxpO3Tj5TjmdXcOBcVCPa8pp1s6/6qAOSGZ6TtdwjekYzdJiHicEwe dhsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798830; x=1728403630; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VSJycIfYc39uVmA0S5cW1xf7lSeeHj3Up0tXaB++17w=; b=hjJeTs0ggocaS+DJV5DhOrXvMmsp3sVJoA10BRj7WfPdSAyZjPKW7DI+8TzFnZPYch ERoInFAvtLrkSmu3iFbLQmEFupJEf8uK/7pjjrCHJaHkndZM421Lu1RcSzVQ/DA2+9Fj H2pcPPVrWFRuejwpkJ+y0LgY+ih614LeBua7y/n+vc6K2PQXFxldcWeTYI+lNhpE9UWr wDiOvHvkLbYPJj7AGlsYzQjf0LkkCkDn8ymnE9k1GzJ+KPbIVOV2IMUO9WrEsdVhmynJ fFhKvoQx7EBCDaTOz8VMRDXSo+h/6MAaBnaWpHFK5rxSaFiFwvRxyufsnmo7yrOPfNuz vSoQ== X-Forwarded-Encrypted: i=1; AJvYcCUhIfO6tmdLxHOcXWeQxcnHVRjXkwVWGjIfIFOprLC81MVAiqI/mSrqhromNIGs/Zm5VKMCPZbT/g==@kvack.org X-Gm-Message-State: AOJu0YwCjD5QoT8r9CeLHF9HCPuumw/m/TEBFsFeLTIMJ5Kvv14m42lm R/knvrG9FSmzanW5cTrEwBxc9trmxeCcID56Tg98DfbOFIvA4ys9495nXw0SiNs= X-Google-Smtp-Source: AGHT+IGbxpnW+Ks2YnlHYSaDv2y1WnPDZfQCABjl0RJSI6vizw9vnR0BiVry5CQxYrybXmS518wotA== X-Received: by 2002:a17:90b:1bc4:b0:2e0:a77e:8305 with SMTP id 98e67ed59e1d1-2e18496a8c7mr191491a91.39.1727798829693; Tue, 01 Oct 2024 09:07:09 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:09 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:09 -0700 Subject: [PATCH 04/33] riscv: Add support for per-thread envcfg CSR values MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-4-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta , Samuel Holland , Andrew Jones X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 08899120035 X-Stat-Signature: qdc7bfgaben7u4eskspqfj8pkfw45yzy X-Rspam-User: X-HE-Tag: 1727798830-328273 X-HE-Meta: U2FsdGVkX1/ke17L3M5fyHFlAHt97YX1qxdPIvMz4dftflER8oPLU1chPibNvtdYrO6WfW8yYXjcQlerb9ic8jBmqo9JtQIgzooFiFA0VIPz0Ne1iW6U/JYeuSAK+zLeeyjJtZkKdDcgm0fNQcYxiim+OiJXm5rdy3/Y7B8g3t7BqcEwzh6TtLbWk/j1F9HsCj5yrwmztUXXz9EcaFLMLpKwijNSfoLOrJ9LatcVQX27pXpOTEQeW7ZIMXzGm9kQcUplqU71nKpjgI4uKQf1Ib5993whHTxeG7SL6W2Qwiu/2SUdix7Ma5vIqYhMl5DjXGBvouck8SUseNyqIl1rGc74t67a5O7i+9MXmDnw7yMH1HxVIHiOUQI6WjUriiiT5j6Htgx1yfTBv2sCPI5pUD8tzs+tHkBmaaRz2xC3lImx4eypK9DvKDBGi1HHeMg3W8TaxhzkzXrMAQravGlzSYMu4d6WkNwBUeBcvnQC3TsW5AfoPwDOgRjpNeGpsfMq4V/rQFSJ9WBdkw5FAldUTVHE75C3PBTVslUQYRw0WPCOVhETayVphaL3Wj8fEC/+JGpirhCc9QFK9aF1dDeaVTV3sMRuCL0VHcIFcxhLzjErHEVc6nVbldE33AvNHdu7G04EKBICy2ppecunA9fLq9XPZegiEC7QOfhbOOGDId8sM0zoOLBFiX41GitfoX1nma08cVClE0jHA9pQ45Dl9GOeCKpBOfdJzvjRkQtSbe3yjJGuXagv/Y+kBYpu618y12qBfzMgGopRWVwoRjW3S3WpZXOA+nb8J7BI9ZVFkT5VAmgciFa9FFrK1cZHMMbJ1kq1v2/+sRm26oO3x5cVJIzx4Ns2ikYVd6lOs88ci2PgeQLL7wCcECuaBgxdftffaG9HeCeWOtM+hwat3B/m2sf2TcsZpycbzSgitqMv13Pk+GMpQm5zunb9/HepTJc3BSUsis++KijVqPV6RQw HTpDxPgm RAj/VDFoXGIsxJqoNdksjMAZ+C4WExIqzUCzWC7dG5cSLGd8o+Wt7CzVJeqLAgg19WnrzdSDMvR6//3zR5AOwaEjsebeeCk0KQnayjrM+x+A0n+P0iMdaMedxEjyC8P9iCUPXXvGj9EHAQ3rHsUTPtDVmj1V2hUH+a97s+7GgRa49To8Nx+SOPLGY3K1+94dUK4T4INEbzbfy7+W9tk1pbuOS9voJifxyssrGWpS+OigOPq9jsrDgqVbc9ShH5ouulguK2vAZcBxs2FuKLklv0dh2dyZhgz+pUKPFK6GKk/ZACURy65YBiWb1/EhzgMrYXpwY1pjKl68KT5WjWVx5ly3KoS+7IGx/JggcK+dzY6PYkbAd4n6wofcHTtA9SXU19XIolyb00Vs/riD7i2mLq4Yt9TU8hYkw6Y7ImJX+jPdlo64kHzSCDkbhFJwCM45uwW9+03bZ3PwwRRUmLmlpugv9gco3SyuGL0zmSKkfv4y+R6h6cejshg6qWT3CVu6dWiSESW47OneWH+I5jG2WiWTW0ZcMwYUi5d8Vjf/6jVErtSnhJwOYBn0jzaUiOUr0vuZCVDAruxWcUfE= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Samuel Holland Some bits in the [ms]envcfg CSR, such as the CFI state and pointer masking mode, need to be controlled on a per-thread basis. Support this by keeping a copy of the CSR value in struct thread_struct and writing it during context switches. It is safe to discard the old CSR value during the context switch because the CSR is modified only by software, so the CSR will remain in sync with the copy in thread_struct. Use ALTERNATIVE directly instead of riscv_has_extension_unlikely() to minimize branchiness in the context switching code. Since thread_struct is copied during fork(), setting the value for the init task sets the default value for all other threads. Reviewed-by: Andrew Jones Reviewed-by: Deepak Gupta Signed-off-by: Samuel Holland --- arch/riscv/include/asm/switch_to.h | 8 ++++++++ arch/riscv/include/asm/thread_info.h | 1 + arch/riscv/kernel/cpufeature.c | 2 +- 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index 7594df37cc9f..dd4a36ff4356 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -70,6 +70,13 @@ static __always_inline bool has_fpu(void) { return false; } #define __switch_to_fpu(__prev, __next) do { } while (0) #endif +static inline void __switch_to_envcfg(struct task_struct *next) +{ + asm volatile (ALTERNATIVE("nop", "csrw " __stringify(CSR_ENVCFG) ", %0", + 0, RISCV_ISA_EXT_XLINUXENVCFG, 1) + :: "r" (next->thread_info.envcfg) : "memory"); +} + extern struct task_struct *__switch_to(struct task_struct *, struct task_struct *); @@ -103,6 +110,7 @@ do { \ __switch_to_vector(__prev, __next); \ if (switch_to_should_flush_icache(__next)) \ local_flush_icache_all(); \ + __switch_to_envcfg(__next); \ ((last) = __switch_to(__prev, __next)); \ } while (0) diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index ebe52f96da34..e494871071da 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -57,6 +57,7 @@ struct thread_info { long user_sp; /* User stack pointer */ int cpu; unsigned long syscall_work; /* SYSCALL_WORK_ flags */ + unsigned long envcfg; #ifdef CONFIG_SHADOW_CALL_STACK void *scs_base; void *scs_sp; diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index e560a253e99b..c0986291696a 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -923,7 +923,7 @@ unsigned long riscv_get_elf_hwcap(void) void riscv_user_isa_enable(void) { if (riscv_has_extension_unlikely(RISCV_ISA_EXT_ZICBOZ)) - csr_set(CSR_ENVCFG, ENVCFG_CBZE); + current->thread_info.envcfg |= ENVCFG_CBZE; else if (any_cpu_has_zicboz) pr_warn_once("Zicboz disabled as it is unavailable on some harts\n"); } From patchwork Tue Oct 1 16:06:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818408 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id E47ACCEACE5 for ; Tue, 1 Oct 2024 16:07:18 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id A0FA02800A0; Tue, 1 Oct 2024 12:07:16 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 94B35280068; Tue, 1 Oct 2024 12:07:16 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 79F522800A0; Tue, 1 Oct 2024 12:07:16 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0017.hostedemail.com [216.40.44.17]) by kanga.kvack.org (Postfix) with ESMTP id 5808C280068 for ; Tue, 1 Oct 2024 12:07:16 -0400 (EDT) Received: from smtpin10.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id E07B214165F for ; Tue, 1 Oct 2024 16:07:15 +0000 (UTC) X-FDA: 82625512830.10.437F92A Received: from mail-pg1-f170.google.com (mail-pg1-f170.google.com [209.85.215.170]) by imf25.hostedemail.com (Postfix) with ESMTP id E7301A0026 for ; Tue, 1 Oct 2024 16:07:13 +0000 (UTC) Authentication-Results: imf25.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=KbYTT5pI; spf=pass (imf25.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.170 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798706; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=FOwX8zEWq9u2vqkDVwGK82xZureIgOdXeRz6EPpdBWc=; b=Qey8O6jFU520tTHgolGEpMpLQP/ubjYaTq249fsdZjf4llh/qgeNxPZfAYjh1tUhvFMZZ4 tDOd15Yr0sVVQb5fRoux7f6+Sz4LQN6m1qv2S+Tys7gXVj8AB1f8ACxZ/dguJccS4S9gQd vSMKa2WY+Qx70CeF2ePF/lIhhJL4UVM= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798706; a=rsa-sha256; cv=none; b=f1yYNqufY61z5T4vtOVU1VH3NYvR5jU0LiSrJDWX6HXEpCX2Gzjw0SXKoCuEpNeaqZ3JWI XJqfaqGKFMnBR5GOL0ln9xwjvGvn3gGcMZnXDhO20nUGsaw6ntTCJoiJoQlJA2g0lozHoS eQM4aphjzxZUXRg7nun/N69t4BZDEp4= ARC-Authentication-Results: i=1; imf25.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=KbYTT5pI; spf=pass (imf25.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.170 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none Received: by mail-pg1-f170.google.com with SMTP id 41be03b00d2f7-7d916b6a73aso3651901a12.1 for ; Tue, 01 Oct 2024 09:07:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798832; x=1728403632; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=FOwX8zEWq9u2vqkDVwGK82xZureIgOdXeRz6EPpdBWc=; b=KbYTT5pIVh4q5ujfOWKaiqYg5S1JYhKEXZXrVGeHN9qKjNUKI2kZUs/Y0z4mrPY4wP H/l/qL8EegH1LY5v+ra5+9+5YBEgTjZCHu0Wkd7diZfyahBt9AsTS42TyoJ5PSzoye0y hSV2NEsxgJYamiJGIc4d2xqUx6xa9XnGa9QVdb/fbALqtj1G+AwKHawHmNwwz+5WYtLq fkm8iWX1aXBlVpW/O83XySVZTyqdA55IqKpMMRLuIBuq8DysFqeNQw+y6w5NeNCyas45 B1e8xe0IQJcVTKlw9ypjdOvjIlbS+B2xpdVJ0SaX1BQUVDY4d1gMR9yfbhOR26pa9DGw ILuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798832; x=1728403632; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FOwX8zEWq9u2vqkDVwGK82xZureIgOdXeRz6EPpdBWc=; b=ZMZsCFTb710Sbs/hWakHAlKqwnsdiDz13eao/Ao/2KC1plJbDI8JJmjmrxrIify9me L0rQIipUPeEEIFT3UdE+aJEnZFUjUqgxoqhe630VwkqDoA23hH/Uvs6LNNlXYTZBES56 nFlg5JKxztq1pt3sq/w17xFh3ujy7W7yd0BS1Ph0FrXDlx1M78RkAw1zoqvRUtqi2qcn 72RYxr1JGmzSkL64AZuV7Hl0lE7ZJnBhcLNyJM2KPKwHRnxwfbTDjZ1VqHHtrNwWxxFg 8MFVQEYUyuCx3iBJSRv+PskmBIcJeMkRwVmrTaL2dBRZRXwMF962lY9sVIqsl8RwtTgR KVAQ== X-Forwarded-Encrypted: i=1; AJvYcCXGAGbxYEWb7Hu3YQ2ghezrFoJSQ7tHIxg8gQHRLiO1p8+LwvfxieJHs3/Jc99jcFZyuKcxHnaIXQ==@kvack.org X-Gm-Message-State: AOJu0Yzi/ub8ZMSNqkgHd6/778gyiDfkwPj/4Fz0iQuurIs6VoB794XX Yktgk3TCC+hMmlw2FB5Od9Z62n7WNmDdtrD8y1ebnvny5SiI5LHbvC+7lUZVOak= X-Google-Smtp-Source: AGHT+IG+QoJp6SaYR4NX7gvJQsxk2XpCmBA5X0cJPckGFJwiDNphfS2kILfudd4XZsrEP9ImoMA9pw== X-Received: by 2002:a17:90b:4a86:b0:2e0:a9e8:b9c1 with SMTP id 98e67ed59e1d1-2e1846aff84mr236832a91.22.1727798832417; Tue, 01 Oct 2024 09:07:12 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:12 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:10 -0700 Subject: [PATCH 05/33] riscv: Call riscv_user_isa_enable() only on the boot hart MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-5-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta , Samuel Holland , Andrew Jones , Conor Dooley X-Mailer: b4 0.14.0 X-Stat-Signature: bbmcpyy84ycqh9m49reuu1rdewaqwcwz X-Rspamd-Queue-Id: E7301A0026 X-Rspam-User: X-Rspamd-Server: rspam08 X-HE-Tag: 1727798833-318225 X-HE-Meta: U2FsdGVkX19LJ+c72ganKN9dE+E37J9ObwDWQc/4HE6GcU55V31BBdr7o7ms+tMqUbmHaGExsPY+Pd6Q+64VGmxoXcGZ2qcbxWUq44xhI0XTGwRbTubPKlNdCWgeb5emiRJnp2n2b8vSB57YuZneoz+JUUGVO0lMo0s5dzgs1buEp8BpxRvMwrpH3xteV40vT7ELItsS0hBbIh1AJiI6BWYrPIYOswAjwdv9vyr2kKZZO2arm+SS0dpR9WLmGcjmLEKh3Pw6ocftiBhlqLTgPFM9S/d5kxr7W+PAGQ5Qfxkvu9Q0Qusp9/xrgxHgG5Hj5sudl+nVkGfrFW0AxQKpHgu4Bu/PrAEMJLg0DZ2McNR4oY9JUFRsafNla9epLfoBpYkrWCmVnVT/GyswB2TqLA7alyaCmwQ8g0gFtJ24OzVGg0ZJZG3xCJgsfu4jvusMYpLyKs2y5wkP0cMOLbUjuZPJhQ2VKXExd4KDT3XlSgfNwC6F4QAg3USCVPY1IhIBay20RhknPXY0iHK/ljhxaLFJOGxHejUo688SqHlev47XksNd3RF/7KALQf7YyNofjdQsAPbMGqoVcMTkQiGepEyEfVDzWAVULuMerLKNqELCVR91HWpwrJp3+mvT4Pn9WgHsS1A8tBc7YRe7ziEte/NI5EJpaflb0mPzxa6Y4JQOtaYBOb9uXl5nFotSo6W9SHko2EotNHDB0hd5tFoK0olK0jRCib8cEsg+XfIDVOMrrBovn2ggUjiLmmV2U5/SRUf1eDa0/W7RmGaOjGpNNxDFClOOO9cMYbWNTfmH1AuYDECQh+0H51mm3pW7O8y4NNUc28hP8fNKLtufTiSAW/qSvWZMn37IOEShJHs/dQJ9RyExaPmT0LFXFGWWpx0Tn4ON/18pkPBPGuLbAMuOL2pEE8bmnF1VWzWnPNVsLIKaOprUkGnT4iuX3IrIo2uhoPO2Lr66jjoHHqiwSuf Hth/9nIb /93rRe/NNgzg5vaIYNuFZvO3ECut6vIE8h3qOH+B5FTWC69CNzPh0qcIc5DZRIJHvZPTAKP9xPXbBBhXT1Si2TPi3wkiosy+Sm5u2rwxMaw5UNO1jVAnfK6rNt+u8IziTEZtW7ItWCHT67z1IxnReMJXvPfo6rGqVLixXykTc/TQ1nrhbOZkmBRSZxoNu0kOHxV6uyeEauUkQZxxpEJFU5d0bVXAVjO8wjxFCD8HDluxS7h0jRqqoN3SDzRZwOm6UV4lS9tgSL7/vsLsGFSIZ7HDVF1z6NkTYNaC2oTgu4K3/BEEJYfvhqSbK3NNxLS1Mkd9o/suTRfDGKiVGA9wAGHtKru3dawr2Ef3pw8UxEqbbQbQXqPCW/vGZ6SUboOeDqEAPiPndmScs0/zWlnAk3qCVMsYhZmBoI7LlpeSEA/kHFJtauyKtZaSs45eR44xWk6RwJI/2VU33is7lSUFF/u9EjcFskjNZPUEEje0/aqNCySLrmjc0VLblDovTqT5bmWl32KxRDTEa9jMKyL83tdhC5zm8bXdCXtk5zVm9giqySuFFkMshNW7pXVMpn+469jcFqUERFkJd6izn40nK/VGmf/2PXgww9cikZOI6hex8RLK3FcmGptXzuLAEYs3JdNUoWvGug92MQRcx7n1rmY/2EMCWx98sYfKNTBnoCrOaBQDaqOE2hQJawg== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Samuel Holland Now that the [ms]envcfg CSR value is maintained per thread, not per hart, riscv_user_isa_enable() only needs to be called once during boot, to set the value for the init task. This also allows it to be marked as __init. Reviewed-by: Andrew Jones Reviewed-by: Conor Dooley Reviewed-by: Deepak Gupta Signed-off-by: Samuel Holland --- arch/riscv/include/asm/cpufeature.h | 2 +- arch/riscv/kernel/cpufeature.c | 4 ++-- arch/riscv/kernel/smpboot.c | 2 -- 3 files changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h index 45f9c1171a48..ce9a995730c1 100644 --- a/arch/riscv/include/asm/cpufeature.h +++ b/arch/riscv/include/asm/cpufeature.h @@ -31,7 +31,7 @@ DECLARE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo); /* Per-cpu ISA extensions. */ extern struct riscv_isainfo hart_isa[NR_CPUS]; -void riscv_user_isa_enable(void); +void __init riscv_user_isa_enable(void); #define _RISCV_ISA_EXT_DATA(_name, _id, _subset_exts, _subset_exts_size, _validate) { \ .name = #_name, \ diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index c0986291696a..7117366d80db 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -920,12 +920,12 @@ unsigned long riscv_get_elf_hwcap(void) return hwcap; } -void riscv_user_isa_enable(void) +void __init riscv_user_isa_enable(void) { if (riscv_has_extension_unlikely(RISCV_ISA_EXT_ZICBOZ)) current->thread_info.envcfg |= ENVCFG_CBZE; else if (any_cpu_has_zicboz) - pr_warn_once("Zicboz disabled as it is unavailable on some harts\n"); + pr_warn("Zicboz disabled as it is unavailable on some harts\n"); } #ifdef CONFIG_RISCV_ALTERNATIVE diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 0f8f1c95ac38..e36d20205bd7 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -233,8 +233,6 @@ asmlinkage __visible void smp_callin(void) numa_add_cpu(curr_cpuid); set_cpu_online(curr_cpuid, true); - riscv_user_isa_enable(); - /* * Remote cache and TLB flushes are ignored while the CPU is offline, * so flush them both right now just in case. From patchwork Tue Oct 1 16:06:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818409 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1DA0CEACE6 for ; Tue, 1 Oct 2024 16:07:21 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 7547F2800A1; Tue, 1 Oct 2024 12:07:19 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 70118280068; Tue, 1 Oct 2024 12:07:19 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 5537F2800A1; Tue, 1 Oct 2024 12:07:19 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0011.hostedemail.com [216.40.44.11]) by kanga.kvack.org (Postfix) with ESMTP id 2E4A5280068 for ; Tue, 1 Oct 2024 12:07:19 -0400 (EDT) Received: from smtpin23.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay05.hostedemail.com (Postfix) with ESMTP id A1C9F41604 for ; Tue, 1 Oct 2024 16:07:18 +0000 (UTC) X-FDA: 82625512956.23.511C7C8 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) by imf20.hostedemail.com (Postfix) with ESMTP id 9DA4C1C001F for ; Tue, 1 Oct 2024 16:07:16 +0000 (UTC) Authentication-Results: imf20.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=AbPGB0gv; dmarc=none; spf=pass (imf20.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.174 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798696; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=pxvPbFdPQ1tC+j3wFHGGOQBUzN++1F4GTwbS3f8RUbU=; b=gIH4nHMO8J+Gt23iN5daBzBJpMX9UbmXJ84txuLTHrE8evTv1OuRCHzEKqlkNq2i72dyR+ 3affgGxd0Jbhc/rf9JiMIPrIe6vf1MSw5T8cIUXVcbBDlN1ZUhkkNbt07dN5fL+zyo91h6 y0Vw9g5TNyeI94yTuVjinYiw29lWq8Y= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798696; a=rsa-sha256; cv=none; b=dNOMvnT9ErhJYoANYEruVfif0bL5nPatMJKkjdhXUiWWQ/ImqG07B/j9FXv97Vywb/lPBV 62V8l3A/PUC1nqZnnvjMXkbP1kBYrvxwZ6QNeLjmN1Df2P88CT4mWPKVrt0XuMdEoJMKX9 hB5g9V+Kj6v62kJP4BcjRA9jj94W9OI= ARC-Authentication-Results: i=1; imf20.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=AbPGB0gv; dmarc=none; spf=pass (imf20.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.174 as permitted sender) smtp.mailfrom=debug@rivosinc.com Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-20b49ee353cso40483565ad.2 for ; Tue, 01 Oct 2024 09:07:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798835; x=1728403635; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pxvPbFdPQ1tC+j3wFHGGOQBUzN++1F4GTwbS3f8RUbU=; b=AbPGB0gv8R5dUjpS8Dq3/0Ux3v9ZAk/Q4HmGcylVsCoIyDXJpI9NdTyUqjeUPovrYP XQq6iq/F/6efOJXZmiOEsA+RDkWeSVx3RfEtSlZRVJ/tkIxocu/eUrROGFXb3zIpdrph Wfq2uiRbQExJUlcoaJLmw4RQC51FEiVBQ6Cjh1PFdMM6JCyDnnC5vdk4UmemAAkm1FJH s05u1fBadFcQQFY4jnqJ56ln3rxDuxjIwI0I2tEfomL9kShOcRcDaoTQJvSiWnb6uz03 8f1aeSh4IK9HkZ2xweSMOuUtSOqV5VxKa2+4sCMQrFwSkv5Tqr+m6E6D3Hi3ZL7hlKcW xZ2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798835; x=1728403635; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pxvPbFdPQ1tC+j3wFHGGOQBUzN++1F4GTwbS3f8RUbU=; b=i22iu+fvAqzEC5jkb/zu994QrJqQvxaTH3b1ZfAJES6WBo8JbQ9RgHupiJPEsGLnm9 kehbj2Nh89Xm2Kov1aGgprB7EfckvocWTbqgj9fpoKHUXrB0PLM7sm9jIVtdGbrEinwR hFmG9eRn5nMMgVc+IE+7R+cT8AeOfVYoYKBVQojhLbxW1qiryruK1Q73AgPRQjY/wwBK aQogCe6NkmbfiKBVAV2Wd5DCkD3QeosBxwQv58TA5LfZJ5ZV0rHPP68dNyM15GNCAxp/ oHWHkQwjLueNpojSHzNUHp3N+s9weHWCBZODwrgC8k9Li1HJ78Gf87gll0TUrQwQXjAr 1XCA== X-Forwarded-Encrypted: i=1; AJvYcCW3FP2JqVRb+fkfGVxF6CanuawaAtQWLAVjP/kiKfsAblx/BxADCDRB2rmx25ObL/zhhZbRjnC58w==@kvack.org X-Gm-Message-State: AOJu0Yza39xnwNquTV/8G64hVXd9Jd4RsISHgrmty6r2PqSJEtBfylYD /IlVBqzxZ99Yib7I5Pl7bJ5+vmBbcfqjZqehibc1Osq/bqjkDJoONkYOCHHmedM= X-Google-Smtp-Source: AGHT+IH2Sm4Er88BRFmxFtoVQlQZa6M14xX+NOC0OSBp2pCUlTzjnB+u1q8ipbNjt5+sqIq3C7HKbw== X-Received: by 2002:a17:90b:3b52:b0:2e0:8784:d420 with SMTP id 98e67ed59e1d1-2e1848013e7mr226286a91.21.1727798835139; Tue, 01 Oct 2024 09:07:15 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:14 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:11 -0700 Subject: [PATCH 06/33] riscv/Kconfig: enable HAVE_EXIT_THREAD for riscv MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-6-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam07 X-Rspamd-Queue-Id: 9DA4C1C001F X-Stat-Signature: h6t77ofqra5ixiu43uq961yeo11rundj X-Rspam-User: X-HE-Tag: 1727798836-984619 X-HE-Meta: U2FsdGVkX1+ByYIvrvsFkSZoO/I2JkiOweufFpEjNyab/SGLG0Y9cUmPI3pQkYdsVIRgRo4IGuAJHJyD9Bc8N4IbhGKCy9iz/xRc7Fk90HRRl8t17VozMheHAwpV3S7TxMFrBfR6TT+siRKW+90TDR2ZbGt2g6LdlPap5phR6SdZUqAmC90GzAeVWiOwvhOIk11uIDFfOzP+CdRwUAsoLlOezP2LrQbQYST1yIyzYkLY7d09z0rLxxBRAWj8p7d60gigtfVOUPYdjeq0hYbcsD6Ob5bSOrE5U7OhRPICdxrrewUuz1HLSJVhrJR5zdfsC+6Ey33VxSRFrJZ8v7UFBMLY+4ggwyIJVDm3M5/EXPvu5/KC3KE27GD4lNM8wZ14o5LGPjFNA+FWToJwvahYoz5tPNaZ58yBTXmPQ3KD7Y1frT6dx5XgCnz72J20bLGg0+OOlDHIaYi1WsvRPqO1LOJdFB++9TcsTNNE2eWXP+5AYJw56m+neS7yxJUc6gfs1nMVXRjTAYC8ec2xa/gfS5LjIJb04bC1Asx+jECTGlEInfzl8ctbyQM9wbRLY6y8UOMaGr7sOGsGsCgpxBc8QVqhwIBXcJOinJWhNAvwMUeFuXrmVd8LhYBtUUsrKWjfaZ7qlyvvyVd07KEjIY9Ss0ZQHBmMsCLyXTP6Kt1AYIOw6SFaEfi9YKngUZdzosog16zKTVfuSszmSRn9atf0+AK9x7OysMjgMqITFW+MyfqYCTHif3Jl+sMtV7rW/5/60H5HgspZ3QqU7ULlXHXpIWbNDgL4vjx7NQxqBSUj5hfmW3g8vcw9KKcPFI9EezntMraYnZUaUlnNl9gFnWj5jsEGhUl/aR4B9HgVJHnFZgbK72IVtg2kBTGZs8sKSiBiYiLO/KLi6yydSe0rTOXKnvaWvr6Hhu5o207pa1B443CeRHIUsXPJ9fUH2+moMTmfZxphSjb4bq+nw0Ot0oA pO9KzKKz DE4gXGJuhiMP1F3FkseYhG1bqYaV8L1OnZGSAF8Ete3fVCuke7ZvDlLidUXUyoXdJ7NSB6hQhpb5bTpPQSgCMFcwVDhvfgnOt0TCDMksdqFc/F3jt+7HzqzEZZD+D+wm5qZ/22eVeewfKWoypWx9GFUl5ejl4sLNg9ejwTa0TjTXZDzrOD8x3YbFKc7le/QINvzBClrIqfLGNybIu7XBoYlo4RJD4AWFdQxG/3//oVC9ZY22j+x0vZStQD/aUaVfHMq84gV1ZCvZKyLmaxoRQGpPGNxPthI0TQYB0UORSAH+98UkSUv6qWo6S8ZvOHMkLIc24YCU9qvLOoeUTkZX2ZH7OA6I374eKGJIiAo+fFb6nW/nCzFNkTwmICufP51ily1dQJhka5XAhvy9nmrwhXsgAam4ktLb6zi7HrvK8QcWNupp6uJ39zLwenXRmLRSgFYf9fC8HxzzDovbd+zR2qkOk9XnwIpu/zkgDEHsEitpkPkFh0DYrnphbWdipQTy+TgJVVzmB3cKEdSh94b2rxd3KXfOAsxP6jpUuA9NS1cM9ZcKnqvrEyq0TujzLTHqFg1oaNUZhA9J5CwF0yAJYPn4pakzmHKTSbcBg3Za8wPCEWAzPC5xHddjuVA== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: riscv will need an implementation for exit_thread to clean up shadow stack when thread exits. If current thread had shadow stack enabled, shadow stack is allocated by default for any new thread. Signed-off-by: Deepak Gupta Reviewed-by: Charlie Jenkins --- arch/riscv/Kconfig | 1 + arch/riscv/kernel/process.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 22dc5ea4196c..808ea66b9537 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -182,6 +182,7 @@ config RISCV select HAVE_SAMPLE_FTRACE_DIRECT_MULTI select HAVE_STACKPROTECTOR select HAVE_SYSCALL_TRACEPOINTS + select HAVE_EXIT_THREAD select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU select IRQ_DOMAIN select IRQ_FORCED_THREADING diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index e3142d8a6e28..1f2574fb2edb 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -201,6 +201,11 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) return 0; } +void exit_thread(struct task_struct *tsk) +{ + +} + int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) { unsigned long clone_flags = args->flags; From patchwork Tue Oct 1 16:06:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818410 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C82CCEACE4 for ; Tue, 1 Oct 2024 16:07:25 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 8D6D42800A2; Tue, 1 Oct 2024 12:07:21 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 838B4280068; Tue, 1 Oct 2024 12:07:21 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 5EDD02800A2; Tue, 1 Oct 2024 12:07:21 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0017.hostedemail.com [216.40.44.17]) by kanga.kvack.org (Postfix) with ESMTP id 3BE5E280068 for ; Tue, 1 Oct 2024 12:07:21 -0400 (EDT) Received: from smtpin26.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay02.hostedemail.com (Postfix) with ESMTP id E66051214C1 for ; Tue, 1 Oct 2024 16:07:20 +0000 (UTC) X-FDA: 82625513040.26.3958295 Received: from mail-pl1-f180.google.com (mail-pl1-f180.google.com [209.85.214.180]) by imf17.hostedemail.com (Postfix) with ESMTP id E94354000E for ; Tue, 1 Oct 2024 16:07:18 +0000 (UTC) Authentication-Results: imf17.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=p3Om1PBR; spf=pass (imf17.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.180 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798774; a=rsa-sha256; cv=none; b=1P0yA9vnL69XvSkL/deWLTKBbTfHaxCHB2WD5ZaqWIpHKFQZ+ylRdLQDD/oTmOPG0pqyzg TJ6BAOlr+Tjs4hk47O6T0F8A7XJyY2ieNQ9FdVSQiGhcBuHNsQlqrk0w+Vuw/4SqoyWNI+ jBnZrMw8MU+cq51d3DxhkkK9Jg3yC90= ARC-Authentication-Results: i=1; imf17.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=p3Om1PBR; spf=pass (imf17.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.180 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798774; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=KtNVXjjPkEHV4V6z1fTmchaZwC5pGCKRUL8HB/rDqj8=; b=ZaVXah9GcCa7u7ySv+e6EaveHL8zromMnh0bYiVqYD95sxlInGxkmJf6g5LQbpF4rk7gko LJ5Xb296ZBAfMrweQUd85nemwK139TweOelGXj2jTnBZ9ES4ho7L0DRM88v0iR8GdoEaRi YU3sNGCjcP4PHw/WNmYhgdOj4f67OFM= Received: by mail-pl1-f180.google.com with SMTP id d9443c01a7336-20bc506347dso910425ad.0 for ; Tue, 01 Oct 2024 09:07:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798838; x=1728403638; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=KtNVXjjPkEHV4V6z1fTmchaZwC5pGCKRUL8HB/rDqj8=; b=p3Om1PBRinDoq6BCZqTxrVmomcxeJMkpJD28ycxmLmMW+sA7yMVOyCuFEXR0XQKJwJ RNUUunQEkIiyV9OvqYzTZcstXmY+9mnMdCFoiOCHXtoaOYuvoijVm2tS3o7KG7zXnl28 QzxzPTRMy+NNUMcY+FAsA8Z3CudIwhhQZ4WnN2CpObv0MFUSkdh8GhvRacPHz+CCFZZy M64X7SWCj8Pzp48pTJ3nO6Bav1uJKnEpBMNScLaC9lYeOAPXD/ZYW7jrJUJqNnn9bk0g 6gdn+vd+XF9EW5wLiF9Ko5cn5Z3TGUVDzLrDw8kmmCNT9finZhLQWdo6eGRA1xODt679 B37g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798838; x=1728403638; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KtNVXjjPkEHV4V6z1fTmchaZwC5pGCKRUL8HB/rDqj8=; b=oRU7gGkGgZ9Bg5Xt6SNttRdiCViUOrqr1t26jLJUtAHVuFc56n/1mc7v4BKYEQEDPO o0er7eIbHep2lYJKxbtbRadZWmv1lWrT6tonas96Wr4FfTh7DzBHnl2ub6vjsz177Ulb 4WS1Y7qObRBTTOJhKp3PmDwRVYWLPBiFm+nE/zXFFc45wZL7piG6qJDJDwqbvS/+VjGK CM9IYAogH9//fQIozBIKdULZ4feabIp97+4BzfQ/PreauX2fFhhwqmL80mQ3aG/nVM3m 1ZUp+ydWiT35qWTBZSXNTZaui8RaP1jzrEahc7WzAeS3hdadXj1o7QNYQhXlWa9nFlQN UOsA== X-Forwarded-Encrypted: i=1; AJvYcCWO5XORcfgjY8MTxrsnNdbtkG+dZWVpJLnKaCPxvlBgD1KX97GO/ml7eW2QbkztBHyREPTjlU9aJA==@kvack.org X-Gm-Message-State: AOJu0YwLs/fgydAFro/3mESbQkohnJFtQb5bvzsRXOV84AAElKoWF/ay lQQ5DGuyL/NKbIFS8hQsPVhPOH1ePUevP0D180p+SEWJVfw9c2LOt8PCNE3Cnu8= X-Google-Smtp-Source: AGHT+IGUHiuJzYzZ98ttT4VkP6ZUowafZttsMI2A0s9DSSKJP7pFR0E95zO3sMygBlOUl3biGdauQg== X-Received: by 2002:a17:90b:94e:b0:2e0:ab57:51e5 with SMTP id 98e67ed59e1d1-2e1846bc39dmr235253a91.23.1727798837693; Tue, 01 Oct 2024 09:07:17 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:17 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:12 -0700 Subject: [PATCH 07/33] riscv: zicfilp / zicfiss in dt-bindings (extensions.yaml) MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-7-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Stat-Signature: s48oexgh1fg8g5yi1r6d3bursixbimnb X-Rspamd-Queue-Id: E94354000E X-Rspam-User: X-Rspamd-Server: rspam10 X-HE-Tag: 1727798838-230913 X-HE-Meta: U2FsdGVkX18eorH60NdzVQf3wsP6iDz1VYSOnc/tu3kceB94OmBhXZ4pytrbzoKaD3Y58FrC626CS5zNtW9+5/q7HIxds5RSKYdYQvqR7ic3nHehF5fTZ6G18VejtBTVgN36Mh1Mwqecg2VqKHc3Gw8KvZ1M1a2Mujt7QDOenjXv05aYfaW+KuHXhjD0rNZDAZnVo8dV5mOc+OUIf1b+vi18j2XgDWuxgoDEClLYt7WdF8sjYyGn368eWyiw9L8j8oxnSSfy7Kf/Uxh59lJ+SJI1DfqS9hCExBC5+kjOEpQ7jgNknocWNpEnYI5Cgy0iFaO8aozuEtpIKSIQ7j7qmh8J+wYRbVc3QF7xRnMNdhOmEZ8Z3H1Oc6hOPuHwM0z9e5HosUzQdy9b80ZeGEvNKT6xdqriARTdO6vRvK06LcJQEOI07mp1t8tv8u7OsOnjyyDJxwJkpU+1FjnHRb1WOyzXtGe8XEs2lqfg1EeS8gK4+LPOBQdQ1EEe2TNPVjXngVyOAuZd9EE2RIrxYkrgky0xZORPo2pBWo/DuwvoWxSm3fJVxJOFoVoixmMu+pFkDxblZO/unl+P2oBq5qIrZI0HZ5M0470igWlNuN1iAeIdb48bJ6D6XbkN/6k63eDgp5B42BmdXnVZJz2HsIrQ6I/5/xBkdd6onO71J48dqXcSIOL9Y8WDZ6I/PELxVuq9r1LPYgciAeGnBFN3DqjKOX3cwVScnq7PBG6ZpylITukgxV/QE+YCKxXDr4A3jhepsGxQbekcC/23A5AKkcJTvGR+Pj0A3Mr8sDFTmirYtTkM4s8s9hQdulH2CG2WWRbL4NAbmJh3YyHJdWjTZz88E/GO4l026K8T+abEdabMalvDXISPcApTrnB16djiWMURFOSydv5YyHbakPdDL/ISh/RjtFRaC1b06HgOnoslIjkNaWBeDJf5aHhrV137vU9Wjsp5TfezJhcOW+ywAal LNupgc5T BrDMxiy+2QvIo+fuktESZcRzr1Q+Ws30moKNXS1GIoviCdyyIXLpNxWlwBhp3qLiw2Fo/Gui+cK1GHnwVYxou5QWmEeRCHkb6OeyVJSRz7WuaFhCcLOmh4fOMqflDYygyAku+sJN9Q6m9x8DITZydhTAnNZNvFJqsNrDOLiaJWYzKRM49hyK/f+G13b9V0icFlLjBys+JJ5pyHfRkWBBCcJ3txWqxcoEyBAO1eU0tR65Z/HreQfXjR1VkKExZ3ahfLwy08P983AabDr0c5up42FP7NIkAAo89aj0yXgIkQN5BNsstFYt4g3DNga3hTEbJZOcDyHbtNVvB/d/YBnD9ZoyPbV+APEW9panVHn+yeFQk6AOuynS+3nK7AxPeRy1AqYsWvS/vWibnCvr5ZVpu94H3PllcH7tb48c7OMhjGx/LjVrnURmA3prsuXmDLrK9ufTrlfmkB8nPhHU= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Make an entry for cfi extensions in extensions.yaml. Signed-off-by: Deepak Gupta --- Documentation/devicetree/bindings/riscv/extensions.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 2cf2026cff57..356c60fd6cc8 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -368,6 +368,20 @@ properties: The standard Zicboz extension for cache-block zeroing as ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs. + - const: zicfilp + description: | + The standard Zicfilp extension for enforcing forward edge + control-flow integrity as ratified in commit 3f8e450 ("merge + pull request #227 from ved-rivos/0709") of riscv-cfi + github repo. + + - const: zicfiss + description: | + The standard Zicfiss extension for enforcing backward edge + control-flow integrity as ratified in commit 3f8e450 ("merge + pull request #227 from ved-rivos/0709") of riscv-cfi + github repo. + - const: zicntr description: The standard Zicntr extension for base counters and timers, as From patchwork Tue Oct 1 16:06:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818411 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id EECE4CEACE5 for ; Tue, 1 Oct 2024 16:07:27 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 4DF752800A3; Tue, 1 Oct 2024 12:07:24 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 48FCF280068; Tue, 1 Oct 2024 12:07:24 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 2BD6E2800A3; Tue, 1 Oct 2024 12:07:24 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id 09A30280068 for ; Tue, 1 Oct 2024 12:07:24 -0400 (EDT) Received: from smtpin17.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay01.hostedemail.com (Postfix) with ESMTP id 8E07D1C4603 for ; Tue, 1 Oct 2024 16:07:23 +0000 (UTC) X-FDA: 82625513166.17.6DB8839 Received: from mail-pj1-f51.google.com (mail-pj1-f51.google.com [209.85.216.51]) by imf14.hostedemail.com (Postfix) with ESMTP id 9D7AA100029 for ; Tue, 1 Oct 2024 16:07:21 +0000 (UTC) Authentication-Results: imf14.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b="nmm/6xlK"; spf=pass (imf14.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.51 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798777; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=E+5BUiXk0qE5fwdGMgQslVF9cwH/K3wvmujTMdEKiHU=; b=FPRWze8W/A/JdahRqho6Qjc2iGQWy8DdZi2/IU8Xpw5ZDfyQhkGnVVSg+sB/QzURcpwH12 TTtMb4xSjHiZBg/7S5QACHt0r+ioHN5/CgVYqZW82WOWJ5buyZnhn3i3+exuDyz6hnAGUB WZIyR/A8/UxcWCbNK9tlrJM7yiB0nWY= ARC-Authentication-Results: i=1; imf14.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b="nmm/6xlK"; spf=pass (imf14.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.51 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798777; a=rsa-sha256; cv=none; b=tJGGkhwLSQz506NxNyGKYYGMPFzxf//W3aZTNPyK2bKPrC/D2UQjmknfEbpk0IUbclvxpc ZPofxjnkIYxtgFqsl4VLt1wpntaTg4+kQvv89eqdZukbtMryCPwdlu5+VzHmGKzhsBShHJ GD/xdVH72Z2bVcj3CUQenSS5YkmOkhw= Received: by mail-pj1-f51.google.com with SMTP id 98e67ed59e1d1-2e0946f9a8eso4041078a91.1 for ; Tue, 01 Oct 2024 09:07:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798840; x=1728403640; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=E+5BUiXk0qE5fwdGMgQslVF9cwH/K3wvmujTMdEKiHU=; b=nmm/6xlKFhCQ065mBh2F5ap6zRWKexqz3SzXBBbyJkAFaGZXLP9IsV2n8hGScp1Qii vCQB5Lxk4phVMg67NILUSLAjvQe2A7xeNurUyWVozvASLe+XvCFkJNnBabTMBMMW/3WP RBmrKOUSmbPrx3JA3QEe8AS3wMW/Jp7dn9UYhOWMtLbTPz1dbzipIoVb8Pt+QNpJFGu5 1AOoltgOoYves+ADOghhCzocLpl6ONlfLcHKQGZj9LjahS4ESn+AWzzt4m1RAjlzWKZI Pe9cBboYAHePTFKDzEUP3zj3CGCuK62NGLzSkBI9dTFSWwMFOd2RWZjmhk0Uj8jIR/r5 HV4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798840; x=1728403640; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E+5BUiXk0qE5fwdGMgQslVF9cwH/K3wvmujTMdEKiHU=; b=KGQqe0Vme4F3jQSclkxO/HaWeBLHuiHUO6CMRsxfLmbAI10w9uKD04s+kwWp8Ni4HM Chk+Fw9I8QFjfpUF1HuxG8bljiIKKygcSFhSWecUiregbZGyD+0pwCyi7ZWK+DwFUbR/ IZHolzh0WytQ69dTiX6kPBiXVdR7z9lUTDa4FC3A2bLdDZkgfh18SKaWI3HYQeFlOswf c4oBTMiuHuzOgEoocvgJZdfq0NgnVXO1hXQmeIdWut9K5Gz8zCYAymR5kgVcXTBWRrtN saJse3YulFj3g18dYcDVqHEUu6emx8mv7a1mqjzwaZechLiXvV7ofraw4RhYgSkIA6GF ssKg== X-Forwarded-Encrypted: i=1; AJvYcCU552TKabWmtU0Yz9FGJo6wrS5AiTxPkTHZuF6sJJR1VHZgki2PW7XbAlz1wMjNddRTDkTRu9XCPA==@kvack.org X-Gm-Message-State: AOJu0Yz0O/xkGdcsZmHLz+2rn6HWVsPFWhNRrEtYq+NUgwkUvwZu4CKJ kU52xvQu0gkvl4y/klyWuuR7MVJeV3ht2ebWGj8hlDIOsdp73eVQhvUbITODiJA= X-Google-Smtp-Source: AGHT+IErQf5YjbMNwa+at3UP7ZmCJwrLyizTuL84rtWHL68ki3hQqLuCxkKzW7aSkks+lwT0RS+2sw== X-Received: by 2002:a17:90b:4b0c:b0:2e0:808f:ef9e with SMTP id 98e67ed59e1d1-2e1848e3633mr179913a91.26.1727798840354; Tue, 01 Oct 2024 09:07:20 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:20 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:13 -0700 Subject: [PATCH 08/33] riscv: zicfiss / zicfilp enumeration MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-8-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam03 X-Rspam-User: X-Rspamd-Queue-Id: 9D7AA100029 X-Stat-Signature: 6hr76u591nj73h7kediqipi5eyy487gj X-HE-Tag: 1727798841-156536 X-HE-Meta: U2FsdGVkX1+Z2OEBFG013lJIIkcSL2u8E36jln4ut9r2lQbKjoDLZ9BbCfd/mqzujzNFFGJ3bNuyGhBJXQWh7vx86T+UOExvVT6+bTco8XklJVcZJbWW6ajL/tfMs4jZWnDFaLfWq5aMgiCyE7B3pq7bTNRNckXTPimw9sMwTZCuZib6oIrdi4UhzQcDWyoL1eHHcROPMkgPTfWD34pZQsxJzuB/AHY1pwL0jHi1fJlNnvshYazEKrMhYHFNrzcEr/cH+0CQUOkNxIjMsV/ocfm/5GqVhRckNAbhnrC3b4vXxILi6zWslBtM4j2O0qhEaEaNgQPpMCk7xgfKctHlbYEzVxhyceSUYVuU/+7P7adQIuhi12hf90WP85pYwnLv/PsstBKDt06NhN54RnlPzD2Hpq9CX3aslYWF7ABDN1dHBba0xoQq6VVePaEONzQrcyrYk4lgTdaNq/AD03NcxqqHxIuAWtVrjxRCQez6gdnYsO+qqsMrJTVCeHYgWpIX052KF3NLvVYq9c2tF6wUtEdAcrnnkLUq4TqnFvK3n6EaNz9Q41I1A0r0T6Yfy4wdzfBubnHNjd2/cmkknb80Y0M/Qx8iamZtmVmJ5QYNVot/BhrE9xbgQ+KMUbm0Ag8UUtjRFbA47Ld18ducj1jLjVVpXRDY0d1fb0eT9v2nKZsWmeZSOUVDhIlQNFdDw8vJDmnKA0Q59ErwJsL7Q2xmDSaj+Cc8uu4bVwQ6+MtMTfdyN5dac+8fOicEirEsOWjBXqLrJ6P0usp+BoVpke8zflbo61Z6FXnMcaGEFg02ycxCIYBE++qfNgcv9Gdt3cWjMSKUe47V1UpdCbmRTmHMer4oHC9lNk4RlKTg2rWqYndS3TG1O4eRUcjJsj0beGTh+w6J6GFGgKVMDldv+ZbO5/6s8jsifLX6NnEd7kqRnSZ4+TL38ntVJkkPRv4BOlihJuwsCoT64gaAFLSGduj LynlD5w4 cjy0NoWtrRtFXf7BDbuecrv3KM1bNvLIf4QFfTR453uev/qnlGLkfmJb0yAmeGt3M0o1PeziX8+txmCZV8Hyb0c9fq+gqg4KfC2XmtwUCfdK/Pq97pZZ2IRgbQ1F8Nb6DHgOS6sAsQGr7mqTcONjkY1FNKNCUj7AqmV/LqxbWlfkQe+qXZQ0oIfVFJP9V1dB0F7u1zBm9phqJoYq4RfxgT2PbSz7yRCencjK1fK8JI4ucnNz30+lH4e5c0r6WQTA5BAahjXEwDzjvefIpnnpKa+b2FlsbgbjId3L71Z2g59OCxipuJ/ILEvXOpYBjjPG4WS1t2Pk4aia1w9Vu0BISFxuAC/EmGVNJYj5nTIqOZOFFHhXnT92w1A5QAKrW2657L0a0hm2uvcxCPBtSZWgRKprQLxmTQmTSuutMs5P5sCaS+VEPhVdDla6kJd2fne8Xp3XxkaFF5I7u8GURMZ32hbeKztuaKKurC10kx4ISUvhiFIHrI3fd3IS5Mg== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: This patch adds support for detecting zicfiss and zicfilp. zicfiss and zicfilp stands for unprivleged integer spec extension for shadow stack and branch tracking on indirect branches, respectively. This patch looks for zicfiss and zicfilp in device tree and accordinlgy lights up bit in cpu feature bitmap. Furthermore this patch adds detection utility functions to return whether shadow stack or landing pads are supported by cpu. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/cpufeature.h | 13 +++++++++++++ arch/riscv/include/asm/hwcap.h | 2 ++ arch/riscv/include/asm/processor.h | 1 + arch/riscv/kernel/cpufeature.c | 2 ++ 4 files changed, 18 insertions(+) diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h index ce9a995730c1..344b8e8cd3e8 100644 --- a/arch/riscv/include/asm/cpufeature.h +++ b/arch/riscv/include/asm/cpufeature.h @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -180,4 +181,16 @@ static __always_inline bool riscv_cpu_has_extension_unlikely(int cpu, const unsi return __riscv_isa_extension_available(hart_isa[cpu].isa, ext); } +static inline bool cpu_supports_shadow_stack(void) +{ + return (IS_ENABLED(CONFIG_RISCV_USER_CFI) && + riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICFISS)); +} + +static inline bool cpu_supports_indirect_br_lp_instr(void) +{ + return (IS_ENABLED(CONFIG_RISCV_USER_CFI) && + riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICFILP)); +} + #endif diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 46d9de54179e..10d315a6ef0e 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -93,6 +93,8 @@ #define RISCV_ISA_EXT_ZCMOP 84 #define RISCV_ISA_EXT_ZAWRS 85 #define RISCV_ISA_EXT_SVVPTC 86 +#define RISCV_ISA_EXT_ZICFILP 87 +#define RISCV_ISA_EXT_ZICFISS 88 #define RISCV_ISA_EXT_XLINUXENVCFG 127 diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index efa1b3519b23..9ea0021a1a75 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -13,6 +13,7 @@ #include #include +#include #define arch_get_mmap_end(addr, len, flags) \ ({ \ diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 7117366d80db..96a1375d7171 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -317,6 +317,8 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { riscv_ext_zicbom_validate), __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xlinuxenvcfg_exts, riscv_ext_zicboz_validate), + __RISCV_ISA_EXT_SUPERSET(zicfilp, RISCV_ISA_EXT_ZICFILP, riscv_xlinuxenvcfg_exts), + __RISCV_ISA_EXT_SUPERSET(zicfiss, RISCV_ISA_EXT_ZICFISS, riscv_xlinuxenvcfg_exts), __RISCV_ISA_EXT_DATA(zicntr, RISCV_ISA_EXT_ZICNTR), __RISCV_ISA_EXT_DATA(zicond, RISCV_ISA_EXT_ZICOND), __RISCV_ISA_EXT_DATA(zicsr, RISCV_ISA_EXT_ZICSR), From patchwork Tue Oct 1 16:06:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818412 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8AE2CEACE4 for ; Tue, 1 Oct 2024 16:07:30 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 1D0E42800A4; Tue, 1 Oct 2024 12:07:27 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 135CA280068; Tue, 1 Oct 2024 12:07:27 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id E78742800A4; Tue, 1 Oct 2024 12:07:26 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id CAED9280068 for ; Tue, 1 Oct 2024 12:07:26 -0400 (EDT) Received: from smtpin19.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay09.hostedemail.com (Postfix) with ESMTP id 8D14181695 for ; Tue, 1 Oct 2024 16:07:26 +0000 (UTC) X-FDA: 82625513292.19.5142896 Received: from mail-pg1-f174.google.com (mail-pg1-f174.google.com [209.85.215.174]) by imf21.hostedemail.com (Postfix) with ESMTP id 925161C0017 for ; Tue, 1 Oct 2024 16:07:24 +0000 (UTC) Authentication-Results: imf21.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=T6sICvCj; spf=pass (imf21.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.174 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798780; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=YzRPf3gSm1oBJZUnyk2tQznTd/0pm5tuC+PNjTYOgOw=; b=sdJEY/ZRvOSX0t7gSDnBhIOnh09dOs6WEdVfokPTtwqcz45Er6HkCNON3D8Vz8PvsAKR7d +8akihNs/IMAAPEpmycFPliE30iUuwsEfgx+sOMy+t7ioHyp3ZPGFsHlDMQq08KHB9PMYh Kn9fbFQs8N84y591VlppApR8qURF2ck= ARC-Authentication-Results: i=1; imf21.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=T6sICvCj; spf=pass (imf21.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.174 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798780; a=rsa-sha256; cv=none; b=3NBpMQTO07m1hTvj53vvUD8vr5g+2bgQq3V8/tnFb1k7CpbwtfxTMHknBFB+HIkxZg/Fx3 uGbeg+uJuq40TOA2j2nHpbp5p0E1XkiMpEc0eLXPKA48kpQxJgmz7NX9gskecGjABSjFoO gK5CMe9OcXtYt0mCx4qQcekkaAuwu4c= Received: by mail-pg1-f174.google.com with SMTP id 41be03b00d2f7-7db54269325so4370140a12.2 for ; Tue, 01 Oct 2024 09:07:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798843; x=1728403643; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=YzRPf3gSm1oBJZUnyk2tQznTd/0pm5tuC+PNjTYOgOw=; b=T6sICvCj1ByoQN2ncU8rLXbBz2vUOIvRk4Z8B7MEfDUtUNpKxVWhVCZx7BcVPt3V5t BXtA2fYsV9sAQDg95Fn3jhelwLM4iFZxTZ4vKbmQ1owIvgraJ3/jeIqOkzOJsTIXqoHM E1KmLLvyUlgKVoM74hNGtKAKfuYd9FZP+ZNoe7TNikIrorrybtGvNkhrSnmM95F2bjZN jb6USUVRQH3dnwWjR46eCOPmDyqWUvSTWHLuOY6Ihf/HddPyBOKrSzWIKBQRM81FAs9c 4LZ/0x08iMduynFGh8EX9heUdKUPCfpXsDL8hOqPpE8pcxqcS7iMWYf+UfQ4sueudEyl o6Yg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798843; x=1728403643; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YzRPf3gSm1oBJZUnyk2tQznTd/0pm5tuC+PNjTYOgOw=; b=UxPPLO3sltCOWvE5baboFjUn6uMeYE8PVrOxQTZ586OHPeuqqhSif/Vdb7MQaF+Lrm iSJHs+xt5/Fv5S47Y45U/AQQNNL2IqSF1KeOR295g9NOPj9W17mHWk4M79SHyanOPdFA ZbzaGKIpIkudsoPShOM2pjjZkHOUlbA1An9ZyT/viLxVRGUZLkgAMpj1AUPlWFxodVEF d/wbbSw1KQR4ycLjNzhhrSEEOulJBY3Fhdg4jDQvWlLddrEGqVRj7D/w6hGO9mvDKMOP bP0BZz75s65mFhCZEgj0aDYyU8andOCpMmQMbLqci1w1YzJBhFnD6N11YT7S6FpQcUik 2xMw== X-Forwarded-Encrypted: i=1; AJvYcCW7Vq1woQcV8PuPgQvKlrtJTqlGXrvRh39BzM4EWDJCjFlbXutw5QldXnrAmAb/8F6nFYWTYEna5A==@kvack.org X-Gm-Message-State: AOJu0Yz3RLyic6NAM4lxXzZaJ8KPpfcT5nAq65XnNJLvkNJKNzqHsjXm YhaoC7LfkUJyZ3kk39Oek+ArjpdRp2eJCkFlVDrZ/45fVewHtFmFZYuGApSAUKg= X-Google-Smtp-Source: AGHT+IFUtHGSqw39cY/b30rSSzM+TWp/wCUKZ0BHqFADXvXCzXnqk0YyVIrTqxVHl/zzcyJlxVk2Ag== X-Received: by 2002:a17:90a:7103:b0:2dd:6a40:dd86 with SMTP id 98e67ed59e1d1-2e18468601cmr227883a91.16.1727798843238; Tue, 01 Oct 2024 09:07:23 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:22 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:14 -0700 Subject: [PATCH 09/33] riscv: zicfiss / zicfilp extension csr and bit definitions MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-9-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam03 X-Rspam-User: X-Rspamd-Queue-Id: 925161C0017 X-Stat-Signature: bfh3jrm9rr69g9n6zoi78y8axwbecr85 X-HE-Tag: 1727798844-809006 X-HE-Meta: U2FsdGVkX1/vgWgV1SkV5DGoJW459ZS/G5mGKCzQmq/gBsoVzSWSXFXB65wDrPT3hy+KGx71MOrEcJmtbXjQnROZlaM3SKslzJUvoP67lrDKxgpqkDWsST+EpDV13lWtuRCXHHFMX1+PKIWPA8QJUs7lc2bKrkxQcrXaGkInvjmW7WX/PN4+LF6/XfBW6UOEgWCkzC6b9FJvlSuBPcBPt2MSlaq1gLAfvH8aXKI/BGxnev/YJEb5EEbChRgNK3eNqMILx8mnu39H+ASIwwTKlRNODHIP9uWJWVH5TKXCB/j6Lb2plzvM2Ob9Ir/KtUYSlH9/bjs8sQXlQgtqZ93OJgTgETw7VQmMGIxkQ/vOHz5kikiVCaxQzalm2nMrNujC2F1OkVv4yTBF6Sx/0jrBmPA+kkUMmpRcKaSjvZHzo+pLFUZWUhJ4cxXVuI5ufLDDRr6bIR8le/SNjbYphGecVeIZLOm4y+WHYbd4crplkS81SD91hh8goMMvg26/pMLqQVKvUvdnMsGTYESd1RTTBcXRX4mBUrCpDrgwU39U0BCbhUriGYwenRjtY0SWdUmFJndd/cRoc6fFnz+2hDU090xy4jsPaVmkxfaHMMvgj+xI3cnJwt0pqCMF8ugYCETxroaBFrdnxruUA+MRc85vTZPx/Ndm8esPtPqd+563qJAJJMq56kgCojea4lo4V7OUQ9TIjMdAeY6ZD/YUBo0G8E+Z5CDBD899e4hvBPV3dSp0EPuGCBdlZWitsqti8d4Y8ns2N68/uBdN/mBeTr0ORdIBfBAKb9RrC0OHVDKQ/nFALXE5yBDIATZXbgDcSJ9NGJdzimhieG28m2PVTcMsPbjSijOxPiIpGSu6HBxjtbNdqhk7pMS6TcDVBo9M13GgzFUFsx/dLFQxevZH0FUq3rc5UCYLP4zuo7ftJx0paRoh5ftZXJB52DOp0U9SIVNKtsscQCpiFSvdEECq5hT 4iC3D+ED Ii6I2Cog4HZdeppeYq9FLHOB0D3PfCS+/v5DqZPQShdFxEWu31lAVv1PXSiAX2MQvXhtLR9vBbRdFxzhW4+ROn23nnqpaKix4/qzK2w1e+TcKwl/zvZbLbyRLcTZ0XfReg31sXJrKvkKtTBa6V5FhrXWUG3MepjR4/q0gsC6scvp6NkJqTg3ASj1UV3ZRLGO2yPmtTmrQLVrgs819EUFZcDVzy8xBTQsHH0628uYYt9WQ31AJclzpXQjIcQfsg1ndRzGNtABbLwlRit27wgvq5QgvTdBtKl6lPNj5Wd0SqMmpa8vl6VvuzuIRJo/ZDsGWIya/Nnho4BU5ObKkWu+mP3V814olguIViwatOzgZ200WHAnAWy5Lqi9hSR3xL58Ne+Jkq/7yq79wGtmdUBcqUT+zI+TmQaT3PcdoYiy+Tyjd16Tu7+AWBoXVfsnEHWKmshDZBzsmHmvkFSWYEqwTSOCFtA== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: zicfiss and zicfilp extension gets enabled via b3 and b2 in *envcfg CSR. menvcfg controls enabling for S/HS mode. henvcfg control enabling for VS while senvcfg controls enabling for U/VU mode. zicfilp extension extends *status CSR to hold `expected landing pad` bit. A trap or interrupt can occur between an indirect jmp/call and target instr. `expected landing pad` bit from CPU is recorded into xstatus CSR so that when supervisor performs xret, `expected landing pad` state of CPU can be restored. zicfiss adds one new CSR - CSR_SSP: CSR_SSP contains current shadow stack pointer. Signed-off-by: Deepak Gupta Reviewed-by: Charlie Jenkins --- arch/riscv/include/asm/csr.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 25966995da04..af7ed9bedaee 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -18,6 +18,15 @@ #define SR_MPP _AC(0x00001800, UL) /* Previously Machine */ #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */ +/* zicfilp landing pad status bit */ +#define SR_SPELP _AC(0x00800000, UL) +#define SR_MPELP _AC(0x020000000000, UL) +#ifdef CONFIG_RISCV_M_MODE +#define SR_ELP SR_MPELP +#else +#define SR_ELP SR_SPELP +#endif + #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */ #define SR_FS_OFF _AC(0x00000000, UL) #define SR_FS_INITIAL _AC(0x00002000, UL) @@ -197,6 +206,8 @@ #define ENVCFG_PBMTE (_AC(1, ULL) << 62) #define ENVCFG_CBZE (_AC(1, UL) << 7) #define ENVCFG_CBCFE (_AC(1, UL) << 6) +#define ENVCFG_LPE (_AC(1, UL) << 2) +#define ENVCFG_SSE (_AC(1, UL) << 3) #define ENVCFG_CBIE_SHIFT 4 #define ENVCFG_CBIE (_AC(0x3, UL) << ENVCFG_CBIE_SHIFT) #define ENVCFG_CBIE_ILL _AC(0x0, UL) @@ -215,6 +226,11 @@ #define SMSTATEEN0_HSENVCFG (_ULL(1) << SMSTATEEN0_HSENVCFG_SHIFT) #define SMSTATEEN0_SSTATEEN0_SHIFT 63 #define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT) +/* + * zicfiss user mode csr + * CSR_SSP holds current shadow stack pointer. + */ +#define CSR_SSP 0x011 /* symbolic CSR names: */ #define CSR_CYCLE 0xc00 From patchwork Tue Oct 1 16:06:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8B94CEACE2 for ; Tue, 1 Oct 2024 16:07:33 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id BE2D02800A5; Tue, 1 Oct 2024 12:07:29 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id B9217280068; Tue, 1 Oct 2024 12:07:29 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id A0D9E2800A5; Tue, 1 Oct 2024 12:07:29 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0011.hostedemail.com [216.40.44.11]) by kanga.kvack.org (Postfix) with ESMTP id 7B9F9280068 for ; Tue, 1 Oct 2024 12:07:29 -0400 (EDT) Received: from smtpin14.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay05.hostedemail.com (Postfix) with ESMTP id 359D7415DB for ; Tue, 1 Oct 2024 16:07:29 +0000 (UTC) X-FDA: 82625513418.14.565F957 Received: from mail-pj1-f44.google.com (mail-pj1-f44.google.com [209.85.216.44]) by imf11.hostedemail.com (Postfix) with ESMTP id 466AA4000C for ; Tue, 1 Oct 2024 16:07:27 +0000 (UTC) Authentication-Results: imf11.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=wDPB13aH; dmarc=none; spf=pass (imf11.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.44 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798808; a=rsa-sha256; cv=none; b=yZXu8XC9EJzvEbU+1MZ2dUZms9surqGE+G5FtGikYgc6E6lM7BzHb6K8339K9unFqsku8C 17iI7Vf0MzLj4RYKhvbaWWMGr34jJk8vNR6Ey2qm5JxfrSo7SI6Cz5zubZqA5yKN9llg6J WEiozlmFrlgMLURD5wPRLPnm9VSPfsQ= ARC-Authentication-Results: i=1; imf11.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=wDPB13aH; dmarc=none; spf=pass (imf11.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.44 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798808; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=vp6gF9RB7PujTLsWgMJUvhBPp2Lp7GCbQKh7IscdynM=; b=BuYFANqhFTHazC24MzIjHxLOZ02x01hx+jMW9gU0k83nqDJmB7xHaRkYwSYzgx7h0DnkmO RFdAqo0R5HDWjbBEMtA0BQJ4gXXLKgVLKrw6bTCrTvT7WPaCdmrrPLpoWC0x+Ug2oqZ4nd SNclSQn2Dh1k1k9kc5ixrXrJPhYb6J4= Received: by mail-pj1-f44.google.com with SMTP id 98e67ed59e1d1-2e0a060f6e8so3908795a91.1 for ; Tue, 01 Oct 2024 09:07:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798846; x=1728403646; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=vp6gF9RB7PujTLsWgMJUvhBPp2Lp7GCbQKh7IscdynM=; b=wDPB13aH2axwlz37YMZs+N49KD2juBJW6njabSYm5evjvvEicpFZJ0gujbhwCweUeP 8iY/hegbIPPFX7drI2y0H1JO9siq68wERBzUQaH9VDnvI/OwYrSCcbI1bCcx3vneCg8v 36zI46NFVyqGJCmzgp3GAp470F88y3RP5IICx4FrTkDy5vMIfHbzEiw83JLAvCUdZgQ7 dJtAqiXKgxwADOM++s8TGehmxY3TDcZiaQKGEpOF14sNABrwZscBKTJ+QAPklijYLV/1 LepemQlKy7hOSOBS51JOTxDZQugd/pFH2uBjJseX8sJYckehOqH6gdgsblg2ODlG4DFE GsOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798846; x=1728403646; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vp6gF9RB7PujTLsWgMJUvhBPp2Lp7GCbQKh7IscdynM=; b=S67NwYy4ldswxlnSc2yxBCUykr0aROS9dnU1/1S5eq5pVz5b9UmyyVB7FWFSe6rOxn XOIcXu6J3pPtloniDqzfCFpPAjZKJjBFs7doJcPIXLDkaKBVCuZ3RxLa0feiiQUshJEn ghXAdpvdW4l+MHtMHmxdY/Rw+9478NCtRamRn+4QmFVSf9qjuO/wISgbNv3BbeqOS8p/ Eb5mW+3fRjCrFhLww/0mkuMCXB2BRtO3vrIqwXE+/1ZfpoJuBqlXjEaRNWes/lBvazep 2XW2DfgEL81TaxXIAzM9mSZf3XlToGjZmGS5sdeMGJf5qrEW4DrVGycyeCc9yf/CwaT6 q+9Q== X-Forwarded-Encrypted: i=1; AJvYcCXYukfo6TkPYuC0tRSkQTsAaCFiiQyBGvUl3CO6mFaxLpw+Bht2uHeLyRbL42atyp9JniPgCuIEcg==@kvack.org X-Gm-Message-State: AOJu0YwaDnXuwmCyFt3PE3pLaSWv48bHc/3e6buGBspHabrw3emwuaRg lP/qxTy4M+2mIS1frsNd+evGQv24w5vIHFstkjLjRxrlgb8ojSSmlfURqM6Tn1A= X-Google-Smtp-Source: AGHT+IEmg893m7cJrhVZzbTskW+hEDS5KhBOOmodDZAU10FTUO0uF+C1k8JeSAdGJ2XwaC8MJ5TMpw== X-Received: by 2002:a17:90b:378e:b0:2d3:da6d:8330 with SMTP id 98e67ed59e1d1-2e184529ed1mr235894a91.4.1727798845993; Tue, 01 Oct 2024 09:07:25 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:25 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:15 -0700 Subject: [PATCH 10/33] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-10-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspam-User: X-Rspamd-Queue-Id: 466AA4000C X-Rspamd-Server: rspam01 X-Stat-Signature: nhbbn859hqmt3oanfkomx4e987wyo55e X-HE-Tag: 1727798847-3572 X-HE-Meta: U2FsdGVkX18mppLxprb2RtMKb69lYwFKSeq30f9qUIpUJ0b1a55Eu+dRDBLN3N0rLhpYUcFewG/nz1xAaxqBdRuYC8yQliv/yHQHVsFt3Lgp1cDSiipDxztiJt/lPfN8syR80Xo3IvN2isYuwRQac3BJzRtOglWDfBuyOeoDoC4v9D4MpjPgBQy8L7nX+/l0z44i/2JoU8aLr5rf+5yXyuxg3E16P/zSDnbrtfJy5mQ0WkT9oVhj4tVpC1ZApGu6zzxTwHkwJQLUd5TcS1Ttdf8oItVfNeuGqaInII9f5U3jXAAX6vc4oh08AjN/CoYLWp75Rc8wEllgj0mdwoqSJLBrirxVfp3nmeUm6txTtyEn6rwjuPUNYuZiiXCl4k6md7+4gS1F3Tv/5uQ9Dy4k/Py7YLlKGoo8feZx0P+CXcto1S/wOt7VQdSgyOrANXWJ8nAfRpZp/BW/p/JiYAbTy4mfTfKN1h2GoPdlvkJNZJsmFG/k9OOFqBx4lLHadEODlbBfq/kEAxoyQo7ghjEMTCWhe2qT95QJ2lqmlRLjKf8y65WhHNtasdMseJdQ799fcUMzfCwrZk5fzZbzanAyDX11FLs2GCeUkoqliUq+EPs+dsYNGmgy8v1gscobgxm7x9UjsWVuf18sgS1XuySzmmbE5hm7kW6oSoYCdzCT44p7iIewQTRwWy/aDrZjQGwPan52PTu8xSns3VvMSE/oBRRFsEKEgBKQlSrizmyq1noAPcJ+I0R2u0LVVy+ZIPQAE4zIxI/kPJHj1sQ+tpogWe/ueWtnOBZ+TFjlJpr/T/01dqN/1W6l60x+MwnlvDxTgIAvGAxXEBg6QL9u7qnQNvQeggEMvMTvQbRvFTGA4469DBU6jVXrmE96K7UeXva27l3zfuo9+bOJbN9QSs3XnvZtStJsLgMR7lEi0ahxKjzMcxFkW36XJILF7gsTzYulrytK9SfkkVtiDMMnGEj nz92yw1T tTuPpqvyx7GhUQbxw7G3pCiiT01wm6bonuCCm+Xtz+69rD99B0dmwjbsJtx8i4I+zFyTjjEo3+Fsy/p+ZBjNqXhhZ/1Sb34w8em+/hWw4znd+OfFz3iKtQD9+VMCJOYb5m8nE8pfDDz1d84k2tE/2x472upx+xQhMUsVuJhz7cLhoUe+HJ6Mexj98+4tGy36sUkTkisg+WVDhrzgtHOwfl1h1Ci+Dl22cbvXCXer0kWpaXyjHry0oRp0racBgkH4LPzLdivsSJaomEbfVL62FpuV8cpUDZGNix+zrSBX78CRVK0l9mS4GusG6iwZuJYtQ1F3+rDXLjX7tLoYdteZOjWNQ7AD4jAxQVJlPJsMm+FfZaC/P5GA7v+THSUb40s7EKZZp1jrNi6D29Q4r53dbXirdtOFfub6tRtWfKsLySsZnMAKtE2W/OWOr6R19DgbSK2KgNl1n4H6pVTJQwFdNZMC5kbppWrw25vr1AcK32WSW2QVdKXOQ7rsIUNd8futdy/wKfRB3VCFvFKfnk1ZbdnNyqrWDP5CmUgEDBYj9aPLytOg= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Carves out space in arch specific thread struct for cfi status and shadow stack in usermode on riscv. This patch does following - defines a new structure cfi_status with status bit for cfi feature - defines shadow stack pointer, base and size in cfi_status structure - defines offsets to new member fields in thread in asm-offsets.c - Saves and restore shadow stack pointer on trap entry (U --> S) and exit (S --> U) Shadow stack save/restore is gated on feature availiblity and implemented using alternative. CSR can be context switched in `switch_to` as well but soon as kernel shadow stack support gets rolled in, shadow stack pointer will need to be switched at trap entry/exit point (much like `sp`). It can be argued that kernel using shadow stack deployment scenario may not be as prevalant as user mode using this feature. But even if there is some minimal deployment of kernel shadow stack, that means that it needs to be supported. And thus save/restore of shadow stack pointer in entry.S instead of in `switch_to.h`. Signed-off-by: Deepak Gupta Reviewed-by: Charlie Jenkins --- arch/riscv/include/asm/processor.h | 1 + arch/riscv/include/asm/thread_info.h | 3 +++ arch/riscv/include/asm/usercfi.h | 24 ++++++++++++++++++++++++ arch/riscv/kernel/asm-offsets.c | 4 ++++ arch/riscv/kernel/entry.S | 26 ++++++++++++++++++++++++++ 5 files changed, 58 insertions(+) diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index 9ea0021a1a75..0e05c9682b3c 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -14,6 +14,7 @@ #include #include +#include #define arch_get_mmap_end(addr, len, flags) \ ({ \ diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index e494871071da..ed9e6cbacaa5 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -58,6 +58,9 @@ struct thread_info { int cpu; unsigned long syscall_work; /* SYSCALL_WORK_ flags */ unsigned long envcfg; +#ifdef CONFIG_RISCV_USER_CFI + struct cfi_status user_cfi_state; +#endif #ifdef CONFIG_SHADOW_CALL_STACK void *scs_base; void *scs_sp; diff --git a/arch/riscv/include/asm/usercfi.h b/arch/riscv/include/asm/usercfi.h new file mode 100644 index 000000000000..4fa201b4fc4e --- /dev/null +++ b/arch/riscv/include/asm/usercfi.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 + * Copyright (C) 2024 Rivos, Inc. + * Deepak Gupta + */ +#ifndef _ASM_RISCV_USERCFI_H +#define _ASM_RISCV_USERCFI_H + +#ifndef __ASSEMBLY__ +#include + +#ifdef CONFIG_RISCV_USER_CFI +struct cfi_status { + unsigned long ubcfi_en : 1; /* Enable for backward cfi. */ + unsigned long rsvd : ((sizeof(unsigned long)*8) - 1); + unsigned long user_shdw_stk; /* Current user shadow stack pointer */ + unsigned long shdw_stk_base; /* Base address of shadow stack */ + unsigned long shdw_stk_size; /* size of shadow stack */ +}; + +#endif /* CONFIG_RISCV_USER_CFI */ + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_RISCV_USERCFI_H */ diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c index e94180ba432f..766bd33f10cb 100644 --- a/arch/riscv/kernel/asm-offsets.c +++ b/arch/riscv/kernel/asm-offsets.c @@ -52,6 +52,10 @@ void asm_offsets(void) #endif OFFSET(TASK_TI_CPU_NUM, task_struct, thread_info.cpu); +#ifdef CONFIG_RISCV_USER_CFI + OFFSET(TASK_TI_CFI_STATUS, task_struct, thread_info.user_cfi_state); + OFFSET(TASK_TI_USER_SSP, task_struct, thread_info.user_cfi_state.user_shdw_stk); +#endif OFFSET(TASK_THREAD_F0, task_struct, thread.fstate.f[0]); OFFSET(TASK_THREAD_F1, task_struct, thread.fstate.f[1]); OFFSET(TASK_THREAD_F2, task_struct, thread.fstate.f[2]); diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index c200d329d4bd..8f7f477517e3 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -147,6 +147,20 @@ SYM_CODE_START(handle_exception) REG_L s0, TASK_TI_USER_SP(tp) csrrc s1, CSR_STATUS, t0 + /* + * If previous mode was U, capture shadow stack pointer and save it away + * Zero CSR_SSP at the same time for sanitization. + */ + ALTERNATIVE("nop; nop; nop; nop", + __stringify( \ + andi s2, s1, SR_SPP; \ + bnez s2, skip_ssp_save; \ + csrrw s2, CSR_SSP, x0; \ + REG_S s2, TASK_TI_USER_SSP(tp); \ + skip_ssp_save:), + 0, + RISCV_ISA_EXT_ZICFISS, + CONFIG_RISCV_USER_CFI) csrr s2, CSR_EPC csrr s3, CSR_TVAL csrr s4, CSR_CAUSE @@ -236,6 +250,18 @@ SYM_CODE_START_NOALIGN(ret_from_exception) * structures again. */ csrw CSR_SCRATCH, tp + + /* + * Going back to U mode, restore shadow stack pointer + */ + ALTERNATIVE("nop; nop", + __stringify( \ + REG_L s3, TASK_TI_USER_SSP(tp); \ + csrw CSR_SSP, s3), + 0, + RISCV_ISA_EXT_ZICFISS, + CONFIG_RISCV_USER_CFI) + 1: #ifdef CONFIG_RISCV_ISA_V_PREEMPTIVE move a0, sp From patchwork Tue Oct 1 16:06:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818414 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id D424FCEACE4 for ; Tue, 1 Oct 2024 16:07:36 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 753572800A6; Tue, 1 Oct 2024 12:07:34 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 6B115280068; Tue, 1 Oct 2024 12:07:34 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 555862800A6; Tue, 1 Oct 2024 12:07:34 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0010.hostedemail.com [216.40.44.10]) by kanga.kvack.org (Postfix) with ESMTP id 1FA4E280068 for ; Tue, 1 Oct 2024 12:07:34 -0400 (EDT) Received: from smtpin30.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id 969D516169E for ; Tue, 1 Oct 2024 16:07:33 +0000 (UTC) X-FDA: 82625513586.30.7A50B5B Received: from mail-pj1-f51.google.com (mail-pj1-f51.google.com [209.85.216.51]) by imf05.hostedemail.com (Postfix) with ESMTP id 9C6C5100008 for ; Tue, 1 Oct 2024 16:07:31 +0000 (UTC) Authentication-Results: imf05.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=fwtGqYEO; spf=pass (imf05.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.51 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798725; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=Jf2x3pfGFzhqVTB4n6XHdAtkUN+75WMOXWy8ywZVarA=; b=caTG2x1q5ovRC8rVBZGdJGvZXvk6DkZXEsOA+mONLKmYrZBgt+ZbQ0q/9vEjxmlf25Fyr3 mUl3iWFKP1uUkINY5yDX8PNFF9GsfQBfCov50JdoKANBbyVtkInc60wecchjc6uhSA72v5 0fIZrFnr68VaIcXlEPsCEFi5MbZWBWM= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798725; a=rsa-sha256; cv=none; b=PuqU2lddLTRD97rgaFRHVA9IjT7EzSGO2PfCdlx5wPxBxP5R3mj/VVcr62DgNp/jgenGFM 8tzQIGj5zfZMMAOS1ugPEsWmFiAfnJk2J4xTeAPFdoNvaVsoJkgOwFgSYASGOM4b9v9oN8 X7u8ZZOgJE95fWajE8pF6vvA6N+5yeI= ARC-Authentication-Results: i=1; imf05.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=fwtGqYEO; spf=pass (imf05.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.51 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none Received: by mail-pj1-f51.google.com with SMTP id 98e67ed59e1d1-2e0b93157caso3395038a91.0 for ; Tue, 01 Oct 2024 09:07:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798850; x=1728403650; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Jf2x3pfGFzhqVTB4n6XHdAtkUN+75WMOXWy8ywZVarA=; b=fwtGqYEOX3dTkmmr42/eZKOewbQPhNn239b0dKqbY63SWEC5Bl4FPsLOa13N4J5ElT 5sU9qy6uSwXyl52T79vlXO8kgP+Iqpn1Ox0iHsstFOpRodmWGIkh8IN7VKsfiqROj3qr UlOgFYEarresXFfiqrA173w3Xjrkg8xM10zshr9iAvTbHfzNfjXrfz1iHHBQCJGhY4Ei q7HHhFVxSlragKFqQKCg39rtqX5CLAGAVLaUm6JMLENURNswz6Mkw6+/QqHw7lXAk2TX hnDBj3dZTtUB6kHuarF8d1JNGY/rOMKX5tkaZ4r12BgFzYoVRZAq9TXVH87J+uyAEh6G 1SZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798850; x=1728403650; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Jf2x3pfGFzhqVTB4n6XHdAtkUN+75WMOXWy8ywZVarA=; b=CN+J5CeDPbddoWg0MqSkf/10PKDrC23d+M7+3c91DK4alWqLjr1kZvJxi81e9VbFTu fplyGv4fPlfeHTAkUZ1UUEO7wwLm8y+6hZqFX8YTxu9Scur+l6G9MpRGZKLy4a/b+Uw1 tcSbCKozQK3KUyAZqOcJFP+E3NwGZq1OkoKtctW+lakmg5iqePg02XxJsBHR9Fq/aWJZ eiU3YiENUHOqUnjOs5caOKT9ljauc3KRJalH7bcktCEDGnbuhpPIOrwHUExeTikX3Bbm DfN2t49W/tkT1Ilr6nngp+L0HHsI+/nqkv+gsX0JdQn8OOf1hWHULqc4xXNnrFTY7UAh kvdQ== X-Forwarded-Encrypted: i=1; AJvYcCUP6rgxEx/wSx6TT9U+3EeC3TX53tXwp4nfjxfm3cMvOGQ2Aho860VrIieEtV+wHOQ8XrqUe+2OVw==@kvack.org X-Gm-Message-State: AOJu0YxiAeFu2rpZZsJo6H1QE1R1Db/nQyQbaN5AJmnLoeilxogQ6ULn oNwEW8cHTFgO89/5kixuUEEFcZtTfGenTOwEWqgsaXVEGBf7dfJ5aEDuHehJ+xo= X-Google-Smtp-Source: AGHT+IGob07HibDqMTkhNXqspOJCbfYZqD3T/Q2DpzNezAZ4leoJ5tWyryGCIql/xTbKFf++6QnddA== X-Received: by 2002:a17:90b:11cf:b0:2da:88b3:cff8 with SMTP id 98e67ed59e1d1-2e1851c6ec4mr154101a91.6.1727798850248; Tue, 01 Oct 2024 09:07:30 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:28 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:16 -0700 Subject: [PATCH 11/33] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-11-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Queue-Id: 9C6C5100008 X-Stat-Signature: jjku1f63akgcbkuxqy4yqutomotzdxaf X-Rspamd-Server: rspam09 X-Rspam-User: X-HE-Tag: 1727798851-790889 X-HE-Meta: U2FsdGVkX1+h0Gz2rQ4qoXHI9VVxmh05OIqtGvmySSfB7d2R5NVoto3W8tHVZaWKx1Auf1Rk56lioxtv88hVAVNlPG/ErTNhwDkfK4zXQXWBCn90Xl83S11sH7YalBMQ8mbCx9rboiqJ10Gp2iqV2K4Hl0FrDdTJgi72uRoQf3L/oxPH30GwGJrrgx5FAHAmsM5rMzKaKwUcA2yx5535YdFDxH3UCHXjg4ZiSy+dJhS/zRc6DyxxfztFEJftG3dRSIq1MnOfBrvW6CxcaoNyN+/cuCfWi4RNlOX143v6jmP32+50i05oMYe6ReS7SNxfdg+pCkB/XJ0jpDfMwbGuGbuSfUqMst0mLXy7isOzk/Vdi17Jk9Enb/Yzr/xLcxlxiP9DSV1XBE38vHIadRVerfferN9nY1K7LIZss0uWE64b0hc3Gunh4vsB3gXjsL0w2wHkrz+xR3wOFvAiz7gmga8Qm7eMu8mbVcoB7dKSXQuOmnIAIRktkrYtBhvhs48RQfMKiuRbGRqg+0Lx4qXdZj65toc6JXHsFZvl/ev8yEmTym/gbM57iNhptaVqDeT0CuR1yIiWTSsLf9dO+bnuKKIEXoUx56S/K9M9Cdeou+pOe5m6SQ/MDCBLyYFBE4M9jUhCv/f5NSggeo9eT53cmgzYj1kuIvF9xNTOEtZZUfo42Ze8WPfNDG/jgqS6osEyXV07F2jRRhQgAZKnvBZMVBwS5Ia+yGkbg6LpZC2NtCBQf8bR9++iMqLiCxbhbRNs2CviYxiX3wqNj3mJJrSMmf89PxXNWmW9Nq76xbc3GREeO91FxkaWOxwyxqHXvy+i8yiTZSyGTS3h53f/Bo38jWcEGwfEJIvNyv27yBnIGBzP4FiuTXej1Iskt/IG+YmUnHxULjTkl7pOMjrnqBFwRhl++A4x/OWkzcn0+m4EFFwR5Kox0OB+x4urfXbXwi1+OLDtHzATLSuuo2F59TY y/1OCNnn 2wml6m7wEO50r+rc9qibCOKBYTCrNYPENZKQ+dOetGyfRdjEv/sGugB84mCMbfFZrxO+944xy3BvWR+l5yz1eieUKhBNmwUfzamD3QPzq6hhlHecaoTIDkbRcdX3nYaecyT9z62+iFI3fxBoYz7rrntGuInv5wSMacwjyNt9pErWKxczKAoM5qT0Bdd7Cd76nIH1RO1OdLRtF/ngO2IyZjAWVZBNZa0DEh9NXukkYn2N4HFfi1X8RvwRYGbWyGGj2LDegneGrWiQ6dX2w0sd/6maYda/Lb2jJOx12G3U13D58JRv7ArVHeRq1e5EfArFO63oFy3qZAuIf9FwAlyscRzqWbOkBnyzS1dFsVAlBaEZRDl81ABtZmGCvPlrweL9AT3gLPAyKB8bCoRIKiQoCPXfj4i9f+nikj2wDEXY4zbpfRPwRXU3GWYo1hv6PQv2s4JEg9/zOP+2wMAiFC3DEeQhJPXLZB4s6FJtrQ0IcLT62lY8NQ3R3RzAuMIM4UEtqR+eX X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: `arch_calc_vm_prot_bits` is implemented on risc-v to return VM_READ | VM_WRITE if PROT_WRITE is specified. Similarly `riscv_sys_mmap` is updated to convert all incoming PROT_WRITE to (PROT_WRITE | PROT_READ). This is to make sure that any existing apps using PROT_WRITE still work. Earlier `protection_map[VM_WRITE]` used to pick read-write PTE encodings. Now `protection_map[VM_WRITE]` will always pick PAGE_SHADOWSTACK PTE encodings for shadow stack. Above changes ensure that existing apps continue to work because underneath kernel will be picking `protection_map[VM_WRITE|VM_READ]` PTE encodings. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/mman.h | 24 ++++++++++++++++++++++++ arch/riscv/include/asm/pgtable.h | 1 + arch/riscv/kernel/sys_riscv.c | 10 ++++++++++ arch/riscv/mm/init.c | 2 +- mm/mmap.c | 1 + 5 files changed, 37 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/mman.h b/arch/riscv/include/asm/mman.h new file mode 100644 index 000000000000..ef9fedf32546 --- /dev/null +++ b/arch/riscv/include/asm/mman.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_MMAN_H__ +#define __ASM_MMAN_H__ + +#include +#include +#include + +static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot, + unsigned long pkey __always_unused) +{ + unsigned long ret = 0; + + /* + * If PROT_WRITE was specified, force it to VM_READ | VM_WRITE. + * Only VM_WRITE means shadow stack. + */ + if (prot & PROT_WRITE) + ret = (VM_READ | VM_WRITE); + return ret; +} +#define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey) + +#endif /* ! __ASM_MMAN_H__ */ diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index e79f15293492..4948a1f18ae8 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -177,6 +177,7 @@ extern struct pt_alloc_ops pt_ops __meminitdata; #define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC) #define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \ _PAGE_EXEC | _PAGE_WRITE) +#define PAGE_SHADOWSTACK __pgprot(_PAGE_BASE | _PAGE_WRITE) #define PAGE_COPY PAGE_READ #define PAGE_COPY_EXEC PAGE_READ_EXEC diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c index d77afe05578f..43a448bf254b 100644 --- a/arch/riscv/kernel/sys_riscv.c +++ b/arch/riscv/kernel/sys_riscv.c @@ -7,6 +7,7 @@ #include #include +#include static long riscv_sys_mmap(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, @@ -16,6 +17,15 @@ static long riscv_sys_mmap(unsigned long addr, unsigned long len, if (unlikely(offset & (~PAGE_MASK >> page_shift_offset))) return -EINVAL; + /* + * If PROT_WRITE is specified then extend that to PROT_READ + * protection_map[VM_WRITE] is now going to select shadow stack encodings. + * So specifying PROT_WRITE actually should select protection_map [VM_WRITE | VM_READ] + * If user wants to create shadow stack then they should use `map_shadow_stack` syscall. + */ + if (unlikely((prot & PROT_WRITE) && !(prot & PROT_READ))) + prot |= PROT_READ; + return ksys_mmap_pgoff(addr, len, prot, flags, fd, offset >> (PAGE_SHIFT - page_shift_offset)); } diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index 0e8c20adcd98..964810aeb405 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -326,7 +326,7 @@ pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); static const pgprot_t protection_map[16] = { [VM_NONE] = PAGE_NONE, [VM_READ] = PAGE_READ, - [VM_WRITE] = PAGE_COPY, + [VM_WRITE] = PAGE_SHADOWSTACK, [VM_WRITE | VM_READ] = PAGE_COPY, [VM_EXEC] = PAGE_EXEC, [VM_EXEC | VM_READ] = PAGE_READ_EXEC, diff --git a/mm/mmap.c b/mm/mmap.c index dd4b35a25aeb..b56f1e8cbfc6 100644 --- a/mm/mmap.c +++ b/mm/mmap.c @@ -47,6 +47,7 @@ #include #include #include +#include #include #include From patchwork Tue Oct 1 16:06:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818415 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC236CEACE5 for ; Tue, 1 Oct 2024 16:07:39 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 94D3A2800A7; Tue, 1 Oct 2024 12:07:36 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 8D358280068; Tue, 1 Oct 2024 12:07:36 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 776D32800A7; Tue, 1 Oct 2024 12:07:36 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0017.hostedemail.com [216.40.44.17]) by kanga.kvack.org (Postfix) with ESMTP id 57208280068 for ; Tue, 1 Oct 2024 12:07:36 -0400 (EDT) Received: from smtpin03.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id 0E7AD141661 for ; Tue, 1 Oct 2024 16:07:36 +0000 (UTC) X-FDA: 82625513712.03.30667DA Received: from mail-pj1-f54.google.com (mail-pj1-f54.google.com [209.85.216.54]) by imf04.hostedemail.com (Postfix) with ESMTP id 0FDBF40026 for ; Tue, 1 Oct 2024 16:07:33 +0000 (UTC) Authentication-Results: imf04.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=jy6nCANC; dmarc=none; spf=pass (imf04.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.54 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798833; a=rsa-sha256; cv=none; b=ekYnXT/VOKV6QvnCCO9H5Og6a+jY3Fzh8crSfa/0pnmWMkZxlWaqE1NIXtgioIaHHcZDul C+SvVs0k+SOgUCSJTUQElx6WwaLA/XLO1PFION3xGAto5cAHw//nPdr1+eOW0joEfzdOvt MSCndUkpA3QLLXiLAWefyU9InBkSBeE= ARC-Authentication-Results: i=1; imf04.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=jy6nCANC; dmarc=none; spf=pass (imf04.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.54 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798833; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=HvFaRabdOYgj/FaUxHA5lpjBxuSoaWHPSkkVGjDU8NY=; b=wJNqBD8AeQtsSZ9fS+7YddSeTmZMLC/J608R9im/bcXSDU74sSLjQKVIqtL9wmF6o9DMB4 gYtqmcAvhpG4IzHkF4pKgjWjkC437yvf/idqf/nGJUCrfcwKhvN7mqOmu2IdgRyDJBtyaR bxItDatdH+rHCcLQ78boHXz4Whdxmw0= Received: by mail-pj1-f54.google.com with SMTP id 98e67ed59e1d1-2e07b031da3so4288364a91.3 for ; Tue, 01 Oct 2024 09:07:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798853; x=1728403653; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=HvFaRabdOYgj/FaUxHA5lpjBxuSoaWHPSkkVGjDU8NY=; b=jy6nCANCFIXHI9vjRFjzoPCZzH3KZDFpblA7p9t5zKKp0tAmfeZoHjq832TKQpgJ/F D3Fp7Bup1YDuOe1Br7Efv0hy+FC43JUPQneM+Qihq1dNPenBXRscZUebdNGGtDdL8XFh 3q6xhuxMZKiBG71c8Jd7o2Rqysv8weTmU0pOOKc1jbvmDsaVJ70bjHJmrnIObiyUZufe h7h5hbccstBW5phmpggFs5xFW0rapooYN6vJysQBjn2zH3g5hnFrqmCrkzYbinMcCag3 vLvrBkHFm+h3m0f9YBvTdC/lLVt59KvHjoU60T29geJn2+KLwIQ2MljJGW4XPb26ugAl 8HBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798853; x=1728403653; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HvFaRabdOYgj/FaUxHA5lpjBxuSoaWHPSkkVGjDU8NY=; b=wneZ9YAp9Wu7etG6IhqzqY1M5mNqIcDHRfmcmf4wp7X4V4xNqtR+G+FY6KFByL6vfK YgNUVYxMF/lw1HV9sTvQ9058xsTebrtsuVwyWv0i8rkibijl/VnSFR5v2+mFCpPZkui4 TTdwSCci5RR3pYSt0Q803NjuRwvgVXQoWvSrbxnMfQ6FLB3Ckps9MYB3zj/65BLxcKe9 7ukhtzZQjGg8s8c1+b3N+moJbzio4sf+qA31ej9ToSLbUTdIvB0VqovWllwqhprtPL9P YOnOddWqA9RnR38dxqQn/41uO9h+dvcpYp4F6Zm0q1XowmCV3xZq9dzPs5old/YShSUi yo+w== X-Forwarded-Encrypted: i=1; AJvYcCUEbn2ffD9KlXtDFXH4xm08yoXTn0ce2C8UE4zkKQWFrkyj3tYaOkWjIDuoJ0A+YXJPwWA5syIE5Q==@kvack.org X-Gm-Message-State: AOJu0Yx7/pOxiX+rZOBV+cVu7iBpr1Kq8mzQgonbrc8xanSsSsZSdcU3 3hqHX2TjdpRMYLKd138Vn5K5ElWK2zil/xzxiJ+RPrTfPMfyaT95drwD3iarpaU= X-Google-Smtp-Source: AGHT+IG9catzJvE6iZhMcet9lnrBEGB4mWrgVfEl6Aw7Bwjo8k2vC5A57va5s4Xp67KUnf9ZyIG6qQ== X-Received: by 2002:a17:90a:ba88:b0:2e0:f81c:731f with SMTP id 98e67ed59e1d1-2e18481a282mr222726a91.24.1727798852879; Tue, 01 Oct 2024 09:07:32 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:32 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:17 -0700 Subject: [PATCH 12/33] riscv mm: manufacture shadow stack pte MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-12-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspam-User: X-Stat-Signature: 66zzb5ud8x5367r9g5r9kokr8ndwgqzi X-Rspamd-Queue-Id: 0FDBF40026 X-Rspamd-Server: rspam02 X-HE-Tag: 1727798853-98235 X-HE-Meta: U2FsdGVkX19TJMWMH+uB0R4mqEqJ6Gm67ksY9gYk5Xtb0uJXbTkQ+aAisaOe1ed40cgrFMtvypH/80fj9SGWOkOLB7IKya3ajgjVQ4Id8gFMLYcU6TA3HcrOvO6froVMXYARtT1ew5wemmA9N9F7UqYm5BFk40kYQOr+gDILWvUzX6kGa+B54MR12p3JBVMxV+O9cTxev+MfrNDAPe+2OoCUnHoU+j0zfXJ228c7RoPxSQl1lIOtZmYInfE+4zo23WAst7PhCYB8+ElldKE8qappr01Gpwaj8ZXhHdUroYjH+fkrKumnx4bLPMmtyzTT+tUHdEIOwBgxAN1iByA4rqMaWUBkKk9x3wwXb8/D6wMRnjx0vRtmmrh22yPesafeSzP3UcNmlBRnC5T+EQ3vXHa02o6M0wFG6A+wcEgssNK5+OvtJgqzbV6zngN4WktDvfdXP7+lEBPQRA3/4YXtzwvNzg0VsnpiFwPLWQjcayqySMra2xB+C5bmyGIv440SRE/gpHYeQbvDReHmJhM8jdYLSaEetqYV4J9TFSfeQ6qcE+uWJfeF4R1zr3SPn1Ppqt2w7updz70L3V8y6ufui3hb//qzwGkt9BeO+OUhiKP368kBywrgDKOjPadqZOyOUSDGLM1PBqLv4QHnKAYE5t0J9pqWsCWTyA7InkuurxVrYJJ4NOENnqMWKPuWwmQ9Z3ia0e1ANRsz78XHLc0Mjbo5ja5/Y/5DmdZuVNrqtF34rNQCmSvH5dsmiHXp8fzrN4T4PWrdXruKivRypg6uoC//tRIIB2ZSlhRZzUjbKOFO7SLVcGSTtkR9ce4C6ho76RidIU0vcMp3I1souakPiQDlUoaPoUm1EXbxTENa6lOPEwlI41ZKXJTk8EuAsLdl7WbSpSYsZH7g9V1Hpm+sWulAFggbnkEpAKW8A/lANJtd6hSDqrFK+A/GUMehJPIhPBVnjVB+NHqO1KjgVyU bHVv8OIa OxYwvqZrd/DDuXVID+jwtsJLaWlB/gKbWGeudOeAzxYH8F6i3ZyNfMnnjdJEv6GRUALffqrFPDWhtSkhZmcJsxyVqrez6Br7/884zqSASS2TqO5Sgr4XbFxvP6wCSBJDxklx4ohHMR3D0yx5HTrF6t1QXbXNFNoZ/O0jift4c636gitJYcXEcRBSMV6lSKM2r7TDAF8ZddHDgAOiYqVj8oWa8442cMzpcIOI6p3+OLZvOeV23sdyfu26fQgFedFtLQRUHLbJDpZF50PboXSr264juu48va3ZWoafkAW/D2i8jQ+gWcVbIl7o9B3+W8yK+pcrDmM3TBCLFDUAOVgQR1aX2F3tJNhPn/7SvSoRa96Knex0e8yhBSPpMtpRbi66WP4X5NHPHw1djcge9ysmV600MfxvxCDK/l+H7xe8LrkLdnJvRtf98W4MNdm8lo7jmsY73b+YojWKqo94= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: This patch implements creating shadow stack pte (on riscv). Creating shadow stack PTE on riscv means that clearing RWX and then setting W=1. Signed-off-by: Deepak Gupta Reviewed-by: Alexandre Ghiti --- arch/riscv/include/asm/pgtable.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 4948a1f18ae8..2c6edc8d04a3 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -421,6 +421,11 @@ static inline pte_t pte_mkwrite_novma(pte_t pte) return __pte(pte_val(pte) | _PAGE_WRITE); } +static inline pte_t pte_mkwrite_shstk(pte_t pte) +{ + return __pte((pte_val(pte) & ~(_PAGE_LEAF)) | _PAGE_WRITE); +} + /* static inline pte_t pte_mkexec(pte_t pte) */ static inline pte_t pte_mkdirty(pte_t pte) @@ -738,6 +743,11 @@ static inline pmd_t pmd_mkwrite_novma(pmd_t pmd) return pte_pmd(pte_mkwrite_novma(pmd_pte(pmd))); } +static inline pmd_t pmd_mkwrite_shstk(pmd_t pte) +{ + return __pmd((pmd_val(pte) & ~(_PAGE_LEAF)) | _PAGE_WRITE); +} + static inline pmd_t pmd_wrprotect(pmd_t pmd) { return pte_pmd(pte_wrprotect(pmd_pte(pmd))); From patchwork Tue Oct 1 16:06:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818416 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id A69F6CEACE4 for ; Tue, 1 Oct 2024 16:07:42 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 26F282800A8; Tue, 1 Oct 2024 12:07:39 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 1F656280068; Tue, 1 Oct 2024 12:07:39 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 022AB2800A8; Tue, 1 Oct 2024 12:07:38 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id D8E1B280068 for ; Tue, 1 Oct 2024 12:07:38 -0400 (EDT) Received: from smtpin29.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id 8C1A41613FA for ; Tue, 1 Oct 2024 16:07:38 +0000 (UTC) X-FDA: 82625513796.29.81A350E Received: from mail-pj1-f47.google.com (mail-pj1-f47.google.com [209.85.216.47]) by imf05.hostedemail.com (Postfix) with ESMTP id A6808100003 for ; Tue, 1 Oct 2024 16:07:36 +0000 (UTC) Authentication-Results: imf05.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=XiM+mZD8; spf=pass (imf05.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.47 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798730; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=I6L9CXOfGC8FGkDgNo32YOnEr2hJuvgG2CDkhLFheFM=; b=cWHjpqY48uN4UnK6KdtPB5JuLwjX+c/1+0qjXDmz45LCayLIjsFjjLPK7l5rxE6AKxfT8A ruic3EndrugE2C99yDXneFyMq4vRgzrVLGeHzOLq13kz3VO40sBJePuipMHKcn/3r/siVe Gd14HKnEWNPsNJ7IihwTuFIAs2DG49w= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798730; a=rsa-sha256; cv=none; b=OqH2EDqum+SAyzDRNl14q+J9THZ1hlY86+aesTyeJGvAxwN3ZZG3uvltt14tMI96NlrUST M2GgjyBPz7sONIITXaVkqRIFufyFqXLoPaPnWDJ2ouPieGkCfOn5PhQ8LXx8R9SkwpFMmB nZYvE0uTvWCvjHR5v3OHnUVrCznjvBI= ARC-Authentication-Results: i=1; imf05.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=XiM+mZD8; spf=pass (imf05.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.47 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none Received: by mail-pj1-f47.google.com with SMTP id 98e67ed59e1d1-2e0a950e2f2so4552092a91.2 for ; Tue, 01 Oct 2024 09:07:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798855; x=1728403655; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=I6L9CXOfGC8FGkDgNo32YOnEr2hJuvgG2CDkhLFheFM=; b=XiM+mZD8hm+nzdLSOB1aDldaCy/YXPfxkPYlua7Z9riUIG5e4/AL4IIDRq9SHhgvkf S1E+ilYfCl7281x0ogFNPYg3rVu9lEmEdZJbLHk1uwXbOqmUAspimr7BEI6OK9bqnCUV SA2AzOLf/3bCA59LSlikgqJvkfHirFCWqYWAo1wIE5twKRLIyMhlOczyGb/9EIkILK9v l6EDudk9z4kAL06zGr+7qwLQzEr0ZehVFeys/WR7RWDSbeySq29lRF+Cwh09WrInaYJR vlgQgkze3yAiKUAxqdZY22hpYNY59vz8CMGvlI9Izqfa83HNaYPrOQs8/JKWFTC45KHI HOWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798855; x=1728403655; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=I6L9CXOfGC8FGkDgNo32YOnEr2hJuvgG2CDkhLFheFM=; b=AXWEZNoXOgezFfFkfv+TIkX7BXCKFWp+zSAd0CbOvrushgX3GN0x4c4gYtK/bDF4RU PoelVvuX9Y5QnD0vOhJUEAk6UD46iSYC8vqHHCqvxXpHQ4z3s3PH9R8nVHrCSK8g8pq+ plRoBQb4akrFxp6B/xrFYi91ZlUfMh+9h5594I9zKFumvwAVB2ZEJvC5K9jjfipJRIKm bm6TEElkfAMm/m7g5BBgvQxbZysM4IGsvMNb9aBarOqKmeIDITS27KdaVEyYoCCefRlV H1qjqoSEEIuy+b2pBTSEUFWFxdSyhGnEl8im1WuwJfOfBheB0pzakHFcNRsYwZDEm998 gAzQ== X-Forwarded-Encrypted: i=1; AJvYcCViQA3n+N2FrNQ+sVwMhhAzOXzBhUMf7B6PcBbJal3YswhSfFZlDh+E/Pu7iNwgdVibk/Mbj0EEpQ==@kvack.org X-Gm-Message-State: AOJu0Yx/gy87u4dAbXSlYE/xJ1M5BOmA7GJD96+dlmVDw+c5r9O4Tx7f vVoTWPR03gH79ariDz1hEHvcG4x3bySqVmYYPxh3BQ3r6v2AVRCki+H/zLYzf2g= X-Google-Smtp-Source: AGHT+IF8xhnYD/pqfXYfj6NnlMKMMkkR64MiBO6DNyNWgrVcZh53ylTJhkG5X1f7jZZJUwYOw4ZShQ== X-Received: by 2002:a17:90a:77c4:b0:2e0:74c9:ecea with SMTP id 98e67ed59e1d1-2e184681664mr241500a91.10.1727798855416; Tue, 01 Oct 2024 09:07:35 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:35 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:18 -0700 Subject: [PATCH 13/33] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-13-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Queue-Id: A6808100003 X-Stat-Signature: qeiuhzikf8mycsffq74f448uq5hidk7k X-Rspamd-Server: rspam09 X-Rspam-User: X-HE-Tag: 1727798856-652783 X-HE-Meta: U2FsdGVkX1/cTpRq5DcWRcpXGRWeui9yIJ4TKnXAgCky7iROwEPKzE8y3yy41yDmFt/UuWEZsZO/3o6oFgRggDrjujMiTMeun/PrHMwJpkGTHW0DNgWkf+RCrcJBueJ+nfbvqVg3WhN2O22/cABl1sTk2Eycyt1mSIZa+S0+TKzNkncK9bqBcb/E+N73/19rfoMdOQnyLVinm2FluMQMlOqzO+JeordWyOovw1PmwRUgvt4dRKLE6Pw4Sn6GGeSOOBw2ZmmCOfcK64V+A2j4/Qxh7y8pv6NWG//oqZE8qLo2H0qRn2nFe/dE/Fi94IXZGdvvkms/SoxcqGPSBvnvBOJN1RMsTKwmtrI2BrRqBXUyHsL84LI6VSca60qAGK6mzVrzLSyDKiYF5FS/S97T7llMsON04gkQLJhWx0PMfwhax001XnNBEy91AnGsxG+MBCsfAM2Oqwf6PuOv02s4V5EjYxq7H+7tyalPZfq0x68KijIg+muAb4PEF5iWy8WO5u5Ksaw+FMtpdg0Dhz6z2esXicwmGWkHrrGaNJvEdq/XUQrNUvLh3UgBa+ugACMGtsT9rVJRLzRJOULpFbwRhbPZsajH2iQgMm+h90DzBVHu7f+ntVI+2bcRuqmUN/HTO8JALkgV2mweYWh7tmpf/O57EioMpyYh4ST30IQxOjQC5mEVV8UISOuhtKjan+UBRcmQ7btVUk3O/cFfvgFThOXq6oxDptYggmww0nKFXhbSHie8V/6C1ml69v/dZzV8PGWNOGaA1WlvRKeMygQjhbqcNTe5ntNQ/hLEElwoJAWmEhhpcsgRgBp8x4SawQ4ZWXD8l9ue8jiQAgwLEMo8JmVindQB6pEWCG0s2/BFBD+1bgf1IWNT5pT8/QF35pR7vcbndEitis5nptkcjjtjB13fhIieyXS+wIx/oC+N2EtsAIeM4Khf/rZ/0Sidn/LQUXUoOjj2V6ayxVRWPUh Uc/E88T+ 8EpbgeFjlP1xclyp85nrn+Y9xMGtgt2cbkmwq5sCCpZkhDtPzc4bcNS4dVlGYvj2jPlqKjh+XkGgU9GQaxzig9FEoZ8ZZ+77rHSWUwIwp/Qw0RJab5Iw1WTkgcEOQCAumxmZAD8vnEqWOMZYAEmttiSGsRVn5SQ6pQSD0Q3V/WnBETdMEevvfIwQMgEk0/Eycbo+6NdrSep7BAJvd6J0DzHu89M6A29FX3zS5qGaRl+6idF/W3egZ1CWT0/MgEIHcXJQeG81sFzWTY+bQirNvLqcIJjY7aTIF0dNLwQVpeNDSziIFunGI5+lYmOVm1bRnCvxwydznJhZWeC4N6i+u3YGc2rci4sfSGiRgbxZSRBkGxsvKzw2xotD458AytVgGofpeYJZiXlG5JfAWCcvrImpk8SJi0SNf9v22EfDpJ+iL0dG4zPgoJTbVkCUUlw0secqIWs7fLYVXPLTOiHo2rdvqSItZbQPxEZzYYZ3TmRk+Xk23/2+5tqRjwgM4NgHhhGGQcRRbpr31h5iqAIlmfe4g+phDIQOsSse6BXCv8DrGv2bYXRa+k1DPWkauJ+wApvYL5FRIFoZHY0cCRUtUVJ15n+wvmev98MDDgbgsDJ3C7JWjeF4V/I0q2Q== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: pte_mkwrite creates PTEs with WRITE encodings for underlying arch. Underlying arch can have two types of writeable mappings. One that can be written using regular store instructions. Another one that can only be written using specialized store instructions (like shadow stack stores). pte_mkwrite can select write PTE encoding based on VMA range (i.e. VM_SHADOW_STACK) Signed-off-by: Deepak Gupta Reviewed-by: Alexandre Ghiti --- arch/riscv/include/asm/pgtable.h | 7 +++++++ arch/riscv/mm/pgtable.c | 17 +++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 2c6edc8d04a3..7963ab11d924 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -416,6 +416,10 @@ static inline pte_t pte_wrprotect(pte_t pte) /* static inline pte_t pte_mkread(pte_t pte) */ +struct vm_area_struct; +pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma); +#define pte_mkwrite pte_mkwrite + static inline pte_t pte_mkwrite_novma(pte_t pte) { return __pte(pte_val(pte) | _PAGE_WRITE); @@ -738,6 +742,9 @@ static inline pmd_t pmd_mkyoung(pmd_t pmd) return pte_pmd(pte_mkyoung(pmd_pte(pmd))); } +pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma); +#define pmd_mkwrite pmd_mkwrite + static inline pmd_t pmd_mkwrite_novma(pmd_t pmd) { return pte_pmd(pte_mkwrite_novma(pmd_pte(pmd))); diff --git a/arch/riscv/mm/pgtable.c b/arch/riscv/mm/pgtable.c index 4ae67324f992..be5d38546bb3 100644 --- a/arch/riscv/mm/pgtable.c +++ b/arch/riscv/mm/pgtable.c @@ -155,3 +155,20 @@ pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, return pmd; } #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ + +pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma) +{ + if (vma->vm_flags & VM_SHADOW_STACK) + return pte_mkwrite_shstk(pte); + + return pte_mkwrite_novma(pte); +} + +pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma) +{ + if (vma->vm_flags & VM_SHADOW_STACK) + return pmd_mkwrite_shstk(pmd); + + return pmd_mkwrite_novma(pmd); +} + From patchwork Tue Oct 1 16:06:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35A76CEACE2 for ; Tue, 1 Oct 2024 16:07:45 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id B486E2800A9; Tue, 1 Oct 2024 12:07:41 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id AF711280068; Tue, 1 Oct 2024 12:07:41 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 971262800A9; Tue, 1 Oct 2024 12:07:41 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id 71605280068 for ; Tue, 1 Oct 2024 12:07:41 -0400 (EDT) Received: from smtpin05.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay06.hostedemail.com (Postfix) with ESMTP id 381E2A8E34 for ; Tue, 1 Oct 2024 16:07:41 +0000 (UTC) X-FDA: 82625513922.05.2BDBD30 Received: from mail-pl1-f172.google.com (mail-pl1-f172.google.com [209.85.214.172]) by imf06.hostedemail.com (Postfix) with ESMTP id 36BED18000F for ; Tue, 1 Oct 2024 16:07:39 +0000 (UTC) Authentication-Results: imf06.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=wRcQ81tb; dmarc=none; spf=pass (imf06.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.172 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798718; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=AMPZIqdzSjfHq7xJb4YaIgEu2GPeUmiCYK4jkAGMc38=; b=MXCAuCvFcLdVAI8Nz17ZJ3qy+tQU7Y472IuewBGEY44qte2zdkXGEAdkVqsV1oi8bn11c0 ww5tMVpdq0amyFbMcTsyJD5IASJFTW/IXPNkM4d2qfnIdtDCKjhok/rtOfBhSSCPs5djSU MFz9IFqcYSIEQWVSe2mrnBv3BHbt32U= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798718; a=rsa-sha256; cv=none; b=IPx9UBsBNNW4C13x/+MBp0HrnUJrRYogoQgUBKY65eaRXOZO9T3RlrW3G89oFuzoGSZ7YG PRtfGViZGVSrHh/0PLwCUSLFbTNmCPfFeUXlCyd6hWA4MgvcttE11faZg8ohwr2RA+1q1B MzPE2TDZV/gZ1z07x96ds3xq5gg/n/Y= ARC-Authentication-Results: i=1; imf06.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=wRcQ81tb; dmarc=none; spf=pass (imf06.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.172 as permitted sender) smtp.mailfrom=debug@rivosinc.com Received: by mail-pl1-f172.google.com with SMTP id d9443c01a7336-20b49ee353cso40489315ad.2 for ; Tue, 01 Oct 2024 09:07:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798858; x=1728403658; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=AMPZIqdzSjfHq7xJb4YaIgEu2GPeUmiCYK4jkAGMc38=; b=wRcQ81tbXAGCMa5sV1qBEjO2/pYKpy4zsDSnHIRRqP8mRBTxKB4cbcpsu6/QMlFney JKL7oUt0IZFoMAi4NM+1rbKjl6wfa0W7TJpeUt3WNzk7pZBqesuAmcgI42xmlxloO7jm domcjeJCb31chroJiHyT9cV20pt5v3sdy+tr1o/p1S/Q4bJbRclrdyMk4HbHxhmJtCfo eZ3ktkFROpEqAcQHQn5v1VjtozWMUsNt74eyY/XQ4jCPAsidpmlt3QE1IzzyDls7PqZW W9SVM3xl2VNeio/yrUiMd6Cl8zChLEIJu8ACAkHEgun2pCK7EnhQBtJHuE0fXNWu++uH ZLXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798858; x=1728403658; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AMPZIqdzSjfHq7xJb4YaIgEu2GPeUmiCYK4jkAGMc38=; b=QxL94XDuTlPaYrBWUO53R+Z6Rs/4GIWMwI9zvqko69IgZSWAbyYH5fkmxoBDqsNCuS BJKEhEyA0YItVwHyP4jXdiFHMFEBeCeRtt3xIjn/tHV4qiW9T9w286BtDV6bIZpDuHcs mTJKj0FaYPDYyGVzq0KWS5SFcyj6+GUpcEV7TxziODV2A3m/QsO1Jq6jhDHyFVZ88ugz ondv4e/DwLNmmmbymMdGUDwc7eGJEcEjKEQk9GWOO/xiylWGYTUW0lPZ3U1/kH/P/4Y5 VWNl6hF5wuIoBUD0wBtmuTT8ChFC6jutF7dWkRmmKxC5fTMThNeqfyae1dRLa18JCRzX q8aQ== X-Forwarded-Encrypted: i=1; AJvYcCXeQO3U7+1a/Iest3iPCl8ZJ/hD73CmsGIpDyYZHPpzr1PzG95YV2Z2noJ1TFQ4Weq1gcpj6QfBww==@kvack.org X-Gm-Message-State: AOJu0YzzhF1FwesfCOWQqCJJUVyb/xjoqAsr/u9ifYAbKI/R9UI5rP/Q knV00ilATSdHIARWX0jSF1DAZS7jylDmhgfeXjpBE0lljU50n91yXRwx8brfXw4= X-Google-Smtp-Source: AGHT+IFru0DhFvQoGs6LhOQ3kHAjWn92S78/sQgjmR4BKwvX6aS8UH3SB8TB1kja/SuVDdI6S6eWBw== X-Received: by 2002:a17:90a:a886:b0:2e0:adbd:78ec with SMTP id 98e67ed59e1d1-2e1849d9954mr193359a91.39.1727798857996; Tue, 01 Oct 2024 09:07:37 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:37 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:19 -0700 Subject: [PATCH 14/33] riscv mmu: write protect and shadow stack MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-14-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam07 X-Rspamd-Queue-Id: 36BED18000F X-Stat-Signature: ozkx8pq18bpwan3ejoyr7ozeda1544p7 X-Rspam-User: X-HE-Tag: 1727798859-474189 X-HE-Meta: U2FsdGVkX1/fAg7aOcuWIuGGovRYsagfMSq9JPISu/FFBMz2otdckWGXJYGuHh0ufS2n09jDfyGfHdq1DSr/Cv7rYFknZBjP2sH/0If4nd9+EZ/qcn/jhbQXfSed3ZifG4d15kiqGUsr7Zu0ES/oZZblll4wESKCqpsa7d4qNlNVfDsXdvFW2Z4Tms3V5FJvWbTUkmeMZrnjy8zL/GRGO+3Mu9JV5nFJuumXsxNfNVlWMOXAEouh9Vr6ryNbSv6vVP+qRdZV39w9JT4N78PGHxvcdo8oHEITXzy9Bme7whT11N0BlX3R537l0RYaBfGbYR3AHwfEvkO3XhYoamzIIFT4q2w/Tepw5OALFKr6ehxImXVavcYTea1i3Ah3yi+ryoLJtD0Z0Kz+kstVuMz300Scm1A5AadQtIs81eTaCYmstOmE0Kra6/ByePthxBF7fCHR6zUbYEIT2i9ESXFP4uKsIqbATAlptajY+jPE3xHh5p39dHZmtRUaW6rw7gTwrH7nehpIL6nIOtBJPgajxe51o+IE7n9JRxED8Yc8nHBo9UrX3gcFBl4rxefPgITx+Fif4xLx2Nq/lqvpsbG+vI4tVCEilcZiyqS49/0ImE/Y1hrfCix1t4/gayHhdSQIf+5r/ybUZsXUEHazHXwPpGNealslapycxa5UJLlp64oErhQG4DUFMzJ1b7uHIuN066tLRuME4WhlzVWZsIobJrF4A8jktZ7w4vQ4sRkrnVC6DUaJDWGsMocNUn185p2krMjPikK3VmdNvGOlkr5gMo6lmc/k6EE9D2IaE4QQQHx3qC3oqyTUmrwUmjWCqZ6PtXBpxYC6H8PSrL542fIgrQYvYEstH2HXRJK4y9cu1oPmElbK+ZjAUnwFRbnidGLjcgR8K4ydZYayfaNfu4U8kmUtwrQFiOBNM1bxB7bLToFWBTyB1TT0a07J0p+/meyU0pqXZsnGTqZmYud2hs2 cQq72P4I p5+5mLvaUFFPVBs8Y8sK7tRciygBKEOALNMwdqaFqn5ZJV9sWqSLf4rsooAeC9FicXiD4WqTwy/SR3HfJj4V9KQ/BnHw1ELfdOD6I5dw3cYmdOuTBscxrLnTZ7fHMxfBVR5RFSZ0534WH1kQZ2052jiYc7ahvHUuapETVy4kLJCZpIepmYf/cEy9mTg9CcUgfA97gKMDq+e0wXVMtTWsBsH0w+f8EevlRN2c+qpxPohHNWYILE6LfTIJLZQotv3Z7B6i/khkFDyo1fq1/qRtHTe8sUSydGggl8XollHPAW2ZI9nhzs4jC8LTGsgvM4QuLXoOea7apqet+ddrLQ6AqxXhG9F47FEXjMrhviCg0EurubhSv1CcvjHg7ryiaSHD0pQZVt5h4xhpZa5QE3er5vcKnww/ycup3IKfNXDhXRc+3UQt6PR1nAjajwlK06uKvzCUuJxTor53/u1aVMrUKR+uPD7jk73kamEi4c30Za8laOY7873kcc7rDWzZFIlXvqGGWuDopyTqPwmuo8NRfiV9wXwA/R2hIENd0ruCH5BFSYMvRiHsn8qtwoDf+C9nJxVEeABgyuCU2vvU= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: `fork` implements copy on write (COW) by making pages readonly in child and parent both. ptep_set_wrprotect and pte_wrprotect clears _PAGE_WRITE in PTE. Assumption is that page is readable and on fault copy on write happens. To implement COW on shadow stack pages, clearing up W bit makes them XWR = 000. This will result in wrong PTE setting which says no perms but V=1 and PFN field pointing to final page. Instead desired behavior is to turn it into a readable page, take an access (load/store) fault on sspush/sspop (shadow stack) and then perform COW on such pages. This way regular reads would still be allowed and not lead to COW maintaining current behavior of COW on non-shadow stack but writeable memory. On the other hand it doesn't interfere with existing COW for read-write memory. Assumption is always that _PAGE_READ must have been set and thus setting _PAGE_READ is harmless. Signed-off-by: Deepak Gupta Alexandre Ghiti --- arch/riscv/include/asm/pgtable.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 7963ab11d924..fdab7d74437d 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -411,7 +411,7 @@ static inline int pte_devmap(pte_t pte) static inline pte_t pte_wrprotect(pte_t pte) { - return __pte(pte_val(pte) & ~(_PAGE_WRITE)); + return __pte((pte_val(pte) & ~(_PAGE_WRITE)) | (_PAGE_READ)); } /* static inline pte_t pte_mkread(pte_t pte) */ @@ -612,7 +612,15 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm, static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) { - atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep); + pte_t read_pte = READ_ONCE(*ptep); + /* + * ptep_set_wrprotect can be called for shadow stack ranges too. + * shadow stack memory is XWR = 010 and thus clearing _PAGE_WRITE will lead to + * encoding 000b which is wrong encoding with V = 1. This should lead to page fault + * but we dont want this wrong configuration to be set in page tables. + */ + atomic_long_set((atomic_long_t *)ptep, + ((pte_val(read_pte) & ~(unsigned long)_PAGE_WRITE) | _PAGE_READ)); } #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH From patchwork Tue Oct 1 16:06:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2181CEACE4 for ; Tue, 1 Oct 2024 16:07:47 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 2E31E2800AA; Tue, 1 Oct 2024 12:07:45 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 2942E280068; Tue, 1 Oct 2024 12:07:45 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 06FB52800AA; Tue, 1 Oct 2024 12:07:44 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id DCA5C280068 for ; Tue, 1 Oct 2024 12:07:44 -0400 (EDT) Received: from smtpin19.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay04.hostedemail.com (Postfix) with ESMTP id 1E5731A16CD for ; Tue, 1 Oct 2024 16:07:44 +0000 (UTC) X-FDA: 82625514048.19.414305E Received: from mail-pg1-f179.google.com (mail-pg1-f179.google.com [209.85.215.179]) by imf26.hostedemail.com (Postfix) with ESMTP id 0884D14001D for ; Tue, 1 Oct 2024 16:07:41 +0000 (UTC) Authentication-Results: imf26.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=EkXuYiL8; dmarc=none; spf=pass (imf26.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.179 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798721; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=LWmoBhDbyT20ZDpyj0YkBJbSnr4cmq0kZF5LWUGKIyA=; b=pl97rpbyMhxpGmu2KCwcq29SGaF7iMHLzq7J4Y/VRGyhSUxMNq5U1YlBVFrwrXJkbzbEPV YAVAxAnI9wXcriTpxp8sGoZobfj2nkYmhFIDKjrOwp0vqMZwifLMmtMe9hAfMv/E7Ip/hK lM42XyhFoUGipIc4F3jtnbFrloI3aAE= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798721; a=rsa-sha256; cv=none; b=Zy93RnWLuMf/jycRN4aq3OzobmzWztbZPf6sYidnmhgdmf2UJZmxdN2cNBu1YwxnP3i/ar /tLBKD4QQGeqvDg4MXG7NqhsxclglzGLhas1EzhbJS4mfxdlMBIj4+57r9ZOM2pjW7Oi+r BguZhrE4Kpf2Ox0Yw1XSF3v02fbjEoQ= ARC-Authentication-Results: i=1; imf26.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=EkXuYiL8; dmarc=none; spf=pass (imf26.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.179 as permitted sender) smtp.mailfrom=debug@rivosinc.com Received: by mail-pg1-f179.google.com with SMTP id 41be03b00d2f7-7db637d1e4eso4451067a12.2 for ; Tue, 01 Oct 2024 09:07:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798861; x=1728403661; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=LWmoBhDbyT20ZDpyj0YkBJbSnr4cmq0kZF5LWUGKIyA=; b=EkXuYiL8pFnxazP4Ba48oA3xoWMuCwAjkMU4dJZoX0R+k8E+a6lK54dW57qtsoiTN8 hhu2blVD7h1h2zj7V39je181gmhLYbL93vMM/OgCAvV6GPoKeWQIMqJzFjyvP2mRigBL osNU6v6o2J2AVkceqQlxMTYFzfElIvlKTZrZ2r4K2oK05KK5n++eFrJsXY99ElvhxuvW XcF2ZfGH0XycxkpTfSW3W5NC6ZiHS51WmSY034sT/MHuZAiFfq0syb5k9SICF5JOf0RW Bk0HJst5BHDQyZBX7R7Q74gYrjxHT0uAidWF8VGAWPGJ1eEY0m6Ma/02jkEBOI1lXpNk rtJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798861; x=1728403661; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LWmoBhDbyT20ZDpyj0YkBJbSnr4cmq0kZF5LWUGKIyA=; b=I+3EPzKBkO2AL9GEnMfeSJ6gZSP+OFc5jBc32op8xJDwGnNgo9WiE6I1tDO/3JQP41 O0Rn3LODleZDDWmqYGV+qIoX3YZZ0h9xD1XTMf9LNeOWKjnVghi6wOPTNX1DytYvfvyb Q9MPnpso4TT0ElQF1czf9Ei/3OKotxM3kM3hJ/kt/nE9BVdZUCEdm4BOmdW2c6TesAs/ hmmbKrUvxlytBI7plIQdGCoPqpFmGnxWdl6XVm/3Nrn5g9A3wgWJmKcgOoNxuSJLGTcl Od49Qx4Lz2qMrxqr0b8jHjOCJL+zMUW8xpEipc/YEGnf0myRmiWd7UcE6eM7inKrqbLi NW5Q== X-Forwarded-Encrypted: i=1; AJvYcCUUX6vR3MovoEbWUQV+icoDaummp9RYu3riO822PDWSSadC7vJcc+MO5iVT3j9T+6HpA/qHSZUiMw==@kvack.org X-Gm-Message-State: AOJu0YwaNTa38zwhHecN/FjtLKoyPFAlibTSi8cs8VpUZHAg8BuZ6lFJ k2zqe+xD0kcLLDFL0ZGtxtaLkNFLLZi077017e1ia5Xoupx1SVotgubE/YGDpOs= X-Google-Smtp-Source: AGHT+IF+DXMbQc9ATxScjl/51BoN0NDApnEeX0Qfv6KL8hdZd/y/ejK0opPN008FSUmQa/7I/9Jl0Q== X-Received: by 2002:a17:90a:88d:b0:2da:9490:900c with SMTP id 98e67ed59e1d1-2e1846aff5bmr230162a91.21.1727798860600; Tue, 01 Oct 2024 09:07:40 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:40 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:20 -0700 Subject: [PATCH 15/33] riscv/mm: Implement map_shadow_stack() syscall MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-15-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam07 X-Rspamd-Queue-Id: 0884D14001D X-Stat-Signature: tqfqmyw5gqo1u4ap9fd8xfw6he5oybq1 X-Rspam-User: X-HE-Tag: 1727798861-77775 X-HE-Meta: U2FsdGVkX1/0oBnvwaA1vCGHeKl01Za5W8Xp72tTzNfAj+PmP3gNRWKtk2zwmrazkqtKT7iYvBp1AlHRCmmC3DYnpzjGXN6knN+khdh6HxQiGFh4q1xIQc1PbX00X7EnsxFbtb0YckGkkxMNaacuos2nB8Vero6t2ljV7pdQBuEN+dYcH5OIGywby+oDRgwb/eh2WHxbh0HA+GU0hvH6WiEv3QmEZIzDgS0dY/0N/huP5hgH5jpx/RLC/21t3yHHIRDiKfswx6AxDpVVa2J4c2nqQm8XLneiKrGWUKCcWjGngomR0RRAUX5tF1PzEfz/C3mgqLapPY30HGp0aS5N91MHiN1p7IznFVPlpYRgGpvYcUMgbDDB8U0QJwNi09A8C33mruun72ME4uld5lC2To6fRvk46dkdS7FVISESM45HsOEW5K9Z9ikEah8Ahq1mZhrmDDgAGHR2Gj+oDyggLrZ2vUUaq7dgohA3+96j3jH4RbYzcQEkwoyeQuuJiOlP7BvUvZgbm5zMa5jbrvLvNQtElKB0aKZZEL1S8CxtPOpbGr7RmAcek1c9TWwGD3wqpxVPii1ZOJc66gaH43Ju/5Zo0ID561hZ8amaJ3rRrTnp+nZy6ofCVm+y4JpVnduAKpuJtSPNciUClbB3huuYW8SWOnCFumOL+0/0ciLyQw+RhMVf77p4QF+YNEFN0d4HXJfuUlfncr2w/SiN/pR3nDtNmF6waF/HZK/wVaBuDZaDNOo2ZJQUT7U+4JsCjxL1fpEAT8ejTDPg5XWtNo887q7uWB/JbeHgBr31azdHpHf9KS3Qc+OmP4KHch+aWE01jaOY87XoRq3bR1n7taKb09OEkt0nOUr7LMUnLwqEYj/LXo99pBX2owavctOU6EYUpdTpHkE4y1C+hj9rkqK1+OqpmTq7F3KpcMAKCBGYSegpylvnhKqmiaUwfm9D1mv7BIdwoxzhA/8EHoqRQfL vDSrzRLF UuWedtKyznId3XRKBgWnrPaLVQBBzR0vKBJKTgsIDjImUhY19ngFlioLJBx863izWbJYdxuX+rdjtuG4RLTXAOip/7DYKwpGmzgjXtUSj49v1sTKXEzlk7YJCcidEhVzRWJvg7lerKvuX3yAC/BXbxLp2XHJGSVvtNsNZEeO5y5W7mOpUEvpfhafRTfoqfltFnM/8VTrdLVWiNo92ZJI2gAAgXMrXUyE/vf3r1X7gBjXS+39ruV4v42/sK7WiT73PW0IjHfiPpJsreLngSpDVZvxCq69t1KznswttJ6IiriDV4NX/zuV0dQWmS7lxsCafiMxPgB3RDocA8eNAfBc/Llm6F1ICtPxrZj8BhcsR6L7gsUDrpWcw/ABuNH7UpztR+Ho3nXDBNXl+NYPraPeLjrZXqwKQjceqX5ba58nMiyZToRwPbwFUGEwkh5Iunvx4g8m8u8SmPsVIDFhIbJol/rW2uZKM6dM7Y5rdLLhhL8Dhhz+tLLjs28X/geCd53JVxglK X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: As discussed extensively in the changelog for the addition of this syscall on x86 ("x86/shstk: Introduce map_shadow_stack syscall") the existing mmap() and madvise() syscalls do not map entirely well onto the security requirements for shadow stack memory since they lead to windows where memory is allocated but not yet protected or stacks which are not properly and safely initialised. Instead a new syscall map_shadow_stack() has been defined which allocates and initialises a shadow stack page. This patch implements this syscall for riscv. riscv doesn't require token to be setup by kernel because user mode can do that by itself. However to provide compatibility and portability with other architectues, user mode can specify token set flag. Signed-off-by: Deepak Gupta --- arch/riscv/kernel/Makefile | 2 + arch/riscv/kernel/usercfi.c | 145 ++++++++++++++++++++++++++++++++++++++++ include/uapi/asm-generic/mman.h | 4 ++ 3 files changed, 151 insertions(+) diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 7f88cc4931f5..eb2c94dd0a9d 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -117,3 +117,5 @@ obj-$(CONFIG_COMPAT) += compat_vdso/ obj-$(CONFIG_64BIT) += pi/ obj-$(CONFIG_ACPI) += acpi.o obj-$(CONFIG_ACPI_NUMA) += acpi_numa.o + +obj-$(CONFIG_RISCV_USER_CFI) += usercfi.o diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c new file mode 100644 index 000000000000..ce002eabbdc1 --- /dev/null +++ b/arch/riscv/kernel/usercfi.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2024 Rivos, Inc. + * Deepak Gupta + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SHSTK_ENTRY_SIZE sizeof(void *) + +/* + * Writes on shadow stack can either be `sspush` or `ssamoswap`. `sspush` can happen + * implicitly on current shadow stack pointed to by CSR_SSP. `ssamoswap` takes pointer to + * shadow stack. To keep it simple, we plan to use `ssamoswap` to perform writes on shadow + * stack. + */ +static noinline unsigned long amo_user_shstk(unsigned long *addr, unsigned long val) +{ + /* + * Never expect -1 on shadow stack. Expect return addresses and zero + */ + unsigned long swap = -1; + + __enable_user_access(); + asm goto( + ".option push\n" + ".option arch, +zicfiss\n" + "1: ssamoswap.d %[swap], %[val], %[addr]\n" + _ASM_EXTABLE(1b, %l[fault]) + RISCV_ACQUIRE_BARRIER + ".option pop\n" + : [swap] "=r" (swap), [addr] "+A" (*addr) + : [val] "r" (val) + : "memory" + : fault + ); + __disable_user_access(); + return swap; +fault: + __disable_user_access(); + return -1; +} + +/* + * Create a restore token on the shadow stack. A token is always XLEN wide + * and aligned to XLEN. + */ +static int create_rstor_token(unsigned long ssp, unsigned long *token_addr) +{ + unsigned long addr; + + /* Token must be aligned */ + if (!IS_ALIGNED(ssp, SHSTK_ENTRY_SIZE)) + return -EINVAL; + + /* On RISC-V we're constructing token to be function of address itself */ + addr = ssp - SHSTK_ENTRY_SIZE; + + if (amo_user_shstk((unsigned long __user *)addr, (unsigned long) ssp) == -1) + return -EFAULT; + + if (token_addr) + *token_addr = addr; + + return 0; +} + +static unsigned long allocate_shadow_stack(unsigned long addr, unsigned long size, + unsigned long token_offset, + bool set_tok) +{ + int flags = MAP_ANONYMOUS | MAP_PRIVATE; + struct mm_struct *mm = current->mm; + unsigned long populate, tok_loc = 0; + + if (addr) + flags |= MAP_FIXED_NOREPLACE; + + mmap_write_lock(mm); + addr = do_mmap(NULL, addr, size, PROT_READ, flags, + VM_SHADOW_STACK | VM_WRITE, 0, &populate, NULL); + mmap_write_unlock(mm); + + if (!set_tok || IS_ERR_VALUE(addr)) + goto out; + + if (create_rstor_token(addr + token_offset, &tok_loc)) { + vm_munmap(addr, size); + return -EINVAL; + } + + addr = tok_loc; + +out: + return addr; +} + +SYSCALL_DEFINE3(map_shadow_stack, unsigned long, addr, unsigned long, size, unsigned int, flags) +{ + bool set_tok = flags & SHADOW_STACK_SET_TOKEN; + unsigned long aligned_size = 0; + + if (!cpu_supports_shadow_stack()) + return -EOPNOTSUPP; + + /* Anything other than set token should result in invalid param */ + if (flags & ~SHADOW_STACK_SET_TOKEN) + return -EINVAL; + + /* + * Unlike other architectures, on RISC-V, SSP pointer is held in CSR_SSP and is available + * CSR in all modes. CSR accesses are performed using 12bit index programmed in instruction + * itself. This provides static property on register programming and writes to CSR can't + * be unintentional from programmer's perspective. As long as programmer has guarded areas + * which perform writes to CSR_SSP properly, shadow stack pivoting is not possible. Since + * CSR_SSP is writeable by user mode, it itself can setup a shadow stack token subsequent + * to allocation. Although in order to provide portablity with other architecture (because + * `map_shadow_stack` is arch agnostic syscall), RISC-V will follow expectation of a token + * flag in flags and if provided in flags, setup a token at the base. + */ + + /* If there isn't space for a token */ + if (set_tok && size < SHSTK_ENTRY_SIZE) + return -ENOSPC; + + if (addr && (addr & (PAGE_SIZE - 1))) + return -EINVAL; + + aligned_size = PAGE_ALIGN(size); + if (aligned_size < size) + return -EOVERFLOW; + + return allocate_shadow_stack(addr, aligned_size, size, set_tok); +} diff --git a/include/uapi/asm-generic/mman.h b/include/uapi/asm-generic/mman.h index 57e8195d0b53..9cfb3c1e337d 100644 --- a/include/uapi/asm-generic/mman.h +++ b/include/uapi/asm-generic/mman.h @@ -19,4 +19,8 @@ #define MCL_FUTURE 2 /* lock all future mappings */ #define MCL_ONFAULT 4 /* lock all pages that are faulted in */ +/* Set up a restore token in the shadow stack */ +#define SHADOW_STACK_SET_TOKEN (1ULL << 0) +/* Set up a top of stack marker in the shadow stack */ +#define SHADOW_STACK_SET_MARKER (1ULL << 1) #endif /* __ASM_GENERIC_MMAN_H */ From patchwork Tue Oct 1 16:06:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818419 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78303CEACE5 for ; Tue, 1 Oct 2024 16:07:50 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 7C5312800AB; Tue, 1 Oct 2024 12:07:47 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 77588280068; Tue, 1 Oct 2024 12:07:47 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 52AE22800AB; Tue, 1 Oct 2024 12:07:47 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id 37B5C280068 for ; Tue, 1 Oct 2024 12:07:47 -0400 (EDT) Received: from smtpin15.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay10.hostedemail.com (Postfix) with ESMTP id DAB9BC16C0 for ; Tue, 1 Oct 2024 16:07:46 +0000 (UTC) X-FDA: 82625514132.15.17FFF03 Received: from mail-pg1-f177.google.com (mail-pg1-f177.google.com [209.85.215.177]) by imf23.hostedemail.com (Postfix) with ESMTP id C3399140025 for ; Tue, 1 Oct 2024 16:07:44 +0000 (UTC) Authentication-Results: imf23.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=NY4xAAdT; spf=pass (imf23.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.177 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798737; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=E3GlOd8Ov2E91AYy3i1hZaaGWfKqnG3yxZ3XvXOxWoE=; b=0qcDi/Y1qWqmeYpjS+Lc4/uXOTFsOL6s56hyUdaSEZmS+ZiO/UIkV7Tet9Njl6eit5ApqK GgafqkkGV7xAWZH2n43g9rNmHCi0beEhzk8s/JrCVhhOVCgt4piaS0kOWLvfDCjHbD1Ny2 +FvzSjQmczaFxYm10UxXyZEstX/msHg= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798737; a=rsa-sha256; cv=none; b=Qcm81OWpUM5FnMMNPugDXQfFmEe170hYHcKFANB9an6zo+3iINMZj/55sKqF0gQJcMHBQa zPXqTVutKiYoZo9z32hQSoK7QLWDUWybfrusbTEVQvh7psD4yM1K+D9RqBFrXbvIZlAhX3 x/OuGJqxtXpp9lTTUGJQ9rJvgDCP4KU= ARC-Authentication-Results: i=1; imf23.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=NY4xAAdT; spf=pass (imf23.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.177 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none Received: by mail-pg1-f177.google.com with SMTP id 41be03b00d2f7-7db637d1e4eso4451144a12.2 for ; Tue, 01 Oct 2024 09:07:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798863; x=1728403663; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=E3GlOd8Ov2E91AYy3i1hZaaGWfKqnG3yxZ3XvXOxWoE=; b=NY4xAAdTOBeSSIiLtOOAvTGcbf8h7SQANgQe7RACUJ1IOBDC7kURgvFKvAwBPGV8Vt a8YBoFg5yUwKTZPg8YAIANBaWlW8gwHoVEakEMi10mxrAJwpiSoZymj1bwnCNCnyzaPK 5gY7yTxV+B7Tw6aQehu7adbIel93Y9FmPV4/QOrXCPtkZb4MB0C/iOSPiW6nYrfk6VZI b/ZCL+Lc3AxkLVP3c7uUHMsXB3B6ogc4lyZEu7uFBVBfwRLuWjNwJn6+vHO0KzmCUWnn WWqyJDco8gcUw3OlRUcIRZMaI5QXuY7pwrQyaxWoGdvUh2NbXOvqSINB98Y7V49DTdEu usMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798863; x=1728403663; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E3GlOd8Ov2E91AYy3i1hZaaGWfKqnG3yxZ3XvXOxWoE=; b=uoGnPF7EF3hZgDeIgM1dGU4K5LTx6Q3aa/0Zs8EGvm3k5X+hxvUO/BD9irkZCeR3Bo 4KvUp9DQzeHRCoVI6llbE1Su4Xb0gq2RxhOMQ78W5umlF7AIxiee1W84vQlxGr6eZWVZ KPXOnvlgKDxJVh+bmTiwQYVZcL/ZCRHBg+nu6Ujg1ADV/rYX0rWtV+WkeYAwHSp0rF67 fLcN+/CMIBKEg6dzMB7FqYywzn9+YdnQLrQfNpgXGVGqJywPvdHW+Mf0PabZEjjjVGid RRT9HFLP2V7QgcWbJxLeWuTViM6wgiOtKVW2JXOy+/a+8UFuoj4HysS11Rcu2NOlgQIz XisA== X-Forwarded-Encrypted: i=1; AJvYcCXyUfbTQPrzk3qQSp54qol2cIft1ag18ICXX4kGP6MQlv5hZml0o9cxJq4I//bVELPi+ITWWgF2sQ==@kvack.org X-Gm-Message-State: AOJu0Yy/6opQok4TAAfrisln1Aprb1yzJ0D3Oxyic4WnwhxLpYDwB+mb 6yRQ88neh3WZHp/MsuSRW5Bo7GgXT2afIFNbb9lmQo845UxNbRLPSegyZh3KuyI= X-Google-Smtp-Source: AGHT+IG7lBs6ctsFsy+kk1IoFVjO1Q9zNPRHxkrokl7oiRyQzOAQRUAIkQWeKTepDYJdk8jy7kxIyQ== X-Received: by 2002:a17:90b:b01:b0:2d8:8c82:10a with SMTP id 98e67ed59e1d1-2e184527fa1mr268601a91.5.1727798863215; Tue, 01 Oct 2024 09:07:43 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:42 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:21 -0700 Subject: [PATCH 16/33] riscv/shstk: If needed allocate a new shadow stack on clone MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-16-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspam-User: X-Rspamd-Server: rspam04 X-Rspamd-Queue-Id: C3399140025 X-Stat-Signature: 6agaxxpypihj1hprpd6pwbn6ya5iisa9 X-HE-Tag: 1727798864-697916 X-HE-Meta: U2FsdGVkX1/VjOT5J9UJRjW3Yzb/Cfc5smmqNdlyx0Km9BoutzoJxM+N202uckh2n6d8vkfB0dH7qb2SaOBLc7P2C2YoJ1aJjpn6VZKmlFJxQP3CXUaY/T53W4u38XVaxskOvX14dzC5s2cfaKJ4hq9tMtd8lT70CsFHPL+iNgy+AEciGZVeQOJ0+ubdEO1uJzSGVjETXQMbb0wJFHNYQF0uT93bHvYynl6DeDB+AZSzFR+2+K2pdGSgvA1NljQpVxbQqf/UeXqm80gneGqcTNxSevLwC0mxdr4UXPEJou87cftJimz5HE/1E0iwSEKjz4P34uPr/YBY7dbM3NxTpNEt6sdki296qq3w9GBaqT6MS3LLc3zPpVUBHx0nfePa61rSGjebovzQJyWpgKrLMmN5m5ZfDGIWH9on/Y58q8+cxQzdTDs6eBkrUNXX93VP32Z0Wmi/3ScGMxOcManubSeqM4USuQHOP3ZggGzyEfAR3YMwFXYfv4vRjjur3XvJIvWx5q3v/4clW/TgfTV9N+1VfH6fsIq9OI5OpF7L7ab8zlmktmXctYisD4G/mGeVzMWFs/Di60ni6Df0UhAivk7qjIKsalCRUpnsqnGZyXV11AXDjAwUQoKw9hwn0vO02nuK3O1ccHtrUnqYn4AzRUlMwM9XiAqO35/KKcdAIb15maZf9g5MyFajHZFOGuVRfxxNuwH2hbUimGGWFOtcwmgXqthtiTOMs5aGHNPwniO1DCPDRvJkEy3YZrnMFgiTDmPeVK3rqkuayqLWfFx2zjyi0Dtn9X6vr7BUj0fJN5zbLr5tc0NkDiO6ZG2UNW68CxQbokYoPFvFB1OFntxh6U4GiAHFlIAcbIVDdVAzMDnK1RaaqpAUNeqyR0/4yq+jmTRERJwdblSSkUNQOtny0ZadGCVGwXbXwsoP56zMBFEr2tQYpI/2vDUUUg3fqatVKjanf5JyXsFbGWWURbP ZIqx9faM rF1pCDRR+JnI7s1Hny2S8R9ME50uxRT7wXim+LZk+PPLu1PAh7pE9oO8cyk2Ap7zsUkc2PKurh0E3M18DmxHzE7C6xnrZsSoS5Bx2HY/Dk3VJELt0xzJ765UO1wrEX+7Uoyt5ALq9IpVrVpSiILPQxw0zkRQPB3OGaRfGrOu+2Vd7ico/epX2LPC5sAvrmK3wA8Fu1icEVQbdbIC1agrhFF3N3XF2CYF+kGnhtR6opVRf7fpfmwTueEFSWJ0Q3WbuJqT77dIfrGfxu+1EgT4ou9qBoNhxwHZhM9YDGPmgLE+1YCPqxK2+AbkgtybsWwZfY3Kr5vdqQDpFMLmvuDEblSfnj/GWEf+gI04kW/gVKdJGel0/3EHfIIbOoGDGhizdLRXlWNysGw/j3mIbp4SSuR59Qt9tgsqBAiGE4r+otb1Mxywd17o4lpqG0crUZx/hGKGMwwd5a77a79o= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Userspace specifies CLONE_VM to share address space and spawn new thread. `clone` allow userspace to specify a new stack for new thread. However there is no way to specify new shadow stack base address without changing API. This patch allocates a new shadow stack whenever CLONE_VM is given. In case of CLONE_VFORK, parent is suspended until child finishes and thus can child use parent shadow stack. In case of !CLONE_VM, COW kicks in because entire address space is copied from parent to child. `clone3` is extensible and can provide mechanisms using which shadow stack as an input parameter can be provided. This is not settled yet and being extensively discussed on mailing list. Once that's settled, this commit will adapt to that. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/usercfi.h | 25 ++++++++ arch/riscv/kernel/process.c | 11 +++- arch/riscv/kernel/usercfi.c | 121 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 156 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/usercfi.h b/arch/riscv/include/asm/usercfi.h index 4fa201b4fc4e..719e28e043c8 100644 --- a/arch/riscv/include/asm/usercfi.h +++ b/arch/riscv/include/asm/usercfi.h @@ -8,6 +8,9 @@ #ifndef __ASSEMBLY__ #include +struct task_struct; +struct kernel_clone_args; + #ifdef CONFIG_RISCV_USER_CFI struct cfi_status { unsigned long ubcfi_en : 1; /* Enable for backward cfi. */ @@ -17,6 +20,28 @@ struct cfi_status { unsigned long shdw_stk_size; /* size of shadow stack */ }; +unsigned long shstk_alloc_thread_stack(struct task_struct *tsk, + const struct kernel_clone_args *args); +void shstk_release(struct task_struct *tsk); +void set_shstk_base(struct task_struct *task, unsigned long shstk_addr, unsigned long size); +unsigned long get_shstk_base(struct task_struct *task, unsigned long *size); +void set_active_shstk(struct task_struct *task, unsigned long shstk_addr); +bool is_shstk_enabled(struct task_struct *task); + +#else + +#define shstk_alloc_thread_stack(tsk, args) 0 + +#define shstk_release(tsk) + +#define get_shstk_base(task, size) 0 + +#define set_shstk_base(task, shstk_addr, size) + +#define set_active_shstk(task, shstk_addr) + +#define is_shstk_enabled(task) false + #endif /* CONFIG_RISCV_USER_CFI */ #endif /* __ASSEMBLY__ */ diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 1f2574fb2edb..f6f58b1ed905 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -28,6 +28,7 @@ #include #include #include +#include #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_STACKPROTECTOR_PER_TASK) #include @@ -203,7 +204,7 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) void exit_thread(struct task_struct *tsk) { - + shstk_release(tsk); } int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) @@ -211,6 +212,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) unsigned long clone_flags = args->flags; unsigned long usp = args->stack; unsigned long tls = args->tls; + unsigned long ssp = 0; struct pt_regs *childregs = task_pt_regs(p); memset(&p->thread.s, 0, sizeof(p->thread.s)); @@ -225,11 +227,18 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) p->thread.s[0] = (unsigned long)args->fn; p->thread.s[1] = (unsigned long)args->fn_arg; } else { + /* allocate new shadow stack if needed. In case of CLONE_VM we have to */ + ssp = shstk_alloc_thread_stack(p, args); + if (IS_ERR_VALUE(ssp)) + return PTR_ERR((void *)ssp); + *childregs = *(current_pt_regs()); /* Turn off status.VS */ riscv_v_vstate_off(childregs); if (usp) /* User fork */ childregs->sp = usp; + /* if needed, set new ssp */ + ssp ? set_active_shstk(p, ssp) : 0; if (clone_flags & CLONE_SETTLS) childregs->tp = tls; childregs->a0 = 0; /* Return value of fork() */ diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c index ce002eabbdc1..7a7f0b57b2d4 100644 --- a/arch/riscv/kernel/usercfi.c +++ b/arch/riscv/kernel/usercfi.c @@ -19,6 +19,41 @@ #define SHSTK_ENTRY_SIZE sizeof(void *) +bool is_shstk_enabled(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.ubcfi_en ? true : false; +} + +void set_shstk_base(struct task_struct *task, unsigned long shstk_addr, unsigned long size) +{ + task->thread_info.user_cfi_state.shdw_stk_base = shstk_addr; + task->thread_info.user_cfi_state.shdw_stk_size = size; +} + +unsigned long get_shstk_base(struct task_struct *task, unsigned long *size) +{ + if (size) + *size = task->thread_info.user_cfi_state.shdw_stk_size; + return task->thread_info.user_cfi_state.shdw_stk_base; +} + +void set_active_shstk(struct task_struct *task, unsigned long shstk_addr) +{ + task->thread_info.user_cfi_state.user_shdw_stk = shstk_addr; +} + +/* + * If size is 0, then to be compatible with regular stack we want it to be as big as + * regular stack. Else PAGE_ALIGN it and return back + */ +static unsigned long calc_shstk_size(unsigned long size) +{ + if (size) + return PAGE_ALIGN(size); + + return PAGE_ALIGN(min_t(unsigned long long, rlimit(RLIMIT_STACK), SZ_4G)); +} + /* * Writes on shadow stack can either be `sspush` or `ssamoswap`. `sspush` can happen * implicitly on current shadow stack pointed to by CSR_SSP. `ssamoswap` takes pointer to @@ -143,3 +178,89 @@ SYSCALL_DEFINE3(map_shadow_stack, unsigned long, addr, unsigned long, size, unsi return allocate_shadow_stack(addr, aligned_size, size, set_tok); } + +/* + * This gets called during clone/clone3/fork. And is needed to allocate a shadow stack for + * cases where CLONE_VM is specified and thus a different stack is specified by user. We + * thus need a separate shadow stack too. How does separate shadow stack is specified by + * user is still being debated. Once that's settled, remove this part of the comment. + * This function simply returns 0 if shadow stack are not supported or if separate shadow + * stack allocation is not needed (like in case of !CLONE_VM) + */ +unsigned long shstk_alloc_thread_stack(struct task_struct *tsk, + const struct kernel_clone_args *args) +{ + unsigned long addr, size; + + /* If shadow stack is not supported, return 0 */ + if (!cpu_supports_shadow_stack()) + return 0; + + /* + * If shadow stack is not enabled on the new thread, skip any + * switch to a new shadow stack. + */ + if (is_shstk_enabled(tsk)) + return 0; + + /* + * For CLONE_VFORK the child will share the parents shadow stack. + * Set base = 0 and size = 0, this is special means to track this state + * so the freeing logic run for child knows to leave it alone. + */ + if (args->flags & CLONE_VFORK) { + set_shstk_base(tsk, 0, 0); + return 0; + } + + /* + * For !CLONE_VM the child will use a copy of the parents shadow + * stack. + */ + if (!(args->flags & CLONE_VM)) + return 0; + + /* + * reaching here means, CLONE_VM was specified and thus a separate shadow + * stack is needed for new cloned thread. Note: below allocation is happening + * using current mm. + */ + size = calc_shstk_size(args->stack_size); + addr = allocate_shadow_stack(0, size, 0, false); + if (IS_ERR_VALUE(addr)) + return addr; + + set_shstk_base(tsk, addr, size); + + return addr + size; +} + +void shstk_release(struct task_struct *tsk) +{ + unsigned long base = 0, size = 0; + /* If shadow stack is not supported or not enabled, nothing to release */ + if (!cpu_supports_shadow_stack() || + !is_shstk_enabled(tsk)) + return; + + /* + * When fork() with CLONE_VM fails, the child (tsk) already has a + * shadow stack allocated, and exit_thread() calls this function to + * free it. In this case the parent (current) and the child share + * the same mm struct. Move forward only when they're same. + */ + if (!tsk->mm || tsk->mm != current->mm) + return; + + /* + * We know shadow stack is enabled but if base is NULL, then + * this task is not managing its own shadow stack (CLONE_VFORK). So + * skip freeing it. + */ + base = get_shstk_base(tsk, &size); + if (!base) + return; + + vm_munmap(base, size); + set_shstk_base(tsk, 0, 0); +} From patchwork Tue Oct 1 16:06:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818420 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id B76B0CEACE4 for ; Tue, 1 Oct 2024 16:07:53 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id C343E2800AC; Tue, 1 Oct 2024 12:07:49 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id BE4C7280068; Tue, 1 Oct 2024 12:07:49 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id A10C72800AC; Tue, 1 Oct 2024 12:07:49 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0011.hostedemail.com [216.40.44.11]) by kanga.kvack.org (Postfix) with ESMTP id 7689B280068 for ; Tue, 1 Oct 2024 12:07:49 -0400 (EDT) Received: from smtpin06.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id 258CA161536 for ; Tue, 1 Oct 2024 16:07:49 +0000 (UTC) X-FDA: 82625514258.06.6455EF2 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) by imf24.hostedemail.com (Postfix) with ESMTP id 301FA180008 for ; Tue, 1 Oct 2024 16:07:46 +0000 (UTC) Authentication-Results: imf24.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=TAhvKiBt; spf=pass (imf24.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.175 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798739; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=x54qChiPtRwwjf8IO6kKG96mNjK0QKs021qHizpxCPM=; b=4gU1iZedBfPIUb7wArIEJYA8iACEfUKHUwJHEyEh3yhNZt6gjc5GhPQxwIxHsXcJ28J7qk gdSsLr46KN/6N8aofxU8qSEa4ak2ufV2WythHHe1pkFq97g09WWSAxhTp2c9ZSqX5+4voL LkPAwAcaAVM4MXcdvC20toWm/INmB74= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798739; a=rsa-sha256; cv=none; b=aAuFjKQ6cd6TbEcbGhD3IY/YFcrwL7YiQbxgljN5jbmj/MjtOr+mzQuWmgGjldZBxdi13c Z7+1I3FVIa6TgarlDLvPhYusxHY1s1P/+JmuKynGmHD7tDUh3sZBct3fu9CgKWguS/Ilpt L5ExftKBnDY4yH8X1A/gotggdCTMTHo= ARC-Authentication-Results: i=1; imf24.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=TAhvKiBt; spf=pass (imf24.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.175 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-208cf673b8dso58108095ad.3 for ; Tue, 01 Oct 2024 09:07:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798866; x=1728403666; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=x54qChiPtRwwjf8IO6kKG96mNjK0QKs021qHizpxCPM=; b=TAhvKiBtBkqD8a4GddUkFi2PZ7S95b0CZMCQ80RbmejCMEhxWIKfBauWIBgU8e9c49 2fByUPJDxHZTuBsH7h6vih5jG92j/G39bqZm+om+sodp3sXKK+6z+hOAvKW3iEWYO5Yy Tcn1RRP9qe20MXbUJJF4nOH//Oum2mSuNF9VGSs0HZK/1rg4BGnmJZQgfAhE/Rv9rP1h OYcZCui1//X5/x5+HvJ5IGmzf8Wbr4JTnpAu/XW2JNkbYNbjIooDXsFVlMWY6G42v8iQ je0YDtiuoZvkROikm6KmTLJdi3lN4jG3SB6WzLMVhkP1F3aj0HmWVwUeGGmcAsFNfQd/ g3Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798866; x=1728403666; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=x54qChiPtRwwjf8IO6kKG96mNjK0QKs021qHizpxCPM=; b=P8nRQlN3XZWvB9QDjxGP0iyuOYij8pLUN3ZapKzxE0H61pGhQ9Ng9JB+LcbbxkhFs9 U1C7Lh8hMerBFMZC7hNO+qI7jptv4jZVFeYlTeCWlnCVuDfc5Qk1ZTeMtnFcMO7bZYOl r93RvF4jocgYlKgJ1sIHa7eb09UKDAMsyOrWyxMOiuTWYOux63nkKHzqTMfv1vX1MD6G nGMZW71RA9GSMrWXhS/sMeHs+6/8/YwJcQfw/9Aj2h99zn3mGbZp6KINFNn6YLpbLxVL TXCjp4hhGukVayQUeizOMV9r+7EMxfy56b7NYrdL5hBloWAOI+jV92qXMt9Iaygtz+KB 1xsQ== X-Forwarded-Encrypted: i=1; AJvYcCU7d8X7rDsjBsmCnLI6PUxe2EsSapqcLSB5/9P520UHHIRNg9DOPt+FxHAVj4JoHF7ezRlgkIg+yw==@kvack.org X-Gm-Message-State: AOJu0YyMwdXxWW4xhTZ6k6LqpMftLhKcdWTHDLM/n34QPan3w4Swp4UW 9FFzU+vlgeukJS7kWqr3buy915wnAjFVSFakTj/3lkGiOSi/T3yHAwRp/8JVovM= X-Google-Smtp-Source: AGHT+IGT8RHr/5+JTQ0k1Ky88XH3Z10xIEYuIYmcsWYD4PFQgSTYOHCrvexQxCleek4Q7uoQPWRCCg== X-Received: by 2002:a17:90b:202:b0:2c8:6bfa:bbf1 with SMTP id 98e67ed59e1d1-2e1846e8b42mr242090a91.23.1727798865872; Tue, 01 Oct 2024 09:07:45 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:45 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:22 -0700 Subject: [PATCH 17/33] prctl: arch-agnostic prctl for shadow stack MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-17-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Stat-Signature: bbnzaonhiaq3qyrnc6tfypuck7fi74xb X-Rspamd-Queue-Id: 301FA180008 X-Rspam-User: X-Rspamd-Server: rspam08 X-HE-Tag: 1727798866-142347 X-HE-Meta: U2FsdGVkX18c57JwS4vbbFZVG+Lvyz1mGi11xkeFzj5UZEtNCNomWDYMWy6ytz1IptKz/suak/kXE/rC/u2PeSAf0laLsCZxOKWmghsyvZ+2zEj4Vl33rMTw/bz+LRtZ4DtRiI1K7hD+/j9xyoX7sPa3WTPRBbNSa6UtdwFr87hGDqR07djDWEFWjkJnJPiFCW4V+x+p5a8zywoXcqEASnwJzXtOM9yahyLX4Bf/HMApwZmoCT+ckawQo2Wn1RxqdRFzc08KQMIoDpRkWpGqE1j6lcDH4ybQOaaXRMrFhjgjFcErX+zdT6W75vllqsVuNem2MtffXjsDqjJdhB5fjoDqf6KmB6Vf3ODijA4H5HSo3slP8JE/aFAfPy7v5zX4ZlfriZJpLIl+DgoBqIcvfmJzwNzzGE5CTBOXr0wKHVjsd7vmiGuQRBozJ0o0boVX9VEYwVmZfbPKbcLk03e4TimCOYpOkDowoKsXIbPSZQlu0IFd1ObnU3F+GWh+QVSMpm00q2I/hUOpD3nIQ+cec+IyxJmRj9Bs9w7Yjw6UMJf9MTvp9dygqhKCN7f3ryB9l6fzj4Ajhs1Q0SKCul1ljQTj7h7P307khcsnDwO+tO7EmBAjph/E+N7/s9YTqJbxKywa86y4I5e73raGIi2Ge4XpwCxuBJ6OyhpOGdDvtTgj9RFc8o1XVHLn0TW8wW4J7bUS2hCH3aqP/D77/pIoN+Tr6HVq1AVokkPRkaLWW/ErtbwBnfP/Zor4An9KOkAzTxsWglMiCTVXlWBCQHnAiy2i89rY5E6z71tAhq6j4JVX90pjNrhCffFV2hvuQfpa3xxqAIfWhH1mQLFbQrzrBEEOBqr1Om5J/bItpeG7D6wCRgYhuPJfK/xAEivADUAJAbbLf0e5aJia5fsH7kWnTZVIhirg/3+3ANVqcaTDO19AzAgsHUBe/bv9pPktjiOPCT07/Gn89K7stl1RTj+ lXcfrK7K +XJZY3QMZ+XAD77LzatziyFtVqGS0DDeY9bBBnwzFdDh7yKOx9A4837IrNi11OBWlFhgrbD+W2yTeZS2HoxPkY104TqIwDTUI41H4NgeORCrobml9Na9e84AY0La7vGj9XakrBQOo8gIouSYOFbddY9D+EtK/C8+fwQhIrSjvz8EG1v/fGjUjDtPCa1odDw0iW2kuibp8C5qObohHQyd/45SHXrvoYofyvVdIYDoQk7c5sGraAxkQg4B8Gpw1kpf1FBxc8Rhd4Ye1sx6zdzYPW1vavauw+hgUavFEnpsnxKaZEIc5hW6ijg8jZVZ6uHkIs90TK20iDQ23olwjbdoFbHBstEaG4RQqKJRqxLy97Ix1tMhYzcr5GZcFmPKmck9+5VE7P5ZhiQIj3eQxNy+TGMYPFwj5/wQtjtPnlwJ/j3/O5eeUsMlumOXn9Fc/72FInV66279N6ow7eICuV05EpDm1pT9dW0KqnlLwGzbJ72rX59U= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Mark Brown Three architectures (x86, aarch64, riscv) have announced support for shadow stacks with fairly similar functionality. While x86 is using arch_prctl() to control the functionality neither arm64 nor riscv uses that interface so this patch adds arch-agnostic prctl() support to get and set status of shadow stacks and lock the current configuration to prevent further changes, with support for turning on and off individual subfeatures so applications can limit their exposure to features that they do not need. The features are: - PR_SHADOW_STACK_ENABLE: Tracking and enforcement of shadow stacks, including allocation of a shadow stack if one is not already allocated. - PR_SHADOW_STACK_WRITE: Writes to specific addresses in the shadow stack. - PR_SHADOW_STACK_PUSH: Push additional values onto the shadow stack. - PR_SHADOW_STACK_DISABLE: Allow to disable shadow stack. Note once locked, disable must fail. These features are expected to be inherited by new threads and cleared on exec(), unknown features should be rejected for enable but accepted for locking (in order to allow for future proofing). This is based on a patch originally written by Deepak Gupta but later modified by Mark Brown for arm's GCS patch series. Signed-off-by: Mark Brown Co-developed-by: Deepak Gupta --- include/linux/mm.h | 3 +++ include/uapi/linux/prctl.h | 21 +++++++++++++++++++++ kernel/sys.c | 30 ++++++++++++++++++++++++++++++ 3 files changed, 54 insertions(+) diff --git a/include/linux/mm.h b/include/linux/mm.h index 57533b9cae95..54e2b3f1cc30 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -4146,6 +4146,9 @@ static inline bool pfn_is_unaccepted_memory(unsigned long pfn) { return range_contains_unaccepted_memory(pfn << PAGE_SHIFT, PAGE_SIZE); } +int arch_get_shadow_stack_status(struct task_struct *t, unsigned long __user *status); +int arch_set_shadow_stack_status(struct task_struct *t, unsigned long status); +int arch_lock_shadow_stack_status(struct task_struct *t, unsigned long status); void vma_pgtable_walk_begin(struct vm_area_struct *vma); void vma_pgtable_walk_end(struct vm_area_struct *vma); diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h index 35791791a879..b8d7b6361754 100644 --- a/include/uapi/linux/prctl.h +++ b/include/uapi/linux/prctl.h @@ -327,5 +327,26 @@ struct prctl_mm_map { # define PR_PPC_DEXCR_CTRL_SET_ONEXEC 0x8 /* Set the aspect on exec */ # define PR_PPC_DEXCR_CTRL_CLEAR_ONEXEC 0x10 /* Clear the aspect on exec */ # define PR_PPC_DEXCR_CTRL_MASK 0x1f +/* + * Get the current shadow stack configuration for the current thread, + * this will be the value configured via PR_SET_SHADOW_STACK_STATUS. + */ +#define PR_GET_SHADOW_STACK_STATUS 74 + +/* + * Set the current shadow stack configuration. Enabling the shadow + * stack will cause a shadow stack to be allocated for the thread. + */ +#define PR_SET_SHADOW_STACK_STATUS 75 +# define PR_SHADOW_STACK_ENABLE (1UL << 0) +# define PR_SHADOW_STACK_WRITE (1UL << 1) +# define PR_SHADOW_STACK_PUSH (1UL << 2) + +/* + * Prevent further changes to the specified shadow stack + * configuration. All bits may be locked via this call, including + * undefined bits. + */ +#define PR_LOCK_SHADOW_STACK_STATUS 76 #endif /* _LINUX_PRCTL_H */ diff --git a/kernel/sys.c b/kernel/sys.c index 4da31f28fda8..3d38a9c7c5c9 100644 --- a/kernel/sys.c +++ b/kernel/sys.c @@ -2324,6 +2324,21 @@ int __weak arch_prctl_spec_ctrl_set(struct task_struct *t, unsigned long which, return -EINVAL; } +int __weak arch_get_shadow_stack_status(struct task_struct *t, unsigned long __user *status) +{ + return -EINVAL; +} + +int __weak arch_set_shadow_stack_status(struct task_struct *t, unsigned long status) +{ + return -EINVAL; +} + +int __weak arch_lock_shadow_stack_status(struct task_struct *t, unsigned long status) +{ + return -EINVAL; +} + #define PR_IO_FLUSHER (PF_MEMALLOC_NOIO | PF_LOCAL_THROTTLE) #ifdef CONFIG_ANON_VMA_NAME @@ -2784,6 +2799,21 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3, case PR_RISCV_SET_ICACHE_FLUSH_CTX: error = RISCV_SET_ICACHE_FLUSH_CTX(arg2, arg3); break; + case PR_GET_SHADOW_STACK_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_get_shadow_stack_status(me, (unsigned long __user *) arg2); + break; + case PR_SET_SHADOW_STACK_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_set_shadow_stack_status(me, arg2); + break; + case PR_LOCK_SHADOW_STACK_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_lock_shadow_stack_status(me, arg2); + break; default: error = -EINVAL; break; From patchwork Tue Oct 1 16:06:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818421 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 929CACEACE2 for ; Tue, 1 Oct 2024 16:07:56 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 46AA92800AD; Tue, 1 Oct 2024 12:07:52 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 3F106280068; Tue, 1 Oct 2024 12:07:52 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 279342800AD; Tue, 1 Oct 2024 12:07:52 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0017.hostedemail.com [216.40.44.17]) by kanga.kvack.org (Postfix) with ESMTP id 07E65280068 for ; Tue, 1 Oct 2024 12:07:52 -0400 (EDT) Received: from smtpin21.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id A650814164A for ; Tue, 1 Oct 2024 16:07:51 +0000 (UTC) X-FDA: 82625514342.21.F8BC491 Received: from mail-pj1-f45.google.com (mail-pj1-f45.google.com [209.85.216.45]) by imf07.hostedemail.com (Postfix) with ESMTP id A9AD44000B for ; Tue, 1 Oct 2024 16:07:49 +0000 (UTC) Authentication-Results: imf07.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b="rwPfGZ/j"; spf=pass (imf07.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.45 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798805; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=H2HJsBemoUtn69Y0WdrOXv10G4III+URyauyH8vTu7Q=; b=Yoj+KcDvWjgphMmMIAH/bI8OpGchs4eUevf58laEYJD/n7Aqtb6gr4UkQqawg0dlIlZ8Js bBsCS70iQFsXRqcS9K8jpra/hNURHpIKjGbHFpc18HDV4E+LWjBE3xTEu0e5mTTCyF6jTt jIZ45CWsBXTaHMxtafeExxm+h1U0C4o= ARC-Authentication-Results: i=1; imf07.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b="rwPfGZ/j"; spf=pass (imf07.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.45 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798805; a=rsa-sha256; cv=none; b=4vm6vmpZlak6di0EM6tjClyi6pcYDXOebESpn+7NGfgCiWe7TAiS80UJ+F6d05+tBN773U dktO0PVtpbZ6G4mUY6EmpQtkhVvRpAcYy+H0mK5G4YAlPLPOyBY8YooANYiTVeSYQJzfYF D3UD3kGVPUM7aBc+ZZVVA8aSV7IxWm4= Received: by mail-pj1-f45.google.com with SMTP id 98e67ed59e1d1-2e0a74ce880so4713263a91.2 for ; Tue, 01 Oct 2024 09:07:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798868; x=1728403668; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=H2HJsBemoUtn69Y0WdrOXv10G4III+URyauyH8vTu7Q=; b=rwPfGZ/jRoRBIzpDq6agiRLp4ZLas+UTgqYJBipvh4Zwn5jIsQE8Ps+7ArwcoyniMg WQJgaEvxwlcFH9EpPy6lcJ/+wmZhGe9UzrFKxpTvxyCxTCHe1hU7J2ZHwIiNd9m9LSk5 ipLcVXtyh7IVcj1hr0MjxTqDFYGA+4wHkE+S+6TvLBIeX8xj9E0uXFXUpF2viiFlwK4Y oegSo+Xyzkot6wKVeHrKxMSpMtXo85y1U7Fd5jepgYvOTpSBQvlWULUCfM1HlT5Q/3rK s/wBnI1Jau2v//jZSuYQRLopjyWeJCs+mRjAFEIatX46Lzyw7GJ8wYL31s4PI7l+TKpU p7Dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798868; x=1728403668; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H2HJsBemoUtn69Y0WdrOXv10G4III+URyauyH8vTu7Q=; b=q69OTX8ECObuHxmjDokd/RJCeMMUhaoYD4369elaO8URrew1t9nXfS/4vwYEscvWwz kFbAB+I18o+ody6oe3QthCdDp8WDyYGKVBS4jTINcI4MymlXRj35cO94RwEx4r1mSRmy HsFD6RTFYzxW8WSNIz5u8g0KcdqjfTusx43m/UjTyvgBClUFIWohVy7Oh+ueyAi//gLl h2wEHoKIw4QyhzFkXsv9kVW+TZXmm/Ie7U7VKZDRcEwZBZ/v4TP+q43RI4JSnrADVUio NBORFzD0BYPd8plKUYPFo6gy4nqX1DxkHoCbJnEFuywjw/x1ZucYi9yG01aGLzGNw/iW ew0A== X-Forwarded-Encrypted: i=1; AJvYcCXiw0IgObgc4MIm7HsFiwvJWtn1+0y7z/eGyZwU9GMFgWUU5VPeBSTcyJx58almJbVaQ7LLxGwiFA==@kvack.org X-Gm-Message-State: AOJu0Yw2A3jEs6HzQF3hwHOR9x7dOenL0g7RXuskc0gRxbbGCi2Pm+qQ 8ahYZ4n6MgpviJPaINOVBj53O+sMi5Rb/aWUiYAn+m29VK0+Eesg6pqUOw8KCAQ= X-Google-Smtp-Source: AGHT+IG/EuwLCJ5ek8hZ682jK7/6tHbqD7eXr2/zTzT5MNNxDUUjwKwk585MabgGJfxQ3+R1brRGfA== X-Received: by 2002:a17:90b:4c08:b0:2d8:efd1:22e4 with SMTP id 98e67ed59e1d1-2e18490a1d6mr215145a91.26.1727798868454; Tue, 01 Oct 2024 09:07:48 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:48 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:23 -0700 Subject: [PATCH 18/33] prctl: arch-agnostic prctl for indirect branch tracking MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-18-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam03 X-Rspam-User: X-Rspamd-Queue-Id: A9AD44000B X-Stat-Signature: tz7oma8smtazomxa8qzb6oti4iym6pz7 X-HE-Tag: 1727798869-296583 X-HE-Meta: U2FsdGVkX1/dRqQ5JxhRtDpWqlAQpgn4gqhZqjefrh3x2LeHp8wFJ2wpE81d8tksTMa3H3fEUcgRAtlI2sdhGGlZhzHF0lboJD6SQPppeDk2DdiFo51YwUw4jQWtLpZOavzSCPyllF/1R6JRHYH83zjM6Wql98w+Mr8+y241R84rWyzNIVTs3VR9HqQRkdwSncRMoJgruXm0jDCgoNLwJu00qHeODoMH1aj9SAyg0ZGgui9Xgt1nYNgQYzPHmln/acrfQyuBPuOcOG0EtICpJJLOb1Jkv02GsvTcaM7FXFrYgqZxgzLtRpPWNnpb9lZyKMjSpG+zMz/Lqrf3LWbLfzI37zIyNxszKcAQWWtEfRPinufWWME09zXJyxf/YsA9pdlrdRxzRkLLX0z62smKZ2gMbSlz3Z/UGFfF9FM7TAtwAQRoHbLCqDI6N8QiIuP0EHHpRncdd2IvMKYQ15xXL3qHFUQWCB9U4k2ULRe102WEjF0UKzL76WCaQ4Hu8UG/f7eYgg1y5dyEpO2KOvGK3u1HH/FhGB8MxmjjM0JQf+3LdKaJnn3ozqEEn8eFDPGLBvRrgYg0qX1eWLC0FsWIcd0yiowQs0IUZjObEI33XxralLGHX97i2Imr/uBvBAdGrHBF1vO2QQ7/2/a2Ioxmj3Wke6iPU7ex9maOCrj7oIKVB02Mk7pJrwi4Sa9UOaQW1HWyMKaVzW9/9Zf27Xpz4NgZM7YdGDfY4TV+Zxw1kY+nz4U2VYCGuSiWwQh4zf8jUttvyikqmEDjm0944AFfSg04pjMos6ia/xh7Nz4iFWOcMouSxvoSkoOrlgK2tScugLbdiy2Sr+DFVWGoz9Ka8ZhRmfUT0x+H56KZ75iDCMqXEbwYzEGjsnnL6+A/1vOw6paPCmr+pe6hFVs9diqWlD6nOXh6lTSadYEzPgHFZ4Lng02HdLZ2kAwnT2wecy5FzLvvFztIpgzeJ0e/DO7 vLEzQxXf I1OPTgMpUo0iZucU25r51DJZZSsNBEW6zHgtRjat4F77HlioZUDmGPT4che27GADiN0Fhw5Uox7SYqZkD9T9VORAWFf60WT16XIHN0Af/bEPEXg9DwuxQv5suWwlZmS21/z3OAWaPlXonkOWulYwQH5eLWT7W/Pmi4eeUYv/Kk6vieenZLz3J53YmpI/RlH0bzz+ANUoZT7aTjZkM7tBy57qRQWH4dxeLpyP1hVBqFwnyGlptpxi/sW1t1VCdXr1A7o3lLvi94oSnNcgJ7bf6/4n0l9ILAYeW0AVjszziergx/IFbW8TmVcIDzv2GRMcoOM8ZOJZbI3gPXsIMIcSNtljyTCkz0EzNyrzRdVBKLPC46uVjdKOLW0c/LTvHi/YkgTV64H3J4sKfRWXAKpm6YywZd9LqQr5xvT+lD64zhuFqbsxxvNkETqG5UW3JM9G41vSMRdbPuFo/4ih/ov2Mrp4wyQ== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Three architectures (x86, aarch64, riscv) have support for indirect branch tracking feature in a very similar fashion. On a very high level, indirect branch tracking is a CPU feature where CPU tracks branches which uses memory operand to perform control transfer in program. As part of this tracking on indirect branches, CPU goes in a state where it expects a landing pad instr on target and if not found then CPU raises some fault (architecture dependent) x86 landing pad instr - `ENDBRANCH` aarch64 landing pad instr - `BTI` riscv landing instr - `lpad` Given that three major arches have support for indirect branch tracking, This patch makes `prctl` for indirect branch tracking arch agnostic. To allow userspace to enable this feature for itself, following prtcls are defined: - PR_GET_INDIR_BR_LP_STATUS: Gets current configured status for indirect branch tracking. - PR_SET_INDIR_BR_LP_STATUS: Sets a configuration for indirect branch tracking. Following status options are allowed - PR_INDIR_BR_LP_ENABLE: Enables indirect branch tracking on user thread. - PR_INDIR_BR_LP_DISABLE; Disables indirect branch tracking on user thread. - PR_LOCK_INDIR_BR_LP_STATUS: Locks configured status for indirect branch tracking for user thread. Signed-off-by: Deepak Gupta --- include/linux/cpu.h | 4 ++++ include/uapi/linux/prctl.h | 27 +++++++++++++++++++++++++++ kernel/sys.c | 30 ++++++++++++++++++++++++++++++ 3 files changed, 61 insertions(+) diff --git a/include/linux/cpu.h b/include/linux/cpu.h index bdcec1732445..eff56aae05d7 100644 --- a/include/linux/cpu.h +++ b/include/linux/cpu.h @@ -203,4 +203,8 @@ static inline bool cpu_mitigations_auto_nosmt(void) } #endif +int arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status); +int arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status); +int arch_lock_indir_br_lp_status(struct task_struct *t, unsigned long status); + #endif /* _LINUX_CPU_H_ */ diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h index b8d7b6361754..41ffb53490a4 100644 --- a/include/uapi/linux/prctl.h +++ b/include/uapi/linux/prctl.h @@ -349,4 +349,31 @@ struct prctl_mm_map { */ #define PR_LOCK_SHADOW_STACK_STATUS 76 +/* + * Get the current indirect branch tracking configuration for the current + * thread, this will be the value configured via PR_SET_INDIR_BR_LP_STATUS. + */ +#define PR_GET_INDIR_BR_LP_STATUS 77 + +/* + * Set the indirect branch tracking configuration. PR_INDIR_BR_LP_ENABLE will + * enable cpu feature for user thread, to track all indirect branches and ensure + * they land on arch defined landing pad instruction. + * x86 - If enabled, an indirect branch must land on `ENDBRANCH` instruction. + * arch64 - If enabled, an indirect branch must land on `BTI` instruction. + * riscv - If enabled, an indirect branch must land on `lpad` instruction. + * PR_INDIR_BR_LP_DISABLE will disable feature for user thread and indirect + * branches will no more be tracked by cpu to land on arch defined landing pad + * instruction. + */ +#define PR_SET_INDIR_BR_LP_STATUS 78 +# define PR_INDIR_BR_LP_ENABLE (1UL << 0) + +/* + * Prevent further changes to the specified indirect branch tracking + * configuration. All bits may be locked via this call, including + * undefined bits. + */ +#define PR_LOCK_INDIR_BR_LP_STATUS 79 + #endif /* _LINUX_PRCTL_H */ diff --git a/kernel/sys.c b/kernel/sys.c index 3d38a9c7c5c9..dafa31485584 100644 --- a/kernel/sys.c +++ b/kernel/sys.c @@ -2339,6 +2339,21 @@ int __weak arch_lock_shadow_stack_status(struct task_struct *t, unsigned long st return -EINVAL; } +int __weak arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status) +{ + return -EINVAL; +} + +int __weak arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status) +{ + return -EINVAL; +} + +int __weak arch_lock_indir_br_lp_status(struct task_struct *t, unsigned long status) +{ + return -EINVAL; +} + #define PR_IO_FLUSHER (PF_MEMALLOC_NOIO | PF_LOCAL_THROTTLE) #ifdef CONFIG_ANON_VMA_NAME @@ -2814,6 +2829,21 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3, return -EINVAL; error = arch_lock_shadow_stack_status(me, arg2); break; + case PR_GET_INDIR_BR_LP_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_get_indir_br_lp_status(me, (unsigned long __user *) arg2); + break; + case PR_SET_INDIR_BR_LP_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_set_indir_br_lp_status(me, arg2); + break; + case PR_LOCK_INDIR_BR_LP_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_lock_indir_br_lp_status(me, arg2); + break; default: error = -EINVAL; break; From patchwork Tue Oct 1 16:06:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818422 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81F27CEACE4 for ; Tue, 1 Oct 2024 16:07:59 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id DB8382800AE; Tue, 1 Oct 2024 12:07:54 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id D6889280068; Tue, 1 Oct 2024 12:07:54 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id BBAFD2800AE; Tue, 1 Oct 2024 12:07:54 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id 9977C280068 for ; Tue, 1 Oct 2024 12:07:54 -0400 (EDT) Received: from smtpin07.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay01.hostedemail.com (Postfix) with ESMTP id 5F4C81C73ED for ; Tue, 1 Oct 2024 16:07:54 +0000 (UTC) X-FDA: 82625514468.07.400F16D Received: from mail-pj1-f43.google.com (mail-pj1-f43.google.com [209.85.216.43]) by imf05.hostedemail.com (Postfix) with ESMTP id 5FA15100016 for ; Tue, 1 Oct 2024 16:07:52 +0000 (UTC) Authentication-Results: imf05.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=YTyRvbno; spf=pass (imf05.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.43 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798744; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=NXAvbRYD1Q1ho1rLmqewAH55Q8KmYmnFeXkf6c6XC6M=; b=ZjpWYvEZDg4qomojx/fqIZm4XGgnS2i9jxrfa0DVshhoLjWOtOIFGjlUWZTSDtCTgNNjIp VZISnEWIfaIsSmiqFrnE68QRmpibeHTAZxs3/RVDBHHy01cAltunBabSWHPtpRzCVPd1S+ YOaSAxardAiWczLuk4eZewuXJfpY6gc= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798744; a=rsa-sha256; cv=none; b=H+wRg2MQG3XYuvou+QKDQodxnYcSCXekTpYhd6wSmob1NEw4vhVgb1jZVgt7bForrfkqt7 w0YPWNc/b91ZeGZlkt7NOK8cx8MqBqwHdDN6jL4HVtP/35XQsrLdhSnydoxFBrRS3ONIko Gzj0lhsSyUk+oDMYXUD4SwXo0rubT64= ARC-Authentication-Results: i=1; imf05.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=YTyRvbno; spf=pass (imf05.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.43 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none Received: by mail-pj1-f43.google.com with SMTP id 98e67ed59e1d1-2e09f67bc39so4696528a91.1 for ; Tue, 01 Oct 2024 09:07:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798871; x=1728403671; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=NXAvbRYD1Q1ho1rLmqewAH55Q8KmYmnFeXkf6c6XC6M=; b=YTyRvbno3aF+/rxLSR7HFhs+h0dptPEcGjgU5cTQcmTO4cPvTbTnef9L6SUIygdrWw /OjnobE+LHniZlIzZagTtXyIDbwwv98u3+wR3Mf4iWURjsDdBAHecgWYq/iI4vie1Jrz FMFmp3lHj4wt8q816Rc11DOvPEzo4Qf2biNtjDFj0PubjEP4D6D1Rclt7rESkDw7/swI Tm7BT3WqdPVfjRYX2kenRYEknI6GvKM75n5njziguZwEK1T8iPP+FKq8Z/VrpyqAx8h4 9IBMN/mhtZKLFYePkQmBvfjo5Ib1vmUas8tBR9a9qu2ML1DNYpi9/e2UU0JyrBUiJXpX jEaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798871; x=1728403671; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NXAvbRYD1Q1ho1rLmqewAH55Q8KmYmnFeXkf6c6XC6M=; b=Y8RFfYbG47DGw9y8UWVUE5QWRvLW+V95gzKl4ThMo4gLF0IqkTcSxcz9nWlJptCan3 8a3Ktas+xv2gBQ/5xsWXwzmY7eqZkkXD0FQ9LFsifaecQJWtDNJ+HPdgpc0huU6PPW7K OOgSXDieAepWZVN9TzzQqq7i2GyN2C1p6rWPNwpGzsX0WsVG3S2zv1Wf688Em0H9+sNf qSRMY0HzEQ4LG8StQEzIIJ3yLtgK+cpug34w8tCXiNQBaICIJ+DcSR+x+m7dbEL+UJHx onQPLfvSXSPeG7TyAnYWn+b4oN5rMP7Y6iOtovVJU7xZtFrzpXQ44GadZuuPy+LgCP62 hh8Q== X-Forwarded-Encrypted: i=1; AJvYcCU6yLdtj9+dlp434I2kTJ5coEVNbVatrvsZpmXCK5wqKXjzX9S9sGdYlpV5bnfvUkfWJyExW+YQvw==@kvack.org X-Gm-Message-State: AOJu0Yx8LtBaLQEkrptthMXRQt7Han0yk+Zk8j2zcw9zHyOLU7CfW67f dmUlnI49r8nyilRXwULUEfH85UDjOQ4Et9kkzzOmqUeV9JCjZuoDEpwAGzkcNvw= X-Google-Smtp-Source: AGHT+IEdFiTPZh83JuVojwJkJAxLnQhFX7Kjf5puPeQo/q6uacYSkkP+0Jjd72vQ2I4kXed1EqwuJg== X-Received: by 2002:a17:90b:224c:b0:2d8:8808:5154 with SMTP id 98e67ed59e1d1-2e1849eca9amr165298a91.40.1727798871001; Tue, 01 Oct 2024 09:07:51 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:50 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:24 -0700 Subject: [PATCH 19/33] riscv: Implements arch agnostic shadow stack prctls MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-19-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Stat-Signature: a4s94ffkhrcm65gj6dhahg147br6c373 X-Rspamd-Queue-Id: 5FA15100016 X-Rspam-User: X-Rspamd-Server: rspam08 X-HE-Tag: 1727798872-468645 X-HE-Meta: U2FsdGVkX19DYgLSHH3rQbbTXZ4SBplvFQfAjMU4FQKWWYT0Ivf4Y1PBdZdKw5ujUMMQXIhQJSDVPxnAVSNNunK2Afp/FcehNNHZKlDs95oIjASND1bH5LpGpd9//VDgYYJgFaZ0BgzS9hz5tPIo1MPutWB2YLo6ceNiEwdSlS/s56d8PKifPJ1+uQEyuUaz+Ai/6678td6EmTSHcOzQ4ZYiWYdRSo0QY1syACeZ+HQW/A+ErIsyzBJnro3/yyrbN/7k0m8cHTo+MJUx3ySRR69a9cK9jsofjTctPHzq1wVouBPRSjCLQRH20rkpQbDylLVRUIx426pcNATA2HSGP/Cc3QN5mteXbx/0el134Yp1KuI3sQz1CtI7qBaWPDKNWTTuIitRt+FW00q4V8qgb5ttBdk9Xk+zZtho0l10l9ChQqIMTrpf67DtnuwfwyVQO4XJK+lSZgMQMvCdnzK0qUMM0nqVDLYUhW+RHkNHAhO05PjBF7GSkaCQ4LJXJEGqDXI7m+becYQHGV9O4l8yC3oL7V38ygI9QEqLrpA7G8si8tJLzL5dn06rvlOMGbh5z/EHPHB5FDP1qZFTPLkx7zGfVSABzfV3UYme2B2SA1vJycXeSlzTK1JIEnwdrJ9FfwfMDrmGCB0zHEvNe/hVCPOczl+HqQCb0hIcZ9o0pfTTB6CUvdYgTpps4memNWQg5kBuxZlelHRXl58mFSWgm+Ml9oxOCHdvxqOexCarxHzfPcYVL5PCDooF8GzuOaJrBiG1JYARikvxXByuaMQqm4eCBMIcjs0WrRp1HSs9nG9TRyBygSeAT92KBtwBL2+wM26mwUKXTmbCr9eAua2SSntVd0DZQGma7bJtxOBqT0ldDOwSLTkrLd4w9z7z5LixB65sINsarsovZeNBlMs2jC4privpGxAJiuiu+chxmuFhzrDIQNDJR+xW+7OiRe+xY8cUa0zH8ezQ07T+ZOA AP1mMIti hk3WCLEJB6J/OvHxxGZ9tPEIO+tqPXz9SaHPbo633RGerJh8Mx3+AXe+WMaNBZv9g7mOcQo8D2Zku+U+59ovqC/jAOVP4SBS0f/1VpneCeEolM3ol295HjAlKFxwPWdw87bskRy7a4bV4BwZz2ti/fbbH0PZuAVmrMX9U7wx24I3TYwAFyWB8zjTW8Ftr/LICY1ehUoUMJiydxrQxbJbqmDxNO67M7HzzO4nl3M5OBrK/kDuWRfEdLqSszaA9JzxGVosGyIhcYFDZ8romm7pqs33/l6gIchXXwK6SW5jESuOoDvxjAFb6Cb3TWDBizJ+/p96amj6bX/9m5oHheeL/HYrWwWeXldaxdQzwLhMan/94UDud/ea2iMEN+8myJ0T4s3x8lhqB1GA+V664lLD9fr6JGjCr57Uc0HeWRajViHo4H3dctmevQY2IllMMikaeSLNokckD7jDF/7w= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Implement architecture agnostic prctls() interface for setting and getting shadow stack status. prctls implemented are PR_GET_SHADOW_STACK_STATUS, PR_SET_SHADOW_STACK_STATUS and PR_LOCK_SHADOW_STACK_STATUS. As part of PR_SET_SHADOW_STACK_STATUS/PR_GET_SHADOW_STACK_STATUS, only PR_SHADOW_STACK_ENABLE is implemented because RISCV allows each mode to write to their own shadow stack using `sspush` or `ssamoswap`. PR_LOCK_SHADOW_STACK_STATUS locks current configuration of shadow stack enabling. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/usercfi.h | 18 ++++++- arch/riscv/kernel/process.c | 8 +++ arch/riscv/kernel/usercfi.c | 107 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 132 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/usercfi.h b/arch/riscv/include/asm/usercfi.h index 719e28e043c8..52850a2c79cf 100644 --- a/arch/riscv/include/asm/usercfi.h +++ b/arch/riscv/include/asm/usercfi.h @@ -7,6 +7,7 @@ #ifndef __ASSEMBLY__ #include +#include struct task_struct; struct kernel_clone_args; @@ -14,7 +15,8 @@ struct kernel_clone_args; #ifdef CONFIG_RISCV_USER_CFI struct cfi_status { unsigned long ubcfi_en : 1; /* Enable for backward cfi. */ - unsigned long rsvd : ((sizeof(unsigned long)*8) - 1); + unsigned long ubcfi_locked : 1; + unsigned long rsvd : ((sizeof(unsigned long)*8) - 2); unsigned long user_shdw_stk; /* Current user shadow stack pointer */ unsigned long shdw_stk_base; /* Base address of shadow stack */ unsigned long shdw_stk_size; /* size of shadow stack */ @@ -27,6 +29,12 @@ void set_shstk_base(struct task_struct *task, unsigned long shstk_addr, unsigned unsigned long get_shstk_base(struct task_struct *task, unsigned long *size); void set_active_shstk(struct task_struct *task, unsigned long shstk_addr); bool is_shstk_enabled(struct task_struct *task); +bool is_shstk_locked(struct task_struct *task); +bool is_shstk_allocated(struct task_struct *task); +void set_shstk_lock(struct task_struct *task); +void set_shstk_status(struct task_struct *task, bool enable); + +#define PR_SHADOW_STACK_SUPPORTED_STATUS_MASK (PR_SHADOW_STACK_ENABLE) #else @@ -42,6 +50,14 @@ bool is_shstk_enabled(struct task_struct *task); #define is_shstk_enabled(task) false +#define is_shstk_locked(task) false + +#define is_shstk_allocated(task) false + +#define set_shstk_lock(task) + +#define set_shstk_status(task, enable) + #endif /* CONFIG_RISCV_USER_CFI */ #endif /* __ASSEMBLY__ */ diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index f6f58b1ed905..f7dec532657f 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -152,6 +152,14 @@ void start_thread(struct pt_regs *regs, unsigned long pc, regs->epc = pc; regs->sp = sp; + /* + * clear shadow stack state on exec. + * libc will set it later via prctl. + */ + set_shstk_status(current, false); + set_shstk_base(current, 0, 0); + set_active_shstk(current, 0); + #ifdef CONFIG_64BIT regs->status &= ~SR_UXL; diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c index 7a7f0b57b2d4..c77abe552c88 100644 --- a/arch/riscv/kernel/usercfi.c +++ b/arch/riscv/kernel/usercfi.c @@ -24,6 +24,16 @@ bool is_shstk_enabled(struct task_struct *task) return task->thread_info.user_cfi_state.ubcfi_en ? true : false; } +bool is_shstk_allocated(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.shdw_stk_base ? true : false; +} + +bool is_shstk_locked(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.ubcfi_locked ? true : false; +} + void set_shstk_base(struct task_struct *task, unsigned long shstk_addr, unsigned long size) { task->thread_info.user_cfi_state.shdw_stk_base = shstk_addr; @@ -42,6 +52,23 @@ void set_active_shstk(struct task_struct *task, unsigned long shstk_addr) task->thread_info.user_cfi_state.user_shdw_stk = shstk_addr; } +void set_shstk_status(struct task_struct *task, bool enable) +{ + task->thread_info.user_cfi_state.ubcfi_en = enable ? 1 : 0; + + if (enable) + task->thread_info.envcfg |= ENVCFG_SSE; + else + task->thread_info.envcfg &= ~ENVCFG_SSE; + + csr_write(CSR_ENVCFG, task->thread_info.envcfg); +} + +void set_shstk_lock(struct task_struct *task) +{ + task->thread_info.user_cfi_state.ubcfi_locked = 1; +} + /* * If size is 0, then to be compatible with regular stack we want it to be as big as * regular stack. Else PAGE_ALIGN it and return back @@ -264,3 +291,83 @@ void shstk_release(struct task_struct *tsk) vm_munmap(base, size); set_shstk_base(tsk, 0, 0); } + +int arch_get_shadow_stack_status(struct task_struct *t, unsigned long __user *status) +{ + unsigned long bcfi_status = 0; + + if (!cpu_supports_shadow_stack()) + return -EINVAL; + + /* this means shadow stack is enabled on the task */ + bcfi_status |= (is_shstk_enabled(t) ? PR_SHADOW_STACK_ENABLE : 0); + + return copy_to_user(status, &bcfi_status, sizeof(bcfi_status)) ? -EFAULT : 0; +} + +int arch_set_shadow_stack_status(struct task_struct *t, unsigned long status) +{ + unsigned long size = 0, addr = 0; + bool enable_shstk = false; + + if (!cpu_supports_shadow_stack()) + return -EINVAL; + + /* Reject unknown flags */ + if (status & ~PR_SHADOW_STACK_SUPPORTED_STATUS_MASK) + return -EINVAL; + + /* bcfi status is locked and further can't be modified by user */ + if (is_shstk_locked(t)) + return -EINVAL; + + enable_shstk = status & PR_SHADOW_STACK_ENABLE; + /* Request is to enable shadow stack and shadow stack is not enabled already */ + if (enable_shstk && !is_shstk_enabled(t)) { + /* shadow stack was allocated and enable request again + * no need to support such usecase and return EINVAL. + */ + if (is_shstk_allocated(t)) + return -EINVAL; + + size = calc_shstk_size(0); + addr = allocate_shadow_stack(0, size, 0, false); + if (IS_ERR_VALUE(addr)) + return -ENOMEM; + set_shstk_base(t, addr, size); + set_active_shstk(t, addr + size); + } + + /* + * If a request to disable shadow stack happens, let's go ahead and release it + * Although, if CLONE_VFORKed child did this, then in that case we will end up + * not releasing the shadow stack (because it might be needed in parent). Although + * we will disable it for VFORKed child. And if VFORKed child tries to enable again + * then in that case, it'll get entirely new shadow stack because following condition + * are true + * - shadow stack was not enabled for vforked child + * - shadow stack base was anyways pointing to 0 + * This shouldn't be a big issue because we want parent to have availability of shadow + * stack whenever VFORKed child releases resources via exit or exec but at the same + * time we want VFORKed child to break away and establish new shadow stack if it desires + * + */ + if (!enable_shstk) + shstk_release(t); + + set_shstk_status(t, enable_shstk); + return 0; +} + +int arch_lock_shadow_stack_status(struct task_struct *task, + unsigned long arg) +{ + /* If shtstk not supported or not enabled on task, nothing to lock here */ + if (!cpu_supports_shadow_stack() || + !is_shstk_enabled(task)) + return -EINVAL; + + set_shstk_lock(task); + + return 0; +} From patchwork Tue Oct 1 16:06:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EFBBCEACE6 for ; Tue, 1 Oct 2024 16:08:02 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 57CB82800AF; Tue, 1 Oct 2024 12:07:57 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 52B08280068; Tue, 1 Oct 2024 12:07:57 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 3A5982800AF; Tue, 1 Oct 2024 12:07:57 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0011.hostedemail.com [216.40.44.11]) by kanga.kvack.org (Postfix) with ESMTP id 1AAB4280068 for ; Tue, 1 Oct 2024 12:07:57 -0400 (EDT) Received: from smtpin09.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay02.hostedemail.com (Postfix) with ESMTP id D1A2D120987 for ; Tue, 1 Oct 2024 16:07:56 +0000 (UTC) X-FDA: 82625514552.09.F09D764 Received: from mail-pl1-f178.google.com (mail-pl1-f178.google.com [209.85.214.178]) by imf30.hostedemail.com (Postfix) with ESMTP id E26A68001E for ; Tue, 1 Oct 2024 16:07:54 +0000 (UTC) Authentication-Results: imf30.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=uG8JjQB1; spf=pass (imf30.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.178 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798810; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=e4AKuiCs3Aazx3zZ4gronWWRoWNo1vI/JmIpgYsg8Jw=; b=di5Cadhx7+DXfl9A+Q7TEskZBQlWaS9gzjJSfh/FNPauK8ofDFPugqGl3lVUH7xzmSTxV4 t9ph027WpqAURA6hcAxvBEWarcGitrNQtd9LzyfXz4tafhhJ2TBTPwSj8S8l+814j6J2Rt qA3fvE76WTQInUdJL4+wIKUxlaWc0IE= ARC-Authentication-Results: i=1; imf30.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=uG8JjQB1; spf=pass (imf30.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.178 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798810; a=rsa-sha256; cv=none; b=nxx7E0c3dw4OE0xg5f5cDzSvRhviTTwKGpqiTY7XKsvGBsE6lP/sVgpatJjBkAT3WIcYsu 02UopH8xap6ppp3YZ1Nl/d4HJyl0rTHd9TM7z3+Kgh17LhoB9JRa2SwMf814IJS9KYdi4e qa9ziIP6ribvKjnunyu6K+hoAU0b/pA= Received: by mail-pl1-f178.google.com with SMTP id d9443c01a7336-20b90ab6c19so22638405ad.0 for ; Tue, 01 Oct 2024 09:07:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798874; x=1728403674; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=e4AKuiCs3Aazx3zZ4gronWWRoWNo1vI/JmIpgYsg8Jw=; b=uG8JjQB1qxIgLTwKjlWRkGPgI+KUb1M/o6WFL7HWQxk641BKI3D0qH7h8RJi9bBaxb jB6mPgCIillxd/6BN1ETgEyCJ701A5yld7NJaw+x652hJwX+ENWW+JOlbXydsuWDR16x yUHKs00cUaGlPToxHyJohinJSPT6ivK3TW1t3ATbEoAK6G8Y6IudKyUwaz/wEQM8UrFe qeQCPKmDttqW2DzyZNoFNBCuLkL+5LDDB+vVa7nO/H0UOHG4v6FuUSfIbDUQaJsUJZGl FPRiNywMwTk1Iik/8wJ1tNVaClVpzOHLE4CIL/mDAEbioHyBek2KxgkJ0SD47HdlHTDY vtEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798874; x=1728403674; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e4AKuiCs3Aazx3zZ4gronWWRoWNo1vI/JmIpgYsg8Jw=; b=g3uTWs7/GBAOAiXjm6rBex9BBU4WLmQldIjZRPl8122yv994j1ZeZ9bzKeSXoUfSaA GLeSApa7uObXrsb9nGx9IUVHZwCegIVC9aURHi+dbdZMydM1f6C8kuDEfxTqe7Ob33OQ EpIcsgH8f0346jTSdqadjEnXSmFlizxuiQZBsaH3RNdH31y6QCWawSVt9GzUG7slnf9t ZnP20i2rH5ru5cxVMUox8Mg/vCyDe5HrMFbuCO3Di8cZyQklzcJ56Dd3C4VPdLWdnhy2 3WL388qgBaWtqIhceuVoC/+asYX+6MVsQpMY8ivdji/2PO0dGb6K/IN6E4CNPXWtTeDl keMQ== X-Forwarded-Encrypted: i=1; AJvYcCUMeR2fy7SMrYh+I2l/EWYhv75Q0UYUqM/R9MyDOOelno6eTgVUeop1xBidaaZ4fuyqdf5Kn5Rzpg==@kvack.org X-Gm-Message-State: AOJu0Yx/YLlReHsE9+3vDUa7srQOeAIlQJlJfG6zF8sqG56BWFrh7eKm XRcUo0punWljTQIXPACezst0lo3Ogjl1Ip3xG251XMvmZE7twC7X95GmQRa+QIE= X-Google-Smtp-Source: AGHT+IGz/FYGn8j8VxtpTfBpFZKPw3YeTo2ZNTPehl5aiT7J5c1Nwm5Z/via2QD5K4H0ZCf9Cg6EBg== X-Received: by 2002:a17:90a:d18b:b0:2e0:82b7:d9be with SMTP id 98e67ed59e1d1-2e1849cf74dmr205251a91.35.1727798873584; Tue, 01 Oct 2024 09:07:53 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:53 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:25 -0700 Subject: [PATCH 20/33] riscv: Implements arch agnostic indirect branch tracking prctls MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-20-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam03 X-Rspam-User: X-Rspamd-Queue-Id: E26A68001E X-Stat-Signature: t3enkif7am1o33n4ja8ix5k4ggf3g6gy X-HE-Tag: 1727798874-854924 X-HE-Meta: U2FsdGVkX1+ixTa2WOsb2/KZrXgEe2LYO/5VkIwjzgikLn8qq0Sw6XXTv1Vyv0et7KvSsQ4m2eatwlQ+Fld6l2sZwUPqNQrgpHd2hEW4nagfyG2Dhou26HrovxGoghkmPfRLwTUIXJkzt2KKwZXXRh8WRa//zSHKX4w14DSRc0nnrLxDCp+8Q4abBRbHEMyxqsCmLR7pSewI0m3XQNVpu6/ZjAP7vEulLMXARcj2kqGZH4JCXuPtMEaEDc8yCSFsHWeu1z8PaWY3aHU5CAFIbO3qyXR6WTiMzMEiTcfISDojPVezrC/xrgX9TLd8YW+GZU6WVP1N9ccEJVm3uU7bLoqIiOlvFDY/knO7GDUN9UVZCqIS+kdmFD1AXx4Dmr3rmThL9/dNWF1DmjShNDAmOE00Vx0vKh8RiHwljRU/qM1I1AFwH26IXMJldLO7aVolKNnMqgAoDJqt6MPB04P65P9NNPH0CqFxQVzDvKCUJXVzwFfHPp73J6IWvZy1l+/sadxIQZ2yKUkCTxos6ljzCOOnfDXpAOR1R74qnnjFavMqQBVzGHswjyDyFUwwoYiF3qMbsrJTrOVzSyEbgdw+VV77jZTJNcuGNeECWPMK+RmhcOeFp53qDSl/Bd150OT7AMvW9wL9p/BUOt38aCLvwmi7rhN639cHIFGBFVZPlOlEAfm3+yju7Vr6HRNlodo4n52KDbnv4XFyjhXXn5dnmGDQ9fqMsP4qL+TtQBRPdCL6icLLf5mByss+9BHbcCNcpVxwBzPK1OurznmEtiduXyIXmIe0b1Cp9ZIqo10dATqXmeUk479XoSPM815S4KSUdup7hIj/PRV50+Diwc6KrzviMCw9BM+N7DGL+8kVQ+QqkBqJb3gOz+RPgKb6mIO0b7V8N4yvp3/Vcim4X5SZ8dhXj5hSx2femsAJSeLEu1nOiJiieU8O1Q/0ASI3MFkcxyzCldeaOC9yixdZtxl AMXUwQq3 UxY6p7+EVuwhztRelPwFnOlK+i8seiMO5mBTO18YmY1tpigHR42B92ja+tI4rM3JRkmfW0xNr8/CuhIPA2kZ3cyRpr1IXe2n1Kv2NzbCxBrQCbnyzXXOLEmjv+/0DeV+iyrCalaf+PxyKlu2fJUxs3j2LysxamHti1qugWoAZY/1VALRsKOPVd6FYuC19mKy1tCYUieruMT4A/d00u7VTfyMDs0Vc3jmfnC7sQExKcUkw6ADO9Zzm9ZR2fXySPBZkaOy3857I6w1c+4iMtHyonhj+4lROUN106N/y8iHs5cPDX3ogRd/rtiGIgI3ud+eJd86LobnTKwJrf+MjmS1XV/F5q/y87u9W1phWs+q687OxvzmpJ3CkMavk5ydADBTb+qTQYEh/7W5E7Y7omnFElZBvEXgonQUTxOwNrffxl7pRjSrQQWuo6BFWhjdz5FF20kg8bLEN/a0aCHot2GQX6bVG/Q== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: prctls implemented are: PR_SET_INDIR_BR_LP_STATUS, PR_GET_INDIR_BR_LP_STATUS and PR_LOCK_INDIR_BR_LP_STATUS. On trap entry, ELP state is recorded in sstatus image on stack and SR_ELP in CSR_STATUS is cleared. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/usercfi.h | 16 ++++++++- arch/riscv/kernel/entry.S | 2 +- arch/riscv/kernel/process.c | 5 +++ arch/riscv/kernel/usercfi.c | 76 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 97 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/usercfi.h b/arch/riscv/include/asm/usercfi.h index 52850a2c79cf..099204d0cd4a 100644 --- a/arch/riscv/include/asm/usercfi.h +++ b/arch/riscv/include/asm/usercfi.h @@ -16,7 +16,9 @@ struct kernel_clone_args; struct cfi_status { unsigned long ubcfi_en : 1; /* Enable for backward cfi. */ unsigned long ubcfi_locked : 1; - unsigned long rsvd : ((sizeof(unsigned long)*8) - 2); + unsigned long ufcfi_en : 1; /* Enable for forward cfi. Note that ELP goes in sstatus */ + unsigned long ufcfi_locked : 1; + unsigned long rsvd : ((sizeof(unsigned long)*8) - 4); unsigned long user_shdw_stk; /* Current user shadow stack pointer */ unsigned long shdw_stk_base; /* Base address of shadow stack */ unsigned long shdw_stk_size; /* size of shadow stack */ @@ -33,6 +35,10 @@ bool is_shstk_locked(struct task_struct *task); bool is_shstk_allocated(struct task_struct *task); void set_shstk_lock(struct task_struct *task); void set_shstk_status(struct task_struct *task, bool enable); +bool is_indir_lp_enabled(struct task_struct *task); +bool is_indir_lp_locked(struct task_struct *task); +void set_indir_lp_status(struct task_struct *task, bool enable); +void set_indir_lp_lock(struct task_struct *task); #define PR_SHADOW_STACK_SUPPORTED_STATUS_MASK (PR_SHADOW_STACK_ENABLE) @@ -58,6 +64,14 @@ void set_shstk_status(struct task_struct *task, bool enable); #define set_shstk_status(task, enable) +#define is_indir_lp_enabled(task) false + +#define is_indir_lp_locked(task) false + +#define set_indir_lp_status(task, enable) + +#define set_indir_lp_lock(task) + #endif /* CONFIG_RISCV_USER_CFI */ #endif /* __ASSEMBLY__ */ diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 8f7f477517e3..a1f258fd7bbc 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -143,7 +143,7 @@ SYM_CODE_START(handle_exception) * Disable the FPU/Vector to detect illegal usage of floating point * or vector in kernel space. */ - li t0, SR_SUM | SR_FS_VS + li t0, SR_SUM | SR_FS_VS | SR_ELP REG_L s0, TASK_TI_USER_SP(tp) csrrc s1, CSR_STATUS, t0 diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index f7dec532657f..5207f018415c 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -159,6 +159,11 @@ void start_thread(struct pt_regs *regs, unsigned long pc, set_shstk_status(current, false); set_shstk_base(current, 0, 0); set_active_shstk(current, 0); + /* + * disable indirect branch tracking on exec. + * libc will enable it later via prctl. + */ + set_indir_lp_status(current, false); #ifdef CONFIG_64BIT regs->status &= ~SR_UXL; diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c index c77abe552c88..8da509afdbe9 100644 --- a/arch/riscv/kernel/usercfi.c +++ b/arch/riscv/kernel/usercfi.c @@ -69,6 +69,32 @@ void set_shstk_lock(struct task_struct *task) task->thread_info.user_cfi_state.ubcfi_locked = 1; } +bool is_indir_lp_enabled(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.ufcfi_en ? true : false; +} + +bool is_indir_lp_locked(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.ufcfi_locked ? true : false; +} + +void set_indir_lp_status(struct task_struct *task, bool enable) +{ + task->thread_info.user_cfi_state.ufcfi_en = enable ? 1 : 0; + + if (enable) + task->thread_info.envcfg |= ENVCFG_LPE; + else + task->thread_info.envcfg &= ~ENVCFG_LPE; + + csr_write(CSR_ENVCFG, task->thread_info.envcfg); +} + +void set_indir_lp_lock(struct task_struct *task) +{ + task->thread_info.user_cfi_state.ufcfi_locked = 1; +} /* * If size is 0, then to be compatible with regular stack we want it to be as big as * regular stack. Else PAGE_ALIGN it and return back @@ -371,3 +397,53 @@ int arch_lock_shadow_stack_status(struct task_struct *task, return 0; } + +int arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status) +{ + unsigned long fcfi_status = 0; + + if (!cpu_supports_indirect_br_lp_instr()) + return -EINVAL; + + /* indirect branch tracking is enabled on the task or not */ + fcfi_status |= (is_indir_lp_enabled(t) ? PR_INDIR_BR_LP_ENABLE : 0); + + return copy_to_user(status, &fcfi_status, sizeof(fcfi_status)) ? -EFAULT : 0; +} + +int arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status) +{ + bool enable_indir_lp = false; + + if (!cpu_supports_indirect_br_lp_instr()) + return -EINVAL; + + /* indirect branch tracking is locked and further can't be modified by user */ + if (is_indir_lp_locked(t)) + return -EINVAL; + + /* Reject unknown flags */ + if (status & ~PR_INDIR_BR_LP_ENABLE) + return -EINVAL; + + enable_indir_lp = (status & PR_INDIR_BR_LP_ENABLE) ? true : false; + set_indir_lp_status(t, enable_indir_lp); + + return 0; +} + +int arch_lock_indir_br_lp_status(struct task_struct *task, + unsigned long arg) +{ + /* + * If indirect branch tracking is not supported or not enabled on task, + * nothing to lock here + */ + if (!cpu_supports_indirect_br_lp_instr() || + !is_indir_lp_enabled(task)) + return -EINVAL; + + set_indir_lp_lock(task); + + return 0; +} From patchwork Tue Oct 1 16:06:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818424 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33BBFCEACE4 for ; Tue, 1 Oct 2024 16:08:05 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 0C6E62800B0; Tue, 1 Oct 2024 12:08:00 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id F3E4E280068; Tue, 1 Oct 2024 12:07:59 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id D1B0C2800B0; Tue, 1 Oct 2024 12:07:59 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0013.hostedemail.com [216.40.44.13]) by kanga.kvack.org (Postfix) with ESMTP id AEE8F280068 for ; Tue, 1 Oct 2024 12:07:59 -0400 (EDT) Received: from smtpin26.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay02.hostedemail.com (Postfix) with ESMTP id 6BE80120987 for ; Tue, 1 Oct 2024 16:07:59 +0000 (UTC) X-FDA: 82625514678.26.30BC850 Received: from mail-pg1-f172.google.com (mail-pg1-f172.google.com [209.85.215.172]) by imf11.hostedemail.com (Postfix) with ESMTP id 843254001D for ; Tue, 1 Oct 2024 16:07:57 +0000 (UTC) Authentication-Results: imf11.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=nwc4C41B; spf=pass (imf11.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.172 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798838; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=j4AiFsRLeV62lBIMG1PY0Kuggf3Da9jB0k3/CgFujB4=; b=AA4oq0vFy8shmTBU3QUwBBPKw7e52ClhcFoO3WSkUXzokRjBtdluLI/mKGqoNY9hVVA/mk zAN+rGR2Z35GlsCNn9kirJ12JaDQowfg96G0Mza1DcHo+hGeIqu8LZradMZQaN7sNuVeYm wbsMh8hBKvm22Zg6fVPxohcqx52lGOU= ARC-Authentication-Results: i=1; imf11.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=nwc4C41B; spf=pass (imf11.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.172 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798838; a=rsa-sha256; cv=none; b=YxdU7WMbZYlVu377WVctvoqq5UqT1OM17ul2Ljmi8c1YdWyze0Spe6T+Woh9ItA3+8yi9j WvB3m8YFaDsD3kDinXrK8+ICJ9ZQYzZh5nxvujXDNlwk9JXl5oIdsbu0KMG/TkoacTWw0i 5TFAcLXUAtqgK6c0ukG/g9nV0hhtSuw= Received: by mail-pg1-f172.google.com with SMTP id 41be03b00d2f7-7db54269325so4370817a12.2 for ; Tue, 01 Oct 2024 09:07:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798876; x=1728403676; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=j4AiFsRLeV62lBIMG1PY0Kuggf3Da9jB0k3/CgFujB4=; b=nwc4C41BNxDeP+ONU3HXWeZGxaPlPRMX/2Bt5mceSLRST5AXo23RUiHy8ykQMtC67O KQfV0HMVnJAv3644+kbw67uhQqlqls/VtnpPeqX3XE+r5NgL/W0Cx3hl0ctbjICMLThz +Nvlc92T8QsFhTL5IDKBk9/KoLGQK63//cXAEKctct4gw7Iay1BjVskxfWeur4HB4CDX NjpDWkRfL35skqK/zbhWkRWUGesva9M+6ek7RMQKY/5ccO1Bh+DmM+X5IbpdikpINdNC XPJ0JstPeyaNLcGIM5gNqMuqz/upG1PSe6/Om+mKJzpDdehC24tv16AeCMsmoOxEbtr5 4UJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798876; x=1728403676; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=j4AiFsRLeV62lBIMG1PY0Kuggf3Da9jB0k3/CgFujB4=; b=vUGeXkkvRrj1GqS4Eug+YAPp8TK0VPHYexYVYp0v/hbO0JShFAD4XEX9UTgPo9I4IE zK0LrqkABy4uJUq6XZPnW+2S0xfXCk9gyjwbQijSb+7T3C36d+I7gsxg4AvzERMkrLC/ bgbONRyD5Swm6OhJ7pOjM7AO+pfq02QhzIbaiwL0jWo/0jyXCgpvi4nwPxvBrZoL64Yh Pk1chnn3aBaNID+poeb/TgyFCuNDKlygORti9xxn8rntEZec+7+CmvwBxlFNdqwCo2T6 hEWAjboCGSTT7urOdeovEwIxWg1WQufIxdC7j/fNOU5eQV5scQJ3ipTMGLrQzem3IYpq 2JRQ== X-Forwarded-Encrypted: i=1; AJvYcCX6cKq0OhuOdhydxB8lOpHDTzGpaokV6vOva/zumfKdUAmEFTIuTCpB0izU33QKca2RSrnGBBbBuw==@kvack.org X-Gm-Message-State: AOJu0YxVC75eMTJyMZMxUKZhLh/cs93QaePu7AIH/u4tq7mXLWc72RCp 45W3DvG0XITdMgUzKkyI+PZmHbuVZ1kXh6T4QCLdQSAPuvdUjR7+qf5UHaV9o7Y= X-Google-Smtp-Source: AGHT+IFqS8fqBsrJjWr+wc8/nwGpkf7kENOTH6Uqo5oDulznjMMyhWNj7p6IZVCZ+LiLAXts/kQSLw== X-Received: by 2002:a17:90a:de96:b0:2e0:a508:77f2 with SMTP id 98e67ed59e1d1-2e18496991amr212461a91.25.1727798876223; Tue, 01 Oct 2024 09:07:56 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:55 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:26 -0700 Subject: [PATCH 21/33] riscv/traps: Introduce software check exception MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-21-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspam-User: X-Stat-Signature: ko6rbb3dirdpp1js8p8rwymrnzjodcn9 X-Rspamd-Queue-Id: 843254001D X-Rspamd-Server: rspam11 X-HE-Tag: 1727798877-470152 X-HE-Meta: U2FsdGVkX1+weyBowF/+aHfjIhxJxP855dfmgof1nLu98B2S0CIv3jpDHl6+tjs2jvhX/9rGuGK351x48XGCkkwAeitnkG+a90vpuAOuGZmVr9htjoiwrpp6twA85+VCEdMZlMZT2NVf9/0WDp7IyqFkch5ugBzijzRqWI5dYaL4Dck0UvbENtmUwQRbiTFFuBj0WRIHUvkbXGlR0CqlvObKbJyky4wOT3ObQlR05Y/N9b6Wa+7L2bAahu4MATr/emofekEYuwh4Gc7YfaWyK1TwEMhWI2LOXJmqENONE5w/gF9wHzBVmNhhWV0eY484KjAGGgXNBUY9tGV43tR3eINhEL+muOXk7+Ldui660VW7QHKEePobcJv9gAV/UTmEYkJ0vjBtiVpWfn4SpLCOnmtV5QD10W//boRvSBxX7OlTc1NDYscyuiS2//HPUOZbdpXeHabMW+3wWHJ0PikTX7rOiPsEKCih4ziU3MT7HK18YRO9kzWk4aSD157X33sXcQFUr9vJivVoRT7y71hgXR7ncKnG2jYbS/oOE6K7MNAR4oeF8LkkbDGzRSewhmZo5LS/DGLA+05+huWmjYyYJGwtjYkNKOgJCcNPXqu/XGS1xSQ/hWWk9SOF2rLFR21yhaxglDwQH+Bh7w65Q1lbhpY+WDeMwQ7lTFSsIFtws2+pY6oP+QF5B7F9N/FePlaTIOww8TjtViSiOE1Dof2YPWcwEBJ4oZT9gwUS21sfUu0CzsmIKpAitebJw4CkkqO8hXrg2Ww7BPfFvVg+TGGK/fm0kAoRXgY5QARfW/hoDbTFkKSJ2O3IKxibQx31ch6kYomUqmPpfDVLixeJpMDF9pCChmyPjucYb2NdYdhA18uI0sQ62FuzY0SsUd2ct/IrA5ePWY1KG/PXIJABhRkewcp+VroYsYlijp+tRyodvAfcOalYGrkyZCw3JJlXRQ+Oj2wXHIplzxXPIx34+AT pniLwaD0 qb833Zx6P5/7dh3VfigrunB7FvLoL4wpN8Eqfs3Gq1dEbwlO418+rqoXRqB49QAT2/l/mkgAt1HYt9EGcqj1f7RWkl5ZPHvqjY+1DAC2nIx+EiqbxBQNFZQOPN6T/THDigoXmMmItlzh7lXK5yn8QhDs99F/32Ja/SKF63kXr2jjk7wlE5iAF+2HwAJTE9PEcZZD9ytF5h9V02ych/Yxws8bcZtWd/iW2PkhRk9QGvk/874COfh+WrIsYeWJzeFtY4QYFJYQwZFUCsTe/fK5SMCNh7/xy6t8lTc110wTadISwNZSopBVXZht19Ac6I3H476vAxAjcScnhB144uL8sA13pvIztQXGNzqEhKlXMAmxutVCpq+xVJcpI8X/KwOvUUqFS80tXaHYvhhQru7OJeIr1lenYYvz7zJeSY7osjEtJ0Lcs/M1u8nuXfNeBN4lrJT4zv9ta0aaNxSM= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: zicfiss / zicfilp introduces a new exception to priv isa `software check exception` with cause code = 18. This patch implements software check exception. Additionally it implements a cfi violation handler which checks for code in xtval. If xtval=2, it means that sw check exception happened because of an indirect branch not landing on 4 byte aligned PC or not landing on `lpad` instruction or label value embedded in `lpad` not matching label value setup in `x7`. If xtval=3, it means that sw check exception happened because of mismatch between link register (x1 or x5) and top of shadow stack (on execution of `sspopchk`). In case of cfi violation, SIGSEGV is raised with code=SEGV_CPERR. SEGV_CPERR was introduced by x86 shadow stack patches. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/asm-prototypes.h | 1 + arch/riscv/include/asm/entry-common.h | 2 ++ arch/riscv/kernel/entry.S | 3 +++ arch/riscv/kernel/traps.c | 42 +++++++++++++++++++++++++++++++++ 4 files changed, 48 insertions(+) diff --git a/arch/riscv/include/asm/asm-prototypes.h b/arch/riscv/include/asm/asm-prototypes.h index cd627ec289f1..5a27cefd7805 100644 --- a/arch/riscv/include/asm/asm-prototypes.h +++ b/arch/riscv/include/asm/asm-prototypes.h @@ -51,6 +51,7 @@ DECLARE_DO_ERROR_INFO(do_trap_ecall_u); DECLARE_DO_ERROR_INFO(do_trap_ecall_s); DECLARE_DO_ERROR_INFO(do_trap_ecall_m); DECLARE_DO_ERROR_INFO(do_trap_break); +DECLARE_DO_ERROR_INFO(do_trap_software_check); asmlinkage void handle_bad_stack(struct pt_regs *regs); asmlinkage void do_page_fault(struct pt_regs *regs); diff --git a/arch/riscv/include/asm/entry-common.h b/arch/riscv/include/asm/entry-common.h index 2293e535f865..4068c7e5452a 100644 --- a/arch/riscv/include/asm/entry-common.h +++ b/arch/riscv/include/asm/entry-common.h @@ -39,4 +39,6 @@ static inline int handle_misaligned_store(struct pt_regs *regs) } #endif +bool handle_user_cfi_violation(struct pt_regs *regs); + #endif /* _ASM_RISCV_ENTRY_COMMON_H */ diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index a1f258fd7bbc..aaef4604d841 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -471,6 +471,9 @@ SYM_DATA_START_LOCAL(excp_vect_table) RISCV_PTR do_page_fault /* load page fault */ RISCV_PTR do_trap_unknown RISCV_PTR do_page_fault /* store page fault */ + RISCV_PTR do_trap_unknown /* cause=16 */ + RISCV_PTR do_trap_unknown /* cause=17 */ + RISCV_PTR do_trap_software_check /* cause=18 is sw check exception */ SYM_DATA_END_LABEL(excp_vect_table, SYM_L_LOCAL, excp_vect_table_end) #ifndef CONFIG_MMU diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index 51ebfd23e007..225b1d198ab6 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -354,6 +354,48 @@ void do_trap_ecall_u(struct pt_regs *regs) } +#define CFI_TVAL_FCFI_CODE 2 +#define CFI_TVAL_BCFI_CODE 3 +/* handle cfi violations */ +bool handle_user_cfi_violation(struct pt_regs *regs) +{ + bool ret = false; + unsigned long tval = csr_read(CSR_TVAL); + + if (((tval == CFI_TVAL_FCFI_CODE) && cpu_supports_indirect_br_lp_instr()) || + ((tval == CFI_TVAL_BCFI_CODE) && cpu_supports_shadow_stack())) { + do_trap_error(regs, SIGSEGV, SEGV_CPERR, regs->epc, + "Oops - control flow violation"); + ret = true; + } + + return ret; +} +/* + * software check exception is defined with risc-v cfi spec. Software check + * exception is raised when:- + * a) An indirect branch doesn't land on 4 byte aligned PC or `lpad` + * instruction or `label` value programmed in `lpad` instr doesn't + * match with value setup in `x7`. reported code in `xtval` is 2. + * b) `sspopchk` instruction finds a mismatch between top of shadow stack (ssp) + * and x1/x5. reported code in `xtval` is 3. + */ +asmlinkage __visible __trap_section void do_trap_software_check(struct pt_regs *regs) +{ + if (user_mode(regs)) { + irqentry_enter_from_user_mode(regs); + + /* not a cfi violation, then merge into flow of unknown trap handler */ + if (!handle_user_cfi_violation(regs)) + do_trap_unknown(regs); + + irqentry_exit_to_user_mode(regs); + } else { + /* sw check exception coming from kernel is a bug in kernel */ + die(regs, "Kernel BUG"); + } +} + #ifdef CONFIG_MMU asmlinkage __visible noinstr void do_page_fault(struct pt_regs *regs) { From patchwork Tue Oct 1 16:06:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47EBBCEACE2 for ; Tue, 1 Oct 2024 16:08:08 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 0ECF32800B1; Tue, 1 Oct 2024 12:08:03 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id EF913280068; Tue, 1 Oct 2024 12:08:02 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id DB70F2800B1; Tue, 1 Oct 2024 12:08:02 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id B46B7280068 for ; Tue, 1 Oct 2024 12:08:02 -0400 (EDT) Received: from smtpin04.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay06.hostedemail.com (Postfix) with ESMTP id 56E23AAD30 for ; Tue, 1 Oct 2024 16:08:02 +0000 (UTC) X-FDA: 82625514804.04.13C3A9D Received: from mail-pj1-f46.google.com (mail-pj1-f46.google.com [209.85.216.46]) by imf08.hostedemail.com (Postfix) with ESMTP id 5089F16001E for ; Tue, 1 Oct 2024 16:08:00 +0000 (UTC) Authentication-Results: imf08.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=DAtCH0z4; spf=pass (imf08.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.46 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798711; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=OkiNy+EZPp+q5jaB7Z/R/b/GFoNISfEsqKrE23PeN4g=; b=BPDkvGNKIn206yIQi7usWklraoef9no2r4vsqGWydjqNJZCZaMVv4QTAbfvSB6eB4lZj2Z QGV2ULNEhgzQx70GxWSXTH6IX2+u3Ig8WEYIIHwnS5CCiAq0s+iPTRyN0uaiW8zDVo2EZE 76dseGCjSSRSyFFAjeLXr/Ebzwm9IoI= ARC-Authentication-Results: i=1; imf08.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=DAtCH0z4; spf=pass (imf08.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.46 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798711; a=rsa-sha256; cv=none; b=XIE2b8lBfcqKTKfaim4PRn9fRvcUSp2OiIeVj6J6hPZJPiO/zncpfJtzSQVpVKOsnAGFhF FtPsPHBcRwFPStRk86xtkRPBQyk/N5HArIDMTTK4Sjip5hKrFRkRX5Z6YKQi9dAFJWc3u0 oXADhSp/dV8MPhx7N5lR/D2Ox2vfy2A= Received: by mail-pj1-f46.google.com with SMTP id 98e67ed59e1d1-2e137183587so1803386a91.3 for ; Tue, 01 Oct 2024 09:07:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798879; x=1728403679; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=OkiNy+EZPp+q5jaB7Z/R/b/GFoNISfEsqKrE23PeN4g=; b=DAtCH0z4tUxcZzAj5/NLkdDHMrMUn6mxQNW2253Wfr9DVyZFEAEtQowPsODzeGQtUD yDWeasssoHslG0tmdbxHIg451fsRAQ1K1lV2A3S44kU3E1R1RYP3gSVP3PlDBn/Scwba 47dNUD+Q2vJVZYW8auDdHlVSzedFtS8ZQQEhHki8oDiPLzN5cZcPrlayxyLwIl7u6Trl ZAQzXf3GNff4yQEkP8uVAhGHwMnoR8YV3L4xKQT6TQn1kfDZQtIBkZKKu9I9v19+Zko4 Bj2yeyQsg806qu9UpQ2VmQxmZ+4eJW2F8H5UAGu8NgW25fgUg4e9Pu61Nq+ecBiCKypp 5ySg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798879; x=1728403679; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OkiNy+EZPp+q5jaB7Z/R/b/GFoNISfEsqKrE23PeN4g=; b=KT0qjGeFMWTtlHt0NcWc9c15OfYvqaoIkttKAh0kuHaxJNTiYQ1ACaEk3fmONLZRIZ k/N4A63XrD8AdBQy2xrf11hVkXCyGBQXqM6NLhLs4FIVLiivJkz1piFZgyDRlbmWKIIs AZolTH5q/S4K7FQr1iYkXPFJVzdZeafji3RUXJXIcGcY32JSEphJNn1GUcX93KTC3tNn 2fKtzlBfxFGrAmiFsuszQvzlzo/Dhu8uCnLgcppVYY8mFo5DYCQ6MooypZc0M4M8kTo/ rdeZ65JEaKz40UGO27at8uZphif5VgWD6H/n8F7sBZJ2PFtSyCn/Y5NuP84R/cpmUCPX XzIQ== X-Forwarded-Encrypted: i=1; AJvYcCWJZQfueAI7301y+08TyttK3b7NIhRtOwjObHrFVC6Rh7KYQh2E5WYyMy8bn76qO2OQq2Co/3FF7g==@kvack.org X-Gm-Message-State: AOJu0Yy8y1PFGV1Dsaf29YPf0my1d6Eb0nJg4yES4sr/g1PdU+TvWoNK i5LJcX+LEVMY3FOrNlugwyJsnKavlHGDQJdfD4jalT8WUzsIcBAz60YuXR6mu3g= X-Google-Smtp-Source: AGHT+IG9H3vqP1KHn4K0qfXaJ6IuDbzDnjoMak6/wit/TRjvWRcwc+7EsVFnUBIlfw7mh2KN2DwXTg== X-Received: by 2002:a17:90b:1084:b0:2d3:ccaa:453 with SMTP id 98e67ed59e1d1-2e1849e8681mr204463a91.35.1727798878935; Tue, 01 Oct 2024 09:07:58 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:58 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:27 -0700 Subject: [PATCH 22/33] riscv: signal: abstract header saving for setup_sigcontext MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-22-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta , Andy Chiu X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: 5089F16001E X-Stat-Signature: 5fj9z3p4xh1cyszg6ttzac8aqs4za3nm X-Rspam-User: X-HE-Tag: 1727798880-142817 X-HE-Meta: U2FsdGVkX1+mD+nilCEsmdeAdxSGXFlt/ee2hllSmpZ2hEWPYJhZeN3BTDjf/iPH1hLXs17geSZ6m+gv1Qcfy/LX4T7ABJRe2qyKbV30VnE8pW+o5RMbaxjnpZ55g32OZhe9/bvQxV4EI6f753CyJC4AkWGXch+H6Cn/t6/MVTsULQNKp313YT7gqTWTsgteQyzD+z23B+OvpX1/vAoHJksX613O01bMgfd5Qyybbh6rZiKNPfockIWsxvXJ0OT/odumku1eoKNedjlalN7QXNqgjgMl0Et4at6ZCMBlkAtHt75oHJWgGExsqT3lmppHOKlAE+ILjZEk1CQM+HmgcdPIZiKRPnYaEHr3DeTrJtibdZWJpxcNjeVIAOw+UcOrkbGCv7EzXphxRX0YxfQ+Hpa+nrzhom4rq41bHNZGwXWhft8giTYrrT/I3hO07ySmqQXR6N3ey+2TqWKix0e8Ho6lLEajSNb7Xa17ZqdOJmJu9jW1gRvRh8nJvKldY3VkuSZK6O9T6hL43xA1qUD6Ql1CptZ/JUrpH6Bfu85CiL++eMdnmm4naMhdj8eb1nGDRDdoNdHm34aPZrP8P5Me2qU7u4By7R73GB2Kia6d6tTfcxWGNbwxTZ3lJDK3nnv21R8FToYuNQoJ5JY5wbHEY2APmcAsKDdDGllqvH/F1H4Q3UMdHk0u29QRImmS5BHNBafY/2cXTm/2cL1pGqAbaGGZ0smKgPzmw7DtAXU4ZijRmoo0XNpZRnvPXmn4ye6BYLz308xdKYhTU2MtyQFWXD40nRu43s2HLO1QaI/tr2mIHUbaHsz2Goeb9bzvoeWxlJ7S150So9mVDYlhFrdRhgmGWal0EhRQ5tlvyDA/AQPwXrp19Qm8zi6LQP9WkdavYR4JJ69oMGZVTxxKDk4JdcFPYxrktLAX9vS3dnFYQS0CC4Mjiv4Zk3WbEnIxozJ6wWhzxV0Z3qG9AoePVtP vOxbdZT6 twjZeQ7X7egha4De9ljfYI/kuOsWyQuRbrh3pfvbGbtCIYUsE5yNh162ZpggORuGbDkwhRT25pBCBsm4g0HHgNBd+2zcy1Qlp2xAyp9t+/B+cnl+QQZpnDQMJQX2xn+gDQocUs23FZC9HG+ieaSPKaHW7tVcOvjHUK9JoKg+m6vANPY5XIVxluEHrRmFRgWygKB4+Fy+kkox5TjSdoReqVMKEg+GmHRj7IhfTjRJrhXHuP6v/ZXu8UagKQGb7pB/ZdCLgDC7TNvN45my+lMNU3dZd4YUOI1vpasDfJChqbYhvZyXcLDsUXBrNPmjy0DsC6HKrx48BRBhYAxt0hmJOQySvmkQRbUKTiFbZq6TmtKPkuJvE9AY+dLjiqVBu7nE09UcP1E+opZ5cBR610L+y/kkqYsWKu6O8HtrMj9U1FMUQq6dBCqu53h3zdqIAKZbKCczLaOqnTAois3+r4dq7ET3Zu7hjtB2FuBzbBAoMktBsFHNIXDsFByeNAHXFyKvSmltp X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Andy Chiu The function save_v_state() served two purposes. First, it saved extension context into the signal stack. Then, it constructed the extension header if there was no fault. The second part is independent of the extension itself. As a result, we can pull that part out, so future extensions may reuse it. This patch adds arch_ext_list and makes setup_sigcontext() go through all possible extensions' save() callback. The callback returns a positive value indicating the size of the successfully saved extension. Then the kernel proceeds to construct the header for that extension. The kernel skips an extension if it does not exist, or if the saving fails for some reasons. The error code is propagated out on the later case. This patch does not introduce any functional changes. Signed-off-by: Andy Chiu --- arch/riscv/kernel/signal.c | 60 ++++++++++++++++++++++++++++++---------------- 1 file changed, 39 insertions(+), 21 deletions(-) diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c index dcd282419456..014ac1024b85 100644 --- a/arch/riscv/kernel/signal.c +++ b/arch/riscv/kernel/signal.c @@ -68,18 +68,18 @@ static long save_fp_state(struct pt_regs *regs, #define restore_fp_state(task, regs) (0) #endif -#ifdef CONFIG_RISCV_ISA_V - -static long save_v_state(struct pt_regs *regs, void __user **sc_vec) +static long save_v_state(struct pt_regs *regs, void __user *sc_vec) { - struct __riscv_ctx_hdr __user *hdr; struct __sc_riscv_v_state __user *state; void __user *datap; long err; - hdr = *sc_vec; - /* Place state to the user's signal context space after the hdr */ - state = (struct __sc_riscv_v_state __user *)(hdr + 1); + if (!IS_ENABLED(CONFIG_RISCV_ISA_V) || + !(has_vector() && riscv_v_vstate_query(regs))) + return 0; + + /* Place state to the user's signal context spac */ + state = (struct __sc_riscv_v_state __user *)sc_vec; /* Point datap right after the end of __sc_riscv_v_state */ datap = state + 1; @@ -97,15 +97,11 @@ static long save_v_state(struct pt_regs *regs, void __user **sc_vec) err |= __put_user((__force void *)datap, &state->v_state.datap); /* Copy the whole vector content to user space datap. */ err |= __copy_to_user(datap, current->thread.vstate.datap, riscv_v_vsize); - /* Copy magic to the user space after saving all vector conetext */ - err |= __put_user(RISCV_V_MAGIC, &hdr->magic); - err |= __put_user(riscv_v_sc_size, &hdr->size); if (unlikely(err)) - return err; + return -EFAULT; - /* Only progress the sv_vec if everything has done successfully */ - *sc_vec += riscv_v_sc_size; - return 0; + /* Only return the size if everything has done successfully */ + return riscv_v_sc_size; } /* @@ -142,10 +138,19 @@ static long __restore_v_state(struct pt_regs *regs, void __user *sc_vec) */ return copy_from_user(current->thread.vstate.datap, datap, riscv_v_vsize); } -#else -#define save_v_state(task, regs) (0) -#define __restore_v_state(task, regs) (0) -#endif + +struct arch_ext_priv { + __u32 magic; + long (*save)(struct pt_regs *regs, void __user *sc_vec); +}; + +struct arch_ext_priv arch_ext_list[] = { + { + .magic = RISCV_V_MAGIC, + .save = &save_v_state, + }, +}; +const size_t nr_arch_exts = ARRAY_SIZE(arch_ext_list); static long restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) @@ -276,7 +281,8 @@ static long setup_sigcontext(struct rt_sigframe __user *frame, { struct sigcontext __user *sc = &frame->uc.uc_mcontext; struct __riscv_ctx_hdr __user *sc_ext_ptr = &sc->sc_extdesc.hdr; - long err; + struct arch_ext_priv *arch_ext; + long err, i, ext_size; /* sc_regs is structured the same as the start of pt_regs */ err = __copy_to_user(&sc->sc_regs, regs, sizeof(sc->sc_regs)); @@ -284,8 +290,20 @@ static long setup_sigcontext(struct rt_sigframe __user *frame, if (has_fpu()) err |= save_fp_state(regs, &sc->sc_fpregs); /* Save the vector state. */ - if (has_vector() && riscv_v_vstate_query(regs)) - err |= save_v_state(regs, (void __user **)&sc_ext_ptr); + for (i = 0; i < nr_arch_exts; i++) { + arch_ext = &arch_ext_list[i]; + if (!arch_ext->save) + continue; + + ext_size = arch_ext->save(regs, sc_ext_ptr + 1); + if (ext_size <= 0) { + err |= ext_size; + } else { + err |= __put_user(arch_ext->magic, &sc_ext_ptr->magic); + err |= __put_user(ext_size, &sc_ext_ptr->size); + sc_ext_ptr = (void *)sc_ext_ptr + ext_size; + } + } /* Write zero to fp-reserved space and check it on restore_sigcontext */ err |= __put_user(0, &sc->sc_extdesc.reserved); /* And put END __riscv_ctx_hdr at the end. */ From patchwork Tue Oct 1 16:06:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818426 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09271CEACE4 for ; Tue, 1 Oct 2024 16:08:11 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 892902800B2; Tue, 1 Oct 2024 12:08:05 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 836FA280068; Tue, 1 Oct 2024 12:08:05 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 63E1A2800B2; Tue, 1 Oct 2024 12:08:05 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0017.hostedemail.com [216.40.44.17]) by kanga.kvack.org (Postfix) with ESMTP id 3F95B280068 for ; Tue, 1 Oct 2024 12:08:05 -0400 (EDT) Received: from smtpin13.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay06.hostedemail.com (Postfix) with ESMTP id F0DEDA9BA8 for ; Tue, 1 Oct 2024 16:08:04 +0000 (UTC) X-FDA: 82625514888.13.2FD2AFB Received: from mail-pj1-f44.google.com (mail-pj1-f44.google.com [209.85.216.44]) by imf05.hostedemail.com (Postfix) with ESMTP id 0D53B100016 for ; Tue, 1 Oct 2024 16:08:02 +0000 (UTC) Authentication-Results: imf05.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=AHbW2ML6; spf=pass (imf05.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.44 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798755; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=+G1XK3MHKXlBhc4hyV2PeDHRcaRFAax+LShRB7DUPhc=; b=VbqWcJdXJlRlaZa5Ooe4KOl2KMg2VpIWcl3Z8zxAQS2Ox6Ue/cNJrN14uUwQkA6UUivJVn ONiRb2t5xGW4ndvkaB9e3UgWBqvRf2/N4gyLQPzTkdpoC/TAyOTAHjKObxj7G6OwQQwQ0o nRCfVHW/Bgsr/dCdqacBU7qjIMeylOI= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798755; a=rsa-sha256; cv=none; b=kUsqQfzEj/VsHD+4s/2FTCmMTB0BuQpcz32yqceVvks+Yqf9IYOMPdd4oreWq+RVlGYw6p pPgG41vvpC3wOKdTPfpMpFgLsYrjOjS/upfy17cP1TIEbUPFCUxni2LEPjLR87CKcIz0DV mVgo9mCwvy9VCrnWIBtqZlW2kBfRZEQ= ARC-Authentication-Results: i=1; imf05.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=AHbW2ML6; spf=pass (imf05.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.44 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none Received: by mail-pj1-f44.google.com with SMTP id 98e67ed59e1d1-2e0a5088777so4603246a91.2 for ; Tue, 01 Oct 2024 09:08:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798882; x=1728403682; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=+G1XK3MHKXlBhc4hyV2PeDHRcaRFAax+LShRB7DUPhc=; b=AHbW2ML6BGk8vbmL5GqiLJ3AEPfbZN2nSgVQNRYy7VDRmS0OcVBtHbZXCrKiGSvcdk sDmSkTUVdI9pkEHsiHH2L0FoZwFw/sBBizffx+2OQ4cZ2vxs6Q5Eajx31LWDm45y9LU3 rNHUQnULbggQkVX9Z0O5yHAfmewYosXbd/1+cTGqWqBamQ+0VaeOYj68b2caz1AocoLu IEgKz4vS5Zklav1HzKn8BDbR26xMaWGHU98Hq5zMumbRwwUJqU4qdwoQXBYZLRiV8+Cn VuY8M+2TtA9VyIUk/UVk1HRXAzRiKl7BPmI1r4Wh86fy8rWkkPumGkQc8oB1sfhZ06QE iBTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798882; x=1728403682; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+G1XK3MHKXlBhc4hyV2PeDHRcaRFAax+LShRB7DUPhc=; b=RCFXpFQU8UQN4EguXT36MZmA3FNywF0rid0w1NvJjoKtNHqDNlsQLwbYYwcOnuIW8+ 5t3hQydz6P3Taw1EwPtXXvx3Ls7lfAhdgRL6sAROFOkYl3pxyNHbpg2CnXGRR5mY4cbh 0keRkBuCoJstlxPd3Z9Cp7tbjRIrUnDszKZ23Wg/z4lLEHJ8nIG/s4dCC57jG6D6Vs35 2gi9X72TAMUzxFYrv0RdWhcgNSQQGDpqy3hO/nWpGw4QC7CoUjH/cbNdRvZ3aUsX1FaH 4qMrnLaSSZcvb48P2KBuvy3CApWZsyNHoYFGn9qKbnPX8iOnvBFgHrNb+LS8Gku1AuBL y6fg== X-Forwarded-Encrypted: i=1; AJvYcCUriImjEpasfKOb1oTNqwvIXFtGUwudNFzZAOlyynrL8jQIyh1+zJwp0rOj+fZHvIAtCaRsKvhYRA==@kvack.org X-Gm-Message-State: AOJu0YxgDKToQBg8G3iFcdBF3EIgmMXfaECztTuQMcnrF7MoNKQXv8J2 j224jh3rTLqkZFWgE9hOkTeetvroI13ewyp6PI5JPgkyg0wwUzHw3cFm/D4LWa8= X-Google-Smtp-Source: AGHT+IFARBw2lTsbhF1oMGXW610myopo0JWTdAHeJibzs9AwXoyAUkWlmPqGSF8c2i+fbKrUSAgh9Q== X-Received: by 2002:a17:90a:77c4:b0:2da:95ea:da99 with SMTP id 98e67ed59e1d1-2e18456ecd1mr236432a91.7.1727798881658; Tue, 01 Oct 2024 09:08:01 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:08:01 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:28 -0700 Subject: [PATCH 23/33] riscv signal: save and restore of shadow stack for signal MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-23-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta , Andy Chiu X-Mailer: b4 0.14.0 X-Stat-Signature: ysyfmq6rzhxm8mjngxg96sazf6y7jwgz X-Rspamd-Queue-Id: 0D53B100016 X-Rspam-User: X-Rspamd-Server: rspam08 X-HE-Tag: 1727798882-401268 X-HE-Meta: U2FsdGVkX1+nZMvGojk0JkFWjFQUwCxgXLiqZx+tU7zoxeQZq5vZ+LtOjdlZiLbdzOYW2W7bhhSN14Yaepk6v1IcJWqHRbnyMFMTL3AG/JkJ2szLWriSdyxNbSlmauUoixJE8bur0/l9Q3XbiHXORAEr9blbEJgCv/Uuc/r7G2hlF68YBoO9o42gxYNSTudFZmn0yhY1UUtn2r7ttfhuKAJ4MkddRoHaat3xYTBYJZrFbAg4h56HbTu7AloPVcrLYhUYbGmSlEpXOYCTIC90p72xrPQNrERRUohTx34ujkocmU8uH89sOw7tP0XN0fxkiAp3+p/AgQ/BeT5M8ohOB8EUKQwbLkDNZ6rawni2UUyIPibYbtUZte1FnncL4PH6b5ytJTk1yvn/SqxZNOusPO9bJ+K8HI6vy2XNQEu/Mx+Wp84sVqvw8gYSDsqQcB/SdRHi7gXdtlsnetMVUjIwwyG9cjc2VaCbze9gpfKhv/Od9I3CNH/lVdDRcw9LlxyUqv70qa0MvG9+nuPFvqoYJM0sCvMwPU26LU35aWK0ORNr3pg4AqfRuI5J/pj06fvuD2rQ96o6x+GlHrgz50GaK6bvQmmIr6jVa/cXrvVkD3O+TC2bYcW+tGvvAog//311E8q4VfbaEELGO164fIfH2ojsYNh/zpdVDDrknX3bMlZ+deo6n68KixzgqZLmF2ZtmM2wKT2fawvby+3/shwU8xNBggXjwCINCvsa53Ml9K+4+GYGXBFPXyxVJy7Fc07linyl1N+jd9xndop91wZaLC0QIINWosyyIY+uYE4/lN7G+MWhjGY4r+bz8ZOVmakAPJXKsoWeTTV0x1w01gESzraEY9s3kKmM3WUHWDBQckRwsjznkBN5ENozp4d5hPEfse6xibol7oLf7bk8RoyOkruxAVR1HNl7a8UL62GweATTP6k36m22wy01Bk2voNWfuOZqUAupsrcv1CgHdxf +9zJQDhG 4vkGnm+aeXQSE5+nGrDxwySRuHljI3pf8St9ephK+UAKI3XI08a47dsmjoPc3/xQAKPlIJH8UeI7W7zAr0I+ovIZIPSLXIl3AusziBWSmx3doB5HsuZu7YPYbcRaKDPVQlRp0AXpI0NBobTCtXVJHgTtCVfsTXtJ5gzostM1tfn2mOfqvjcNSZVtPfu8E5WYy0bKZBOq1FEXM9GtbHeyrDN6sjTC+HytCsN9L4whHrnfHDLHBJ0nt5YlZeKL8kiW9oAWvK9UBw379AfzqvCzhF8DKWqI2M710Obgk/5Lbb2rnqKa3HkuFRh2c2kOM0zpvrjnbOegLj1h5C1241V9Ipn3Wq9HFNLpOEWnFgpP27tO+VqSFgQEIRErDrLH73PvKMu9wubJh0teUK3CWGizHyNdAZ62XcnP2Gl+8So8mjOWK6hOgRw0TmnCsRTEryjmvcHh1QPapj4eTPz/wQlwzgVi7bjvd5A/w9LdxrU52JE2u8N5afBUopmZtCKyyDAQw2JaUufmviAb6qTg= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Save shadow stack pointer in sigcontext structure while delivering signal. Restore shadow stack pointer from sigcontext on sigreturn. As part of save operation, kernel uses `ssamoswap` to save snapshot of current shadow stack on shadow stack itself (can be called as a save token). During restore on sigreturn, kernel retrieves token from top of shadow stack and validates it. This allows that user mode can't arbitrary pivot to any shadow stack address without having a token and thus provide strong security assurance between signaly delivery and sigreturn window. Use ABI compatible way of saving/restoring shadow stack pointer into signal stack. This follows what Vector extension, where extra registers are placed in a form of extension header + extension body in the stack. The extension header indicates the size of the extra architectural states plus the size of header itself, and a magic identifier of the extension. Then, the extensions body contains the new architectural states in the form defined by uapi. Signed-off-by: Andy Chiu Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/usercfi.h | 10 ++++ arch/riscv/include/uapi/asm/ptrace.h | 4 ++ arch/riscv/include/uapi/asm/sigcontext.h | 1 + arch/riscv/kernel/signal.c | 80 ++++++++++++++++++++++++++++++++ arch/riscv/kernel/usercfi.c | 57 +++++++++++++++++++++++ 5 files changed, 152 insertions(+) diff --git a/arch/riscv/include/asm/usercfi.h b/arch/riscv/include/asm/usercfi.h index 099204d0cd4a..8da61b005d0a 100644 --- a/arch/riscv/include/asm/usercfi.h +++ b/arch/riscv/include/asm/usercfi.h @@ -8,6 +8,7 @@ #ifndef __ASSEMBLY__ #include #include +#include struct task_struct; struct kernel_clone_args; @@ -35,6 +36,9 @@ bool is_shstk_locked(struct task_struct *task); bool is_shstk_allocated(struct task_struct *task); void set_shstk_lock(struct task_struct *task); void set_shstk_status(struct task_struct *task, bool enable); +unsigned long get_active_shstk(struct task_struct *task); +int restore_user_shstk(struct task_struct *tsk, unsigned long shstk_ptr); +int save_user_shstk(struct task_struct *tsk, unsigned long *saved_shstk_ptr); bool is_indir_lp_enabled(struct task_struct *task); bool is_indir_lp_locked(struct task_struct *task); void set_indir_lp_status(struct task_struct *task, bool enable); @@ -72,6 +76,12 @@ void set_indir_lp_lock(struct task_struct *task); #define set_indir_lp_lock(task) +#define restore_user_shstk(tsk, shstk_ptr) -EINVAL + +#define save_user_shstk(tsk, saved_shstk_ptr) -EINVAL + +#define get_active_shstk(task) 0 + #endif /* CONFIG_RISCV_USER_CFI */ #endif /* __ASSEMBLY__ */ diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h index a38268b19c3d..659ea3af5680 100644 --- a/arch/riscv/include/uapi/asm/ptrace.h +++ b/arch/riscv/include/uapi/asm/ptrace.h @@ -127,6 +127,10 @@ struct __riscv_v_regset_state { */ #define RISCV_MAX_VLENB (8192) +struct __sc_riscv_cfi_state { + unsigned long ss_ptr; /* shadow stack pointer */ +}; + #endif /* __ASSEMBLY__ */ #endif /* _UAPI_ASM_RISCV_PTRACE_H */ diff --git a/arch/riscv/include/uapi/asm/sigcontext.h b/arch/riscv/include/uapi/asm/sigcontext.h index cd4f175dc837..f37e4beffe03 100644 --- a/arch/riscv/include/uapi/asm/sigcontext.h +++ b/arch/riscv/include/uapi/asm/sigcontext.h @@ -10,6 +10,7 @@ /* The Magic number for signal context frame header. */ #define RISCV_V_MAGIC 0x53465457 +#define RISCV_ZICFISS_MAGIC 0x9487 #define END_MAGIC 0x0 /* The size of END signal context header. */ diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c index 014ac1024b85..77cbc4a01e49 100644 --- a/arch/riscv/kernel/signal.c +++ b/arch/riscv/kernel/signal.c @@ -22,11 +22,13 @@ #include #include #include +#include unsigned long signal_minsigstksz __ro_after_init; extern u32 __user_rt_sigreturn[2]; static size_t riscv_v_sc_size __ro_after_init; +static size_t riscv_zicfiss_sc_size __ro_after_init; #define DEBUG_SIG 0 @@ -139,6 +141,62 @@ static long __restore_v_state(struct pt_regs *regs, void __user *sc_vec) return copy_from_user(current->thread.vstate.datap, datap, riscv_v_vsize); } +static long save_cfiss_state(struct pt_regs *regs, void __user *sc_cfi) +{ + struct __sc_riscv_cfi_state __user *state = sc_cfi; + unsigned long ss_ptr = 0; + long err = 0; + + if (!IS_ENABLED(CONFIG_RISCV_USER_CFI) || !is_shstk_enabled(current)) + return 0; + + /* + * Save a pointer to shadow stack itself on shadow stack as a form of token. + * A token on shadow gives following properties + * - Safe save and restore for shadow stack switching. Any save of shadow stack + * must have had saved a token on shadow stack. Similarly any restore of shadow + * stack must check the token before restore. Since writing to shadow stack with + * address of shadow stack itself is not easily allowed. A restore without a save + * is quite difficult for an attacker to perform. + * - A natural break. A token in shadow stack provides a natural break in shadow stack + * So a single linear range can be bucketed into different shadow stack segments. Any + * sspopchk will detect the condition and fault to kernel as sw check exception. + */ + err |= save_user_shstk(current, &ss_ptr); + err |= __put_user(ss_ptr, &state->ss_ptr); + if (unlikely(err)) + return -EFAULT; + + return riscv_zicfiss_sc_size; +} + +static long __restore_cfiss_state(struct pt_regs *regs, void __user *sc_cfi) +{ + struct __sc_riscv_cfi_state __user *state = sc_cfi; + unsigned long ss_ptr = 0; + long err; + + /* + * Restore shadow stack as a form of token stored on shadow stack itself as a safe + * way to restore. + * A token on shadow gives following properties + * - Safe save and restore for shadow stack switching. Any save of shadow stack + * must have had saved a token on shadow stack. Similarly any restore of shadow + * stack must check the token before restore. Since writing to shadow stack with + * address of shadow stack itself is not easily allowed. A restore without a save + * is quite difficult for an attacker to perform. + * - A natural break. A token in shadow stack provides a natural break in shadow stack + * So a single linear range can be bucketed into different shadow stack segments. + * sspopchk will detect the condition and fault to kernel as sw check exception. + */ + err = __copy_from_user(&ss_ptr, &state->ss_ptr, sizeof(unsigned long)); + + if (unlikely(err)) + return err; + + return restore_user_shstk(current, ss_ptr); +} + struct arch_ext_priv { __u32 magic; long (*save)(struct pt_regs *regs, void __user *sc_vec); @@ -149,6 +207,10 @@ struct arch_ext_priv arch_ext_list[] = { .magic = RISCV_V_MAGIC, .save = &save_v_state, }, + { + .magic = RISCV_ZICFISS_MAGIC, + .save = &save_cfiss_state, + }, }; const size_t nr_arch_exts = ARRAY_SIZE(arch_ext_list); @@ -200,6 +262,12 @@ static long restore_sigcontext(struct pt_regs *regs, err = __restore_v_state(regs, sc_ext_ptr); break; + case RISCV_ZICFISS_MAGIC: + if (!is_shstk_enabled(current) || size != riscv_zicfiss_sc_size) + return -EINVAL; + + err = __restore_cfiss_state(regs, sc_ext_ptr); + break; default: return -EINVAL; } @@ -220,6 +288,10 @@ static size_t get_rt_frame_size(bool cal_all) if (cal_all || riscv_v_vstate_query(task_pt_regs(current))) total_context_size += riscv_v_sc_size; } + + if (is_shstk_enabled(current)) + total_context_size += riscv_zicfiss_sc_size; + /* * Preserved a __riscv_ctx_hdr for END signal context header if an * extension uses __riscv_extra_ext_header @@ -363,6 +435,11 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set, #ifdef CONFIG_MMU regs->ra = (unsigned long)VDSO_SYMBOL( current->mm->context.vdso, rt_sigreturn); + + /* if bcfi is enabled x1 (ra) and x5 (t0) must match. not sure if we need this? */ + if (is_shstk_enabled(current)) + regs->t0 = regs->ra; + #else /* * For the nommu case we don't have a VDSO. Instead we push two @@ -491,6 +568,9 @@ void __init init_rt_signal_env(void) { riscv_v_sc_size = sizeof(struct __riscv_ctx_hdr) + sizeof(struct __sc_riscv_v_state) + riscv_v_vsize; + + riscv_zicfiss_sc_size = sizeof(struct __riscv_ctx_hdr) + + sizeof(struct __sc_riscv_cfi_state); /* * Determine the stack space required for guaranteed signal delivery. * The signal_minsigstksz will be populated into the AT_MINSIGSTKSZ entry diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c index 8da509afdbe9..40c32258b6ec 100644 --- a/arch/riscv/kernel/usercfi.c +++ b/arch/riscv/kernel/usercfi.c @@ -52,6 +52,11 @@ void set_active_shstk(struct task_struct *task, unsigned long shstk_addr) task->thread_info.user_cfi_state.user_shdw_stk = shstk_addr; } +unsigned long get_active_shstk(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.user_shdw_stk; +} + void set_shstk_status(struct task_struct *task, bool enable) { task->thread_info.user_cfi_state.ubcfi_en = enable ? 1 : 0; @@ -164,6 +169,58 @@ static int create_rstor_token(unsigned long ssp, unsigned long *token_addr) return 0; } +/* + * Save user shadow stack pointer on shadow stack itself and return pointer to saved location + * returns -EFAULT if operation was unsuccessful + */ +int save_user_shstk(struct task_struct *tsk, unsigned long *saved_shstk_ptr) +{ + unsigned long ss_ptr = 0; + unsigned long token_loc = 0; + int ret = 0; + + if (saved_shstk_ptr == NULL) + return -EINVAL; + + ss_ptr = get_active_shstk(tsk); + ret = create_rstor_token(ss_ptr, &token_loc); + + if (!ret) { + *saved_shstk_ptr = token_loc; + set_active_shstk(tsk, token_loc); + } + + return ret; +} + +/* + * Restores user shadow stack pointer from token on shadow stack for task `tsk` + * returns -EFAULT if operation was unsuccessful + */ +int restore_user_shstk(struct task_struct *tsk, unsigned long shstk_ptr) +{ + unsigned long token = 0; + + token = amo_user_shstk((unsigned long __user *)shstk_ptr, 0); + + if (token == -1) + return -EFAULT; + + /* invalid token, return EINVAL */ + if ((token - shstk_ptr) != SHSTK_ENTRY_SIZE) { + pr_info_ratelimited( + "%s[%d]: bad restore token in %s: pc=%p sp=%p, token=%p, shstk_ptr=%p\n", + tsk->comm, task_pid_nr(tsk), __func__, + (void *)(task_pt_regs(tsk)->epc), (void *)(task_pt_regs(tsk)->sp), + (void *)token, (void *)shstk_ptr); + return -EINVAL; + } + + /* all checks passed, set active shstk and return success */ + set_active_shstk(tsk, token); + return 0; +} + static unsigned long allocate_shadow_stack(unsigned long addr, unsigned long size, unsigned long token_offset, bool set_tok) From patchwork Tue Oct 1 16:06:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03A8FCEACE5 for ; Tue, 1 Oct 2024 16:08:14 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 09A822800B3; Tue, 1 Oct 2024 12:08:08 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 04844280068; Tue, 1 Oct 2024 12:08:07 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id E044D2800B3; Tue, 1 Oct 2024 12:08:07 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id BE51C280068 for ; Tue, 1 Oct 2024 12:08:07 -0400 (EDT) Received: from smtpin30.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay04.hostedemail.com (Postfix) with ESMTP id 7C0421A16B6 for ; Tue, 1 Oct 2024 16:08:07 +0000 (UTC) X-FDA: 82625515014.30.AB537D3 Received: from mail-pj1-f50.google.com (mail-pj1-f50.google.com [209.85.216.50]) by imf25.hostedemail.com (Postfix) with ESMTP id 8188FA0006 for ; Tue, 1 Oct 2024 16:08:05 +0000 (UTC) Authentication-Results: imf25.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=KHBb+TyD; dmarc=none; spf=pass (imf25.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.50 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798791; a=rsa-sha256; cv=none; b=O58vr4zHQ6jzbn6Q+EdzBrAa0/jt04oWWz0gFiImxGUvhMCzcjwwhp9Npzg7E1o5vpsrTV 9ARCNdbAa+dGS5Vj/jZqrV+ra6TuMCKP/YTwPflA9D8i22IeteOoAKiiNE8WUBCjf6kZ2Y 1ZrI/ng5mYOMI+5Om/RFtCaFkkOCnPQ= ARC-Authentication-Results: i=1; imf25.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=KHBb+TyD; dmarc=none; spf=pass (imf25.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.50 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798791; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=CDZ6InrT+eerMmZ4qSLMUgeWEoIog/HDXgAiPQQVAR8=; b=8B1ngX1/uS8zKBZjbtBHCDxOJex18GhjFOYiVTbr5B5DHTsTFmxBa7JArO06xXIHhKdAF1 EGek7SEenwI/rxFNPke5mw6m/JZuoXP9JhTRf0b5fpHTsY2B9pUjT3+dpKvE4D/Q4QED9L 321dJypRJftvyHvKljP1+yjaXEmHJnM= Received: by mail-pj1-f50.google.com with SMTP id 98e67ed59e1d1-2e07ad50a03so4286153a91.3 for ; Tue, 01 Oct 2024 09:08:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798884; x=1728403684; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=CDZ6InrT+eerMmZ4qSLMUgeWEoIog/HDXgAiPQQVAR8=; b=KHBb+TyDrJqEmo6GJSEBDmrAZAl4QQimKkYgLOOgz6R8u4eeJbxf3k/R/SWHZa+51y CiTdgsV94ozg1TLOdC/DDJdFKR6KEmhy1hYy/TsTu/xlLPBHaQpcCxukev16D1gn8d+0 v4XS6BKQKNKE56SBFa/Cz14sge/AKdX5Wz3DUK6w7uPySzH9L6q+bpi4HoedN2voYIq7 zDezRLX5e3jEaDew+XI4897lyXooior6gGyQLqcRLQQCabCvDSGEZ+rVlKiDHBNek8f+ e3Kc1vUELmIoWSpMMrxkaC7tpq3aMOkZcs6R+Crw4xWSD6YEoGqMDEHuwIIlQq95ONfI 3HfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798884; x=1728403684; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CDZ6InrT+eerMmZ4qSLMUgeWEoIog/HDXgAiPQQVAR8=; b=ldurwh7GNZfhgrWtf1rM8Xg+WoozbDftkM9ZlmO74YmXFVtbhB9EdgFCdAyTp54gKP MltYFz/dva1fFZnCrtFUsk3QKcRkYWxoyRBxP6EmRbikEBAiQnGHR8zY/4ccdQL9QuRc AqYNi4qA8Gqa92GGlA819+6JZCzH5LPx3uUOW/RHYS6cWkZ5EXd/zisKWIUL3Ze6MxmX i2qVVTrOJvGB20FqxhXo3Fg9rETgRfsKAP/uz546EBux0CD+/3E/bNQgXGz2gjbTfP/b XQpYlEd1lqJg2F+vRSHSA54QftXSBfjo54nxLWP/szC7os/Yrk7gGITYNUk30ZejEAdi o4IA== X-Forwarded-Encrypted: i=1; AJvYcCUDin3qDra1TxkwELVpj4cDOgZGoanquwe4MhvLOx3LYb1OSHufz6C1osEcIF76xxmXND8ELBhl+A==@kvack.org X-Gm-Message-State: AOJu0YzK0TuSY4EVJPHvWMot0u0j81RmD/IZ/JGzJVvcQ7Vp1zLvvoEs 4mxwogtpWl/SQ/yTbi7LqOER3mwVfupNeo7PwFPgl9waZYKl2KO5eggIRkOw3VU= X-Google-Smtp-Source: AGHT+IHXYXQ1OwFDd1dtv/2VxG8PWP7+nvRdzMjo+9YOaXZGTPtIIOVqtoUXrRFuXQYTqOg0fWXwSg== X-Received: by 2002:a17:90a:4607:b0:2e0:8bf4:f298 with SMTP id 98e67ed59e1d1-2e182cb9256mr279683a91.0.1727798884295; Tue, 01 Oct 2024 09:08:04 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.08.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:08:03 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:29 -0700 Subject: [PATCH 24/33] riscv/kernel: update __show_regs to print shadow stack register MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-24-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Queue-Id: 8188FA0006 X-Rspam-User: X-Rspamd-Server: rspam05 X-Stat-Signature: h73gztth4nay9ikqhot76nk5e88xka47 X-HE-Tag: 1727798885-205237 X-HE-Meta: U2FsdGVkX1/TASjIMkRocmRy3NW+7epLybhFwXee40rnG3kkxK6tfQxC/AFrlVDwYZdjX5+jeK+OGjWAct5TKgQWIvXmODK+DxHWjOVkZ4khYsLEa4GwU1TBmpValBhIuw7mUWZdHfKL209u6NPBe9MaPrqIRmvgLhRhJRpQq8Ef2TdYp4Es1WBhBrxccPe7kpFM/VgwBYCQjLRnyEGavb5lhaqFo63Lcq1vNP7kpgjHnC7ancVzWyjQ/7RsUOuHA8fYbM0qrKhJ35TOkodxwK3ErsfSZ5hPkBuQDghVR/KIyMy1hC2VifkBkWJxzDlwCGw+Ut3IW80HTQPJ8OBIxcdRHJZdmsjaVVQT5mBzlG9XF5PFhviblZUW/vncUcZ9WT0lb8ZiDXvFh2U0eVERS30Lz9ofjrVOBgNpxD2sST7cjUbiazzmfdat16mBJwOqplx9p+tVqhQDfcubw/jR/FsLr1yv9+WC339smPM78cEGplPgWheVhut7KIZB3q6JeyPppwvLQDliyrDJuXQotIJf2OG/WP1VY9Gg4Q/WeSrwtFA0+yEt4X0LPmBTFKAExmLX5fuSHau6LWdhOJesZxYBbI9l95XU89RjHrfsv5DbYbYg8PqU+mJxyArd7xi9gemaT3R/kYExn5SWHgJmwMD8NVAafstqNuoVHarjP8Vkie4FPp8MFEIVn3k8bLzCvvs5ua+z4YTCGbQX7tTkYxLUqFZT2kqn7qLr3cyRueDz9bbPqeU4JZs1Dtoi1+rPURz/2kJ5VxDC4htZ8NmTXJD21ddPNvND8v/mu7GuF4nBrSDU14ytJUO7Ym7olbuYRLhyK6XRY8KMnAv6KzeYiKXYSXe/AOzAXBNUpQpPlPnLzc+7g07fZCWNz5ynmk9hG+/jrZU2M7ImxKw7jiqxtM74PgptQtX6WCxse3/FsjIBk67Hcj91W9MG9+UB3xUAE34R6CBMgJ2Lo8AQJAy ZkAsPgfP J7o68hBIRVKV0O6MiyA/5N72huUVX8eavp78LvOjpcTH7WA7i9U6ugD2K0cI5HJFgC9mQZfZPuKRMdMkb9UUVreIT3f+Poy7VtgK3bUyCEeA67vnYGEBmL4LykMZx+ldkpPtlCl+QfXRrogZzxtiXip84sqUNuhhNUhFRwkQKKk9eVgK2mPMM8RlufqUO4hh2UnTCBoB3YBpB4fqGzZL3adavtJ9Nw2vumkAC6KLdixpo02YjONXB1DSILGaqf5Id86pXpbKS9DOp3ytUoD01jUSO6DZD158kz1QDdKWMqF15NgEVMc3HQI4OYyLvIFOuipKU/+7zpVEcGKtoDapyRIzhhx1c1XXZC8jKtmaaosgmwfroB2hNRjR8y+GL6V6nO2oTq54238oyYnoFxqWalPvjT0vck6VL26Jv2iolG5DITOWslTVT8+atjuWqDMzD0CvGRnR7wAYMnygcoyZhr4JhP0gm67cxsCVFn+5SMzlok0Hxlp1VqFdMw6w31oVwzpqE X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Updating __show_regs to print captured shadow stack pointer as well. On tasks where shadow stack is disabled, it'll simply print 0. Signed-off-by: Deepak Gupta Reviewed-by: Alexandre Ghiti --- arch/riscv/kernel/process.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 5207f018415c..6db0fde3701e 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -89,8 +89,8 @@ void __show_regs(struct pt_regs *regs) regs->s8, regs->s9, regs->s10); pr_cont(" s11: " REG_FMT " t3 : " REG_FMT " t4 : " REG_FMT "\n", regs->s11, regs->t3, regs->t4); - pr_cont(" t5 : " REG_FMT " t6 : " REG_FMT "\n", - regs->t5, regs->t6); + pr_cont(" t5 : " REG_FMT " t6 : " REG_FMT " ssp : " REG_FMT "\n", + regs->t5, regs->t6, get_active_shstk(current)); pr_cont("status: " REG_FMT " badaddr: " REG_FMT " cause: " REG_FMT "\n", regs->status, regs->badaddr, regs->cause); From patchwork Tue Oct 1 16:06:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818428 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 059FFCEACE2 for ; Tue, 1 Oct 2024 16:08:17 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id BBE792800B4; Tue, 1 Oct 2024 12:08:10 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id B491B280068; Tue, 1 Oct 2024 12:08:10 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 998392800B4; Tue, 1 Oct 2024 12:08:10 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0017.hostedemail.com [216.40.44.17]) by kanga.kvack.org (Postfix) with ESMTP id 7B45A280068 for ; Tue, 1 Oct 2024 12:08:10 -0400 (EDT) Received: from smtpin24.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay04.hostedemail.com (Postfix) with ESMTP id 2F9C71A13BD for ; Tue, 1 Oct 2024 16:08:10 +0000 (UTC) X-FDA: 82625515140.24.96C725F Received: from mail-pj1-f48.google.com (mail-pj1-f48.google.com [209.85.216.48]) by imf20.hostedemail.com (Postfix) with ESMTP id 42AD11C0016 for ; Tue, 1 Oct 2024 16:08:08 +0000 (UTC) Authentication-Results: imf20.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=kTonOInO; dmarc=none; spf=pass (imf20.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.48 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798867; a=rsa-sha256; cv=none; b=VxPmdUDPfaG0YGRzZN2QJRyTgJcoSYrO23GMVh7UI7OhQGaWoBxtaX9ZdbLDXV6dJCJc+G ke5iUvAFeF+8buv1kM6rx9zc4MJgo40Q4bKvnKb7iF007EUV8OvfcPHORtFu0buK9tm6nt n7i2A9WuUjLOM7gdd7FmJg3iFZtpwB8= ARC-Authentication-Results: i=1; imf20.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=kTonOInO; dmarc=none; spf=pass (imf20.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.48 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798867; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=WrqzwiSz6htfj/EZwiH/KuGtkUyrK9yji0Ttd1ipzTM=; b=N1d4JfvWHIBnxaGRS5OsyjOHdRodxEm3cTVGjqnmfLM/TZi+rD4zueM2nwbqermMLzYqBD fuE/tjrOqb96pOV+s1ciMJ63HyseCnyvOZxRjaB6RvOctVIyum2SraY5pYgWNIhjXOf5Z2 s8KhzK9cGKjN1oY7yF/JcYoZeVCKnHs= Received: by mail-pj1-f48.google.com with SMTP id 98e67ed59e1d1-2e0a5088777so4603341a91.2 for ; Tue, 01 Oct 2024 09:08:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798887; x=1728403687; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=WrqzwiSz6htfj/EZwiH/KuGtkUyrK9yji0Ttd1ipzTM=; b=kTonOInOlNPHjmnUzeukTzSIYKmviiuEPkosVH33FgtkvlbymxqhNbKA5aq2WJEJgU 4qXgjGjMIQCQn/WuHJ2/f7JEl3Wk/mymM9ZZJLWKsyROmYDjeUOmT+Ta2odnLqkvAUue cviM1/2akzuHdEyKq953HyBGAsFepJYmvkOPZtovbwC7ugzwa78OgpcUdn8aBD8KrLSK mYoizGbrKuy0YjX4qDZkEp3ptEe2WM3liLLSRh99P00qgc13hF3jTJDhjk5VlWMWqs0B 6ZMXZghfHLH+n/oHiJgMf8wx2cMXXdrXQ3jxp41BP1dB7LOGtQzWA3z54OOcHyxvo695 Md2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798887; x=1728403687; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WrqzwiSz6htfj/EZwiH/KuGtkUyrK9yji0Ttd1ipzTM=; b=pc2MFCTUYG8qrYZYwQAcvXmIjChvAXHwsRUbkXUZ/uJ3Stjp7ZCxXy93Qp95Mrovdu Gn6gnEuCPnhB9g05mj16UN4pawSJXo/KABU9E6xSD4D92mvYw4NX0jtaDx+XjitSL2zZ Shyscyo4r4qeu3RScrntSBg0DPFZPmZkpdWu8wkY2Ucr4NdjRrsJk1pKeLbLBDuxgw9H vJJqyFKP0CvvxD6wYJnBQ/CQ2uwfV99ufHYBOCP9IpTvj4z3Q3tMKimmjSzIRSVuo9GR E0lsDMVwQktf0S2SWNGbXTPeYFQIvPP21dohtTJx1W3Jc5IS91VSDywhJKbnLE9OGSaN mP2w== X-Forwarded-Encrypted: i=1; AJvYcCUY5RJf2UQJvFbvqu1ImV3Oli+VX6c9IsC7wmBwu5U3UTQlCXOiQ+junEx4cNd4WaplFc3YBNZi2g==@kvack.org X-Gm-Message-State: AOJu0YwW4aBQYflemJ6Q68JUuygknVKOZTd5dh35twzXwvpEjCNYfUJM U/w2q5P3m0/8LnG0f7qGhRU7Ctiwcpd577U+t25IfjJN12el5rnEPj3ruCMtxPk= X-Google-Smtp-Source: AGHT+IHlpxV7uaOIVvjbu70DzDa5TSukvyO8oURavL8zubeHFYwJVNM/zX5lCBEo7prSC6bDzujUyA== X-Received: by 2002:a17:90b:3543:b0:2d8:8175:38c9 with SMTP id 98e67ed59e1d1-2e184804fc6mr236572a91.20.1727798886907; Tue, 01 Oct 2024 09:08:06 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.08.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:08:06 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:30 -0700 Subject: [PATCH 25/33] riscv/ptrace: riscv cfi status and state via ptrace and in core files MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-25-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspam-User: X-Stat-Signature: 75z3i6y9appcrs13stcntyr1rdt8jnug X-Rspamd-Queue-Id: 42AD11C0016 X-Rspamd-Server: rspam02 X-HE-Tag: 1727798888-822894 X-HE-Meta: U2FsdGVkX1/Itu/HIiioBE+dNiizYBXaMdOTVpn+DB4UXtVjyMoi1S3U9bS7QWDxMzeY8FIT+S3k1RciwUSOVwswaONkxtpcMnaD6G0f/TmNapH2KpA01eTJZCWQkMKiKQJLA0fZmvRZ3L6s2GvqxZqugKdptYRPcGEW8+j7fXD7mc+8Q+ffUkouNzNoEBePdnDMbRlbHGOKxPa7oW2c1JLAdxmY/ImTe4nKIM4UIkZXAnQUCGykgglUgj0Aa4LjaOBD3R0It66v37XDFB4niBT78dpxct7ze5IHSzlQvFUUAS2OJDRhdcMs2mQWpWXMFfRhKOhhlwRnkByQMH3yG26EjMRoZU3FepXbBL996ApTX6VerSdxhUxepaS8m6RlLLt/y9BKRlHM/ghRcp54G6/SzNZJdQdobBONC3uXGsMsbf0kFxscSuHDxv8WLLP/jFuZCpyYkOCPJd6NKtki1c6xVxtRiOLav0RDAx5wbJy7Fr75Hf0L+4Vav+SBIrZnR1v3hCWJjG5/MCbwPGn2Vy5MRdgKdBlMA+u/VLQY1jKutTxTzE4AgvaSXzOkdjCPi7cYnI3FeoB/1u19I3Y6w87PxV5WAg4EMuxGs7g4JVs1A5HZHBuVPEcjB1ziJ+AjIJRZnVkBF3nwSxPkyo51BiqZk0tT1M38DnedkLJY4BsAR/VHJQVdRlDp+QMZ6E8JkGmKA8jtKjxoD1ifCw3tc7qJd0/7dCRtjwLvo9a6HILZUcwYqkEfa7s/7+GMKjEnfRsdDAMWBb8FsY8Rjtn2Uk68MSeMByyh4Q3gkCvuPIDWfPovfl1s3wPTfYIy9ZtY1uSSKhaR4aZjv34L345D9+5Tr3rIDUl1BdwuqdRhO6M6N3inwj0yjDMQNm9Yy6wAdEW4zQ5gSaGT44xYdQI59LLuGOuE99QKblY6XWsotAqIU54mHvuypKqprIdNqoUPCIO1I4S6YtjpAkrSqU4 AZtEzqnT hey2D1DSGbJlgT3JKjHf7NJ3zkLP7zifuniOGUuNPB485JnALIHvaUbDdIzgWNKJmRAt6MSs9x5dUK+LE63bbk9KkLHsoaFMfL06hDIXVor1DA1DRplgm9ke8QDT4srHkd0+tHqocxI7BGL/UCqFmGGhhARh8ug/pMGVKSCEyDTZRfrfwuqufot+UzjdjPt7gl+SZoUa9BipQaAr5Sw5HuqWqWeCWvQVc39faBLPx30We6hpxa5EK5UtAUI/vsWQxwEkP7gD0YMKX/bK06mcQ5PeT8v6bBVMfyTXmngU7WlaeXYW1GSyVl18boskZOwK2G9Q5Pp1IOuVLJq1GdZz91N6cwSrYCHtnIAitJUl4ASzEwjGmlX8Hir+Ysw1PKgBz0WS3wOfSjkuaK8iBugi5Nwi7aMxSuYpJXrVxRmrEjunEN0HPo5QONRgu+LjMG3GddWf6M6QMRS1+oj0= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Expose a new register type NT_RISCV_USER_CFI for risc-v cfi status and state. Intentionally both landing pad and shadow stack status and state are rolled into cfi state. Creating two different NT_RISCV_USER_XXX would not be useful and wastage of a note type. Enabling or disabling of feature is not allowed via ptrace set interface. However setting `elp` state or setting shadow stack pointer are allowed via ptrace set interface. It is expected `gdb` might have use to fixup `elp` state or `shadow stack` pointer. Signed-off-by: Deepak Gupta --- arch/riscv/include/uapi/asm/ptrace.h | 18 ++++++++ arch/riscv/kernel/ptrace.c | 83 ++++++++++++++++++++++++++++++++++++ include/uapi/linux/elf.h | 1 + 3 files changed, 102 insertions(+) diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h index 659ea3af5680..e6571fba8a8a 100644 --- a/arch/riscv/include/uapi/asm/ptrace.h +++ b/arch/riscv/include/uapi/asm/ptrace.h @@ -131,6 +131,24 @@ struct __sc_riscv_cfi_state { unsigned long ss_ptr; /* shadow stack pointer */ }; +struct __cfi_status { + /* indirect branch tracking state */ + __u64 lp_en : 1; + __u64 lp_lock : 1; + __u64 elp_state : 1; + + /* shadow stack status */ + __u64 shstk_en : 1; + __u64 shstk_lock : 1; + + __u64 rsvd : sizeof(__u64) - 5; +}; + +struct user_cfi_state { + struct __cfi_status cfi_status; + __u64 shstk_ptr; +}; + #endif /* __ASSEMBLY__ */ #endif /* _UAPI_ASM_RISCV_PTRACE_H */ diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index 92731ff8c79a..c69b20ea6e79 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -19,6 +19,7 @@ #include #include #include +#include enum riscv_regset { REGSET_X, @@ -28,6 +29,9 @@ enum riscv_regset { #ifdef CONFIG_RISCV_ISA_V REGSET_V, #endif +#ifdef CONFIG_RISCV_USER_CFI + REGSET_CFI, +#endif }; static int riscv_gpr_get(struct task_struct *target, @@ -152,6 +156,75 @@ static int riscv_vr_set(struct task_struct *target, } #endif +#ifdef CONFIG_RISCV_USER_CFI +static int riscv_cfi_get(struct task_struct *target, + const struct user_regset *regset, + struct membuf to) +{ + struct user_cfi_state user_cfi; + struct pt_regs *regs; + + regs = task_pt_regs(target); + + user_cfi.cfi_status.lp_en = is_indir_lp_enabled(target); + user_cfi.cfi_status.lp_lock = is_indir_lp_locked(target); + user_cfi.cfi_status.elp_state = (regs->status & SR_ELP); + + user_cfi.cfi_status.shstk_en = is_shstk_enabled(target); + user_cfi.cfi_status.shstk_lock = is_shstk_locked(target); + user_cfi.shstk_ptr = get_active_shstk(target); + + return membuf_write(&to, &user_cfi, sizeof(user_cfi)); +} + +/* + * Does it make sense to allowing enable / disable of cfi via ptrace? + * Not allowing enable / disable / locking control via ptrace for now. + * Setting shadow stack pointer is allowed. GDB might use it to unwind or + * some other fixup. Similarly gdb might want to suppress elp and may want + * to reset elp state. + */ +static int riscv_cfi_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + int ret; + struct user_cfi_state user_cfi; + struct pt_regs *regs; + + regs = task_pt_regs(target); + + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &user_cfi, 0, -1); + if (ret) + return ret; + + /* + * Not allowing enabling or locking shadow stack or landing pad + * There is no disabling of shadow stack or landing pad via ptrace + * rsvd field should be set to zero so that if those fields are needed in future + */ + if (user_cfi.cfi_status.lp_en || user_cfi.cfi_status.lp_lock || + user_cfi.cfi_status.shstk_en || user_cfi.cfi_status.shstk_lock || + !user_cfi.cfi_status.rsvd) + return -EINVAL; + + /* If lpad is enabled on target and ptrace requests to set / clear elp, do that */ + if (is_indir_lp_enabled(target)) { + if (user_cfi.cfi_status.elp_state) /* set elp state */ + regs->status |= SR_ELP; + else + regs->status &= ~SR_ELP; /* clear elp state */ + } + + /* If shadow stack enabled on target, set new shadow stack pointer */ + if (is_shstk_enabled(target)) + set_active_shstk(target, user_cfi.shstk_ptr); + + return 0; +} +#endif + static const struct user_regset riscv_user_regset[] = { [REGSET_X] = { .core_note_type = NT_PRSTATUS, @@ -182,6 +255,16 @@ static const struct user_regset riscv_user_regset[] = { .set = riscv_vr_set, }, #endif +#ifdef CONFIG_RISCV_USER_CFI + [REGSET_CFI] = { + .core_note_type = NT_RISCV_USER_CFI, + .align = sizeof(__u64), + .n = sizeof(struct user_cfi_state) / sizeof(__u64), + .size = sizeof(__u64), + .regset_get = riscv_cfi_get, + .set = riscv_cfi_set, + } +#endif }; static const struct user_regset_view riscv_user_native_view = { diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h index b9935988da5c..7ef63b2b67a1 100644 --- a/include/uapi/linux/elf.h +++ b/include/uapi/linux/elf.h @@ -450,6 +450,7 @@ typedef struct elf64_shdr { #define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */ #define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */ #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */ +#define NT_RISCV_USER_CFI 0x902 /* RISC-V shadow stack state */ #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ #define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */ #define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */ From patchwork Tue Oct 1 16:06:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id E323BCEACE4 for ; Tue, 1 Oct 2024 16:08:19 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 5F3012800B5; Tue, 1 Oct 2024 12:08:13 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 57819280068; Tue, 1 Oct 2024 12:08:13 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 3A4EF2800B5; Tue, 1 Oct 2024 12:08:13 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0016.hostedemail.com [216.40.44.16]) by kanga.kvack.org (Postfix) with ESMTP id 1B6E9280068 for ; Tue, 1 Oct 2024 12:08:13 -0400 (EDT) Received: from smtpin08.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id C28BE1414F0 for ; Tue, 1 Oct 2024 16:08:12 +0000 (UTC) X-FDA: 82625515224.08.4D1F164 Received: from mail-pj1-f47.google.com (mail-pj1-f47.google.com [209.85.216.47]) by imf27.hostedemail.com (Postfix) with ESMTP id C15924002C for ; Tue, 1 Oct 2024 16:08:10 +0000 (UTC) Authentication-Results: imf27.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=YDdnBhdl; spf=pass (imf27.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.47 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798851; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=IjvUiWFDgNIgR9D1bPvnv0vD2BBeNN4jEZqEwYO5LXU=; b=Dakn8lChoIgdCTKB2bHK3VXKLC6yozEmjKB8rzAfSembRTaitbtD25kUGhIknAnV3iW0PZ WVDNbdxgDRrWIxYlk4PEhp9FaYyn7r+GxBWxyXkI6pNxLpgM/V1RcDMtcAiseFOGa1XiK2 UJP7YPwekupwGBf1YSeh+0nMEG5DgWw= ARC-Authentication-Results: i=1; imf27.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=YDdnBhdl; spf=pass (imf27.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.47 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798851; a=rsa-sha256; cv=none; b=BHHUmjb2dhpiINDUdxfeaT8mjoto+MPUiYsC5uuE9Fcn3/CQ6DM7j3D+Z5h+eyG9+19Hnv V3EiHvoMZi6ZPbgzer01J/u6HCZhPqH0wQlUSO5eW8fvdEOWZ+nmJuP7Q0WnY4yc0IQ+K4 c4MgES7Vk9mUOP3ERCe7t6aPiho0LYw= Received: by mail-pj1-f47.google.com with SMTP id 98e67ed59e1d1-2e0894f1b14so4296656a91.1 for ; Tue, 01 Oct 2024 09:08:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798889; x=1728403689; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=IjvUiWFDgNIgR9D1bPvnv0vD2BBeNN4jEZqEwYO5LXU=; b=YDdnBhdlb/ZLyNyazKsFop3MrwV6Y7W4ZmGe0hQDaIbri8kic+Zo+LJW8ihrJ+6qZP CeMTBvZYhVymNFezCCCMGN2R7jZa/7IpwbGYvz0Pxlj4GESeQ92+n97+vF19tjLZJWzq 7F9Q5ZbHhFVnu5zY2n8sLLHVshA5cH9n9qpX/hC877uGUnOyCBY6EMv8E/dXJ0l/VcMX txhiKy69lylevjzHm40px9OVXYqJYrpwgdsMLTLXjPAl6ZuvHrApFBiqv0N2+6gefCd2 mi59nLay6bpsfuCgrYpFYWw1FNEmrv3ip/5IzR5Ovd4A4zIXSWmpRst0crI57iUJquZF 0p3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798889; x=1728403689; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IjvUiWFDgNIgR9D1bPvnv0vD2BBeNN4jEZqEwYO5LXU=; b=abp6hb43gTfsobM9P5taaFjero9lQpVWDQmqzXj1bOuFNHr20vkzh3khA6ySHdmdk1 70vXEpsju7vz8Wh9pn3T24zZv7SelppcyZCuM6GA3vdwv1dq01p2IyGfqDVjzz8yirN0 K6/dr7uM7yPQ/FEYnVwjATqHkmDvbiAqfqeSrwXHPTkfmPUJeNlHxi5KXTeKwmZDkqfO fSyABt2e/rXXFY9rIVJiw1BlZ0dxbNFvvT1eYDoYK6D79/QXPwnXTF/dbPyywhnOz8k+ Ommw9s35Oi9jUSJU6cf5Knk1qDo53Pmo+J9xDcIJtpQfTRNrVKU330n7ZgH9egvqjUJI e1qA== X-Forwarded-Encrypted: i=1; AJvYcCUwbm62LeJBqOkTxr7YRJRT47hWwR4ZTtx0C0G7DhSPfbK1JJH0VJr4PYpMJBqyOaawgMSnps2MNA==@kvack.org X-Gm-Message-State: AOJu0YyQADD68pkhqLD2q3AM2pc+dgBjbmKb0cnLakUMX0E6fpD8gYcN EX1qoqy6zLVvQ6Rom2LfZ7tnW1ypMAYzQw7SAenOlqnIOZQ0XvcNn9ddVwxiVVo= X-Google-Smtp-Source: AGHT+IEFtkvkf8CeAUwgsAXuKYnO4LfTHDhI++8QoSmmlyNMIGKy49PqXf+MVN7GYY3kXwIYrf7vbw== X-Received: by 2002:a17:90a:7402:b0:2d8:77cc:85e with SMTP id 98e67ed59e1d1-2e18496b9e2mr188291a91.37.1727798889491; Tue, 01 Oct 2024 09:08:09 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.08.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:08:09 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:31 -0700 Subject: [PATCH 26/33] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-26-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspam-User: X-Stat-Signature: yzgbxex3obh5x9hphqaafi1rxkzq79ma X-Rspamd-Queue-Id: C15924002C X-Rspamd-Server: rspam11 X-HE-Tag: 1727798890-64466 X-HE-Meta: U2FsdGVkX1/nQUkIJgFu+3DFHYqnMwsIb8QhH6XOqRqtZ36It03OjC0l7QajNfgCU7p3aA8A+UVP0wS86sxS4zn2vC77jM+QsiqpIzj+Pii4uKgG6vW32Bub19eqt/QtSVC506B5v8rIs3rTVBugW8uAbduRVdmaaPhtnFAlSjfUZOTpNpIyyOMheeDNGorW94nt2/3dshgMbPfSqoFGMADL1sRoFtCKnIQupt9/ns0Z/n5KCG4d7pMWLlmVs5ktY7hPd+b8Bx68OXFy5tiWLx10mX3rongs7vX7MXp9Ugf27pDp337f0AN42UN4Fzj/aXC4LPTjE44S42GHbxitihT4ad4Jv9R1M9P3ye9DyEfxaG7fG5pMqUGn5qbTxXNhoDV7ZCpTg04mvLIiPHrHThqh1M1LA6tsjBTFecEAR2OoaGONA6ebMGj2tPexsHh0o45+zR/nTFqUNrSN8kH4MIgIcBk8SMFJZDdB445HbanGpVWfHAX37IX0cGHi0RCBmyC7tpmtrmi6eLDLLSyemD2z2QrqaoXsyWcswbR/xtms8KGox5jnIwKy+o9M64Q0PH6OeEr4Mxz8plg/Bq+AIN7kcho+vEIRFpm3wmWn9dI47mfXa+HJCA2HhkTztHbFNUmkmmbyW8WQXbnYb9g6nouz+NAggPEoXTzVpTt/PrPpX087RnhU4N8xAnsgBq+eG8dzbnuY+6wWysc5zIRUWuRErvkFPqca1RDRmxhSX2hL23Pi/dbPtDeyKIJroE4EIQwBwzPU1KGvlYnCQkNGSza9/aprCE79Vu3MOx1TOIVVIrWziUtyfubVMpkLyc7AeYbtOcVc1orphwJiVKkfhI391dMy7HQQ9mpTaMQ2kn7feTKyh6bdTBWmzISLEhAQnNR4uNSYZj2YCNoWq4l9y8I4NZ/GmkCJSLUArHj6QpQfPNFEIMA8zH0HXBkHY3srA4EC4r0YWOnbUD5IaBA jIGbKNcq J9ZSwcHKe+8TJBIDQstphDp8AZj7UZgkUIJ4tMM0tjs+frlV1m8EUKQzBpsmAZGOccFhpDp5sCvgW+xkq/dIr6lHwUprIAVUQGCNYaS7TtcdMCppjqd/jAo4d9WP/leJUW5hOD6qVE3UYUSw6qEIqlKyXE//wpcbaeo2r91wnreWfbkVW5PhRsdNy3SxLbhxRmy6nDQUpxzAJhwzb0h0TlvC07t+WqJBGF+v1PdDkPRptxRLtEqzr1Khqf4KsAgGz/4zHDYuyKj9Pv5XMof2vUv9fbFRnIV2PaEVNQonAChrGz7iAm2LFdVIFNTRhvTCwTlk09/33I2AFJ1xM6v9Xy/v8qqftn0yAXHDgwjoxPIRFimh4BrEHTaP+1ZNU5oZkN/XQTJXyRCykDPPVRu6B0aASd3B6zDqbWsAid3xcie3zxIhBY6vhHxD9N5pnl5U/bEUWrX03eZtovKU= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Adding enumeration of zicfilp and zicfiss extensions in hwprobe syscall. Signed-off-by: Deepak Gupta --- arch/riscv/include/uapi/asm/hwprobe.h | 2 ++ arch/riscv/kernel/sys_hwprobe.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index 1e153cda57db..d5c5dec9ae6c 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -72,6 +72,8 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZCF (1ULL << 46) #define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 47) #define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 48) +#define RISCV_HWPROBE_EXT_ZICFILP (1ULL << 49) +#define RISCV_HWPROBE_EXT_ZICFISS (1ULL << 50) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c index cea0ca2bf2a2..98f72ad7124f 100644 --- a/arch/riscv/kernel/sys_hwprobe.c +++ b/arch/riscv/kernel/sys_hwprobe.c @@ -107,6 +107,8 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, EXT_KEY(ZCB); EXT_KEY(ZCMOP); EXT_KEY(ZICBOZ); + EXT_KEY(ZICFILP); + EXT_KEY(ZICFISS); EXT_KEY(ZICOND); EXT_KEY(ZIHINTNTL); EXT_KEY(ZIHINTPAUSE); From patchwork Tue Oct 1 16:06:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78A81CEACE5 for ; Tue, 1 Oct 2024 16:08:22 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id BBC722800B6; Tue, 1 Oct 2024 12:08:15 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id B6FB2280068; Tue, 1 Oct 2024 12:08:15 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 94B522800B6; Tue, 1 Oct 2024 12:08:15 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id 6A83D280068 for ; Tue, 1 Oct 2024 12:08:15 -0400 (EDT) Received: from smtpin14.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay02.hostedemail.com (Postfix) with ESMTP id 2F284120A1C for ; Tue, 1 Oct 2024 16:08:15 +0000 (UTC) X-FDA: 82625515350.14.BE75DA9 Received: from mail-pj1-f53.google.com (mail-pj1-f53.google.com [209.85.216.53]) by imf18.hostedemail.com (Postfix) with ESMTP id 4899E1C001C for ; Tue, 1 Oct 2024 16:08:13 +0000 (UTC) Authentication-Results: imf18.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=UrANrm77; spf=pass (imf18.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.53 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798829; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=hq3DaQ4YpzTwJN9yZW6Sl3gPyL1m035+b/05XFtk9T8=; b=pDRRARUH5NR0m5odboasFKobSU5HEbMSIgjuQX6WtUqt5LldSEKxypSnACBE9lVkArRWem 1R04l0enfbWXR6GzcPrMW3MzXgryJu4/yk37L4AEzPWGT+54iQF9JLmNGplGXcrn7bVEe8 CJJUj0O6FxcGquC7cGXH391TiYAZPg4= ARC-Authentication-Results: i=1; imf18.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=UrANrm77; spf=pass (imf18.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.53 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798829; a=rsa-sha256; cv=none; b=FU954xaXM2WDQBLJ16WRaFZcoAcoUGo82ouPtOjHB9wAQda+CmgtT4ECrIktq3pIjbCcZA SwBAr62EnTHPHRrfP/8GR75fzx3dcONaIU3q+NBUGT9OMkGFL27E+oj1gIkdCcyTLBkN2j YoSvAO/+yIOTWKZcpEbjzByxv9cIU38= Received: by mail-pj1-f53.google.com with SMTP id 98e67ed59e1d1-2e0aded661bso4201684a91.1 for ; Tue, 01 Oct 2024 09:08:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798892; x=1728403692; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hq3DaQ4YpzTwJN9yZW6Sl3gPyL1m035+b/05XFtk9T8=; b=UrANrm77w1ahF+ijLZGrG988hfW+uhFmRnNJH3rzPNdATyfGDgQwF0/VSTqvS4itrk 1XUf/ystX3QSrt4961RniJ21HYv2e8jEkzmGH+3RdLbzwxUR4JgwVVS/nbENs08OZAQH qhGS+gWb96XjDTt/naIDl3QDxhupfq2JfxeL7T5/kTqxCcAhdhlGsPeFO/Pmq5HGPDy9 JSiG0TmWxI894q/VRC0+DcuvPwiMIS2OIc0QwxSnXTcFQawpYw/zSzMdaT9dlWsjjOcl O2HGHGyUzlbweIoWPWtb1GF+EQXh9Y5jZKNTpgQ8fgySDK3XLGwW7H7AlCQ/ZpWenYjo zPgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798892; x=1728403692; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hq3DaQ4YpzTwJN9yZW6Sl3gPyL1m035+b/05XFtk9T8=; b=R9TLsxoSDkT6jJSMC9abPIoJVsYQTWgy2lWF1KuovU0Ro6KOF+wk6HdjsZ251N2U2P EhTTFSy35QEfnIEljINAGJh9zH/COkGkk2k7dlx5aWM54HFulnDSV4OS83aNMgF5VzP+ duXlzpedmO5YtrKbC4kSJNqKffvfoGKOeCYKAe06g1FM9I9Dy4Ss884at9uINMs66qbU 69qeragw26AbVerPn4RyEEBugC9JNFOHa7WcGcduXmMUpcBLjCTdctYbAe22195lBGFP 0H5AbXh/0CI7FtEzpGG3u0DKHc9vx3lCLSxRJbhF7eHCHUuLhD3W3dXM+CrOwlCFyp9T m07w== X-Forwarded-Encrypted: i=1; AJvYcCXS8tMgdNbKl2nKvu0rdoJ0i1s+IV0n4R3WNd8MvxbGpr9jjnsiODyQGsSXCJUKYhHjBQq7YA8QIw==@kvack.org X-Gm-Message-State: AOJu0YyyhCpCiU900lArrdTJixZUKsO5J6Teb0QsGpeYb7XiC+nA9CBA X0ymMYfBPn/Ca/uQDr3sE+qGi+xwtRleudk8HKmhbegVlHF0pWE2NXEwPQKA3Oc= X-Google-Smtp-Source: AGHT+IE1mC9nGVWp9Ep/VDB2JSrhkpX0Jq7sG4mPQqlp/n+0JH5ZZvXoSkfUlTtqgO8CiZuzgQPUOQ== X-Received: by 2002:a17:90b:264e:b0:2d8:82da:2627 with SMTP id 98e67ed59e1d1-2e1848f671bmr199013a91.27.1727798892044; Tue, 01 Oct 2024 09:08:12 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.08.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:08:11 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:32 -0700 Subject: [PATCH 27/33] riscv: Add Firmware Feature SBI extensions definitions MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-27-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam03 X-Rspam-User: X-Rspamd-Queue-Id: 4899E1C001C X-Stat-Signature: bdmt1tkf4gp9c8pu75ar3nrmb5c1i6qn X-HE-Tag: 1727798893-875698 X-HE-Meta: U2FsdGVkX1/m9rBCJwGd7MEMBzGHFWps8EUftsuPVzqufC9C4WaMdbhyQ9FNZr+8LuwSh7Dgd4fSicvKNlyzWvENQfn49s/fQEGPA4lVE9wpvILmyqn6j6nOse+bk9yAOuWwt1gSFtT05QJjl2qd//N/t6u38ZqZB6/k074ZPSdW5VNN8/Jkg0fBTUJ4A6DgNhkn7RSsP8kugQvL6307DMe8DBNHi0BNrE72KzxfS9ZIqy/lnjvA9Sdmd7l1FIVSl6d/jEj7VwryIjPpVjCSz4osj0myucdlPst9bsCuEPQ2erS6SHEXlsq4O+zhEA0e2SNQByEnF0+wahldWkeG59wCKsrgdn574pz2HoF0VRjzSBB7VuDMfpZ19w4GxPsiDmAiuVOi+Ewq8IfxzABIZOSrUcohSDTxz0IJXIUDhrot41YYoC3y+9INTIOtKQJ1FqbfV7kB+ai+dep8ADhM1g0dIdIB9q2CUQFGSkGskoYa/bZH5VvKMq0RbMcuVkLIT78n3Lw5fbWgibneALFyC/oncxToXjb2aoLjTtJVLzKcqjSii/NjtvMny35tkYrnuIsYMirlpd1Wv9TCqk5OfTzI6v/BxFUsYVjNNX4p9VU2I9dzwwc0AbvvB1nhO4Xxc5diAaE2cj9Lgf6fWhdKvfs5PEovnRhPw0Rmwg3nvTOhLaXvZfNJ8aPySE7iNxvTBlz+1O+hV7judvHK76+pUwPrjw5xEMVkGxx+IppFNAg1tMS3jIbC9xf4LcKne5P+d4m2knlxMMundo2Bd/DueuRJkrKSrKPQTgydUKh/07tUo/fuieWiZlx6mCRg1qj20S3CB820RhT2NJcdC4ni6A0AxKbkt2GT3mi905TLG2Xd1gaJZ4iPyPr7yVXczDK1+9XekAeHcwrzUoC8e8vvUmRZNbJ+Hk9XoEVI9K7waTf3KGx3zBErTfQJ8IXCp8GZ5U4ql9U+yAxC/F40vYM YtGbPVEq UgfE3KxA3OGUjvWGrp6KZWDv0iOKorDh1EJnxFyChM0XdNf/dbKSTsC0rS5ThyHOZ7pJhWmTkP2k3GV8u9r9AwMienmIp0C5zo9Vy0CnIpVAiu56Fwi6g2Gt5wfnJQOKMeizdUUEQUlENruN0w8qJ1RZJXirK/gv+dHwg/dCY4K/0bvdx3NNA4fZx+1Tz9JugOeH4JWBYKsIGh4CUYMOJx+rHvExCDZFcHuvi42Lp7QfYvvpy0Ms0bDKjj90eyl+y2y1Lzy3K/iHJ82p/Zs437lDmtol92TzKT6MklE3YzNf0aTxXZav1dyp2veOuK5XeriOJoJqBoBsg3vCyOFGE68wHUxk6j49EuXz8az2A3ZuQyBnUf/5Vj5j+Qk/+PncTLDHcUTK+5SIEMTjKVkYyP7bgeS9QwIPEiOXd2WPMKcoropDHm5fK5xnZc0m34dXExHv0tEpQWxQES9QRsVbdwHV3d0A5thEIdf6ctY2aQiL/tz0= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Clément Léger Add necessary SBI definitions to use the FWFT extension. Signed-off-by: Clément Léger --- arch/riscv/include/asm/sbi.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 98f631b051db..754e5cdabf46 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -34,6 +34,7 @@ enum sbi_ext_id { SBI_EXT_PMU = 0x504D55, SBI_EXT_DBCN = 0x4442434E, SBI_EXT_STA = 0x535441, + SBI_EXT_FWFT = 0x46574654, /* Experimentals extensions must lie within this range */ SBI_EXT_EXPERIMENTAL_START = 0x08000000, @@ -281,6 +282,32 @@ struct sbi_sta_struct { #define SBI_SHMEM_DISABLE -1 +/* SBI function IDs for FW feature extension */ +#define SBI_EXT_FWFT_SET 0x0 +#define SBI_EXT_FWFT_GET 0x1 + +enum sbi_fwft_feature_t { + SBI_FWFT_MISALIGNED_EXC_DELEG = 0x0, + SBI_FWFT_LANDING_PAD = 0x1, + SBI_FWFT_SHADOW_STACK = 0x2, + SBI_FWFT_DOUBLE_TRAP = 0x3, + SBI_FWFT_PTE_AD_HW_UPDATING = 0x4, + SBI_FWFT_LOCAL_RESERVED_START = 0x5, + SBI_FWFT_LOCAL_RESERVED_END = 0x3fffffff, + SBI_FWFT_LOCAL_PLATFORM_START = 0x40000000, + SBI_FWFT_LOCAL_PLATFORM_END = 0x7fffffff, + + SBI_FWFT_GLOBAL_RESERVED_START = 0x80000000, + SBI_FWFT_GLOBAL_RESERVED_END = 0xbfffffff, + SBI_FWFT_GLOBAL_PLATFORM_START = 0xc0000000, + SBI_FWFT_GLOBAL_PLATFORM_END = 0xffffffff, +}; + +#define SBI_FWFT_GLOBAL_FEATURE_BIT (1 << 31) +#define SBI_FWFT_PLATFORM_FEATURE_BIT (1 << 30) + +#define SBI_FWFT_SET_FLAG_LOCK (1 << 0) + /* SBI spec version fields */ #define SBI_SPEC_VERSION_DEFAULT 0x1 #define SBI_SPEC_VERSION_MAJOR_SHIFT 24 From patchwork Tue Oct 1 16:06:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A66ACEACE4 for ; Tue, 1 Oct 2024 16:08:25 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id B21282800B7; Tue, 1 Oct 2024 12:08:18 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id AD038280068; Tue, 1 Oct 2024 12:08:18 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 925C42800B7; Tue, 1 Oct 2024 12:08:18 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0010.hostedemail.com [216.40.44.10]) by kanga.kvack.org (Postfix) with ESMTP id 3E266280068 for ; Tue, 1 Oct 2024 12:08:18 -0400 (EDT) Received: from smtpin07.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay09.hostedemail.com (Postfix) with ESMTP id F0529816C3 for ; Tue, 1 Oct 2024 16:08:17 +0000 (UTC) X-FDA: 82625515434.07.0014209 Received: from mail-pl1-f171.google.com (mail-pl1-f171.google.com [209.85.214.171]) by imf20.hostedemail.com (Postfix) with ESMTP id E8BBE1C0008 for ; Tue, 1 Oct 2024 16:08:15 +0000 (UTC) Authentication-Results: imf20.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b="MZupT/Yy"; dmarc=none; spf=pass (imf20.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.171 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798856; a=rsa-sha256; cv=none; b=5eh4x+U4jvyCZBB3JhKK5n/jRf2t8yENzgLwkCuD6tczvGcVeRcgXllcQJ7p5u16adhbC+ i/zewAYrRnzOt81mYFBMWXYekkfEtTKQePzhLqTzoN05Tkm33wboEFeO0Auc5Ze0veYZcA uFR3JIyes++fLol0VkBeCQSCwS5pMpM= ARC-Authentication-Results: i=1; imf20.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b="MZupT/Yy"; dmarc=none; spf=pass (imf20.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.171 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798856; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=COCNpmNzP6WC0TkslCp4YYWczFrCYYnCulBqOF+s4dc=; b=HD1FbDHWAqSqVIQ+9JPUcYJTnrLIjT6ysx2Kvl13m5gwv79giaQGr9cw7whuvlkAo06QtZ NDleyzLUses/M+KN3vsoK7/AJGVQ2wFiNfm793FNoR5v2zwI8JbVo6dGuUMiLKsPbfV6dp WLWVMSbzlzgZwtc+DsDiox61UFNeLCM= Received: by mail-pl1-f171.google.com with SMTP id d9443c01a7336-20b7eb9e81eso26990615ad.2 for ; Tue, 01 Oct 2024 09:08:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798895; x=1728403695; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=COCNpmNzP6WC0TkslCp4YYWczFrCYYnCulBqOF+s4dc=; b=MZupT/YyYOpmbk6crtIW9lFEkU+kGx9+ZufpWbAoJZShg/8iBRGFjIfjX3SAjn9yyA zsaVWWmTQx1zopf6GuYNvdhPGcIqVXoyvxQpfQWcosEBOuZvvrfnSZibQIGRr0HTay+F 4ZhBt+sWYPhRy/MkPEiGIU/dJOv2xgd83tYTIu8xmnKRyyrQn2Trztrae/OZW9oWxwqg kvWXyvd0Dg89G+Bwq8BX9QCWXvlHbiBa+tgHWIPLDCWmOsi5yqp2ROEGXX98bKFwc8ln VDTqmexFsF1JTZLQn5unnDXNOhDNSW5tnlF2e23u0D3Ey88z4KHFcKy7rdLv/UGtQcY7 UQMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798895; x=1728403695; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=COCNpmNzP6WC0TkslCp4YYWczFrCYYnCulBqOF+s4dc=; b=cmxMeBcUifzshM6+Av1wyvwxQlUGVnGMXlDdFd9sEYh1E1zs/zcQQda+0ErgJsRppB pvXp0gmIf4B2TIbVBt7wR3b6MmenrydjNSCVmKxXgc9wXqbHxL5hAJXsQwapY/NYhR3P lf+UU3qMKqsyjV1VdoBlc8y26AqcDaXe8RXbNCYchB8AVNRlbM7GcH1qmn+oKHD+EDD2 yhsWAiG8EItW4tTnBEp0kzElMVcqHW04W5Tuvx5lJoVQBLlembSf3WMY+REtUlG6JkBr K2dwRyhnwUKgjRKQ7/rs/XPPR4JuXxFKP4HRQPVPzxqnETNUivNu2bJjuZo6020OVinX aIoQ== X-Forwarded-Encrypted: i=1; AJvYcCUoWEIqyqS6aeGHIFcoEFv5I8W9QxQQ15/GpkqGA1TRam52H1Nx/3EYnAaKvqScuSdMzMT4F9l+mQ==@kvack.org X-Gm-Message-State: AOJu0YxbMOMiH8ZKL0QS/OVBs6AI84yidHMr6yDbWUBiKpjVcy4VKvRl uHIy2IJTlVZ5wh8Bzpg8i9+cSkmSI79Kdq3oLeas0Mz/xpK6uVYNodmm/Ermm5w= X-Google-Smtp-Source: AGHT+IHJ9Lg6QUp5AJMvLZl2TSQwbNKVqaUFdkYSpxGCN34z5YgLawRUhWByN+Lq6nFf2iRfOgfH3g== X-Received: by 2002:a17:90b:2250:b0:2d8:7561:db71 with SMTP id 98e67ed59e1d1-2e1848f66edmr219547a91.25.1727798894659; Tue, 01 Oct 2024 09:08:14 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.08.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:08:14 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:33 -0700 Subject: [PATCH 28/33] riscv: enable kernel access to shadow stack memory via FWFT sbi call MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-28-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspam-User: X-Rspamd-Queue-Id: E8BBE1C0008 X-Rspamd-Server: rspam01 X-Stat-Signature: mkaeb9us7z3phtq8y5w1eswngwoqsk3x X-HE-Tag: 1727798895-489263 X-HE-Meta: U2FsdGVkX19sdxuTYasmI3h3/1TeaWG1ZJmczJf43bVT2ClH3PFdoGC1YiKFPPo6tIl1qXSdLS4O5ChWOIdd4yFWPxcc4j9teZtvGjhooOpqpUA6zcnDSszzosfC1ypcuKkDtG9cj8WruPAl4UXBIkdBjPJhuf9FFYi2SEucBOnKETSNvoikoPl2M0F+4f1mhCPpbZnOdybLdzp1+7OpEsCWo7LNOVy8hYuYLf2D3hEpNhLI+9cK/+D83VdYGMi498TIq8twAqPfemU8O7/eCoJmz2A/GP4QEIxVd64sllg9g9QTZPeHr+CrkEDUshciiNVyz97Qn/SCBks1duB4OfYQiGThQ+IH8VLonvMLCaJ1wNiy+s3ONts881GAZitcDvFX8T5IwbxI2FmFzFMmdOjVZTQolWOdZVL7lPBd4BwqumJfMyIU+h59KKQvdrkBZ1D+9wqhS6hlj2PWGLi1W9B6xVY+THxrxS7BBbtA3RhXDWSIub/tlqckZLusjXpTab4AkUGj+k7iaPbwUqP35vrf0gMd71PjSDnk4VyntzseTYBxGiiQcc80kmQrvjeBC8HbKCYnDuW3bb49wX1+LgC4+g/1FFUnQC/UBg2JWTv8x8U0cGECkkyZjLs3trxZnrYTh7eYKDxsyfzupAVHDYuGxmQgvFzr8/UgPRqMZVc7z3QEh5MwhQcBse7ilPxXy4H/Xxw7hGEYmdX5gRFRmAYVhTQzbdiiBeLbGqCVzgrLH2NvbZcZ/y3BDoHPivZPIpCPHu8f+yyGiKG+Af0bGfLUaF2E65hmUQ1ykF579NAgxzX8B5JjwG51+DdvNDyi7CDWOVmXsljLXm4NQN6oOr3SXm4imTQxyCixeWIE03/um1IP8EUxlMTXCIoqOJNu6Gogz6o/JjSG6DGPuz8VNg/xzAb+KaZDqvaBMaYYFOV82Ols8OIZGsrPz1wqi8wvIqDv/Qiie+nOA87gHA3 UDLOpBaY 6M6fU9qVErj0FBtuAXP0xcZvm4/0PmMJVAVjwXGAP7v532WeZ8XOitFuVTl1FewiYOV/t5aTN8lSTltryL2NlaGOFci6ufi+FadhBqqBcLUP6TQB4jyhW2SWItupHMqkbuOdpmp++K6DFJhmAbsHfnLaDusE2N11fysvs8f7NWEgtxI/lhc87WwLAoIUd544PlqOXGm3+cQdB6+Mw7qA3AIQQgv97zb+qZFVZ5E8RHqMGkhECGReseJARURQQnZoTwHdzMKa36HOnAvSsyBAb561ojsn8DMcFiFXz3IGoKN68nkkm+kR9pWxX1iJNAx6rNDeqI1icOBOAt1ZogvqiRKiK1ohOBYRXjskrfAEw1J6f+5tLZoDLWkMXmYXlzcvXVOxBchR3wF2agD1X2/pJB6ejk1DtKCI3ug28UVDnPs/EHV4L9QgI9Xb5pLlN6zET43mqWsiPSgrl6E0= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Kernel will have to perform shadow stack operations on user shadow stack. Like during signal delivery and sigreturn, shadow stack token must be created and validated respectively. Thus shadow stack access for kernel must be enabled. In future when kernel shadow stacks are enabled for linux kernel, it must be enabled as early as possible for better coverage and prevent imbalance between regular stack and shadow stack. After `relocate_enable_mmu` has been done, this is as early as possible it can enabled. Signed-off-by: Deepak Gupta --- arch/riscv/kernel/asm-offsets.c | 4 ++++ arch/riscv/kernel/head.S | 12 ++++++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c index 766bd33f10cb..a22ab8a41672 100644 --- a/arch/riscv/kernel/asm-offsets.c +++ b/arch/riscv/kernel/asm-offsets.c @@ -517,4 +517,8 @@ void asm_offsets(void) DEFINE(FREGS_A6, offsetof(struct ftrace_regs, a6)); DEFINE(FREGS_A7, offsetof(struct ftrace_regs, a7)); #endif + DEFINE(SBI_EXT_FWFT, SBI_EXT_FWFT); + DEFINE(SBI_EXT_FWFT_SET, SBI_EXT_FWFT_SET); + DEFINE(SBI_FWFT_SHADOW_STACK, SBI_FWFT_SHADOW_STACK); + DEFINE(SBI_FWFT_SET_FLAG_LOCK, SBI_FWFT_SET_FLAG_LOCK); } diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 356d5397b2a2..6244408ca917 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -164,6 +164,12 @@ secondary_start_sbi: call relocate_enable_mmu #endif call .Lsetup_trap_vector + li a7, SBI_EXT_FWFT + li a6, SBI_EXT_FWFT_SET + li a0, SBI_FWFT_SHADOW_STACK + li a1, 1 /* enable supervisor to access shadow stack access */ + li a2, SBI_FWFT_SET_FLAG_LOCK + ecall scs_load_current call smp_callin #endif /* CONFIG_SMP */ @@ -320,6 +326,12 @@ SYM_CODE_START(_start_kernel) la tp, init_task la sp, init_thread_union + THREAD_SIZE addi sp, sp, -PT_SIZE_ON_STACK + li a7, SBI_EXT_FWFT + li a6, SBI_EXT_FWFT_SET + li a0, SBI_FWFT_SHADOW_STACK + li a1, 1 /* enable supervisor to access shadow stack access */ + li a2, SBI_FWFT_SET_FLAG_LOCK + ecall scs_load_current #ifdef CONFIG_KASAN From patchwork Tue Oct 1 16:06:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818432 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7492CCEACE2 for ; Tue, 1 Oct 2024 16:08:27 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 0E7DF2800B8; Tue, 1 Oct 2024 12:08:21 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 097CA280068; Tue, 1 Oct 2024 12:08:21 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id E2DE92800B8; Tue, 1 Oct 2024 12:08:20 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0010.hostedemail.com [216.40.44.10]) by kanga.kvack.org (Postfix) with ESMTP id C4584280068 for ; Tue, 1 Oct 2024 12:08:20 -0400 (EDT) Received: from smtpin27.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay05.hostedemail.com (Postfix) with ESMTP id 6C2CB41576 for ; Tue, 1 Oct 2024 16:08:20 +0000 (UTC) X-FDA: 82625515560.27.81CB967 Received: from mail-pj1-f48.google.com (mail-pj1-f48.google.com [209.85.216.48]) by imf06.hostedemail.com (Postfix) with ESMTP id 75AB0180016 for ; Tue, 1 Oct 2024 16:08:18 +0000 (UTC) Authentication-Results: imf06.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=D6ULUSwz; spf=pass (imf06.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.48 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798772; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=6xdKLFU+R+/xaPo3sKfaOPe5nwRayI/Mj3nw6nC0RbY=; b=ZbRxnSnmrtfq8InD/S7jWzRisxleLA2uJxyQQqu+HjDctBoNnf1vXA/cDZWqO4IusMSp34 5BTO0DjrcE11hYEio26BrtI/sVMIYYd0g/6kgAwD6SMONa2rd8m9vXUFN5bwITLhiHHII+ 6ul6NqW3hECqMRzRadkYC+6SaoJqnFY= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798772; a=rsa-sha256; cv=none; b=HXh298AxnCJUj57GYA71n5XCOuI0bZhkTHOFuHympjUh8z95yLrYT6ZzyjbBGm0IgszMgr kMyMWY9vMuIMl/IybpKVX2MkV0gIMNKA3CpCAgLKiFSyFzsBdDAHdK4TfxaWDBC/cHeCgJ N2aJbsb5cakvlQfwIOI8gstfkur3tzw= ARC-Authentication-Results: i=1; imf06.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=D6ULUSwz; spf=pass (imf06.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.48 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none Received: by mail-pj1-f48.google.com with SMTP id 98e67ed59e1d1-2e082f2a427so4337486a91.3 for ; Tue, 01 Oct 2024 09:08:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798897; x=1728403697; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6xdKLFU+R+/xaPo3sKfaOPe5nwRayI/Mj3nw6nC0RbY=; b=D6ULUSwzP70gQZNCvQd3wUzjNR4oigv7eIHX5TRgnahGLrPHrOgvU9TZr82dZOduas 0Vd22t4rhH9jj+kNODS8B2XpFG8sGWhRF4Ip+io4JwtjCXjHYOg+LpNAiKmgoCH8qvby xGFdrOEB53C/WzlvCc1nCRa68k2w0wN8dXWHm5mA/+hoqHuY14aDtrgzx4CkX0re4E8C amT2Wp+ci1mcvSNHV1wA8oVz5w0hUEUQqIVZCwOx6sqVsJJagwO5vHeNi93ESku1OOHD iiHGfY7/o5kKnw4bEpg9NcxCwtJu000n30MfkCsoR62g9L4ieHNx6Ay5nfY9tVrye8X9 b+yg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798897; x=1728403697; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6xdKLFU+R+/xaPo3sKfaOPe5nwRayI/Mj3nw6nC0RbY=; b=sOd9aWKzzVreihR5f/6EwCk4yNR9TB89kps/UgdPKdkXjjvR87WdG7WaG1hXQp+0XD IvS2KGJ6u7a9fhdVu0p34vd6H0hRaXSyC28qOw9vgC/gewDVbRFVCHTRN6MkfMvmtAqF DtUU5DqhBIeVBznh5RRg7GB4xgbe4hStVK/aIot1FHPo+yL92H4xNYWCrlHTyuFVtJ+H ydOKLfRKu3npxSPqj5aIDQvgc6AIJLR7FIf3Sxp8FrK2R7CzciBq/sGM8UJ1viM5Coe7 IeeLUp6m+sc+oX3IhOGBR6hdpv392sRfc14u0ZC72crI4oeRql4oI4tt91PqurkRF0YI lA1Q== X-Forwarded-Encrypted: i=1; AJvYcCWEnHRG7QTG++9ec0H6RQj15DzcY8grcLQ5DxOmFrMFo5JjwO/NPXO2vEKcZ1QJwQwqrpxAEeBDXA==@kvack.org X-Gm-Message-State: AOJu0Yy9GXa2f4X/SeCD2IUWN2AuxLMUnS2EaZuCcNhzGKBcTlyGqak4 hAsR7T8o89bzSdIKmYPmXsCv29YRxNRMTWJk+w4vp+CnDKQstXrCMRQ9IEa93Cs= X-Google-Smtp-Source: AGHT+IGSPOS/rjJlw+fxdYuzivcwlYhVRY55jtXIOD8f6jn9tgzzpKbZ8nfdXLTRzGnEFUMQVR22nA== X-Received: by 2002:a17:90a:f494:b0:2d8:8ead:f013 with SMTP id 98e67ed59e1d1-2e18452dd9emr235870a91.7.1727798897223; Tue, 01 Oct 2024 09:08:17 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.08.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:08:16 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:34 -0700 Subject: [PATCH 29/33] riscv: kernel command line option to opt out of user cfi MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-29-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Queue-Id: 75AB0180016 X-Stat-Signature: ant7ditxa84mkumc6kmqfo6cyaj3z4mk X-Rspamd-Server: rspam09 X-Rspam-User: X-HE-Tag: 1727798898-673868 X-HE-Meta: U2FsdGVkX19XufYEXVI8l2FR3TIfIfVyyXgqOEry/nfljgJ20Ep/QVTBXEFdpiKuxDdfX9oWRuBGuWfQh7uwqMBbbC7YdJYiw2IZGVmCK4I/ZDX42Z1zDIOpM1qaRWTjDaaQwPVAfK3ItkDZ7Bn+7UZMNUGFnk/5MHcctGF0Y6PW8RhrLVpiFV76s/JMoOhMuQHS/eJyVVXgqRNBFUQ5MAAGqgXeo9vECOr4yNMy9p63NilN6e5n6gdmZ0TG9EWzoZMgYGN4S3eHUF9SIAXnDvJ1Yncw5bQAfPqtcaBthNzbnCGskQuoDj+EXCZX/E/AoKm0PkZpKfXN5noKVPkonYYQCHw5CgMMUqx/CHHXxMjSaCNuJ3UOnnwXeXFZBbS6I0JAp5/k2iiW5gv82A0CRRVNSxVJtJGvDcBE7DbfQawRmjcby5L/xm1XIgQMZE/lpoKH38b4463nZR7duq49Wk/F4+SkUXQzfB7vAT1fzLfb1cHFAztWvTZK2Jc92zBjpcc5a5UWSIAOUR0327t3CdVR1lqqrZwtKCyjn+VsAUBYfAfH5JjEV0DzSQmvOkRhmgwSu9lhrBjww0jWn7gvrZQEZuos5s2vYEoUEgX3deAJSw4mg9v+4e0q7DuayhcO3ucDCaRTucupGldyprrPHxqgD7IZ/NaqFQ/lsD+uI/TchO0AH9xurtMW59tHWV7Z2uttAHM5egZaEiIGjJK4Ijxcq9sgyLy5/x4auR/L8N/o/eky0omHbkAkX7cwYUvG0QP61RYiyKV8c7hLDWI7kPLJI8QXbss68uxbSthskXQBHYqx19nT2yD+l+n/bhUJOgToekF8N5MjQb7t1GSerU82qZ20CRP0YBzrAycgidzXTh8jL4YXZR8ugjGVulCjqtO2M9pedt/WdITE+dDhEMpWMdEyy7dZqeTpaUJ/g581io44KWz460g1OfYgyn7ITIwL3tJfOrSnn70ATYO G/Q3Ms4p l17mtPpzj3+s0FB/75/0lDH7TjbXmFGVymUKiQUP6pBsd30WCnKeiDFuMmMbXdsX+dD8+QG2H/wjalAw9lorTS5IAGWxKqgJI8Y+ccmUkt7c4/5Jni5kQ4/qKrBLQM7hXqjrcsMoFD4y5rGwoAjr/T96DDEq3c21X8yYQjlUDkedg4qPdzU+DSZoKgfDGB5vYVTzQw+yFt1lbtSz91P2xSyzFlmug0Hy241YzXgzPRsaDsvwt5JDIlQivix9cxZxRnIHLZqmcG6Ii+mX6wqR4bqi4BBl+HVdobcfzpVdf9FNOjDJUrYBKEtfLYS+4UTeHirwyybdxBCT9vQeT8RuuLxyD6Xtq/gwTy9ZtPEkbuw6M/fieBogsat/CihjonRhoq9Orr1q8ICZQod9Kp0M+FSEZVDAlrRxZXotzmy1gatEkfJ2kKfA7pKWNROap3CtNXvUMdx6ihyS785g= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: This commit adds a kernel command line option using which user cfi can be disabled. Signed-off-by: Deepak Gupta --- arch/riscv/kernel/usercfi.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c index 40c32258b6ec..d92b49261b58 100644 --- a/arch/riscv/kernel/usercfi.c +++ b/arch/riscv/kernel/usercfi.c @@ -17,6 +17,8 @@ #include #include +bool disable_riscv_usercfi; + #define SHSTK_ENTRY_SIZE sizeof(void *) bool is_shstk_enabled(struct task_struct *task) @@ -393,6 +395,9 @@ int arch_set_shadow_stack_status(struct task_struct *t, unsigned long status) unsigned long size = 0, addr = 0; bool enable_shstk = false; + if (disable_riscv_usercfi) + return 0; + if (!cpu_supports_shadow_stack()) return -EINVAL; @@ -472,6 +477,9 @@ int arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status) { bool enable_indir_lp = false; + if (disable_riscv_usercfi) + return 0; + if (!cpu_supports_indirect_br_lp_instr()) return -EINVAL; @@ -504,3 +512,15 @@ int arch_lock_indir_br_lp_status(struct task_struct *task, return 0; } + +static int __init setup_global_riscv_enable(char *str) +{ + if (strcmp(str, "true") == 0) + disable_riscv_usercfi = true; + + pr_info("Setting riscv usercfi to be %s\n", (disable_riscv_usercfi ? "disabled" : "enabled")); + + return 1; +} + +__setup("disable_riscv_usercfi=", setup_global_riscv_enable); From patchwork Tue Oct 1 16:06:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818433 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22E07CEACE4 for ; Tue, 1 Oct 2024 16:08:30 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id DE0CA2800B9; Tue, 1 Oct 2024 12:08:23 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id D8F66280068; Tue, 1 Oct 2024 12:08:23 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id BE3D12800B9; Tue, 1 Oct 2024 12:08:23 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0010.hostedemail.com [216.40.44.10]) by kanga.kvack.org (Postfix) with ESMTP id 9BD8C280068 for ; Tue, 1 Oct 2024 12:08:23 -0400 (EDT) Received: from smtpin08.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id 202FF141653 for ; Tue, 1 Oct 2024 16:08:23 +0000 (UTC) X-FDA: 82625515686.08.C852574 Received: from mail-pg1-f170.google.com (mail-pg1-f170.google.com [209.85.215.170]) by imf18.hostedemail.com (Postfix) with ESMTP id 07A701C0010 for ; Tue, 1 Oct 2024 16:08:20 +0000 (UTC) Authentication-Results: imf18.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=iCiiivm2; spf=pass (imf18.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.170 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798732; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=a4qrRFCNXnOZYa1fD74V0zlcrdQ+HWyEoqE9F8mKpFo=; b=tjD91ClAcX0orMfQOoUfEoQW25bwBwUINpDvA6D6K66MIn0GgUWtzfnqar/U/CJjW/YThw wfs+td8Le3HHSZ6ffMSDGxDvy3Z4HgKJiwhgzqmKcj/a+uO8ZibnYeR/NnpzMmmt/iW2dA GNQ7Ade5ux6vPQtM4W+qwRiOkceAxic= ARC-Authentication-Results: i=1; imf18.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=iCiiivm2; spf=pass (imf18.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.170 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798732; a=rsa-sha256; cv=none; b=OhKcleBeyg/W2JXBBKwG6QZ+ySGhKGG04suKPnoo841pJxzv7i4aiQrwr8XzC3inYIc9gr m7ahbS7N7jQvVa/sqPHcB/5GihzQ817BTYCGoR6FBaJIBA7H/IGveA6hoJoo0AaBvyNqAR SdSkskevWQOtt58yojQ+IGk35hZlES8= Received: by mail-pg1-f170.google.com with SMTP id 41be03b00d2f7-7d50a42ce97so2448681a12.0 for ; Tue, 01 Oct 2024 09:08:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798900; x=1728403700; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=a4qrRFCNXnOZYa1fD74V0zlcrdQ+HWyEoqE9F8mKpFo=; b=iCiiivm2FlXnKFrE9eYy5gObMX66xhCNz59kAUaZONh9I5L+hvCwGZrnwkbOK8Ob+y nNRj/IlpdokRlaRRH2VaDC6BbOHZak1YMJq0T7g93bGR30kqQV7wlq8sGhiaIUziGd/b sav0ZkluPijhwIo6EUUwtc7KrkGv0CdR69spEIa/3Izn+OSiG/cNg715o5rlPBF2YlHu a39CO0oTCd0+Lin++dP2MOYS5CT53EM1X0HzoXpccKbZbKS1ly+ktgh2kXmirgURfY8S 5PGfH7ndRlwAU5aH2/Kly2WFCi01ivt6BkVX8PNgrSc0l2SW/l3MuKUIw2WH/7B5WPdA Y8bA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798900; x=1728403700; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a4qrRFCNXnOZYa1fD74V0zlcrdQ+HWyEoqE9F8mKpFo=; b=bk7eddkbMhW8iswEsH9W1fAg9l9zif3Zi101pDu5frR5H1eRDqMYQ9pBumiFA+i5qe SdFmtCg+LpSe6P5GvvzjC0sV6MX+gAZsemsSIOQ6n4SeYFzUmKw1TCzDYyOGn5oB5hlY fzTypGpwu9/37iN/ofL/r777Uf8b7yZshzp180xqMV5oeMs0+epHcsILdUBg6ty1zbAk WsYvMHMCV3Ypp1W9LS9JCF3RzAN37equPvTikQBN/UFqdJ4h2Dka0ZMIikJZqG3QufI1 H2eQX7AX6RPtKTlum5Ri67AejP6qO5l5J0lijpGp8Y4LHZEFVvTzkow90KVMfrcDitvz B4KA== X-Forwarded-Encrypted: i=1; AJvYcCXvkOb5tu9KcGJtjSvhBEAxmvjQWK8URbYLLk8mqtSS7JDIENy/GT2wE7fXRlocC8MAz0Pb5SkOXw==@kvack.org X-Gm-Message-State: AOJu0Yyzid2yoU+s6tZ8h89Gqw5RppZgXJhmtUdL3JXvEFX+T0aPIbFk Cw9Uo8aCuE/uDr1pqVxBtaV1MHsFN85vbLFS2DLVXviKgo7D3ORxF2uwWdN1F9A= X-Google-Smtp-Source: AGHT+IGiAxXYx6yXeYkA/G/la8C9nBfo7vSN2Z7fy96K3UGQ0W+8BbkIQQBBecsOmRmnWw0/cNAzkw== X-Received: by 2002:a17:90b:3543:b0:2d8:8175:38c9 with SMTP id 98e67ed59e1d1-2e184804fc6mr237651a91.20.1727798899815; Tue, 01 Oct 2024 09:08:19 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.08.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:08:19 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:35 -0700 Subject: [PATCH 30/33] riscv: create a config for shadow stack and landing pad instr support MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-30-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: 07A701C0010 X-Stat-Signature: wce5rakuatwy5m6trbmqaieqbhq14pdi X-Rspam-User: X-HE-Tag: 1727798900-332904 X-HE-Meta: U2FsdGVkX19h9Vyw7gOWwz3S38i1q0jab+P40iLH47dHlB5i+1AwoKCH6hRvBa1Yx43EMNDC4D8YMddsGLWd8kAL1qsSNUimmOuYygJ0qz0Wqyp/onKmveKgLRMOuMZRFq1cWhHsekL2Kj7MqzJeAIJtxwnWS9n59pFLvl/lIMwv+Lp9iGwosTIqjWwMje2IydXkn9rddBLr5vwULHS9PhDCkF7TkMc3P5waMtrkJ10k1T9A5tG/hLnyAQq5e2kNkbKsYUgCILV05/BPA347kma/2b/slTNi2uNF0e1s7Bjn3KMVWVqlo2ihhotjVR4Ol5txkZi4jhAJyaKPduSvThQwMSVUthJuX73HFWJmqIfEHu2AfMp8HAXk2v9jobwSpzatMOQ92WEPejyYU762WzhF1V2NpYsqcwZyk7yUnjd7y/qGB51h5KjHwFQrM8YQcroxOEFfqJmGaa8xtmU8tEk3AHAqgnmahzs+88e6u1KRDR6GMTSvYaL6+pk56yQHdaiPrgjm5m7q7wqiwDBLucwlEPURl0LoP3OWl8pJiOWm7nBfUSmRx1SOeabmVA5cZ0qpMwRjiaQktVK7HMImtug2gXBaELMVP3LZ2GpDXwiMgGmQhYsDNGeDXZ9YAIvz8/8oN7y2SuKvHkUuhzOFepApJjB1KCKQQKIA2AznP+wGiUjNRvzH8nk6F35+YNPHNSXi7sbubo442JusrCcXb60hMNvZb1xJ46r4A025Ec2i9p53HzhGWnoK48fRvfWVf0w2KDklchBcB6G8HkqwOV/n1Q0oAOTp+1f1Xk0bzwsdKHn5wN8mHAUdRj11Qf9sL5HCLzuuc/YZdCpguyCyTolTwVfDv61BAxVIHzDpDJSVpPd6OZy+1u0z4qPADjI5WjMFjWFCGU7wnjaIIH/ShYm5//KhzGPTvFM8gDWHlBpIA+PUuMgYjQJBiCiHx9yaL+osbjz8icPzw/zo/3L vKSUGJ/G u6IkdywHtI/Yf2kqdm03c+Jrq9CoIx1tEEgx17fk+cq+MUg8iWti5Iu3URS7/TgOrIZguLOQ48WdsXmMWEeBa9cFuIdFLyOxANxQ2mwOWPmHvrqt6mWq6txEhlr/k41zb51KjZBhWa0QYctgcS98ZewW9sPIJ6lrTaGaAbuCee/QHqeybIN/TbUbkKkmp45G27L330hoZFH3GxCYHWoQA2WRCCzn4OWjNenU329nG02GX0VZmVfT2Cke7mMoC/BO25lwMl4McGDbwIXEi/UP9Xr+vMJS7Lc7XEhRSD/ezPgY73Coa3G4uoxxKVkAd2AiFrD3ZlPiULteg9Z6Bf7v3901HW8M6Rtuvkl46vaD8NRi+8UeP5wUKAx1CiaLHtOrDnBi+iSUNmXALr27vrNe1HzZ8z6HIM8JTAE4DqXvjD6p7EdApAsmjdUoeb3N5LC90Ct0zWIxNelAJEVevQ/rQf8c7vULlwqZv8oi6bvqjxxEIlPo= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: This patch creates a config for shadow stack support and landing pad instr support. Shadow stack support and landing instr support can be enabled by selecting `CONFIG_RISCV_USER_CFI`. Selecting `CONFIG_RISCV_USER_CFI` wires up path to enumerate CPU support and if cpu support exists, kernel will support cpu assisted user mode cfi. If CONFIG_RISCV_USER_CFI is selected, select `ARCH_USES_HIGH_VMA_FLAGS` and `ARCH_HAS_USER_SHADOW_STACK` for riscv. Signed-off-by: Deepak Gupta --- arch/riscv/Kconfig | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 808ea66b9537..d0cc2879fcd4 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -245,6 +245,25 @@ config ARCH_HAS_BROKEN_DWARF5 # https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77 depends on LD_IS_LLD && LLD_VERSION < 180000 +config RISCV_USER_CFI + def_bool y + bool "riscv userspace control flow integrity" + depends on 64BIT && $(cc-option,-mabi=lp64 -march=rv64ima_zicfiss) + depends on RISCV_ALTERNATIVE + select ARCH_HAS_USER_SHADOW_STACK + select ARCH_USES_HIGH_VMA_FLAGS + help + Provides CPU assisted control flow integrity to userspace tasks. + Control flow integrity is provided by implementing shadow stack for + backward edge and indirect branch tracking for forward edge in program. + Shadow stack protection is a hardware feature that detects function + return address corruption. This helps mitigate ROP attacks. + Indirect branch tracking enforces that all indirect branches must land + on a landing pad instruction else CPU will fault. This mitigates against + JOP / COP attacks. Applications must be enabled to use it, and old user- + space does not get protection "for free". + default y + config ARCH_MMAP_RND_BITS_MIN default 18 if 64BIT default 8 From patchwork Tue Oct 1 16:06:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818434 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id D74AECEACE5 for ; Tue, 1 Oct 2024 16:08:32 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 557A52800BA; Tue, 1 Oct 2024 12:08:26 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 50510280068; Tue, 1 Oct 2024 12:08:26 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 37D772800BA; Tue, 1 Oct 2024 12:08:26 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0010.hostedemail.com [216.40.44.10]) by kanga.kvack.org (Postfix) with ESMTP id 15046280068 for ; Tue, 1 Oct 2024 12:08:26 -0400 (EDT) Received: from smtpin08.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id C2BE6140F0F for ; Tue, 1 Oct 2024 16:08:25 +0000 (UTC) X-FDA: 82625515770.08.8C5831E Received: from mail-pg1-f173.google.com (mail-pg1-f173.google.com [209.85.215.173]) by imf10.hostedemail.com (Postfix) with ESMTP id BADB2C000D for ; Tue, 1 Oct 2024 16:08:23 +0000 (UTC) Authentication-Results: imf10.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=AdmzexSG; spf=pass (imf10.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.173 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798776; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=IhmPwONIKNZXNlLItF/RqS4Q7SWFxV+hpF07L6+CC7I=; b=c2K31PdK1NWVbr6wDnh77UPwdE9cLCx9B7e4mRrzCV5Henx25maHbB6zyVtSEOWeYBu4H+ ancng7rKl3wlCf83/G3+9C8sHyPgNeiej2CPzLdq9BOT14nW2UYnHVV7ZaSzV7bBvUnBwa lewSqGPtVWymcboQA1U885dTxs16ZiM= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798776; a=rsa-sha256; cv=none; b=lUVBWoH+8KxbYZrenz9AAR9dJl32t/vjx04ouMzC7weeMmyPQlHngbZ4flAVEquucgFTvr bkd0R4RCAz/Qy61bhJhmGbFttGc2PrujUC4b0uEowdDFalIn0m5FIlTESTc/TwmZiKlkxO iHXSTa1LZCiGjuqqZGchdv5U6/WeD4U= ARC-Authentication-Results: i=1; imf10.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=AdmzexSG; spf=pass (imf10.hostedemail.com: domain of debug@rivosinc.com designates 209.85.215.173 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none Received: by mail-pg1-f173.google.com with SMTP id 41be03b00d2f7-7c6b4222fe3so3826415a12.3 for ; Tue, 01 Oct 2024 09:08:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798902; x=1728403702; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=IhmPwONIKNZXNlLItF/RqS4Q7SWFxV+hpF07L6+CC7I=; b=AdmzexSGwu1SLOHYMbpd4UnafW6EbCNsTxqh4wXrnJfls6b36KUJMnTaG1Y4rtQOd1 AT72m/p4HoJjGv4GTzliMDAFuaBrZ78Dsj8gQJq5D3fApzxDcNosGnToMuZxBX5+WPb7 yy4Vz3oGItWOlhm0hLxklryRMrzwOXdIA1ebOdr7BZT/xupruGzHQ9BL9BnxGSG5yvee j8GYKer8IZu0Xe/0Tot6ndUp6BbOfOpYPbvfVU0uqL8tW2CIHFzEBemQ5LCxpwBn+cQ0 eePiOt6QBnGROqmwuUAGzFVpmUXIBI//pqry3HknjBi9/3IXA7LksFRcoAhz1nco/TYN hCiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798902; x=1728403702; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IhmPwONIKNZXNlLItF/RqS4Q7SWFxV+hpF07L6+CC7I=; b=kwZxW0i5ZR3jpNINjoYRR4FlUaODhCq31LlsmXWH88RancPaeRhf3932mRID4RkcXV UQPaK42YgZpV7fice2QZvpd1bJ8Sz6xc9LS8TcoREj+CMx22jtuK4ZnuWOtFmmuFCtkJ jWofx2DEr4ESkcsw9smkGfYCZwEcNW+gHCEJDPD0dyTyRgGE8cpe14WSXwVGQOrNWIcN mC43idN1Ipp4rhWCAY+XJXfg4+7tU1mDNpXCMMNTb0KcjClJ5Y6a2VY5L2nLbEi2/tsj 9yV8HmKaBy4Ydjokv43IBZZnhs7p+Zr4w2w435idS1i2Osx/4O2IBLpxRkcDaL3VrR+v N/jw== X-Forwarded-Encrypted: i=1; AJvYcCUlvVN+JvY3k/w7n0eOYPGDV1tdt451FpY5HOrEwFaXmibgsh4yzgQjkGfUjP9Ge85A4NTsUOTk2w==@kvack.org X-Gm-Message-State: AOJu0YwhJ2ZacJC+CiRmWOcMCPDl6mXD8U80m2k9bBqS765arAFqt2IR azACsSTarBx8bgQIRVFOFWEdrMS7HaPlyiiz/5GAdRhIc+cEzEufq5CI4aCOqMo= X-Google-Smtp-Source: AGHT+IGoHYwx0kgKc4DgNgP0JzAT3h8W5Ogawl58DVURujvW6qbBVCpds5FTC6xsaK05crpycEn+DA== X-Received: by 2002:a17:90b:33c2:b0:2d8:7a3b:730d with SMTP id 98e67ed59e1d1-2e1846a0525mr238965a91.21.1727798902396; Tue, 01 Oct 2024 09:08:22 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.08.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:08:22 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:36 -0700 Subject: [PATCH 31/33] riscv: Documentation for landing pad / indirect branch tracking MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-31-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspam-User: X-Rspamd-Server: rspam04 X-Rspamd-Queue-Id: BADB2C000D X-Stat-Signature: 5gifjgsfetizngutkzoyzo64yhy4yqnt X-HE-Tag: 1727798903-378437 X-HE-Meta: U2FsdGVkX1+fALdkiGiq+ORsgvIcDD0b91vnyaMW67a9JjWYSDigu3wiz3x25oV3Ql72IliHosulP7lXXSUPFL7nKVTIa7KMeD5uS0MObmXOCDbLDs76seNLDEE7t4IQWlHe3p9bUcVNKarepUOc6rBIAb4XF07oaT25YAC36dtbg1en1XiFb16voV62oeIMWMrBuUm/xxywZjAVCFZo2YmGKk+qBWq6ORxTKQAJGIIU4erF+a1uyCqdKYmYE2HzS110D9ge+AbCf6+c4MxQB8DHi3r+D3BGBOb1WhrMAubp0pEaVioRxFMRQoprdJ+UmutOO6I79h/whfvtWnq3Hv8/XLNjWANxycqidc3YgezHzyb1Nog+QX6SV3O/ZIhqXcxKDSYAlQtVHnsTHJjfFtkNryUpZmwa/ZA/MiKTOihRYLrBBsUY7RDuv6rLt4+Eyi53YCdeH8pXHN5r1Tkrwz0l76E4X/aB5WJQ6ov0MvIHx7xWajsvP8YoJjNDxoLfPVHTaeRer76WMIAevKPIHoGG52iaDlNV2GnVbX6M+iRqZoB2tLJLy2i7aO0lXgVwKk7KKmyo+Ewr6FRrhau82isXSxz05buNMdeDCm4sY/jtSp4OvjfwWzHP3WYwoJynNDfUeAlmNTEtI+fUY6gU/NZacRhijF3S+c4e1b7LbVIUqg3cFEKEAw73ofgIU+Aw4z5FPxa0TtGCjq1gpGAQoAG0DiUjsx89WKJjdXzTtyJBVNasjCNEPG4uxet4ucQO5FdXQLLeGIj8vhJVFJNKy1WkrAspfJsjPUC+tusk7qHb1nw9tfpgwst5X4pmfw8I2RwOZiC2Jj2D/ykNFKeha7N44jKrC24w6CvmMiwHXYKyhg82OGB/JsKLtLAM1wU6pbznIw0yonBe4j6gwS+oDxGGr4CFqzzCWstI1dipED0HrUGF9r9BicDRHXViOk6eXvSgNtDLjGAbYRUlfl2 hbmDbuGf lITl39y37O6imdz7NRfcCATqfAuCL5KmTXdbBiHWjR5xkWXHGYDB5p0rA4lTMUZGOxVjgnfFlM36Gvov95VsYn7DGeEeZpZOvEGNkqNe2vv7LX0lJFLnFKnNnMRDNSHm7sa/H/98P1rD4iVS710HOts1HQW15IYoxO91mOb3ADpZm3cuQCuaTXLzSdKvv8ndQSN2mprn3j/b0jqwpmQoAjUINrpzxbzKGcWGF9aWM6yA22xRs6D6MyBjtpNhtMMz8PaILjHxa/1P9qGL3211tfqFzHUtEnm90CF8sejgiuk0LoHT4Zmg/vRP0OdQFJoU6jfKr3ZslMiyaXcbciInnacsZR8KRZ+ku4bI5gf5Qi0disHg1WEIT9WVKTvL4IHNXI4agJ0X5Ls89ZmozKq59VK3+7Ugc8ittneXQkqGrlVEEn9FB8Rnj/8yQrdTSzgonBMJd2SmW/xBowh8= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Adding documentation on landing pad aka indirect branch tracking on riscv and kernel interfaces exposed so that user tasks can enable it. Signed-off-by: Deepak Gupta --- Documentation/arch/riscv/index.rst | 1 + Documentation/arch/riscv/zicfilp.rst | 115 +++++++++++++++++++++++++++++++++++ 2 files changed, 116 insertions(+) diff --git a/Documentation/arch/riscv/index.rst b/Documentation/arch/riscv/index.rst index eecf347ce849..be7237b69682 100644 --- a/Documentation/arch/riscv/index.rst +++ b/Documentation/arch/riscv/index.rst @@ -14,6 +14,7 @@ RISC-V architecture uabi vector cmodx + zicfilp features diff --git a/Documentation/arch/riscv/zicfilp.rst b/Documentation/arch/riscv/zicfilp.rst new file mode 100644 index 000000000000..a188d78fcde6 --- /dev/null +++ b/Documentation/arch/riscv/zicfilp.rst @@ -0,0 +1,115 @@ +.. SPDX-License-Identifier: GPL-2.0 + +:Author: Deepak Gupta +:Date: 12 January 2024 + +==================================================== +Tracking indirect control transfers on RISC-V Linux +==================================================== + +This document briefly describes the interface provided to userspace by Linux +to enable indirect branch tracking for user mode applications on RISV-V + +1. Feature Overview +-------------------- + +Memory corruption issues usually result in to crashes, however when in hands of +an adversary and if used creatively can result into variety security issues. + +One of those security issues can be code re-use attacks on program where adversary +can use corrupt function pointers and chain them together to perform jump oriented +programming (JOP) or call oriented programming (COP) and thus compromising control +flow integrity (CFI) of the program. + +Function pointers live in read-write memory and thus are susceptible to corruption +and allows an adversary to reach any program counter (PC) in address space. On +RISC-V zicfilp extension enforces a restriction on such indirect control +transfers: + +- indirect control transfers must land on a landing pad instruction ``lpad``. + There are two exception to this rule: + + - rs1 = x1 or rs1 = x5, i.e. a return from a function and returns are + protected using shadow stack (see zicfiss.rst) + + - rs1 = x7. On RISC-V compiler usually does below to reach function + which is beyond the offset possible J-type instruction:: + + auipc x7, + jalr (x7) + + Such form of indirect control transfer are still immutable and don't rely + on memory and thus rs1=x7 is exempted from tracking and considered software + guarded jumps. + +``lpad`` instruction is pseudo of ``auipc rd, `` with ``rd=x0`` and +is a HINT nop. ``lpad`` instruction must be aligned on 4 byte boundary and +compares 20 bit immediate withx7. If ``imm_20bit`` == 0, CPU don't perform any +comparision with ``x7``. If ``imm_20bit`` != 0, then ``imm_20bit`` must match +``x7`` else CPU will raise ``software check exception`` (``cause=18``) with +``*tval = 2``. + +Compiler can generate a hash over function signatures and setup them (truncated +to 20bit) in x7 at callsites and function prologues can have ``lpad`` with same +function hash. This further reduces number of program counters a call site can +reach. + +2. ELF and psABI +----------------- + +Toolchain sets up :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_FCFI` for property +:c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_AND` in notes section of the object file. + +3. Linux enabling +------------------ + +User space programs can have multiple shared objects loaded in its address space +and it's a difficult task to make sure all the dependencies have been compiled +with support of indirect branch. Thus it's left to dynamic loader to enable +indirect branch tracking for the program. + +4. prctl() enabling +-------------------- + +:c:macro:`PR_SET_INDIR_BR_LP_STATUS` / :c:macro:`PR_GET_INDIR_BR_LP_STATUS` / +:c:macro:`PR_LOCK_INDIR_BR_LP_STATUS` are three prctls added to manage indirect +branch tracking. prctls are arch agnostic and returns -EINVAL on other arches. + +* prctl(PR_SET_INDIR_BR_LP_STATUS, unsigned long arg) + +If arg1 is :c:macro:`PR_INDIR_BR_LP_ENABLE` and if CPU supports ``zicfilp`` +then kernel will enabled indirect branch tracking for the task. Dynamic loader +can issue this :c:macro:`prctl` once it has determined that all the objects +loaded in address space support indirect branch tracking. Additionally if there +is a `dlopen` to an object which wasn't compiled with ``zicfilp``, dynamic +loader can issue this prctl with arg1 set to 0 (i.e. +:c:macro:`PR_INDIR_BR_LP_ENABLE` being clear) + +* prctl(PR_GET_INDIR_BR_LP_STATUS, unsigned long arg) + +Returns current status of indirect branch tracking. If enabled it'll return +:c:macro:`PR_INDIR_BR_LP_ENABLE` + +* prctl(PR_LOCK_INDIR_BR_LP_STATUS, unsigned long arg) + +Locks current status of indirect branch tracking on the task. User space may +want to run with strict security posture and wouldn't want loading of objects +without ``zicfilp`` support in it and thus would want to disallow disabling of +indirect branch tracking. In that case user space can use this prctl to lock +current settings. + +5. violations related to indirect branch tracking +-------------------------------------------------- + +Pertaining to indirect branch tracking, CPU raises software check exception in +following conditions: + +- missing ``lpad`` after indirect call / jmp +- ``lpad`` not on 4 byte boundary +- ``imm_20bit`` embedded in ``lpad`` instruction doesn't match with ``x7`` + +In all 3 cases, ``*tval = 2`` is captured and software check exception is +raised (``cause=18``) + +Linux kernel will treat this as :c:macro:`SIGSEV`` with code = +:c:macro:`SEGV_CPERR` and follow normal course of signal delivery. From patchwork Tue Oct 1 16:06:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5AA37CEACE2 for ; Tue, 1 Oct 2024 16:08:35 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id CF5822800BB; Tue, 1 Oct 2024 12:08:28 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id CA6E3280068; Tue, 1 Oct 2024 12:08:28 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id AF77B2800BB; Tue, 1 Oct 2024 12:08:28 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id 88182280068 for ; Tue, 1 Oct 2024 12:08:28 -0400 (EDT) Received: from smtpin13.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay03.hostedemail.com (Postfix) with ESMTP id 52C3CA16E5 for ; Tue, 1 Oct 2024 16:08:28 +0000 (UTC) X-FDA: 82625515896.13.8806ADD Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) by imf27.hostedemail.com (Postfix) with ESMTP id 59C9F4001C for ; Tue, 1 Oct 2024 16:08:26 +0000 (UTC) Authentication-Results: imf27.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=zOPwmC4D; dmarc=none; spf=pass (imf27.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.174 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798812; a=rsa-sha256; cv=none; b=rPo0Udb7vdyApkydrXvKpBBHgM5/l/YWGeydZJbHImeIN8Xo1RcEreh6ZS/wI1CFEylwaa bOrAm3+GLeYphmUHEO6MRgwGbdhhzjmE0+gztCeokH1WQ+WPcoR34biDbcKUZ7o/c6igsL UvlUhm7xtVJiUyFq7rg2WmYTrfPd4oc= ARC-Authentication-Results: i=1; imf27.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=zOPwmC4D; dmarc=none; spf=pass (imf27.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.174 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798812; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=NYP5wvilXBl9e2AdD/12DI5Fd1eAjNDT/0JkZD4bKgk=; b=xq7sZYsCz/3aoNA7+BvdDeWP8BzC462AuBWfOxzLrL0Jm0zReJdAWEClCBOxPPyppyQ7dF kwylqebnj7PxaVPr8jTfPF5XrDp2IoMzUoSX66LNMFHXU7Kdh1tWe+2v+kG2FAP3pFERT0 CF75m+rPkhMPWRy4FAnnbBCFViSnyt8= Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-20bc2970df5so2675545ad.3 for ; Tue, 01 Oct 2024 09:08:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798905; x=1728403705; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=NYP5wvilXBl9e2AdD/12DI5Fd1eAjNDT/0JkZD4bKgk=; b=zOPwmC4DWbCWDtwp+EUXTfwTqbVBx+4xpFZgtiR5LB+2LqC3/a65wiajZtLaAaoyrc ZshP9bd960RF/2lHj4E/i6gAM7H/dT8ud+8ZGTA7EVxut4tg5gkmxH7udXx0L33xRVnc rBuAHsTRa04bpmYXCd577Oj4KFF3W3UqxEeEwXEYNWeDkEPl6yGi1QU+9a6gj7Wj5dIl NnSZmrp2W5ndTqL+9VY9XfKR4fZ12Pnd/95aUnwxUBhYtY7g4pLCbSeLzfitRjdX4Y1D G4q9arLYuqzvwOsKw9zRJnr8SmHRdsoLaG6Ez8DuwPgSStmkE+0RuOU07d07Dim+Hq4L X3gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798905; x=1728403705; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NYP5wvilXBl9e2AdD/12DI5Fd1eAjNDT/0JkZD4bKgk=; b=IGqE2S0SZi5WM+wQEKG5hyEUx+d1PUC4nNbFGo196mSj2Y8dQg/p74r+KEJvg1prvh E444zGzBBXZnmsU3voUO04svli4bmQ3hwvfCKkLrP19gQAIkiPKjpSAGXnXn+H65gtno Jw+mRB3gMMZtqOQdGvAKxdkIXPCeq1jBbDzbPVHdCIkD0d2Hv4b0iS3Q6Ai21J0HBjVq mDl0s2AMV5D4DdvO4QUilGnYah8L9dDHDfTtJVtAHMF2q8z86kATsE9a/m5Hx9leKb+Z YI5PRODeBSE/vgQog/3BZYBIia4KbPj2hSkOAbmLExjQZflu7BC/pttdtnAXg829AYe4 GhAg== X-Forwarded-Encrypted: i=1; AJvYcCV1m0QyEiF4FNQkmv/lrBrqs63hKVP1D8e7z23XUZa/8EHPr3UdmY4A3mTZS+3B12igElO7sil/TQ==@kvack.org X-Gm-Message-State: AOJu0YzzjfPIi8K41uhUCbihzh5F1+Z5kpwD26lj7EBHAquA2BxhrLpy lyVG70YpXM5cw0DUugdSLLcNPlqB27PH2Ne9VFI7/STGm5YTjEVgYJCwJQNDYc0= X-Google-Smtp-Source: AGHT+IEGpcCaQMrpAHAxos0b9FLtdKw3YJbMvjWZce5YI2AK9ErBnUf4o4KJWbENEW0DNxth0g6thg== X-Received: by 2002:a17:90b:4a4f:b0:2d8:898c:3e9b with SMTP id 98e67ed59e1d1-2e1848e2c70mr221175a91.25.1727798904937; Tue, 01 Oct 2024 09:08:24 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.08.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:08:24 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:37 -0700 Subject: [PATCH 32/33] riscv: Documentation for shadow stack on riscv MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-32-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Queue-Id: 59C9F4001C X-Rspam-User: X-Rspamd-Server: rspam05 X-Stat-Signature: goy4otczp5p9hw3tdn6gp8yi33h8m65c X-HE-Tag: 1727798906-417835 X-HE-Meta: U2FsdGVkX1/mRf1vb7wegrjvH1E6TSpUSWIu0VigNsqESg9zaAzhlX/GxZ2KNIx/57NEBYzrwqCl6+tXSoarYMZ1Iay1IzMuMKPnfbl4RPvIxKnRs8OCw5wM/NKpuq7uvEw+4x4VOMutbRBP3XAoJxOERGlufVX1jY/jPzUgHqlW30NpK2YQ6nmFSqlQR3vSV/1Wk/h0gYU61/X6iEXDzFLvV/alL1d7w/Rjy6F4WsiigNy7o2DZ4plnk5eZXJ3juP3H5cquP/oXgXtxfgtfeVicucAUtV1fBygA+BBtnwORSGW044YFBqtR3+wmIvZNKmzx5jMj5XaWXc9jSYxOSDJdx4Q3p7qS/nmMNn7x9xKHiW7NrFo0R8w3QgIUAKDc53aBrf+ZDVUN/5RqblKQqAEDoueVSOxRL1NySLLENQwkzzFjcTbquPOjKCBFP2pLRl7xB5ibjpbgg0NTVSrRScIJC3Nyv6Q8sTg9iYAHiSnOBWiR8soFOmm6zauTgzaaxcrJ6saNOQJ6Pb/Rvf380uLyQSDU0d9aRgHm3QY/eX6Uq13AoGYy8xAXuGX6XiaWihmVm9n2UUBLcVU9ivaGpxYeDNN7LRKGGoUzPdP+NLFifXewaQSqfnXwlkXVvEJyMFyVajfLvON6+pLZcRidqJXDrYFwze91YDpKox2hBmew2mAVSkax4Ir3XX18XymaaPLdCHh0D5y5ElaARMqin+kJrmh5VqoRdI/NV0q1eze24eP269Cg7hxvNTWo+xNpOZdAopHcR90br1rBtsABSu2g0RgxbFF1dLirpVmGnVNNlE9HwzGco6WAmIo09BVAARsqUB7HaF1Zo7obzIz3pcpkBPJh5YrwIc33agjamp37FWksUV0TP4jzTC/3MC6hgAR90mbygorbGQTdzGOpBdrMbib+YJjmsb38dWqF2I1EEEe2YPdL7onI9FqE9d+kfZIyeGPny9UsXKK1n6J nshqy2YV p0ngb3dvHsxIIHoB6SQgPaM95oBvVz7YYZJ+n9AP2bxQ6g/3v2o3ZcKSEftMxlkvegCGRrFoPIkiyay9uW1l1v4T6RTmaObRyb8F0Py4WVeGY1N2x3lGnW1aYMgM6unY6NOYBQ8GvvNeBnYHtzXLe3ZcqnyLYXcZjIvuSmO/1Cw6SYWcdZS0uWCOwq9kVNBGuJYVKgpatswtjuQSiRiZWDPVq9FsbFyNvlMrvxN5u4roL5LEU1X1HPB6L95A1wEMlATM+couP6fOrMNFBq9IjEOIfmbV8DB98ewOqC3C8lG7LLRAnKB2xg3xuQ5TTX0MZbRa36OTWhRd1pI/WUQqAe3pTeScc7WmKzStrThGgg9h0Un6EdlV/VsqmR2zt/E/8EqcaIwvFH2iMW+HMqp2RZs1JbNghFrkCyiaC5/YQ8TtksX8c5ZZqPpeQpD2/ZHR2HoZVzS6N7Q6fefM= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Adding documentation on shadow stack for user mode on riscv and kernel interfaces exposed so that user tasks can enable it. Signed-off-by: Deepak Gupta --- Documentation/arch/riscv/index.rst | 1 + Documentation/arch/riscv/zicfiss.rst | 176 +++++++++++++++++++++++++++++++++++ 2 files changed, 177 insertions(+) diff --git a/Documentation/arch/riscv/index.rst b/Documentation/arch/riscv/index.rst index be7237b69682..e240eb0ceb70 100644 --- a/Documentation/arch/riscv/index.rst +++ b/Documentation/arch/riscv/index.rst @@ -15,6 +15,7 @@ RISC-V architecture vector cmodx zicfilp + zicfiss features diff --git a/Documentation/arch/riscv/zicfiss.rst b/Documentation/arch/riscv/zicfiss.rst new file mode 100644 index 000000000000..5ba389f15b3f --- /dev/null +++ b/Documentation/arch/riscv/zicfiss.rst @@ -0,0 +1,176 @@ +.. SPDX-License-Identifier: GPL-2.0 + +:Author: Deepak Gupta +:Date: 12 January 2024 + +========================================================= +Shadow stack to protect function returns on RISC-V Linux +========================================================= + +This document briefly describes the interface provided to userspace by Linux +to enable shadow stack for user mode applications on RISV-V + +1. Feature Overview +-------------------- + +Memory corruption issues usually result in to crashes, however when in hands of +an adversary and if used creatively can result into variety security issues. + +One of those security issues can be code re-use attacks on program where +adversary can use corrupt return addresses present on stack and chain them +together to perform return oriented programming (ROP) and thus compromising +control flow integrity (CFI) of the program. + +Return addresses live on stack and thus in read-write memory and thus are +susceptible to corruption and allows an adversary to reach any program counter +(PC) in address space. On RISC-V ``zicfiss`` extension provides an alternate +stack termed as shadow stack on which return addresses can be safely placed in +prolog of the function and retrieved in epilog. ``zicfiss`` extension makes +following changes: + +- PTE encodings for shadow stack virtual memory + An earlier reserved encoding in first stage translation i.e. + PTE.R=0, PTE.W=1, PTE.X=0 becomes PTE encoding for shadow stack pages. + +- ``sspush x1/x5`` instruction pushes (stores) ``x1/x5`` to shadow stack. + +- ``sspopchk x1/x5`` instruction pops (loads) from shadow stack and compares + with ``x1/x5`` and if un-equal, CPU raises ``software check exception`` with + ``*tval = 3`` + +Compiler toolchain makes sure that function prologue have ``sspush x1/x5`` to +save return address on shadow stack in addition to regular stack. Similarly +function epilogs have ``ld x5, offset(x2)`` followed by ``sspopchk x5`` to +ensure that popped value from regular stack matches with popped value from +shadow stack. + +2. Shadow stack protections and linux memory manager +----------------------------------------------------- + +As mentioned earlier, shadow stack get new page table encodings and thus have +some special properties assigned to them and instructions that operate on them +as below: + +- Regular stores to shadow stack memory raises access store faults. This way + shadow stack memory is protected from stray inadvertant writes. + +- Regular loads to shadow stack memory are allowed. This allows stack trace + utilities or backtrace functions to read true callstack (not tampered). + +- Only shadow stack instructions can generate shadow stack load or shadow stack + store. + +- Shadow stack load / shadow stack store on read-only memory raises AMO/store + page fault. Thus both ``sspush x1/x5`` and ``sspopchk x1/x5`` will raise AMO/ + store page fault. This simplies COW handling in kernel During fork, kernel + can convert shadow stack pages into read-only memory (as it does for regular + read-write memory) and as soon as subsequent ``sspush`` or ``sspopchk`` in + userspace is encountered, then kernel can perform COW. + +- Shadow stack load / shadow stack store on read-write, read-write-execute + memory raises an access fault. This is a fatal condition because shadow stack + should never be operating on read-write, read-write-execute memory. + +3. ELF and psABI +----------------- + +Toolchain sets up :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_BCFI` for property +:c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_AND` in notes section of the object file. + +4. Linux enabling +------------------ + +User space programs can have multiple shared objects loaded in its address space +and it's a difficult task to make sure all the dependencies have been compiled +with support of shadow stack. Thus it's left to dynamic loader to enable +shadow stack for the program. + +5. prctl() enabling +-------------------- + +:c:macro:`PR_SET_SHADOW_STACK_STATUS` / :c:macro:`PR_GET_SHADOW_STACK_STATUS` / +:c:macro:`PR_LOCK_SHADOW_STACK_STATUS` are three prctls added to manage shadow +stack enabling for tasks. prctls are arch agnostic and returns -EINVAL on other +arches. + +* prctl(PR_SET_SHADOW_STACK_STATUS, unsigned long arg) + +If arg1 :c:macro:`PR_SHADOW_STACK_ENABLE` and if CPU supports ``zicfiss`` then +kernel will enable shadow stack for the task. Dynamic loader can issue this +:c:macro:`prctl` once it has determined that all the objects loaded in address +space have support for shadow stack. Additionally if there is a +:c:macro:`dlopen` to an object which wasn't compiled with ``zicfiss``, dynamic +loader can issue this prctl with arg1 set to 0 (i.e. +:c:macro:`PR_SHADOW_STACK_ENABLE` being clear) + +* prctl(PR_GET_SHADOW_STACK_STATUS, unsigned long *arg) + +Returns current status of indirect branch tracking. If enabled it'll return +:c:macro:`PR_SHADOW_STACK_ENABLE`. + +* prctl(PR_LOCK_SHADOW_STACK_STATUS, unsigned long arg) + +Locks current status of shadow stack enabling on the task. User space may want +to run with strict security posture and wouldn't want loading of objects +without ``zicfiss`` support in it and thus would want to disallow disabling of +shadow stack on current task. In that case user space can use this prctl to +lock current settings. + +5. violations related to returns with shadow stack enabled +----------------------------------------------------------- + +Pertaining to shadow stack, CPU raises software check exception in following +condition: + +- On execution of ``sspopchk x1/x5``, ``x1/x5`` didn't match top of shadow + stack. If mismatch happens then cpu does ``*tval = 3`` and raise software + check exception. + +Linux kernel will treat this as :c:macro:`SIGSEV`` with code = +:c:macro:`SEGV_CPERR` and follow normal course of signal delivery. + +6. Shadow stack tokens +----------------------- +Regular stores on shadow stacks are not allowed and thus can't be tampered +with via arbitrary stray writes due to bugs. Method of pivoting / switching to +shadow stack is simply writing to csr ``CSR_SSP`` changes active shadow stack. +This can be problematic because usually value to be written to ``CSR_SSP`` will +be loaded somewhere in writeable memory and thus allows an adversary to +corruption bug in software to pivot to an any address in shadow stack range. +Shadow stack tokens can help mitigate this problem by making sure that: + +- When software is switching away from a shadow stack, shadow stack pointer + should be saved on shadow stack itself and call it ``shadow stack token`` + +- When software is switching to a shadow stack, it should read the + ``shadow stack token`` from shadow stack pointer and verify that + ``shadow stack token`` itself is pointer to shadow stack itself. + +- Once the token verification is done, software can perform the write to + ``CSR_SSP`` to switch shadow stack. + +Here software can be user mode task runtime itself which is managing various +contexts as part of single thread. Software can be kernel as well when kernel +has to deliver a signal to user task and must save shadow stack pointer. Kernel +can perform similar procedure by saving a token on user shadow stack itself. +This way whenever :c:macro:`sigreturn` happens, kernel can read the token and +verify the token and then switch to shadow stack. Using this mechanism, kernel +helps user task so that any corruption issue in user task is not exploited by +adversary by arbitrarily using :c:macro:`sigreturn`. Adversary will have to +make sure that there is a ``shadow stack token`` in addition to invoking +:c:macro:`sigreturn` + +7. Signal shadow stack +----------------------- +Following structure has been added to sigcontext for RISC-V:: + + struct __sc_riscv_cfi_state { + unsigned long ss_ptr; + }; + +As part of signal delivery, shadow stack token is saved on current shadow stack +itself and updated pointer is saved away in :c:macro:`ss_ptr` field in +:c:macro:`__sc_riscv_cfi_state` under :c:macro:`sigcontext`. Existing shadow +stack allocation is used for signal delivery. During :c:macro:`sigreturn`, +kernel will obtain :c:macro:`ss_ptr` from :c:macro:`sigcontext` and verify the +saved token on shadow stack itself and switch shadow stack. From patchwork Tue Oct 1 16:06:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13818436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7DF6CEACE6 for ; Tue, 1 Oct 2024 16:08:37 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 5A32B2800BC; Tue, 1 Oct 2024 12:08:32 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 552F2280068; Tue, 1 Oct 2024 12:08:32 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 331042800BC; Tue, 1 Oct 2024 12:08:32 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id 0C608280068 for ; Tue, 1 Oct 2024 12:08:32 -0400 (EDT) Received: from smtpin05.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay03.hostedemail.com (Postfix) with ESMTP id 8DF25A1708 for ; Tue, 1 Oct 2024 16:08:31 +0000 (UTC) X-FDA: 82625516022.05.5CE6EF7 Received: from mail-pj1-f42.google.com (mail-pj1-f42.google.com [209.85.216.42]) by imf29.hostedemail.com (Postfix) with ESMTP id 6C077120003 for ; Tue, 1 Oct 2024 16:08:29 +0000 (UTC) Authentication-Results: imf29.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=MmmXMD8d; spf=pass (imf29.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.42 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1727798870; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=+7AY89VLdRvm3rOEfUxECD0x4KyucTXFJokv/01dAQg=; b=7Ir/g+BQH6khMuMpKCTre19m5VPFvq9jLmqDkzYMBS20M33rJC8R0pqDBOuygRxdjabqwN HCvnBoo8YE+tll3qs42bgOdsQzZLAv4qoKbKNYlhyPeYtRkbMtmrYB9YNC0eXTx7a0iLVJ /3U+S2ZFzMLW5g+ce8re5WFxFGqlxQg= ARC-Authentication-Results: i=1; imf29.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=MmmXMD8d; spf=pass (imf29.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.42 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1727798870; a=rsa-sha256; cv=none; b=7WQFkObeq0gIlbIBd8dBFVppJpTVi7rBUMK2+czpX7XvAjigVK22l+MNzjUVHqmBvSJtXa rg/9VO4jEcZOSV3syvdvfaOYx+qHerNmkvxJcNeRFcgz8IPl4vTor0VKJ0xe9diiWQmjr2 lZlHGRIZzHmvpHqtvYRTm+7mVIIbBIU= Received: by mail-pj1-f42.google.com with SMTP id 98e67ed59e1d1-2e075ceebdaso4290835a91.2 for ; Tue, 01 Oct 2024 09:08:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798908; x=1728403708; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=+7AY89VLdRvm3rOEfUxECD0x4KyucTXFJokv/01dAQg=; b=MmmXMD8drG9mfDmtBwEnkNuin+YyiLHD0E1wNK2v1JZdHSPGzmJM0d575IBClnLZdY CDpaZbPIMwRX8wdbeCjKdqSQaEwVasHuqIpwPkM+Xb1lWQym2O0sMiy6JYSbmZYwiDbr wV9DPzFcrXOOnXG4xGp4xT6KyCKz/zAYZnNYmJX6a0GXq1fL2YFt2pztSb0jg58Qm3/a EwqXXSm2jN+sCuCZDqzp98ah6FushCZD2blI8xjTWSF7H+d5JW9jX98K7QiCgFp8EDaS 5LfAAv/MsbAS2+uyPra76pxT+rpS9/aCitYE67H9GyZt7c4HUhDPKTzra/MvlLiqoGDg R+Ww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798908; x=1728403708; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+7AY89VLdRvm3rOEfUxECD0x4KyucTXFJokv/01dAQg=; b=iFpIrl1B8RKhHn2rYL537OJ+gwVC2fNiKqyWjURpgI8lSQZYPqorFw7ddLvDN1IXkY S+qM9YzrK9/W8jLsRl7ExsSQf4J+Af7Z2E0uk9JJWu4W1A7IKIFgDRdxA8TdCPF1g+Dp 4+SR/XMKwd5uqA3bFFjawnY3l23CPGXriSIwBmYsssLRjUYItrR4WeV8WSpEHAi2cYVp eylEtrVb8Q8hhgY+NmWfgs2uI7ZT2gqwORP+hyCA+6cWjE90bb06FU8bDexKhteO7/u7 Pcz05ChOWumYQsO9Fool/bqUaAPaZDv7/z2dCQL/YAM0vc/rKzhGwGI+egA0XReHTeuQ r93A== X-Forwarded-Encrypted: i=1; AJvYcCWPOf4OaXBmPLB7zKkho14UpMbxqLk3NwMKggVvdZQUZ7v3bdJj+X8QI3ntt4TfZ8IfB18jRM6Ntw==@kvack.org X-Gm-Message-State: AOJu0YxfQ+IXr8gEuiBsYegbphedrt3naaubYtwnASYEzc3MToi9SPFQ f19SoGyp+1E/HDmQCFRaNnqZKX/xhPIso3yJVI+YyGb49BkPXZuUSXzUxnxjjI8= X-Google-Smtp-Source: AGHT+IESwlV/P+Xn7LHT+0O4twld/g+xo1FbeMyT3YnCkcbo1lz2445d7k3qW7OogumJ7xfjjia5hQ== X-Received: by 2002:a17:90b:3a86:b0:2da:8c28:6561 with SMTP id 98e67ed59e1d1-2e184814fabmr237995a91.22.1727798907977; Tue, 01 Oct 2024 09:08:27 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.08.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:08:27 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:38 -0700 Subject: [PATCH 33/33] kselftest/riscv: kselftest for user mode cfi MIME-Version: 1.0 Message-Id: <20241001-v5_user_cfi_series-v1-33-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspam-User: X-Stat-Signature: ka6oiaurqj873e7h1d8dy1dat35c6swb X-Rspamd-Queue-Id: 6C077120003 X-Rspamd-Server: rspam11 X-HE-Tag: 1727798909-675401 X-HE-Meta: U2FsdGVkX19vK7UHTLg8VIm2kcZbd/G5eqWbATBHaLr94l9291IfEgRivWEo2+nGSQpyLgEre2JeBbw7TInuznmQAjwS1jLifEBx0KCP0TXtcorm5aTmTRDMLg1hYfxXKTTSy3iPukeAjhwQBLYTCf1BbpIKvOdzYO2jcCpMRs41NM0EIalAxRAVzA4EievJgzt9bCE8ZT5TJYWGRhmEynw8DnEkyPA0mJRePH164CIgS4WLPZD/h2K+r4CWQCMnp9a1sMyNvV38p8lPZFRLAKb/TJOU8ghh8Geeff3MqYnYQoms2CVlY1DtGU4G9z4TdcWqQoKkTwvgmahJw7NrC5weS1f1o+RUim9uSwpFGMUuwROTGU/VzDceizoR/pe3OffrMwISBEbCMQmD52Zr2gSJjdPr5p+Og4ZsiPvfn1iwD+N+RKI9gx9NvHIwl0zplH5KGw0r4nxy1XnM6AzSiIIpn/uBXmJolX/6CzePVoOPfR7dmNaqjmCaghgQLWp0lGzqJtqonFqgXawTtiYJNrFhUUlSjIC3mBi/GuvtuWY/7mfIjVRRnqnn8EbffDw5xUs9oNLlbuBe+5l4fNsDKzPYU/0avGTBQsZ0GggPM96SmfYy92Uj/XZyoWaaoVpR+i1oLkKrXqEbXuXSIO4C2J3CnJsEEIYkqgDuL0QsUxNSePE6CZCyRNJKKVi4krN875/BvHI1pu6HYjxQzj+y2y5PkMh9LUQkyo56m+a97FK0vh3unEkjTCDPzt+OqP94jo3hOsjktCjbp2AJfdTgRPVZT5uixds29ehoPxZy0CB4Arm8v32VsSOweJWRoxU0XfcANN4iAis/JjccaC8eisZqgw0Ys2DxpauOG7YUSpCFS+GBodluPYV3fM9uMAdu2gPzVicZU1EB3BD1ED1WlRT1yToQXYKr0CoITm6lZjqpmw6tG3pRiBoZ6dMLQLwUdm3Ceu0cgACXi7aA/rB 6REj+Fau lSYXYsEcfUkpDmZTKbPwh7/YkzfxtPNWtWFJOnFSUZwXzG+pa5QK2fclQ8sQHRFj/isJHjBKJYqx7ZWjX32/ALiohtNGuKFz5LdfSt2M8+cNMikOYfdbXk+RcZYO1JhYcID41f3dVfjDdUaLprVHafEtMsYxrt0tmUzroIg+b1CChTphqOo3B2/X2QoXR58JCIVlL5eH4Ac8V3c3ZKMxq3qDUkKzO3DzykNclHIS7iCIAtwNC68L4ooiiz6rZBceya8qzWubdHRVP3oGlKOPKDX1TSzztu/PySsfLI0TnJc4Pm1q1kI66LlnjKjLKJY+w6l9ANJYf8cBV4VxJzS9fiO4vlJutPFCA7gz20Bw4lXYhRatDZ6a+2DIJteFwgrc1IsOowzUDAr5FdAO8lp1HllvOQGZkW4YRiSiojS7f9oRtE3RBNJsPkjWu6LqQgSfXY5YD27CZtgyBE2g= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Adds kselftest for RISC-V control flow integrity implementation for user mode. There is not a lot going on in kernel for enabling landing pad for user mode. cfi selftest are intended to be compiled with zicfilp and zicfiss enabled compiler. Thus kselftest simply checks if landing pad and shadow stack for the binary and process are enabled or not. selftest then register a signal handler for SIGSEGV. Any control flow violation are reported as SIGSEGV with si_code = SEGV_CPERR. Test will fail on receiving any SEGV_CPERR. Shadow stack part has more changes in kernel and thus there are separate tests for that - Exercise `map_shadow_stack` syscall - `fork` test to make sure COW works for shadow stack pages - gup tests As of today kernel uses FOLL_FORCE when access happens to memory via /proc//mem. Not breaking that for shadow stack - signal test. Make sure signal delivery results in token creation on shadow stack and consumes (and verifies) token on sigreturn - shadow stack protection test. attempts to write using regular store instruction on shadow stack memory must result in access faults Signed-off-by: Deepak Gupta --- tools/testing/selftests/riscv/Makefile | 2 +- tools/testing/selftests/riscv/cfi/.gitignore | 3 + tools/testing/selftests/riscv/cfi/Makefile | 10 + tools/testing/selftests/riscv/cfi/cfi_rv_test.h | 83 +++++ tools/testing/selftests/riscv/cfi/riscv_cfi_test.c | 82 +++++ tools/testing/selftests/riscv/cfi/shadowstack.c | 362 +++++++++++++++++++++ tools/testing/selftests/riscv/cfi/shadowstack.h | 37 +++ 7 files changed, 578 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/riscv/Makefile b/tools/testing/selftests/riscv/Makefile index 7ce03d832b64..6e142fe004ab 100644 --- a/tools/testing/selftests/riscv/Makefile +++ b/tools/testing/selftests/riscv/Makefile @@ -5,7 +5,7 @@ ARCH ?= $(shell uname -m 2>/dev/null || echo not) ifneq (,$(filter $(ARCH),riscv)) -RISCV_SUBTARGETS ?= hwprobe vector mm sigreturn +RISCV_SUBTARGETS ?= hwprobe vector mm sigreturn cfi else RISCV_SUBTARGETS := endif diff --git a/tools/testing/selftests/riscv/cfi/.gitignore b/tools/testing/selftests/riscv/cfi/.gitignore new file mode 100644 index 000000000000..ce7623f9da28 --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/.gitignore @@ -0,0 +1,3 @@ +cfitests +riscv_cfi_test +shadowstack \ No newline at end of file diff --git a/tools/testing/selftests/riscv/cfi/Makefile b/tools/testing/selftests/riscv/cfi/Makefile new file mode 100644 index 000000000000..b65f7ff38a32 --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/Makefile @@ -0,0 +1,10 @@ +CFLAGS += -I$(top_srcdir)/tools/include + +CFLAGS += -march=rv64gc_zicfilp_zicfiss + +TEST_GEN_PROGS := cfitests + +include ../../lib.mk + +$(OUTPUT)/cfitests: riscv_cfi_test.c shadowstack.c + $(CC) -o$@ $(CFLAGS) $(LDFLAGS) $^ diff --git a/tools/testing/selftests/riscv/cfi/cfi_rv_test.h b/tools/testing/selftests/riscv/cfi/cfi_rv_test.h new file mode 100644 index 000000000000..fa1cf7183672 --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/cfi_rv_test.h @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SELFTEST_RISCV_CFI_H +#define SELFTEST_RISCV_CFI_H +#include +#include +#include "shadowstack.h" + +#define RISCV_CFI_SELFTEST_COUNT RISCV_SHADOW_STACK_TESTS + +#define CHILD_EXIT_CODE_SSWRITE 10 +#define CHILD_EXIT_CODE_SIG_TEST 11 + +#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \ +({ \ + register long _num __asm__ ("a7") = (num); \ + register long _arg1 __asm__ ("a0") = (long)(arg1); \ + register long _arg2 __asm__ ("a1") = (long)(arg2); \ + register long _arg3 __asm__ ("a2") = (long)(arg3); \ + register long _arg4 __asm__ ("a3") = (long)(arg4); \ + register long _arg5 __asm__ ("a4") = (long)(arg5); \ + \ + __asm__ volatile ( \ + "ecall\n" \ + : "+r"(_arg1) \ + : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \ + "r"(_num) \ + : "memory", "cc" \ + ); \ + _arg1; \ +}) + +#define my_syscall3(num, arg1, arg2, arg3) \ +({ \ + register long _num __asm__ ("a7") = (num); \ + register long _arg1 __asm__ ("a0") = (long)(arg1); \ + register long _arg2 __asm__ ("a1") = (long)(arg2); \ + register long _arg3 __asm__ ("a2") = (long)(arg3); \ + \ + __asm__ volatile ( \ + "ecall\n" \ + : "+r"(_arg1) \ + : "r"(_arg2), "r"(_arg3), \ + "r"(_num) \ + : "memory", "cc" \ + ); \ + _arg1; \ +}) + +#ifndef __NR_prctl +#define __NR_prctl 167 +#endif + +#ifndef __NR_map_shadow_stack +#define __NR_map_shadow_stack 453 +#endif + +#define CSR_SSP 0x011 + +#ifdef __ASSEMBLY__ +#define __ASM_STR(x) x +#else +#define __ASM_STR(x) #x +#endif + +#define csr_read(csr) \ +({ \ + register unsigned long __v; \ + __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \ + : "=r" (__v) : \ + : "memory"); \ + __v; \ +}) + +#define csr_write(csr, val) \ +({ \ + unsigned long __v = (unsigned long) (val); \ + __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \ + : : "rK" (__v) \ + : "memory"); \ +}) + +#endif diff --git a/tools/testing/selftests/riscv/cfi/riscv_cfi_test.c b/tools/testing/selftests/riscv/cfi/riscv_cfi_test.c new file mode 100644 index 000000000000..f22b3f0f24de --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/riscv_cfi_test.c @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include "../../kselftest.h" +#include +#include +#include +#include "cfi_rv_test.h" + +/* do not optimize cfi related test functions */ +#pragma GCC push_options +#pragma GCC optimize("O0") + +void sigsegv_handler(int signum, siginfo_t *si, void *uc) +{ + struct ucontext *ctx = (struct ucontext *) uc; + + if (si->si_code == SEGV_CPERR) { + printf("Control flow violation happened somewhere\n"); + printf("pc where violation happened %lx\n", ctx->uc_mcontext.gregs[0]); + exit(-1); + } + + printf("In sigsegv handler\n"); + /* all other cases are expected to be of shadow stack write case */ + exit(CHILD_EXIT_CODE_SSWRITE); +} + +bool register_signal_handler(void) +{ + struct sigaction sa = {}; + + sa.sa_sigaction = sigsegv_handler; + sa.sa_flags = SA_SIGINFO; + if (sigaction(SIGSEGV, &sa, NULL)) { + printf("registering signal handler for landing pad violation failed\n"); + return false; + } + + return true; +} + +int main(int argc, char *argv[]) +{ + int ret = 0; + unsigned long lpad_status = 0, ss_status = 0; + + ksft_print_header(); + + ksft_set_plan(RISCV_CFI_SELFTEST_COUNT); + + ksft_print_msg("starting risc-v tests\n"); + + /* + * Landing pad test. Not a lot of kernel changes to support landing + * pad for user mode except lighting up a bit in senvcfg via a prctl + * Enable landing pad through out the execution of test binary + */ + ret = my_syscall5(__NR_prctl, PR_GET_INDIR_BR_LP_STATUS, &lpad_status, 0, 0, 0); + if (ret) + ksft_exit_skip("Get landing pad status failed with %d\n", ret); + + if (!(lpad_status & PR_INDIR_BR_LP_ENABLE)) + ksft_exit_skip("landing pad is not enabled, should be enabled via glibc\n"); + + ret = my_syscall5(__NR_prctl, PR_GET_SHADOW_STACK_STATUS, &ss_status, 0, 0, 0); + if (ret) + ksft_exit_skip("Get shadow stack failed with %d\n", ret); + + if (!(ss_status & PR_SHADOW_STACK_ENABLE)) + ksft_exit_skip("shadow stack is not enabled, should be enabled via glibc\n"); + + if (!register_signal_handler()) + ksft_exit_skip("registering signal handler for SIGSEGV failed\n"); + + ksft_print_msg("landing pad and shadow stack are enabled for binary\n"); + ksft_print_msg("starting risc-v shadow stack tests\n"); + execute_shadow_stack_tests(); + + ksft_finished(); +} + +#pragma GCC pop_options diff --git a/tools/testing/selftests/riscv/cfi/shadowstack.c b/tools/testing/selftests/riscv/cfi/shadowstack.c new file mode 100644 index 000000000000..2f65eb970c44 --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/shadowstack.c @@ -0,0 +1,362 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include "../../kselftest.h" +#include +#include +#include +#include +#include +#include "shadowstack.h" +#include "cfi_rv_test.h" + +/* do not optimize shadow stack related test functions */ +#pragma GCC push_options +#pragma GCC optimize("O0") + +void zar(void) +{ + unsigned long ssp = 0; + + ssp = csr_read(CSR_SSP); + printf("inside %s and shadow stack ptr is %lx\n", __func__, ssp); +} + +void bar(void) +{ + printf("inside %s\n", __func__); + zar(); +} + +void foo(void) +{ + printf("inside %s\n", __func__); + bar(); +} + +void zar_child(void) +{ + unsigned long ssp = 0; + + ssp = csr_read(CSR_SSP); + printf("inside %s and shadow stack ptr is %lx\n", __func__, ssp); +} + +void bar_child(void) +{ + printf("inside %s\n", __func__); + zar_child(); +} + +void foo_child(void) +{ + printf("inside %s\n", __func__); + bar_child(); +} + +typedef void (call_func_ptr)(void); +/* + * call couple of functions to test push pop. + */ +int shadow_stack_call_tests(call_func_ptr fn_ptr, bool parent) +{ + if (parent) + printf("call test for parent\n"); + else + printf("call test for child\n"); + + (fn_ptr)(); + + return 0; +} + +/* forks a thread, and ensure shadow stacks fork out */ +bool shadow_stack_fork_test(unsigned long test_num, void *ctx) +{ + int pid = 0, child_status = 0, parent_pid = 0, ret = 0; + unsigned long ss_status = 0; + + printf("exercising shadow stack fork test\n"); + + ret = my_syscall5(__NR_prctl, PR_GET_SHADOW_STACK_STATUS, &ss_status, 0, 0, 0); + if (ret) { + printf("shadow stack get status prctl failed with errorcode %d\n", ret); + return false; + } + + if (!(ss_status & PR_SHADOW_STACK_ENABLE)) + ksft_exit_skip("shadow stack is not enabled, should be enabled via glibc\n"); + + parent_pid = getpid(); + pid = fork(); + + if (pid) { + printf("Parent pid %d and child pid %d\n", parent_pid, pid); + shadow_stack_call_tests(&foo, true); + } else + shadow_stack_call_tests(&foo_child, false); + + if (pid) { + printf("waiting on child to finish\n"); + wait(&child_status); + } else { + /* exit child gracefully */ + exit(0); + } + + if (pid && WIFSIGNALED(child_status)) { + printf("child faulted"); + return false; + } + + return true; +} + +/* exercise `map_shadow_stack`, pivot to it and call some functions to ensure it works */ +#define SHADOW_STACK_ALLOC_SIZE 4096 +bool shadow_stack_map_test(unsigned long test_num, void *ctx) +{ + unsigned long shdw_addr; + int ret = 0; + + shdw_addr = my_syscall3(__NR_map_shadow_stack, NULL, SHADOW_STACK_ALLOC_SIZE, 0); + + if (((long) shdw_addr) <= 0) { + printf("map_shadow_stack failed with error code %d\n", (int) shdw_addr); + return false; + } + + ret = munmap((void *) shdw_addr, SHADOW_STACK_ALLOC_SIZE); + + if (ret) { + printf("munmap failed with error code %d\n", ret); + return false; + } + + return true; +} + +/* + * shadow stack protection tests. map a shadow stack and + * validate all memory protections work on it + */ +bool shadow_stack_protection_test(unsigned long test_num, void *ctx) +{ + unsigned long shdw_addr; + unsigned long *write_addr = NULL; + int ret = 0, pid = 0, child_status = 0; + + shdw_addr = my_syscall3(__NR_map_shadow_stack, NULL, SHADOW_STACK_ALLOC_SIZE, 0); + + if (((long) shdw_addr) <= 0) { + printf("map_shadow_stack failed with error code %d\n", (int) shdw_addr); + return false; + } + + write_addr = (unsigned long *) shdw_addr; + pid = fork(); + + /* no child was created, return false */ + if (pid == -1) + return false; + + /* + * try to perform a store from child on shadow stack memory + * it should result in SIGSEGV + */ + if (!pid) { + /* below write must lead to SIGSEGV */ + *write_addr = 0xdeadbeef; + } else { + wait(&child_status); + } + + /* test fail, if 0xdeadbeef present on shadow stack address */ + if (*write_addr == 0xdeadbeef) { + printf("write suceeded\n"); + return false; + } + + /* if child reached here, then fail */ + if (!pid) { + printf("child reached unreachable state\n"); + return false; + } + + /* if child exited via signal handler but not for write on ss */ + if (WIFEXITED(child_status) && + WEXITSTATUS(child_status) != CHILD_EXIT_CODE_SSWRITE) { + printf("child wasn't signaled for write on shadow stack\n"); + return false; + } + + ret = munmap(write_addr, SHADOW_STACK_ALLOC_SIZE); + if (ret) { + printf("munmap failed with error code %d\n", ret); + return false; + } + + return true; +} + +#define SS_MAGIC_WRITE_VAL 0xbeefdead + +int gup_tests(int mem_fd, unsigned long *shdw_addr) +{ + unsigned long val = 0; + + lseek(mem_fd, (unsigned long)shdw_addr, SEEK_SET); + if (read(mem_fd, &val, sizeof(val)) < 0) { + printf("reading shadow stack mem via gup failed\n"); + return 1; + } + + val = SS_MAGIC_WRITE_VAL; + lseek(mem_fd, (unsigned long)shdw_addr, SEEK_SET); + if (write(mem_fd, &val, sizeof(val)) < 0) { + printf("writing shadow stack mem via gup failed\n"); + return 1; + } + + if (*shdw_addr != SS_MAGIC_WRITE_VAL) { + printf("GUP write to shadow stack memory didn't happen\n"); + return 1; + } + + return 0; +} + +bool shadow_stack_gup_tests(unsigned long test_num, void *ctx) +{ + unsigned long shdw_addr = 0; + unsigned long *write_addr = NULL; + int fd = 0; + bool ret = false; + + shdw_addr = my_syscall3(__NR_map_shadow_stack, NULL, SHADOW_STACK_ALLOC_SIZE, 0); + + if (((long) shdw_addr) <= 0) { + printf("map_shadow_stack failed with error code %d\n", (int) shdw_addr); + return false; + } + + write_addr = (unsigned long *) shdw_addr; + + fd = open("/proc/self/mem", O_RDWR); + if (fd == -1) + return false; + + if (gup_tests(fd, write_addr)) { + printf("gup tests failed\n"); + goto out; + } + + ret = true; +out: + if (shdw_addr && munmap(write_addr, SHADOW_STACK_ALLOC_SIZE)) { + printf("munmap failed with error code %d\n", ret); + ret = false; + } + + return ret; +} + +volatile bool break_loop; + +void sigusr1_handler(int signo) +{ + printf("In sigusr1 handler\n"); + break_loop = true; +} + +bool sigusr1_signal_test(void) +{ + struct sigaction sa = {}; + + sa.sa_handler = sigusr1_handler; + sa.sa_flags = 0; + sigemptyset(&sa.sa_mask); + if (sigaction(SIGUSR1, &sa, NULL)) { + printf("registering signal handler for SIGUSR1 failed\n"); + return false; + } + + return true; +} +/* + * shadow stack signal test. shadow stack must be enabled. + * register a signal, fork another thread which is waiting + * on signal. Send a signal from parent to child, verify + * that signal was received by child. If not test fails + */ +bool shadow_stack_signal_test(unsigned long test_num, void *ctx) +{ + int pid = 0, child_status = 0, ret = 0; + unsigned long ss_status = 0; + + ret = my_syscall5(__NR_prctl, PR_GET_SHADOW_STACK_STATUS, &ss_status, 0, 0, 0); + if (ret) { + printf("shadow stack get status prctl failed with errorcode %d\n", ret); + return false; + } + + if (!(ss_status & PR_SHADOW_STACK_ENABLE)) + ksft_exit_skip("shadow stack is not enabled, should be enabled via glibc\n"); + + /* this should be caught by signal handler and do an exit */ + if (!sigusr1_signal_test()) { + printf("registering sigusr1 handler failed\n"); + exit(-1); + } + + pid = fork(); + + if (pid == -1) { + printf("signal test: fork failed\n"); + goto out; + } + + if (pid == 0) { + while (!break_loop) + sleep(1); + + exit(11); + /* child shouldn't go beyond here */ + } + + /* send SIGUSR1 to child */ + kill(pid, SIGUSR1); + wait(&child_status); + +out: + + return (WIFEXITED(child_status) && + WEXITSTATUS(child_status) == 11); +} + +int execute_shadow_stack_tests(void) +{ + int ret = 0; + unsigned long test_count = 0; + unsigned long shstk_status = 0; + + printf("Executing RISC-V shadow stack self tests\n"); + + ret = my_syscall5(__NR_prctl, PR_GET_SHADOW_STACK_STATUS, &shstk_status, 0, 0, 0); + + if (ret != 0) + ksft_exit_skip("Get shadow stack status failed with %d\n", ret); + + /* + * If we are here that means get shadow stack status succeeded and + * thus shadow stack support is baked in the kernel. + */ + while (test_count < ARRAY_SIZE(shstk_tests)) { + ksft_test_result((*shstk_tests[test_count].t_func)(test_count, NULL), + shstk_tests[test_count].name); + test_count++; + } + + return 0; +} + +#pragma GCC pop_options diff --git a/tools/testing/selftests/riscv/cfi/shadowstack.h b/tools/testing/selftests/riscv/cfi/shadowstack.h new file mode 100644 index 000000000000..b43e74136a26 --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/shadowstack.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SELFTEST_SHADOWSTACK_TEST_H +#define SELFTEST_SHADOWSTACK_TEST_H +#include +#include + +/* + * a cfi test returns true for success or false for fail + * takes a number for test number to index into array and void pointer. + */ +typedef bool (*shstk_test_func)(unsigned long test_num, void *); + +struct shadow_stack_tests { + char *name; + shstk_test_func t_func; +}; + +bool shadow_stack_fork_test(unsigned long test_num, void *ctx); +bool shadow_stack_map_test(unsigned long test_num, void *ctx); +bool shadow_stack_protection_test(unsigned long test_num, void *ctx); +bool shadow_stack_gup_tests(unsigned long test_num, void *ctx); +bool shadow_stack_signal_test(unsigned long test_num, void *ctx); + +static struct shadow_stack_tests shstk_tests[] = { + { "shstk fork test\n", shadow_stack_fork_test }, + { "map shadow stack syscall\n", shadow_stack_map_test }, + { "shadow stack gup tests\n", shadow_stack_gup_tests }, + { "shadow stack signal tests\n", shadow_stack_signal_test}, + { "memory protections of shadow stack memory\n", shadow_stack_protection_test } +}; + +#define RISCV_SHADOW_STACK_TESTS ARRAY_SIZE(shstk_tests) + +int execute_shadow_stack_tests(void); + +#endif