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Those cards support capacity larger than 2TB and up to including 128TB. ACMD41 was extended to support the host-card handshake during initialization. The card expects that the HCS & HO2T bits to be set in the command argument, and sets the applicable bits in the R3 returned response. On the contrary, if a SDUC card is inserted to a non-supporting host, it will never respond to this ACMD41 until eventually, the host will timed out and give up. Also, add SD CSD version 3.0 - designated for SDUC, and properly parse the csd register as the c_size field got expanded to 28 bits. Do not enable SDUC for now - leave it to the last patch in the series. Tested-by: Ricky WU Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/bus.c | 4 +++- drivers/mmc/core/card.h | 3 +++ drivers/mmc/core/sd.c | 28 +++++++++++++++++----------- drivers/mmc/core/sd.h | 2 +- drivers/mmc/core/sdio.c | 2 +- include/linux/mmc/card.h | 2 +- include/linux/mmc/sd.h | 1 + 7 files changed, 27 insertions(+), 15 deletions(-) diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c index 0ddaee0eae54..30763b342bd3 100644 --- a/drivers/mmc/core/bus.c +++ b/drivers/mmc/core/bus.c @@ -321,7 +321,9 @@ int mmc_add_card(struct mmc_card *card) case MMC_TYPE_SD: type = "SD"; if (mmc_card_blockaddr(card)) { - if (mmc_card_ext_capacity(card)) + if (mmc_card_ult_capacity(card)) + type = "SDUC"; + else if (mmc_card_ext_capacity(card)) type = "SDXC"; else type = "SDHC"; diff --git a/drivers/mmc/core/card.h b/drivers/mmc/core/card.h index 8476754b1b17..3205feb1e8ff 100644 --- a/drivers/mmc/core/card.h +++ b/drivers/mmc/core/card.h @@ -23,6 +23,7 @@ #define MMC_CARD_SDXC (1<<3) /* card is SDXC */ #define MMC_CARD_REMOVED (1<<4) /* card has been removed */ #define MMC_STATE_SUSPENDED (1<<5) /* card is suspended */ +#define MMC_CARD_SDUC (1<<6) /* card is SDUC */ #define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) @@ -30,11 +31,13 @@ #define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC) #define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED)) #define mmc_card_suspended(c) ((c)->state & MMC_STATE_SUSPENDED) +#define mmc_card_ult_capacity(c) ((c)->state & MMC_CARD_SDUC) #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) #define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC) +#define mmc_card_set_ult_capacity(c) ((c)->state |= MMC_CARD_SDUC) #define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED) #define mmc_card_set_suspended(c) ((c)->state |= MMC_STATE_SUSPENDED) #define mmc_card_clr_suspended(c) ((c)->state &= ~MMC_STATE_SUSPENDED) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 9e62cb7055fe..63915541c0e4 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -100,7 +100,7 @@ void mmc_decode_cid(struct mmc_card *card) /* * Given a 128-bit response, decode to our card CSD structure. */ -static int mmc_decode_csd(struct mmc_card *card) +static int mmc_decode_csd(struct mmc_card *card, bool is_sduc) { struct mmc_csd *csd = &card->csd; unsigned int e, m, csd_struct; @@ -144,9 +144,10 @@ static int mmc_decode_csd(struct mmc_card *card) mmc_card_set_readonly(card); break; case 1: + case 2: /* - * This is a block-addressed SDHC or SDXC card. Most - * interesting fields are unused and have fixed + * This is a block-addressed SDHC, SDXC or SDUC card. + * Most interesting fields are unused and have fixed * values. To avoid getting tripped by buggy cards, * we assume those fixed values ourselves. */ @@ -159,14 +160,19 @@ static int mmc_decode_csd(struct mmc_card *card) e = unstuff_bits(resp, 96, 3); csd->max_dtr = tran_exp[e] * tran_mant[m]; csd->cmdclass = unstuff_bits(resp, 84, 12); - csd->c_size = unstuff_bits(resp, 48, 22); - /* SDXC cards have a minimum C_SIZE of 0x00FFFF */ - if (csd->c_size >= 0xFFFF) + if (csd_struct == 1) + m = unstuff_bits(resp, 48, 22); + else + m = unstuff_bits(resp, 48, 28); + csd->c_size = m; + + if (csd->c_size >= 0x400000 && is_sduc) + mmc_card_set_ult_capacity(card); + else if (csd->c_size >= 0xFFFF) mmc_card_set_ext_capacity(card); - m = unstuff_bits(resp, 48, 22); - csd->capacity = (1 + m) << 10; + csd->capacity = (1 + (typeof(sector_t))m) << 10; csd->read_blkbits = 9; csd->read_partial = 0; @@ -876,7 +882,7 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) return err; } -int mmc_sd_get_csd(struct mmc_card *card) +int mmc_sd_get_csd(struct mmc_card *card, bool is_sduc) { int err; @@ -887,7 +893,7 @@ int mmc_sd_get_csd(struct mmc_card *card) if (err) return err; - err = mmc_decode_csd(card); + err = mmc_decode_csd(card, is_sduc); if (err) return err; @@ -1442,7 +1448,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, } if (!oldcard) { - err = mmc_sd_get_csd(card); + err = mmc_sd_get_csd(card, false); if (err) goto free_card; diff --git a/drivers/mmc/core/sd.h b/drivers/mmc/core/sd.h index fe6dd46927a4..7e8beface2ca 100644 --- a/drivers/mmc/core/sd.h +++ b/drivers/mmc/core/sd.h @@ -10,7 +10,7 @@ struct mmc_host; struct mmc_card; int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr); -int mmc_sd_get_csd(struct mmc_card *card); +int mmc_sd_get_csd(struct mmc_card *card, bool is_sduc); void mmc_decode_cid(struct mmc_card *card); int mmc_sd_setup_card(struct mmc_host *host, struct mmc_card *card, bool reinit); diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c index 4fb247fde5c0..9566837c9848 100644 --- a/drivers/mmc/core/sdio.c +++ b/drivers/mmc/core/sdio.c @@ -769,7 +769,7 @@ static int mmc_sdio_init_card(struct mmc_host *host, u32 ocr, * Read CSD, before selecting the card */ if (!oldcard && mmc_card_sd_combo(card)) { - err = mmc_sd_get_csd(card); + err = mmc_sd_get_csd(card, false); if (err) goto remove; diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index 543446392776..eb67d3d5ff5b 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -35,7 +35,7 @@ struct mmc_csd { unsigned int wp_grp_size; unsigned int read_blkbits; unsigned int write_blkbits; - unsigned int capacity; + sector_t capacity; unsigned int read_partial:1, read_misalign:1, write_partial:1, diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h index 6727576a8755..865cc0ca8543 100644 --- a/include/linux/mmc/sd.h +++ b/include/linux/mmc/sd.h @@ -36,6 +36,7 @@ /* OCR bit definitions */ #define SD_OCR_S18R (1 << 24) /* 1.8V switching request */ #define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */ +#define SD_OCR_2T (1 << 27) /* HO2T/CO2T - SDUC support */ #define SD_OCR_XPC (1 << 28) /* SDXC power control */ #define SD_OCR_CCS (1 << 30) /* Card Capacity Status */ From patchwork Sun Oct 6 05:11:40 2024 Content-Type: text/plain; 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05 Oct 2024 22:13:57 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v8 02/10] mmc: sd: Add Extension memory addressing Date: Sun, 6 Oct 2024 08:11:40 +0300 Message-Id: <20241006051148.160278-3-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241006051148.160278-1-avri.altman@wdc.com> References: <20241006051148.160278-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SDUC memory addressing spans beyond 2TB and up to 128TB. Therefore, 38 bits are required to access the entire memory space of all sectors. Those extra 6 bits are to be carried by CMD22 prior of sending read/write/erase commands: CMD17, CMD18, CMD24, CMD25, CMD32, and CMD33. CMD22 will carry the higher order 6 bits, and must precedes any of the above commands even if it targets sector < 2TB. No error related to address or length is indicated in CMD22 but rather in the read/write command itself. Tested-by: Ricky WU Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/sd_ops.c | 15 +++++++++++++++ drivers/mmc/core/sd_ops.h | 1 + include/linux/mmc/sd.h | 3 +++ 3 files changed, 19 insertions(+) diff --git a/drivers/mmc/core/sd_ops.c b/drivers/mmc/core/sd_ops.c index f93c392040ae..50d1380e93b8 100644 --- a/drivers/mmc/core/sd_ops.c +++ b/drivers/mmc/core/sd_ops.c @@ -16,6 +16,7 @@ #include #include "core.h" +#include "card.h" #include "sd_ops.h" #include "mmc_ops.h" @@ -188,6 +189,20 @@ int mmc_send_app_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr) return 0; } +int mmc_send_ext_addr(struct mmc_host *host, u32 addr) +{ + struct mmc_command cmd = { + .opcode = SD_ADDR_EXT, + .arg = addr, + .flags = MMC_RSP_R1 | MMC_CMD_AC, + }; + + if (!mmc_card_ult_capacity(host->card)) + return 0; + + return mmc_wait_for_cmd(host, &cmd, 0); +} + static int __mmc_send_if_cond(struct mmc_host *host, u32 ocr, u8 pcie_bits, u32 *resp) { diff --git a/drivers/mmc/core/sd_ops.h b/drivers/mmc/core/sd_ops.h index 7667fc223b74..fd3f10b9cf86 100644 --- a/drivers/mmc/core/sd_ops.h +++ b/drivers/mmc/core/sd_ops.h @@ -21,6 +21,7 @@ int mmc_send_relative_addr(struct mmc_host *host, unsigned int *rca); int mmc_app_send_scr(struct mmc_card *card); int mmc_app_sd_status(struct mmc_card *card, void *ssr); int mmc_app_cmd(struct mmc_host *host, struct mmc_card *card); +int mmc_send_ext_addr(struct mmc_host *host, u32 addr); #endif diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h index 865cc0ca8543..af5fc70e09a2 100644 --- a/include/linux/mmc/sd.h +++ b/include/linux/mmc/sd.h @@ -15,6 +15,9 @@ #define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ #define SD_SWITCH_VOLTAGE 11 /* ac R1 */ +/* Class 2 */ +#define SD_ADDR_EXT 22 /* ac [5:0] R1 */ + /* class 10 */ #define SD_SWITCH 6 /* adtc [31:0] See below R1 */ From patchwork Sun Oct 6 05:11:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13823668 Received: from esa5.hgst.iphmx.com (esa5.hgst.iphmx.com [216.71.153.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 248BF15445E for ; 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d="scan'208";a="29406956" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 06 Oct 2024 13:14:03 +0800 IronPort-SDR: 67020f9e_Pgcrw8NmZGStJVEe9JpBSx1kNYyAF7cvyJasej/7pjbpw7K xBqMiWeXu64hqH87sNudNy+kbXIILPqU1G9BGhg== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 21:18:38 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 22:14:01 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v8 03/10] mmc: core: Don't use close-ended rw for SDUC Date: Sun, 6 Oct 2024 08:11:41 +0300 Message-Id: <20241006051148.160278-4-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241006051148.160278-1-avri.altman@wdc.com> References: <20241006051148.160278-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The SDUC spec expects CMD22 to get squeezed between CMD23 and the read/write command, e.g. CMD23->CMD22->CMD18 and CMD23->CMD22->CMD25. At this early stage of adoption, we want to avoid an amid stream of fixes & quirks of bogus hw, that tends to apply extra logic specifically around auto-cmd12 & auto-cmd23. Let's leave close-ended out for now, and re-consider this should those cards become ubiquitous, if any. It also means that BLK_FEAT_FUA will not be used for I/O, but instead we will rely on BLK_FEAT_WRITE_CACHE. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index ef06a4d5d65b..f4817ea3017b 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -2547,7 +2547,7 @@ static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card, if (mmc_host_cmd23(card->host)) { if ((mmc_card_mmc(card) && card->csd.mmca_vsn >= CSD_SPEC_VER_3) || - (mmc_card_sd(card) && + (mmc_card_sd(card) && !mmc_card_ult_capacity(card) && card->scr.cmds & SD_SCR_CMD23_SUPPORT)) md->flags |= MMC_BLK_CMD23; } From patchwork Sun Oct 6 05:11:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13823669 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B464EC5 for ; Sun, 6 Oct 2024 05:14:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728191658; cv=none; b=PpeUxZ8YQ9luZvl2Q7CVo2BGQB2OMe9EHerIMqAma4C2qtY8BDy+TPhh0LEBf1mBlrWVa+9hoQvlz0tYcaann9kjNDKYR+uOXW209bwC+Sem8iW/VY5JOL2byH6OcpcXlccpJdvig+J6zE+9IpdjySKhG8MVewWtLE5FrV1s/jI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728191658; c=relaxed/simple; bh=oyL9jNJbWslPhLQcqAYJmtGJml7z8vl0lUFT8e9OcwY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=k0xQ2hmUv73ZJD0KW9pXf6xWPExtpt+bkAeHy00cBVjQksb8hzgYb99FFv75dEBsE8VJSWR8Va3Z7UTPE0cLJ/pY64utD70UyMuTxhZkL6+eBVgP5NbQ50i2FzqCD1aCbA8NFysFM6598AS8TlxsAlEypUa2smZspYbOg4Out6M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=PiHnHs9c; arc=none smtp.client-ip=216.71.154.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="PiHnHs9c" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1728191656; x=1759727656; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oyL9jNJbWslPhLQcqAYJmtGJml7z8vl0lUFT8e9OcwY=; b=PiHnHs9cgvUCPRi1tgvbfpdqfMokBqcDcCv31sHQ+xQk+mgIN+wwf/FE 4yUZzF01COdBtWxJNLTlHgNM/cjMLcza4irSd/qA/6KfXyHCLB9gTa13a J/tXiioHjRkECvHSg81be7JJn84mdp44FpsErvBWsjZjMhZUR1vaX4nYK ecbt2hNWgADTPC890yM0NOOshlrP24I83nQ2d6Lrryiim4Kp6ap+EIJ8z lgkZ83qWgXdhSpidUiw3bxnLDBILA9BvpP9dkF7uXOCdsjZYaZHpg+1AR QtXhEwXlsQZqROn8Z+pBzh16fiJ1L1bKPzTdcJjFC0DGLN37iicdvUDXg Q==; X-CSE-ConnectionGUID: EpmAw7E9RvKWIBxBqMz9xw== X-CSE-MsgGUID: MNmOt7ZPTUCvBHtGiiXETg== X-IronPort-AV: E=Sophos;i="6.11,181,1725292800"; d="scan'208";a="27708012" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 06 Oct 2024 13:14:10 +0800 IronPort-SDR: 67020fa4_qK1hplAHYUR85hPBzqup/W4kD6OQXryzpo1mfd5NfbzVAll RleSh4q8RYCLr7w0Vk45zShkKo1GaT7dRVprl2w== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 21:18:45 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 22:14:08 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v8 04/10] mmc: core: Add open-ended Ext memory addressing Date: Sun, 6 Oct 2024 08:11:42 +0300 Message-Id: <20241006051148.160278-5-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241006051148.160278-1-avri.altman@wdc.com> References: <20241006051148.160278-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 For open-ended read/write - just send CMD22 before issuing the command. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 5 +++++ drivers/mmc/core/core.c | 3 +++ include/linux/mmc/core.h | 4 ++++ 3 files changed, 12 insertions(+) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index f4817ea3017b..c9325febc31a 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -1759,6 +1759,11 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, brq->sbc.flags = MMC_RSP_R1 | MMC_CMD_AC; brq->mrq.sbc = &brq->sbc; } + + if (mmc_card_ult_capacity(card)) { + brq->cmd.ext_addr = blk_rq_pos(req) >> 32; + brq->cmd.has_ext_addr = true; + } } #define MMC_MAX_RETRIES 5 diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index d6c819dd68ed..a0b2999684b3 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -336,6 +336,9 @@ int mmc_start_request(struct mmc_host *host, struct mmc_request *mrq) { int err; + if (mrq->cmd && mrq->cmd->has_ext_addr) + mmc_send_ext_addr(host, mrq->cmd->ext_addr); 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d="scan'208";a="27708018" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 06 Oct 2024 13:14:15 +0800 IronPort-SDR: 67020fa9_TmmVrMBmWKsHmH0uTT4n87TZ0O8lTvodrxnBJ/Boa8NeMuA 7sPoOTCWF89WmWxyPdseccfi6EPdfvxeChbLLhg== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 21:18:50 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 22:14:13 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v8 05/10] mmc: core: Allow mmc erase to carry large addresses Date: Sun, 6 Oct 2024 08:11:43 +0300 Message-Id: <20241006051148.160278-6-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241006051148.160278-1-avri.altman@wdc.com> References: <20241006051148.160278-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Preparing for SDUC, Allow the erase address to be larger beyond a 32 bit address. Tested-by: Ricky WU Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 6 ++++-- drivers/mmc/core/core.c | 33 ++++++++++++++++++--------------- drivers/mmc/core/core.h | 16 ++++++++++++---- 3 files changed, 34 insertions(+), 21 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index c9325febc31a..26a67d2033f0 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -1199,7 +1199,8 @@ static void mmc_blk_issue_erase_rq(struct mmc_queue *mq, struct request *req, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr; + unsigned int nr; + sector_t from; int err = 0; blk_status_t status = BLK_STS_OK; @@ -1254,7 +1255,8 @@ static void mmc_blk_issue_secdiscard_rq(struct mmc_queue *mq, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr, arg; + unsigned int nr, arg; + sector_t from; int err = 0, type = MMC_BLK_SECDISCARD; blk_status_t status = BLK_STS_OK; diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index a0b2999684b3..06f63fbaadfb 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1601,8 +1601,8 @@ static unsigned int mmc_erase_timeout(struct mmc_card *card, return mmc_mmc_erase_timeout(card, arg, qty); } -static int mmc_do_erase(struct mmc_card *card, unsigned int from, - unsigned int to, unsigned int arg) +static int mmc_do_erase(struct mmc_card *card, sector_t from, + sector_t to, unsigned int arg) { struct mmc_command cmd = {}; unsigned int qty = 0, busy_timeout = 0; @@ -1633,8 +1633,8 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, else if (mmc_card_sd(card)) qty += to - from + 1; else - qty += ((to / card->erase_size) - - (from / card->erase_size)) + 1; + qty += (mmc_sector_div(to, card->erase_size) - + mmc_sector_div(from, card->erase_size)) + 1; if (!mmc_card_blockaddr(card)) { from <<= 9; @@ -1703,18 +1703,19 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, } static unsigned int mmc_align_erase_size(struct mmc_card *card, - unsigned int *from, - unsigned int *to, + sector_t *from, + sector_t *to, unsigned int nr) { - unsigned int from_new = *from, nr_new = nr, rem; + sector_t from_new = *from; + unsigned int nr_new = nr, rem; /* * When the 'card->erase_size' is power of 2, we can use round_up/down() * to align the erase size efficiently. */ if (is_power_of_2(card->erase_size)) { - unsigned int temp = from_new; + sector_t temp = from_new; from_new = round_up(temp, card->erase_size); rem = from_new - temp; @@ -1726,7 +1727,7 @@ static unsigned int mmc_align_erase_size(struct mmc_card *card, nr_new = round_down(nr_new, card->erase_size); } else { - rem = from_new % card->erase_size; + rem = mmc_sector_mod(from_new, card->erase_size); if (rem) { rem = card->erase_size - rem; from_new += rem; @@ -1759,10 +1760,12 @@ static unsigned int mmc_align_erase_size(struct mmc_card *card, * * Caller must claim host before calling this function. */ -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, +int mmc_erase(struct mmc_card *card, sector_t from, unsigned int nr, unsigned int arg) { - unsigned int rem, to = from + nr; + unsigned int rem; + sector_t to = from + nr; + int err; if (!(card->csd.cmdclass & CCC_ERASE)) @@ -1783,7 +1786,7 @@ int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, return -EOPNOTSUPP; if (arg == MMC_SECURE_ERASE_ARG) { - if (from % card->erase_size || nr % card->erase_size) + if (mmc_sector_mod(from, card->erase_size) || nr % card->erase_size) return -EINVAL; } @@ -1807,7 +1810,7 @@ int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, * and call mmc_do_erase() twice if necessary. This special case is * identified by the card->eg_boundary flag. */ - rem = card->erase_size - (from % card->erase_size); + rem = card->erase_size - mmc_sector_mod(from, card->erase_size); if ((arg & MMC_TRIM_OR_DISCARD_ARGS) && card->eg_boundary && nr > rem) { err = mmc_do_erase(card, from, from + rem - 1, arg); from += rem; @@ -1866,12 +1869,12 @@ int mmc_can_secure_erase_trim(struct mmc_card *card) } EXPORT_SYMBOL(mmc_can_secure_erase_trim); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, +int mmc_erase_group_aligned(struct mmc_card *card, sector_t from, unsigned int nr) { if (!card->erase_size) return 0; - if (from % card->erase_size || nr % card->erase_size) + if (mmc_sector_mod(from, card->erase_size) || nr % card->erase_size) return 0; return 1; } diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h index 37091a6589ed..fc9d5e9620b1 100644 --- a/drivers/mmc/core/core.h +++ b/drivers/mmc/core/core.h @@ -116,15 +116,13 @@ bool mmc_is_req_done(struct mmc_host *host, struct mmc_request *mrq); int mmc_start_request(struct mmc_host *host, struct mmc_request *mrq); -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, - unsigned int arg); +int mmc_erase(struct mmc_card *card, sector_t from, unsigned int nr, unsigned int arg); int mmc_can_erase(struct mmc_card *card); int mmc_can_trim(struct mmc_card *card); int mmc_can_discard(struct mmc_card *card); int mmc_can_sanitize(struct mmc_card *card); int mmc_can_secure_erase_trim(struct mmc_card *card); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, - unsigned int nr); +int mmc_erase_group_aligned(struct mmc_card *card, sector_t from, unsigned int nr); unsigned int mmc_calc_max_discard(struct mmc_card *card); int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen); @@ -199,4 +197,14 @@ static inline int mmc_flush_cache(struct mmc_host *host) return 0; } +static inline unsigned int mmc_sector_div(sector_t dividend, u32 divisor) +{ + return div_u64(dividend, divisor); +} + +static inline unsigned int mmc_sector_mod(sector_t dividend, u32 divisor) +{ + return sector_div(dividend, divisor); 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05 Oct 2024 22:14:17 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v8 06/10] mmc: core: Add Ext memory addressing for erase Date: Sun, 6 Oct 2024 08:11:44 +0300 Message-Id: <20241006051148.160278-7-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241006051148.160278-1-avri.altman@wdc.com> References: <20241006051148.160278-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 CMD22 shall precede CMD32 and CMD33 to configure 38-bit erase start address and 38 bit erase stop address. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/core.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index 06f63fbaadfb..01a7142eada3 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1647,6 +1647,12 @@ static int mmc_do_erase(struct mmc_card *card, sector_t from, cmd.opcode = MMC_ERASE_GROUP_START; cmd.arg = from; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; + + if (mmc_card_ult_capacity(card)) { + cmd.ext_addr = from >> 32; + cmd.has_ext_addr = true; + } + err = mmc_wait_for_cmd(card->host, &cmd, 0); if (err) { pr_err("mmc_erase: group start error %d, " @@ -1662,6 +1668,12 @@ static int mmc_do_erase(struct mmc_card *card, sector_t from, cmd.opcode = MMC_ERASE_GROUP_END; cmd.arg = to; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; + + if (mmc_card_ult_capacity(card)) { + cmd.ext_addr = to >> 32; + cmd.has_ext_addr = true; + } + err = mmc_wait_for_cmd(card->host, &cmd, 0); if (err) { pr_err("mmc_erase: group end error %d, status %#x\n", From patchwork Sun Oct 6 05:11:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13823672 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 868E5EC5 for ; Sun, 6 Oct 2024 05:14:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728191669; cv=none; b=A6X3wlkProCorpXDVYr8+iqyVADykrojx7BnqzA5uny/1Wwk1fRc7HCyLh+93db0HF9GmmUjNHnbPFnP9yBbf45b285OF3G0CD12ab7za2jOo4iibxhs/RVgiLkdBE8NASPLNFD10rWZ3nXE7GbSCxRHqtzrFQbOlwdDWVl1ZwM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728191669; c=relaxed/simple; bh=doegz9SBlRtnv3e5ZHqxDZff1ZS5/Z6OOTfMNlOGprw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=uuviexLBpT2NaAUE6FoYmwLf057H5hT0kvtEGtpAk2Hhlay2gOe3LLl6JeFn2Rw7JN3YuMasf0+zSxor6sQWjxmr/y5KqhMO9sR4JmcEYZBuMUaEdopYEIRXMpt5J+RLWRGVvrCGvycUALFPwbb61OD9CARdW7fdy38CyZVdQgo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=jcrbj+I1; arc=none smtp.client-ip=216.71.154.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="jcrbj+I1" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1728191664; x=1759727664; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=doegz9SBlRtnv3e5ZHqxDZff1ZS5/Z6OOTfMNlOGprw=; b=jcrbj+I1Bh+chNBCeoi1kkpDdkajkIRib68T5NM4FWjpxKqpG82zGGQ/ FDxNnblR+GejdkZTnyhD+lOMb4SdOapQe34q/WhZMnnd3tn4L/1uOilJx 63AFwsaWiMYzIiJG7W6edeG/LTVxAiANGzwAI344p0S38w6muv5ZF9B/P D7da2ByQBOW7tg+RO4gXzXdqNbVmvCl2gsp8mft9lW5kHCjVvraUPLw0T CiKlojvi2Y/xXzYVJVc0lmAhCLUjArMm8y5RIuGcGOR9RoO8GqO09XgMF 1Rybr12fp/CrveGLognPtKtlAUXTzlxjDONgSW/xRajRj4Enk5hFuqu4o g==; X-CSE-ConnectionGUID: qmaTq/h7TH2xn8zFiaXAHA== X-CSE-MsgGUID: c3zewypNR9qkZGqHeCwJVQ== X-IronPort-AV: E=Sophos;i="6.11,181,1725292800"; d="scan'208";a="27708027" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 06 Oct 2024 13:14:24 +0800 IronPort-SDR: 67020fb2_lmNOCPc5ZJniGZYyjWFLjv7l78KA+TqUSF0Tb8KfJajkyQP cJqLx8h/ZpLKDlDEk8yY8ZxywvUghdPlzlhCu/w== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 21:18:58 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 22:14:21 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v8 07/10] mmc: core: Adjust ACMD22 to SDUC Date: Sun, 6 Oct 2024 08:11:45 +0300 Message-Id: <20241006051148.160278-8-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241006051148.160278-1-avri.altman@wdc.com> References: <20241006051148.160278-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 ACMD22 is used to verify the previously write operation. Normally, it returns the number of written sectors as u32. SDUC, however, returns it as u64. This is not a superfluous requirement, because SDUC writes may exceeds 2TB. For Linux mmc however, the previously write operation could not be more than the block layer limits, thus we make room for a u64 and cast the returning value to u32. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 26a67d2033f0..b4d58fde3ee5 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -50,6 +50,7 @@ #include #include +#include #include "queue.h" #include "block.h" @@ -993,11 +994,10 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) int err; u32 result; __be32 *blocks; - + u8 resp_sz = mmc_card_ult_capacity(card) ? 8 : 4; struct mmc_request mrq = {}; struct mmc_command cmd = {}; struct mmc_data data = {}; - struct scatterlist sg; err = mmc_app_cmd(card->host, card); @@ -1008,7 +1008,7 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) cmd.arg = 0; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC; - data.blksz = 4; + data.blksz = resp_sz; data.blocks = 1; data.flags = MMC_DATA_READ; data.sg = &sg; @@ -1018,15 +1018,27 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) mrq.cmd = &cmd; mrq.data = &data; - blocks = kmalloc(4, GFP_KERNEL); + blocks = kmalloc(resp_sz, GFP_KERNEL); if (!blocks) return -ENOMEM; - sg_init_one(&sg, blocks, 4); + sg_init_one(&sg, blocks, resp_sz); mmc_wait_for_req(card->host, &mrq); - result = ntohl(*blocks); + if (mmc_card_ult_capacity(card)) { + /* + * Normally, ACMD22 returns the number of written sectors as + * u32. SDUC, however, returns it as u64. This is not a + * superfluous requirement, because SDUC writes may exceed 2TB. + * For Linux mmc however, the previously write operation could + * not be more than the block layer limits, thus just make room + * for a u64 and cast the response back to u32. + */ + result = clamp_val(get_unaligned_be64(blocks), 0, UINT_MAX); + } else { + result = ntohl(*blocks); + } kfree(blocks); if (cmd.error || data.error) From patchwork Sun Oct 6 05:11:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13823673 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23FF4EC5 for ; Sun, 6 Oct 2024 05:14:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728191676; cv=none; b=VTGEGBXrBr3OxCfEzwwElJwPOZ022b97jYseUvz00OJiE6mWw/E50RGqRbYPvgll6lhb9Bff+3D/fO3aEDiaeFENN5Dfbhcwd9MvEVHKYOd84B3N7KEruqhI8BsvSTEao7n6nOCskIfca1wp/WpYx2woTFCj/xAXmaWP68AmWTc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728191676; c=relaxed/simple; bh=DsY7FEGA26mIOq/BNXWWOggrIsTPTayjqBPzwh9Dq5w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dOGjS1u8+IHnuZhcr4LQADzHJOyyroAgtvagWpXDs+eRHh0D7F1fS6J9BzGhzxPEtDa8jLCUWNJKEgRlML36rjf981vRBjD5rp5B3ei4uBDmnDQXRpHWoZoBARiHFS55d6cHZpXu3VB7Fa+ISHyC8DqKEkQMRLHREkEAGdwzcrE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=DoLBWGYN; arc=none smtp.client-ip=216.71.154.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="DoLBWGYN" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1728191671; x=1759727671; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DsY7FEGA26mIOq/BNXWWOggrIsTPTayjqBPzwh9Dq5w=; b=DoLBWGYNBPhFU6G2x9eSlfHiZUhkc7qEBrXPJqr7CCCSrePFKRtafjXN 9vRJi7N9rmtNHdYg5MxBypgoT5kgFkm3YkO9hQrYWG1oGEr7SX9Ozu0Ly WATuCTKYpKuB7QX64VuSwY5y/5G/OacRhTQQPKBigdzzPyfezM0NsBCtg v0zdMrQ4qZoGpLmY6qtnAyJL7jsSUJHqH+9luxJTkv0KN7BNDydcKT8+s S9mek42t9UdAzWfcrRNhpLVEWJCqPeE9mkyNcFRPAtWSIYB6fTiw7J4Gg dpueWJw0vC5aHnKv59knrXHtAliV9efDfTdzYnGZ4oBcIuezrGl7Ajzuk Q==; X-CSE-ConnectionGUID: WXyJK6ZKTgiB5ZfIM4KE1A== X-CSE-MsgGUID: oM9tWpb7SjqKpuc1gc13QA== X-IronPort-AV: E=Sophos;i="6.11,181,1725292800"; d="scan'208";a="27708031" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 06 Oct 2024 13:14:28 +0800 IronPort-SDR: 67020fb6_RmJYZrEz2Q52EAOc2kWcz1tpZSj/wahVwm8PN8MY1vZhB3R Pc4aqY7MDKtO52fciJ0CzVwQThCibBn1Fj4h3eg== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 21:19:03 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 22:14:26 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v8 08/10] mmc: core: Disable SDUC for mmc_test Date: Sun, 6 Oct 2024 08:11:46 +0300 Message-Id: <20241006051148.160278-9-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241006051148.160278-1-avri.altman@wdc.com> References: <20241006051148.160278-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Planning to ameliorate it in the very near future. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/mmc_test.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/core/mmc_test.c b/drivers/mmc/core/mmc_test.c index b7f627a9fdea..4f4286b8e0f2 100644 --- a/drivers/mmc/core/mmc_test.c +++ b/drivers/mmc/core/mmc_test.c @@ -3241,6 +3241,12 @@ static int mmc_test_probe(struct mmc_card *card) if (!mmc_card_mmc(card) && !mmc_card_sd(card)) return -ENODEV; + if (mmc_card_ult_capacity(card)) { + pr_info("%s: mmc-test currently UNSUPPORTED for SDUC\n", + mmc_hostname(card->host)); + return -EOPNOTSUPP; + } + ret = mmc_test_register_dbgfs_file(card); if (ret) return ret; From patchwork Sun Oct 6 05:11:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13823674 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE78E15575D for ; Sun, 6 Oct 2024 05:14:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728191678; cv=none; b=sMNX9l2AlrJIJsj6MYKuufOG1iNm+5ZcMc6CgooIt2CoX51Tcil3xIPHzFv05rbllozBE5rgls5TI3lysR1dQhZbnN01RdDJ3PxPRLZ/X9Qu4dBmv/VD+NfmBk9zdtXZklnuQdcDkCTybIQUOwVGgFfGeeBlbyizL0HMKpWXURA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728191678; c=relaxed/simple; bh=V6UW7NuNuB+n/REgtfcoMX1aAYAe1YBMTsfM7Xtsclw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=T506NBfrOBtJOhYZlANurJnwk4j8NpUvDMFSMWG4gWnx0wOZ4AZ8PdqQoDSjY+myUU9/oXiHMHY+f1x5gbVZFCiRXRsrHddKQ6MfDV7MFy2TyR2dvZvjZBchC6lvIuG1Cj5uDr1XBGZXqySWmIQFWWZ2NvbCN8GE0079hILXVfE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=kjZlxa21; arc=none smtp.client-ip=216.71.154.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="kjZlxa21" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1728191673; x=1759727673; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=V6UW7NuNuB+n/REgtfcoMX1aAYAe1YBMTsfM7Xtsclw=; b=kjZlxa21dJBXBwpPQGmVYxnUUGhrNGsioHnSuicsK3MP/arLAVaXpKx2 LWCWQbk/wy8zWTXCSPeBh2Vp5VT7+tGl7QTUOn8qZgIh8t2Q7hPmdfzdV W72vBPZqac0A5yB8kwqHnLL2l/RcoSNNffIQN+1htsORAhhj5zVfcVjGv ZEnf8V3g/sTrjG5ICWqSI0kWGpgXMQ3bAu0AAshbt28R80ntRfJGOQLWK rpcIavicyTvE3QsM0fGKwbW1lqBI2374UYl6/K7fZGmdvW7ekLxi5o2TG UCU8Rt3pDbIjZmXVCS8NbVMVA7381nLx0B3CafUB8biBzoCRA9CodD17o g==; X-CSE-ConnectionGUID: 55zEAZ0ISjygo6JRbpxRPw== X-CSE-MsgGUID: cGHPLIQkQjSnsY48zALnWg== X-IronPort-AV: E=Sophos;i="6.11,181,1725292800"; d="scan'208";a="27708033" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 06 Oct 2024 13:14:33 +0800 IronPort-SDR: 67020fbb_L5iBy0HoToVsdDzbYw86y8tmVj4yvI0nLrbiz7wcrGrdLMf 44VoBhRK9tUCTReVkeeSPfI/S67yPFGV5uv94zA== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 21:19:07 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 22:14:30 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v8 09/10] mmc: core: Prevent HSQ from enabling for SDUC Date: Sun, 6 Oct 2024 08:11:47 +0300 Message-Id: <20241006051148.160278-10-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241006051148.160278-1-avri.altman@wdc.com> References: <20241006051148.160278-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 hsq allows to get more in-flight requests from mmc core, which can be prepared in advance and be issued asynchronously to the completion of the preceding request (in atomic context). This is presumably broken though by the mandatory CMD22 for SDUC. We plan to make it work, but only as an improvement on top of the initial support for SDUC. Signed-off-by: Avri Altman --- drivers/mmc/core/sd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 63915541c0e4..33e806adcbf7 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -1558,7 +1558,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, goto free_card; } - if (host->cqe_ops && !host->cqe_enabled) { + if (!mmc_card_ult_capacity(card) && host->cqe_ops && !host->cqe_enabled) { err = host->cqe_ops->cqe_enable(host, card); if (!err) { host->cqe_enabled = true; From patchwork Sun Oct 6 05:11:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 13823675 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8156EC5 for ; Sun, 6 Oct 2024 05:14:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728191683; cv=none; b=K8PmKwBrSnuw+pBk53WIIFCDNoqWTtSksWI0Zabcrq50VD8KY+wB4s8PROnTB4WuBLoHhkS6/0JxOs8W0sW2Zqbu3+txUMQpXebmxwRGK/xD8CtpeBWiycSE3px+qG4eMtZE96nTyVHTdhVi+Bhr0+uoj8ZSD9zvUusazPQvUck= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728191683; c=relaxed/simple; bh=2LlAg9pxbyU/0I16uf9LcDSSv9+hDFHlpvmryLXiKFM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=LMpJZGNcSsBUtJg/3rtlX2b51vYJL9Ll17X6LICOOuDBGhPRG+TSIfpPgbzCcRJgzV3c3ofo9waabD5RFQGNHWNADv3odKHd5vqmNQn/QOG/+3DQbvUrQXqDRSaY+6x3mssLGsPGuHmrs9L9SdKMfPCxEu3Ko0Meet+fYDVngHY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=QJOVxbFJ; arc=none smtp.client-ip=216.71.154.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="QJOVxbFJ" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1728191677; x=1759727677; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2LlAg9pxbyU/0I16uf9LcDSSv9+hDFHlpvmryLXiKFM=; b=QJOVxbFJNbXC1AeWdBeAoJg0mDW8WLpldHB8ksp3ksXVBQlzVD2cz+rW YjihT4IfAyUlX1MrO/LacLduxzVE61GNlvvoipd0ONqj2vgIuCzx2O7hx cmW0sj90dR9WGJvUl4wM34kbr439GKct1aWVj4tGmFORHxR7/5bgBvYu2 c/sdE8KZUVv6Us/OPmsJIRRVXvUEmjrGTeghQ753lm//YExjjZ/sWxWJJ HCcHQNbmFughbBA4DQ5z6MTmsAWkO13ATW80xKs6nE/zOFK2qnUisIQNK +jyvPrn2RZfA7Z39Ic5QKtYFjyZJ1B+t+yKoFpaCrsIrkQcDEZFpbfEya A==; X-CSE-ConnectionGUID: 0rntislNQEKaEO/HznK+Vw== X-CSE-MsgGUID: 5NpWzJeoSoeLLNfP0gFZMg== X-IronPort-AV: E=Sophos;i="6.11,181,1725292800"; d="scan'208";a="27708037" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 06 Oct 2024 13:14:37 +0800 IronPort-SDR: 67020fbf_LNF4+1ZFlwwgk0Qa8BV9ZGZcjE9G/P0yfxe/MK8uVFMdS5B REbV0F8+Dwi90MO2mQx9P3Zk5MTVoOzWeX/9+mg== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 21:19:12 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Oct 2024 22:14:35 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v8 10/10] mmc: core: Enable SDUC Date: Sun, 6 Oct 2024 08:11:48 +0300 Message-Id: <20241006051148.160278-11-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241006051148.160278-1-avri.altman@wdc.com> References: <20241006051148.160278-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable SDUC if the card responded to ACMD41 with HCS & HO2T bits set. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/sd.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 33e806adcbf7..918b86bf8bbb 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -836,8 +836,11 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) * block-addressed SDHC cards. */ err = mmc_send_if_cond(host, ocr); - if (!err) + if (!err) { ocr |= SD_OCR_CCS; + /* Set HO2T as well - SDUC card won't respond otherwise */ + ocr |= SD_OCR_2T; + } /* * If the host supports one of UHS-I modes, request the card @@ -1448,7 +1451,10 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, } if (!oldcard) { - err = mmc_sd_get_csd(card, false); + u32 sduc_arg = SD_OCR_CCS | SD_OCR_2T; + bool is_sduc = (rocr & sduc_arg) == sduc_arg; + + err = mmc_sd_get_csd(card, is_sduc); if (err) goto free_card;