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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id r63sm15340468wmr.32.2019.03.08.18.06.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 08 Mar 2019 18:06:44 -0800 (PST) From: marek.vasut@gmail.com To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm64: dts: renesas: r8a77995: draak: Enable CAN0, CAN1 Date: Sat, 9 Mar 2019 03:06:42 +0100 Message-Id: <20190309020642.15985-1-marek.vasut@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190308_180648_727737_D84343D9 X-CRM114-Status: GOOD ( 10.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-renesas-soc@vger.kernel.org, Simon Horman , Wolfram Sang , Geert Uytterhoeven , Marek Vasut Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Marek Vasut Enable both CAN0 and CAN1 controllers on R8A77995 Draak board, since they are available on connectors CN43, CN44 respectively. Signed-off-by: Marek Vasut Cc: Geert Uytterhoeven Cc: Simon Horman Cc: Wolfram Sang Cc: linux-renesas-soc@vger.kernel.org To: linux-arm-kernel@lists.infradead.org Reviewed-by: Geert Uytterhoeven --- .../arm64/boot/dts/renesas/r8a77995-draak.dts | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index db2bed1751b8..9a000a75fe8e 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts @@ -179,6 +179,18 @@ }; }; +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + &du { pinctrl-0 = <&du_pins>; pinctrl-names = "default"; @@ -375,6 +387,16 @@ }; }; + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data_a"; + function = "can1"; + }; + du_pins: du { groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; function = "du";