From patchwork Mon Oct 7 07:18:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunyeal Hong X-Patchwork-Id: 13824248 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 554BB17C98C for ; Mon, 7 Oct 2024 07:18:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728285519; cv=none; b=TuJ3xWO4uTjgIHiq8/rVtgcbswDE8fMTNXRz1R1+3PnvvyuA4W8GycqjTUSn6pcbhj3IcEv5Yni8Xtztxd2rP2vJFPzFuJZ034gLlMe7+ksOYCNahPXKA3MRRTw1vFeY2FW4EKoHVHeQs1fHCsowCJC0mxYdn2RODUM+ZY3daW8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728285519; c=relaxed/simple; bh=fqwA2g4aKsjz94sRbNK5N6jNtL1FKGiAqAteAvxOxMM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:MIME-Version: Content-Type:References; b=qsyr25UxYZZs715OePlN0zDjdb78alIKBRtX4vN0DTsXZXyb+BAthfmSmZMYhoGwl4PJWphEzV8S1vh/ExztVgCznQREStZPT+G9tDfAQxAlwjSkdv+Uz0V2GIoraDlBoL8whStCMi9DGHzTwKrRWLRXsmhHv1Ke/rk/QdMBaXE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=KRhOMOwn; arc=none smtp.client-ip=203.254.224.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="KRhOMOwn" Received: from epcas2p2.samsung.com (unknown [182.195.41.54]) by mailout3.samsung.com (KnoxPortal) with ESMTP id 20241007071835epoutp031c670a1bd7059f85712ef7b8a7cfb03b~8GoULFF-T2468824688epoutp033 for ; Mon, 7 Oct 2024 07:18:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout3.samsung.com 20241007071835epoutp031c670a1bd7059f85712ef7b8a7cfb03b~8GoULFF-T2468824688epoutp033 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1728285515; bh=/OuEIFi/AcVYrT4CS0PcouNWLMfpYYvGMuwAw+hOJJA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KRhOMOwnw68Fd+FcpBvMkv7MH4AaH09HoPzwcAdN5SMYxAnOjTLk3WrtPvnQnt9x+ YFW3MexEnZN0RqnthkAM83VksbcePGchHeK/j1UWn8w9ktpO5uDSNsFNMP7ZIB2Hgu PmE7z0lM0xCcR1tI5xoZ4DI6ci90cDc4smriX5jE= Received: from epsnrtp4.localdomain (unknown [182.195.42.165]) by epcas2p2.samsung.com (KnoxPortal) with ESMTP id 20241007071835epcas2p2dd6573cc4f9674f00b512ed71cc40038~8GoTlPqW51244212442epcas2p2d; Mon, 7 Oct 2024 07:18:35 +0000 (GMT) Received: from epsmges2p1.samsung.com (unknown [182.195.36.97]) by epsnrtp4.localdomain (Postfix) with ESMTP id 4XMVqt4Xkdz4x9QH; Mon, 7 Oct 2024 07:18:34 +0000 (GMT) Received: from epcas2p2.samsung.com ( [182.195.41.54]) by epsmges2p1.samsung.com (Symantec Messaging Gateway) with SMTP id F0.14.09396.A4B83076; Mon, 7 Oct 2024 16:18:34 +0900 (KST) Received: from epsmtrp2.samsung.com (unknown [182.195.40.14]) by epcas2p1.samsung.com (KnoxPortal) with ESMTPA id 20241007071834epcas2p12827bf94b33bce2e5653e9520f29de31~8GoStkJN30296602966epcas2p1a; Mon, 7 Oct 2024 07:18:34 +0000 (GMT) Received: from epsmgms1p1new.samsung.com (unknown [182.195.42.41]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20241007071834epsmtrp2255070a4400cdfcdd36c3cbb9261f2b6~8GoSsscML3077330773epsmtrp2D; Mon, 7 Oct 2024 07:18:34 +0000 (GMT) X-AuditID: b6c32a45-6c5b7700000024b4-52-67038b4ad924 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 1C.69.08229.94B83076; Mon, 7 Oct 2024 16:18:33 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.60]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20241007071833epsmtip14ad4596a342c85ed924c774e28e979a2~8GoSa-jI-0981709817epsmtip1I; Mon, 7 Oct 2024 07:18:33 +0000 (GMT) From: Sunyeal Hong To: Krzysztof Kozlowski , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley Cc: linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sunyeal Hong Subject: [PATCH v2 1/3] dt-bindings: clock: exynosautov920: add peric1, misc and hsi0/1 clock definitions Date: Mon, 7 Oct 2024 16:18:27 +0900 Message-ID: <20241007071829.3042094-2-sunyeal.hong@samsung.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241007071829.3042094-1-sunyeal.hong@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrPJsWRmVeSWpSXmKPExsWy7bCmma5XN3O6QcceOYsH87axWazZe47J 4vqX56wW84+cY7U4f34Du8Wmx9dYLT723GO1uLxrDpvFjPP7mCwunnK1+L9nB7vF4TftrBb/ rm1ksWhatp7Jgc/j/Y1Wdo9NqzrZPDYvqffo27KK0ePzJrkA1qhsm4zUxJTUIoXUvOT8lMy8 dFsl7+B453hTMwNDXUNLC3MlhbzE3FRbJRefAF23zBygO5UUyhJzSoFCAYnFxUr6djZF+aUl qQoZ+cUltkqpBSk5BeYFesWJucWleel6eaklVoYGBkamQIUJ2RlXnl9gKTgpVDGr7SFbA+Nb /i5GTg4JAROJeSc3M3YxcnEICexglJhxdzo7hPOJUeJTax8bhPONUeLrSpAMRMu3t4tZIBJ7 GSV+nzzLCuF8ZJQ49rEZyOHgYBPQlfjzzwEkLiKwh0liy/klTCAOs8BZRom7cxaAjRIWyJbo 6VzFCGKzCKhK/Nk3CczmFbCX+P7wMgvEOnmJ64+PMoHYnAIOEndvfISqEZQ4OfMJWA0zUE3z 1tnMIAskBGZySGxp2MgI0ewi8bR9FhuELSzx6vgWqB+kJD6/2wsVz5eYfP0tE0RzA6PEtX/d zBAJe4lFZ36yg7zDLKApsX6XPogpIaAsceQW1F4+iY7Df9khwrwSHW1CEI1qEp+uXIYaIiNx 7MQzKNtDovnGL2j4TmaUWHbzBdMERoVZSN6ZheSdWQiLFzAyr2IUSy0ozk1PLTYqMITHcXJ+ 7iZGcMrVct3BOPntB71DjEwcjIcYJTiYlUR4I9YwpgvxpiRWVqUW5ccXleakFh9iNAUG9kRm KdHkfGDSzyuJNzSxNDAxMzM0NzI1MFcS573XOjdFSCA9sSQ1OzW1ILUIpo+Jg1OqgUnuxqTo q0qlt2trzKJD2hSXb0h6IxT7V2nhtLbTrBtu6ca2OS/mPMuqdevQ5WV2Myd6le3xF2czzm8L ju2o+5Sx4ZC+982CbpO6XysES+7GLfr4dMPciezHBcXm/2ves+fYyTX5EXLr9SRfrC5V0rs6 XUpY4dm0t59+G5c/PfPp7ySxx3ILe23Mf/9p1TFQ//729tS/LddCcpYHJ+il7d8mZPdOx3mb UoLdrd5zHZ9W/lpvoFHpEqBqEvV5q3ZrSObfm49vffP+r7eGc8K0oJ3S01Z/KtBlFZV2U4rs sRRJb9T1r55yrfleyLTKd9vOhrCa85j+5DVaJ7JkbfcSr3m7rh2vX3FhS4LdufXBFSeUWIoz Eg21mIuKEwFxsXI+QgQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrBLMWRmVeSWpSXmKPExsWy7bCSnK5nN3O6wZTd1hYP5m1js1iz9xyT xfUvz1kt5h85x2px/vwGdotNj6+xWnzsucdqcXnXHDaLGef3MVlcPOVq8X/PDnaLw2/aWS3+ XdvIYtG0bD2TA5/H+xut7B6bVnWyeWxeUu/Rt2UVo8fnTXIBrFFcNimpOZllqUX6dglcGVee X2ApOClUMavtIVsD41v+LkZODgkBE4lvbxezdDFycQgJ7GaUuDrjAStEQkZiY8N/dghbWOJ+ yxFWiKL3jBK7Dq0BSnBwsAnoSvz55wASFxE4xCQx8fNTsEnMApcZJY7dncwMUiQskClxZ2MJ yCAWAVWJP/smMYLYvAL2Et8fXmaBWCAvcf3xUSYQm1PAQeLujY9gNUJANS/OvoeqF5Q4OfMJ WD0zUH3z1tnMExgFZiFJzUKSWsDItIpRMrWgODc9t9iwwDAvtVyvODG3uDQvXS85P3cTIzgy tDR3MG5f9UHvECMTB+MhRgkOZiUR3og1jOlCvCmJlVWpRfnxRaU5qcWHGKU5WJTEecVf9KYI CaQnlqRmp6YWpBbBZJk4OKUamCawpOTPea8lc8Te+45Q5cXqdtdTUovmN2nv6tl2pmhFR9H3 g0ELHXoeNPJI2exNr+Lj/17p9XyL5feLwn7bDdpiFoj1c/zalmn7pT7wxqGXQjeucR05ETRx w6Rzy9IEQi+8EV8zZ7kJ13n7yQGi3z6t8iqQ+yQ+PfrU7f+dJ4o3evf5M5ZuEP/tNrMh6Szr riNdiy2snvY8TD0aX2G59H62oeRBj+ypQWvuHWep1Pq9IcA8UPb6PhZup0nV3OyvXtXvWTHR ztzH5cNMpqf7LTh3bWCMe8B1fWnoTF7PoAU2ZRN1H2eV+outeJJTtC7rm6W+BJ/6doWaghsP 2rXXXmjIDs081PaCVTS3UMGHR4mlOCPRUIu5qDgRAKIMzN37AgAA X-CMS-MailID: 20241007071834epcas2p12827bf94b33bce2e5653e9520f29de31 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20241007071834epcas2p12827bf94b33bce2e5653e9520f29de31 References: <20241007071829.3042094-1-sunyeal.hong@samsung.com> Add peric1, misc and hsi0/1 clock definitions. - CMU_PERIC1 for USI, IC2 and I3C - CMU_MISC for MISC, GIC and OTP - HSI0 for PCIE - HSI1 for USB and MMC Signed-off-by: Sunyeal Hong --- .../clock/samsung,exynosautov920.h | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/include/dt-bindings/clock/samsung,exynosautov920.h b/include/dt-bindings/clock/samsung,exynosautov920.h index c720f344b6bf..0c681f2ba3d0 100644 --- a/include/dt-bindings/clock/samsung,exynosautov920.h +++ b/include/dt-bindings/clock/samsung,exynosautov920.h @@ -160,6 +160,7 @@ #define DOUT_CLKCMU_SNW_NOC 144 #define DOUT_CLKCMU_SSP_NOC 145 #define DOUT_CLKCMU_TAA_NOC 146 +#define DOUT_TCXO_DIV2 147 /* CMU_PERIC0 */ #define CLK_MOUT_PERIC0_IP_USER 1 @@ -188,4 +189,50 @@ #define CLK_DOUT_PERIC0_USI_I2C 23 #define CLK_DOUT_PERIC0_I3C 24 +/* CMU_PERIC1 */ +#define CLK_MOUT_PERIC1_IP_USER 1 +#define CLK_MOUT_PERIC1_NOC_USER 2 +#define CLK_MOUT_PERIC1_USI09_USI 3 +#define CLK_MOUT_PERIC1_USI10_USI 4 +#define CLK_MOUT_PERIC1_USI11_USI 5 +#define CLK_MOUT_PERIC1_USI12_USI 6 +#define CLK_MOUT_PERIC1_USI13_USI 7 +#define CLK_MOUT_PERIC1_USI14_USI 8 +#define CLK_MOUT_PERIC1_USI15_USI 9 +#define CLK_MOUT_PERIC1_USI16_USI 10 +#define CLK_MOUT_PERIC1_USI17_USI 11 +#define CLK_MOUT_PERIC1_USI_I2C 12 +#define CLK_MOUT_PERIC1_I3C 13 + +#define CLK_DOUT_PERIC1_USI09_USI 14 +#define CLK_DOUT_PERIC1_USI10_USI 15 +#define CLK_DOUT_PERIC1_USI11_USI 16 +#define CLK_DOUT_PERIC1_USI12_USI 17 +#define CLK_DOUT_PERIC1_USI13_USI 18 +#define CLK_DOUT_PERIC1_USI14_USI 19 +#define CLK_DOUT_PERIC1_USI15_USI 20 +#define CLK_DOUT_PERIC1_USI16_USI 21 +#define CLK_DOUT_PERIC1_USI17_USI 22 +#define CLK_DOUT_PERIC1_USI_I2C 23 +#define CLK_DOUT_PERIC1_I3C 24 + +/* CMU_MISC */ +#define CLK_MOUT_MISC_NOC_USER 1 +#define CLK_MOUT_MISC_GIC 2 + +#define CLK_DOUT_MISC_OTP 3 +#define CLK_DOUT_MISC_NOCP 4 +#define CLK_DOUT_MISC_OSC_DIV2 5 + +/* CMU_HSI0 */ +#define CLK_MOUT_HSI0_NOC_USER 1 + +#define CLK_DOUT_HSI0_PCIE_APB 2 + +/* CMU_HSI1 */ +#define CLK_MOUT_HSI1_MMC_CARD_USER 1 +#define CLK_MOUT_HSI1_NOC_USER 2 +#define CLK_MOUT_HSI1_USBDRD_USER 3 +#define CLK_MOUT_HSI1_USBDRD 4 + #endif /* _DT_BINDINGS_CLOCK_EXYNOSAUTOV920_H */ From patchwork Mon Oct 7 07:18:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunyeal Hong X-Patchwork-Id: 13824250 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03C51185952 for ; Mon, 7 Oct 2024 07:18:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728285522; cv=none; b=GMekoxnY7MZucItFWZJx+W3YqoGi2QfvEdLH3OB1lmUzXrwNAOybUDfbAiLHE4+dqpaYqM1eHj0apVS6gMKIteDcQ2n4al+qVYe7C55IF9u2cXlWMSm7llYq4Wp6QQch5FI87aRqGhqNF6lQVoY28HP4tR04+Ky6w/qB+R6hmPA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728285522; c=relaxed/simple; bh=wFk/MmCtD1njyaZXRAVjwbJkUwNMs5iZ2HsYcLIfZUE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:MIME-Version: Content-Type:References; b=UDIEaK5lxgWyAKqtj7TU7XRBLDS/dQ3UBN2TTJo/YZjLC2UPQ38qyYG0UzJsLE1G9dTy/ibYy0OfmDdykL2gaV2xwXwMJ9SaBb6KN0+2Li738Varm279eeFgplQodU6b2BFa7tm1RBmQLo6SAO3d7E6BsbgE8vhpbfXgdpxxy8I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=LEO4afoE; arc=none smtp.client-ip=203.254.224.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="LEO4afoE" Received: from epcas2p2.samsung.com (unknown [182.195.41.54]) by mailout3.samsung.com (KnoxPortal) with ESMTP id 20241007071836epoutp03f1dcb83a440945fc4c95273fa94e4d9c~8GoUjyhlG2504925049epoutp03W for ; Mon, 7 Oct 2024 07:18:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout3.samsung.com 20241007071836epoutp03f1dcb83a440945fc4c95273fa94e4d9c~8GoUjyhlG2504925049epoutp03W DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1728285516; bh=rhAj9kuYBsA53wliGhzjxfdZgLNHovYuS3VZbgQNBTc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LEO4afoEXCW1/HE4ewsmGETDcmJ2eHfgrDgXWLLawHbN79gRjJ0SwLlZZTZQzaLRG bHV/BGhTSeDPk3c0RwQeX3aobNKcufNVDRyxkLdc1PaE3BszEYY808H3TNNJFxfRdU b6+wGTwvVFsY2CP9i48e0eMAfldUuCkZdKNWL2WY= Received: from epsnrtp4.localdomain (unknown [182.195.42.165]) by epcas2p1.samsung.com (KnoxPortal) with ESMTP id 20241007071835epcas2p15302ceb0481c536ecfe3d8b52fde5a28~8GoT-Qo750296602966epcas2p1h; Mon, 7 Oct 2024 07:18:35 +0000 (GMT) Received: from epsmges2p3.samsung.com (unknown [182.195.36.69]) by epsnrtp4.localdomain (Postfix) with ESMTP id 4XMVqt4Tksz4x9Q8; Mon, 7 Oct 2024 07:18:34 +0000 (GMT) Received: from epcas2p2.samsung.com ( [182.195.41.54]) by epsmges2p3.samsung.com (Symantec Messaging Gateway) with SMTP id 9A.89.09776.A4B83076; Mon, 7 Oct 2024 16:18:34 +0900 (KST) Received: from epsmtrp2.samsung.com (unknown [182.195.40.14]) by epcas2p4.samsung.com (KnoxPortal) with ESMTPA id 20241007071834epcas2p45175287442b1fc4497aae2f5d0c285de~8GoSv3HFV1419514195epcas2p4X; Mon, 7 Oct 2024 07:18:34 +0000 (GMT) Received: from epsmgmc1p1new.samsung.com (unknown [182.195.42.40]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20241007071834epsmtrp258f5a51187ae2bdf4074b791ff27d425~8GoSu8D4k3077230772epsmtrp2W; Mon, 7 Oct 2024 07:18:34 +0000 (GMT) X-AuditID: b6c32a47-aefff70000002630-eb-67038b4aaec9 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgmc1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 18.7B.07371.A4B83076; Mon, 7 Oct 2024 16:18:34 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.60]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20241007071833epsmtip13ee85b935888de2d42240d6ecc43e8db~8GoSgL5bz0688406884epsmtip1i; Mon, 7 Oct 2024 07:18:33 +0000 (GMT) From: Sunyeal Hong To: Krzysztof Kozlowski , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley Cc: linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sunyeal Hong Subject: [PATCH v2 2/3] clk: samsung: exynosautov920: add peric1, misc and hsi0/1 clock support Date: Mon, 7 Oct 2024 16:18:28 +0900 Message-ID: <20241007071829.3042094-3-sunyeal.hong@samsung.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241007071829.3042094-1-sunyeal.hong@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrHJsWRmVeSWpSXmKPExsWy7bCmma5XN3O6Qf9ZOYsH87axWazZe47J 4vqX56wW84+cY7U4f34Du8Wmx9dYLT723GO1uLxrDpvFjPP7mCwunnK1+L9nB7vF4TftrBb/ rm1ksWhatp7Jgc/j/Y1Wdo9NqzrZPDYvqffo27KK0ePzJrkA1qhsm4zUxJTUIoXUvOT8lMy8 dFsl7+B453hTMwNDXUNLC3MlhbzE3FRbJRefAF23zBygO5UUyhJzSoFCAYnFxUr6djZF+aUl qQoZ+cUltkqpBSk5BeYFesWJucWleel6eaklVoYGBkamQIUJ2Rknjn1hLViRV7H7zl/GBsaO hC5GTg4JAROJhn2PWLoYuTiEBHYwSjz9eIMNwvnEKLF27hF2COcbo8SCtktsMC0P7j6DqtrL KPG47R8rhPORUeLFtmlADgcHm4CuxJ9/DiBxEYE9TBJbzi9hAnGYBc4yStyds4AdpEhYIFHi x055kKksAqoShzc+ZgexeQXsJVZcn8wCsU1e4vrjo0wgNqeAg8TdGx8ZIWoEJU7OfAJWwwxU 07x1NjPIfAmBmRwSk57vZIVodpFY//EPE4QtLPHq+BZ2CFtK4vO7vVDv5EtMvv6WCaK5gVHi 2r9uZoiEvcSiMz/BDmUW0JRYv0sfxJQQUJY4cgtqL59Ex+G/7BBhXomONiGIRjWJT1cuQw2R kTh24hmU7SFx5c1EaMBNZpSY9XUvywRGhVlI3pmF5J1ZCIsXMDKvYhRLLSjOTU8tNiowhkdx cn7uJkZwwtVy38E44+0HvUOMTByMhxglOJiVRHgj1jCmC/GmJFZWpRblxxeV5qQWH2I0BQb2 RGYp0eR8YMrPK4k3NLE0MDEzMzQ3MjUwVxLnvdc6N0VIID2xJDU7NbUgtQimj4mDU6qBid86 ra1SYfuW4tUzRJP7M5dEVUQypKkfD+s59dXlz4yLx8UyGwxXRzdI/ilcucpJ/dxW+ccWVUum Pef+rvBm9cLFifMk/Vv/yP3+9lvgbd0/x9lakm59EY9XBNYfD7X5o2XSfXDBWUM+We01bGUb z8v7B16Xn7SsWtY98WfB6+3nF0wT2v5h43OtTS7ehTxfCyTuvOL+tEz6eOxBG37OOXFPWJmT hE/e1VzJH8Qmeirnv9qF9rJD0QabMzLjzW+bvzbvMnjN3Lr7Z+8E9qeLpa9O3up+/4Lf8TOX PG/fNngv9ypGxfOCx4HVYrxpdyapPrdK9dry8tnKcKldh04d3LpfZK+WXO6CNzt4zt6dxqfE UpyRaKjFXFScCABjECnjQQQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrJLMWRmVeSWpSXmKPExsWy7bCSnK5XN3O6wfVNLBYP5m1js1iz9xyT xfUvz1kt5h85x2px/vwGdotNj6+xWnzsucdqcXnXHDaLGef3MVlcPOVq8X/PDnaLw2/aWS3+ XdvIYtG0bD2TA5/H+xut7B6bVnWyeWxeUu/Rt2UVo8fnTXIBrFFcNimpOZllqUX6dglcGSeO fWEtWJFXsfvOX8YGxo6ELkZODgkBE4kHd5+xdTFycQgJ7GaUOP1mBzNEQkZiY8N/dghbWOJ+ yxFWiKL3jBILr28FSnBwsAnoSvz55wASFxE4xCQx8fNTFhCHWeAyo8Sxu5PBJgkLxEv8ujWf EcRmEVCVOLzxMdhUXgF7iRXXJ7NAbJCXuP74KBOIzSngIHH3xkeweiGgmhdn3zNC1AtKnJz5 BKyeGai+eets5gmMArOQpGYhSS1gZFrFKJlaUJybnptsWGCYl1quV5yYW1yal66XnJ+7iREc G1oaOxjvzf+nd4iRiYPxEKMEB7OSCG/EGsZ0Id6UxMqq1KL8+KLSnNTiQ4zSHCxK4ryGM2an CAmkJ5akZqemFqQWwWSZODilGph2COo5OX106fh08KqWRM+x3MuZnN0Mz3XtbN3TmptfaRjr pd1t9+hLPxHjcLrus/pvFzb96XFvun84RO/P/vjOY/2ZbV/aLe6s4Kw6J9TLu8OfXzvT3VTo ScqtfzdWfl346ffin1OnTBCY0PywPTQg6uRm40im63fPrGAsa/h8wdRF7eGiwzyKRm1vVW8t OctZwL2pLnpdRMpcNrO1B6xNYj86eAqsmTvnU+2po26MSxcmLzukwlPQGhEifpVDbvs92Tdz qh3DLb+ruYbLuJ53n/i0L9fejFmErevypZbzMZq/RW712no1s9y5FNgcIL/dST4tZm1l+R3N 2bfSZ822Ub2nUJUpdX/znWlFr5RYijMSDbWYi4oTAfXhNfH8AgAA X-CMS-MailID: 20241007071834epcas2p45175287442b1fc4497aae2f5d0c285de X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20241007071834epcas2p45175287442b1fc4497aae2f5d0c285de References: <20241007071829.3042094-1-sunyeal.hong@samsung.com> Register compatible and cmu_info data to support clocks. CMU_PERIC1, this provides clocks for USI09 ~ USI17, USI_I2C and USI_I3C. CMU_MISC, this provides clocks for MISC, GIC and OTP. CMU_HSI0, this provides clocks for PCIE. CMU_HSI1, this provides clocks for USB and MMC. Signed-off-by: Sunyeal Hong --- drivers/clk/samsung/clk-exynosautov920.c | 290 +++++++++++++++++++++++ 1 file changed, 290 insertions(+) diff --git a/drivers/clk/samsung/clk-exynosautov920.c b/drivers/clk/samsung/clk-exynosautov920.c index f60f0a0c598d..f96998b0a864 100644 --- a/drivers/clk/samsung/clk-exynosautov920.c +++ b/drivers/clk/samsung/clk-exynosautov920.c @@ -19,6 +19,10 @@ /* NOTE: Must be equal to the last clock ID increased by one */ #define CLKS_NR_TOP (DOUT_CLKCMU_TAA_NOC + 1) #define CLKS_NR_PERIC0 (CLK_DOUT_PERIC0_I3C + 1) +#define CLKS_NR_PERIC1 (CLK_DOUT_PERIC1_I3C + 1) +#define CLKS_NR_MISC (CLK_DOUT_MISC_OSC_DIV2 + 1) +#define CLKS_NR_HSI0 (CLK_DOUT_HSI0_PCIE_APB + 1) +#define CLKS_NR_HSI1 (CLK_MOUT_HSI1_USBDRD + 1) /* ---- CMU_TOP ------------------------------------------------------------ */ @@ -974,6 +978,8 @@ static const struct samsung_fixed_factor_clock top_fixed_factor_clks[] __initcon "mout_shared5_pll", 1, 3, 0), FFACTOR(DOUT_SHARED5_DIV4, "dout_shared5_div4", "mout_shared5_pll", 1, 4, 0), + FFACTOR(DOUT_TCXO_DIV2, "dout_tcxo_div2", + "oscclk", 1, 2, 0), }; static const struct samsung_cmu_info top_cmu_info __initconst = { @@ -1139,6 +1145,277 @@ static const struct samsung_cmu_info peric0_cmu_info __initconst = { .clk_name = "noc", }; +/* ---- CMU_PERIC1 --------------------------------------------------------- */ + +/* Register Offset definitions for CMU_PERIC1 (0x10C00000) */ +#define PLL_CON0_MUX_CLKCMU_PERIC1_IP_USER 0x600 +#define PLL_CON0_MUX_CLKCMU_PERIC1_NOC_USER 0x610 +#define CLK_CON_MUX_MUX_CLK_PERIC1_I3C 0x1000 +#define CLK_CON_MUX_MUX_CLK_PERIC1_USI09_USI 0x1004 +#define CLK_CON_MUX_MUX_CLK_PERIC1_USI10_USI 0x1008 +#define CLK_CON_MUX_MUX_CLK_PERIC1_USI11_USI 0x100c +#define CLK_CON_MUX_MUX_CLK_PERIC1_USI12_USI 0x1010 +#define CLK_CON_MUX_MUX_CLK_PERIC1_USI13_USI 0x1014 +#define CLK_CON_MUX_MUX_CLK_PERIC1_USI14_USI 0x1018 +#define CLK_CON_MUX_MUX_CLK_PERIC1_USI15_USI 0x101c +#define CLK_CON_MUX_MUX_CLK_PERIC1_USI16_USI 0x1020 +#define CLK_CON_MUX_MUX_CLK_PERIC1_USI17_USI 0x1024 +#define CLK_CON_MUX_MUX_CLK_PERIC1_USI_I2C 0x1028 +#define CLK_CON_DIV_DIV_CLK_PERIC1_I3C 0x1800 +#define CLK_CON_DIV_DIV_CLK_PERIC1_USI09_USI 0x1804 +#define CLK_CON_DIV_DIV_CLK_PERIC1_USI10_USI 0x1808 +#define CLK_CON_DIV_DIV_CLK_PERIC1_USI11_USI 0x180c +#define CLK_CON_DIV_DIV_CLK_PERIC1_USI12_USI 0x1810 +#define CLK_CON_DIV_DIV_CLK_PERIC1_USI13_USI 0x1814 +#define CLK_CON_DIV_DIV_CLK_PERIC1_USI14_USI 0x1818 +#define CLK_CON_DIV_DIV_CLK_PERIC1_USI15_USI 0x181c +#define CLK_CON_DIV_DIV_CLK_PERIC1_USI16_USI 0x1820 +#define CLK_CON_DIV_DIV_CLK_PERIC1_USI17_USI 0x1824 +#define CLK_CON_DIV_DIV_CLK_PERIC1_USI_I2C 0x1828 + +static const unsigned long peric1_clk_regs[] __initconst = { + PLL_CON0_MUX_CLKCMU_PERIC1_IP_USER, + PLL_CON0_MUX_CLKCMU_PERIC1_NOC_USER, + CLK_CON_MUX_MUX_CLK_PERIC1_I3C, + CLK_CON_MUX_MUX_CLK_PERIC1_USI09_USI, + CLK_CON_MUX_MUX_CLK_PERIC1_USI10_USI, + CLK_CON_MUX_MUX_CLK_PERIC1_USI11_USI, + CLK_CON_MUX_MUX_CLK_PERIC1_USI12_USI, + CLK_CON_MUX_MUX_CLK_PERIC1_USI13_USI, + CLK_CON_MUX_MUX_CLK_PERIC1_USI14_USI, + CLK_CON_MUX_MUX_CLK_PERIC1_USI15_USI, + CLK_CON_MUX_MUX_CLK_PERIC1_USI16_USI, + CLK_CON_MUX_MUX_CLK_PERIC1_USI17_USI, + CLK_CON_MUX_MUX_CLK_PERIC1_USI_I2C, + CLK_CON_DIV_DIV_CLK_PERIC1_I3C, + CLK_CON_DIV_DIV_CLK_PERIC1_USI09_USI, + CLK_CON_DIV_DIV_CLK_PERIC1_USI10_USI, + CLK_CON_DIV_DIV_CLK_PERIC1_USI11_USI, + CLK_CON_DIV_DIV_CLK_PERIC1_USI12_USI, + CLK_CON_DIV_DIV_CLK_PERIC1_USI13_USI, + CLK_CON_DIV_DIV_CLK_PERIC1_USI14_USI, + CLK_CON_DIV_DIV_CLK_PERIC1_USI15_USI, + CLK_CON_DIV_DIV_CLK_PERIC1_USI16_USI, + CLK_CON_DIV_DIV_CLK_PERIC1_USI17_USI, + CLK_CON_DIV_DIV_CLK_PERIC1_USI_I2C, +}; + +/* List of parent clocks for Muxes in CMU_PERIC1 */ +PNAME(mout_peric1_ip_user_p) = { "oscclk", "dout_clkcmu_peric1_ip" }; +PNAME(mout_peric1_noc_user_p) = { "oscclk", "dout_clkcmu_peric1_noc" }; +PNAME(mout_peric1_usi_p) = { "oscclk", "mout_peric1_ip_user" }; + +static const struct samsung_mux_clock peric1_mux_clks[] __initconst = { + MUX(CLK_MOUT_PERIC1_IP_USER, "mout_peric1_ip_user", + mout_peric1_ip_user_p, PLL_CON0_MUX_CLKCMU_PERIC1_IP_USER, 4, 1), + MUX(CLK_MOUT_PERIC1_NOC_USER, "mout_peric1_noc_user", + mout_peric1_noc_user_p, PLL_CON0_MUX_CLKCMU_PERIC1_NOC_USER, 4, 1), + /* USI09 ~ USI17 */ + MUX(CLK_MOUT_PERIC1_USI09_USI, "mout_peric1_usi09_usi", + mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI09_USI, 0, 1), + MUX(CLK_MOUT_PERIC1_USI10_USI, "mout_peric1_usi10_usi", + mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI10_USI, 0, 1), + MUX(CLK_MOUT_PERIC1_USI11_USI, "mout_peric1_usi11_usi", + mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI11_USI, 0, 1), + MUX(CLK_MOUT_PERIC1_USI12_USI, "mout_peric1_usi12_usi", + mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI12_USI, 0, 1), + MUX(CLK_MOUT_PERIC1_USI13_USI, "mout_peric1_usi13_usi", + mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI13_USI, 0, 1), + MUX(CLK_MOUT_PERIC1_USI14_USI, "mout_peric1_usi14_usi", + mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI14_USI, 0, 1), + MUX(CLK_MOUT_PERIC1_USI15_USI, "mout_peric1_usi15_usi", + mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI15_USI, 0, 1), + MUX(CLK_MOUT_PERIC1_USI16_USI, "mout_peric1_usi16_usi", + mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI16_USI, 0, 1), + MUX(CLK_MOUT_PERIC1_USI17_USI, "mout_peric1_usi17_usi", + mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI17_USI, 0, 1), + /* USI_I2C */ + MUX(CLK_MOUT_PERIC1_USI_I2C, "mout_peric1_usi_i2c", + mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI_I2C, 0, 1), + /* USI_I3C */ + MUX(CLK_MOUT_PERIC1_I3C, "mout_peric1_i3c", + mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_I3C, 0, 1), +}; + +static const struct samsung_div_clock peric1_div_clks[] __initconst = { + /* USI09 ~ USI17 */ + DIV(CLK_DOUT_PERIC1_USI09_USI, "dout_peric1_usi09_usi", + "mout_peric1_usi09_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI09_USI, + 0, 4), + DIV(CLK_DOUT_PERIC1_USI10_USI, "dout_peric1_usi10_usi", + "mout_peric1_usi10_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI10_USI, + 0, 4), + DIV(CLK_DOUT_PERIC1_USI11_USI, "dout_peric1_usi11_usi", + "mout_peric1_usi11_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI11_USI, + 0, 4), + DIV(CLK_DOUT_PERIC1_USI12_USI, "dout_peric1_usi12_usi", + "mout_peric1_usi12_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI12_USI, + 0, 4), + DIV(CLK_DOUT_PERIC1_USI13_USI, "dout_peric1_usi13_usi", + "mout_peric1_usi13_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI13_USI, + 0, 4), + DIV(CLK_DOUT_PERIC1_USI14_USI, "dout_peric1_usi14_usi", + "mout_peric1_usi14_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI14_USI, + 0, 4), + DIV(CLK_DOUT_PERIC1_USI15_USI, "dout_peric1_usi15_usi", + "mout_peric1_usi15_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI15_USI, + 0, 4), + DIV(CLK_DOUT_PERIC1_USI16_USI, "dout_peric1_usi16_usi", + "mout_peric1_usi16_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI16_USI, + 0, 4), + DIV(CLK_DOUT_PERIC1_USI17_USI, "dout_peric1_usi17_usi", + "mout_peric1_usi17_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI17_USI, + 0, 4), + /* USI_I2C */ + DIV(CLK_DOUT_PERIC1_USI_I2C, "dout_peric1_usi_i2c", + "mout_peric1_usi_i2c", CLK_CON_DIV_DIV_CLK_PERIC1_USI_I2C, 0, 4), + /* USI_I3C */ + DIV(CLK_DOUT_PERIC1_I3C, "dout_peric1_i3c", + "mout_peric1_i3c", CLK_CON_DIV_DIV_CLK_PERIC1_I3C, 0, 4), +}; + +static const struct samsung_cmu_info peric1_cmu_info __initconst = { + .mux_clks = peric1_mux_clks, + .nr_mux_clks = ARRAY_SIZE(peric1_mux_clks), + .div_clks = peric1_div_clks, + .nr_div_clks = ARRAY_SIZE(peric1_div_clks), + .nr_clk_ids = CLKS_NR_PERIC1, + .clk_regs = peric1_clk_regs, + .nr_clk_regs = ARRAY_SIZE(peric1_clk_regs), + .clk_name = "noc", +}; + +/* ---- CMU_MISC --------------------------------------------------------- */ + +/* Register Offset definitions for CMU_MISC (0x10020000) */ +#define PLL_CON0_MUX_CLKCMU_MISC_NOC_USER 0x600 +#define CLK_CON_MUX_MUX_CLK_MISC_GIC 0x1000 +#define CLK_CON_DIV_CLKCMU_OTP 0x1800 +#define CLK_CON_DIV_DIV_CLK_MISC_NOCP 0x1804 +#define CLK_CON_DIV_DIV_CLK_MISC_OSC_DIV2 0x1808 + +static const unsigned long misc_clk_regs[] __initconst = { + PLL_CON0_MUX_CLKCMU_MISC_NOC_USER, + CLK_CON_MUX_MUX_CLK_MISC_GIC, + CLK_CON_DIV_CLKCMU_OTP, + CLK_CON_DIV_DIV_CLK_MISC_NOCP, + CLK_CON_DIV_DIV_CLK_MISC_OSC_DIV2, +}; + +/* List of parent clocks for Muxes in CMU_MISC */ +PNAME(mout_misc_noc_user_p) = { "oscclk", "dout_clkcmu_misc_noc" }; +PNAME(mout_misc_gic_p) = { "dout_misc_nocp", "oscclk" }; + +static const struct samsung_mux_clock misc_mux_clks[] __initconst = { + MUX(CLK_MOUT_MISC_NOC_USER, "mout_misc_noc_user", + mout_misc_noc_user_p, PLL_CON0_MUX_CLKCMU_MISC_NOC_USER, 4, 1), + MUX(CLK_MOUT_MISC_GIC, "mout_misc_gic", + mout_misc_gic_p, CLK_CON_MUX_MUX_CLK_MISC_GIC, 0, 1), +}; + +static const struct samsung_div_clock misc_div_clks[] __initconst = { + DIV(CLK_DOUT_MISC_NOCP, "dout_misc_nocp", + "mout_misc_noc_user", CLK_CON_DIV_DIV_CLK_MISC_NOCP, + 0, 3), +}; + +static const struct samsung_fixed_factor_clock misc_fixed_factor_clks[] __initconst = { + FFACTOR(CLK_DOUT_MISC_OTP, "dout_misc_otp", + "oscclk", 1, 10, 0), + FFACTOR(CLK_DOUT_MISC_OSC_DIV2, "dout_misc_osc_div2", + "oscclk", 1, 2, 0), +}; + +static const struct samsung_cmu_info misc_cmu_info __initconst = { + .mux_clks = misc_mux_clks, + .nr_mux_clks = ARRAY_SIZE(misc_mux_clks), + .div_clks = misc_div_clks, + .nr_div_clks = ARRAY_SIZE(misc_div_clks), + .fixed_factor_clks = misc_fixed_factor_clks, + .nr_fixed_factor_clks = ARRAY_SIZE(misc_fixed_factor_clks), + .nr_clk_ids = CLKS_NR_MISC, + .clk_regs = misc_clk_regs, + .nr_clk_regs = ARRAY_SIZE(misc_clk_regs), + .clk_name = "noc", +}; + +/* ---- CMU_HSI0 --------------------------------------------------------- */ + +/* Register Offset definitions for CMU_HSI0 (0x16000000) */ +#define PLL_CON0_MUX_CLKCMU_HSI0_NOC_USER 0x600 +#define CLK_CON_DIV_DIV_CLK_HSI0_PCIE_APB 0x1800 + +static const unsigned long hsi0_clk_regs[] __initconst = { + PLL_CON0_MUX_CLKCMU_HSI0_NOC_USER, + CLK_CON_DIV_DIV_CLK_HSI0_PCIE_APB, +}; + +/* List of parent clocks for Muxes in CMU_HSI0 */ +PNAME(mout_hsi0_noc_user_p) = { "oscclk", "dout_clkcmu_hsi0_noc" }; + +static const struct samsung_mux_clock hsi0_mux_clks[] __initconst = { + MUX(CLK_MOUT_HSI0_NOC_USER, "mout_hsi0_noc_user", + mout_hsi0_noc_user_p, PLL_CON0_MUX_CLKCMU_HSI0_NOC_USER, 4, 1), +}; + +static const struct samsung_div_clock hsi0_div_clks[] __initconst = { + DIV(CLK_DOUT_HSI0_PCIE_APB, "dout_hsi0_pcie_apb", + "mout_hsi0_noc_user", CLK_CON_DIV_DIV_CLK_HSI0_PCIE_APB, + 0, 4), +}; + +static const struct samsung_cmu_info hsi0_cmu_info __initconst = { + .mux_clks = hsi0_mux_clks, + .nr_mux_clks = ARRAY_SIZE(hsi0_mux_clks), + .div_clks = hsi0_div_clks, + .nr_div_clks = ARRAY_SIZE(hsi0_div_clks), + .nr_clk_ids = CLKS_NR_HSI0, + .clk_regs = hsi0_clk_regs, + .nr_clk_regs = ARRAY_SIZE(hsi0_clk_regs), + .clk_name = "noc", +}; + +/* ---- CMU_HSI1 --------------------------------------------------------- */ + +/* Register Offset definitions for CMU_HSI1 (0x16400000) */ +#define PLL_CON0_MUX_CLKCMU_HSI1_MMC_CARD_USER 0x600 +#define PLL_CON0_MUX_CLKCMU_HSI1_NOC_USER 0x610 +#define PLL_CON0_MUX_CLKCMU_HSI1_USBDRD_USER 0x620 +#define CLK_CON_MUX_MUX_CLK_HSI1_USBDRD 0x1000 + +static const unsigned long hsi1_clk_regs[] __initconst = { + PLL_CON0_MUX_CLKCMU_HSI1_MMC_CARD_USER, + PLL_CON0_MUX_CLKCMU_HSI1_NOC_USER, + PLL_CON0_MUX_CLKCMU_HSI1_USBDRD_USER, + CLK_CON_MUX_MUX_CLK_HSI1_USBDRD, +}; + +/* List of parent clocks for Muxes in CMU_HSI1 */ +PNAME(mout_hsi1_mmc_card_user_p) = {"oscclk", "dout_clkcmu_hsi1_mmc_card"}; +PNAME(mout_hsi1_noc_user_p) = { "oscclk", "dout_clkcmu_hsi1_noc" }; +PNAME(mout_hsi1_usbdrd_user_p) = { "oscclk", "mout_clkcmu_hsi1_usbdrd" }; +PNAME(mout_hsi1_usbdrd_p) = { "dout_tcxo_div2", "mout_hsi1_usbdrd_user" }; + +static const struct samsung_mux_clock hsi1_mux_clks[] __initconst = { + MUX(CLK_MOUT_HSI1_MMC_CARD_USER, "mout_hsi1_mmc_card_user", + mout_hsi1_mmc_card_user_p, PLL_CON0_MUX_CLKCMU_HSI1_MMC_CARD_USER, 4, 1), + MUX(CLK_MOUT_HSI1_NOC_USER, "mout_hsi1_noc_user", + mout_hsi1_noc_user_p, PLL_CON0_MUX_CLKCMU_HSI1_NOC_USER, 4, 1), + MUX(CLK_MOUT_HSI1_USBDRD_USER, "mout_hsi1_usbdrd_user", + mout_hsi1_usbdrd_user_p, PLL_CON0_MUX_CLKCMU_HSI1_USBDRD_USER, 4, 1), + MUX(CLK_MOUT_HSI1_USBDRD, "mout_hsi1_usbdrd", + mout_hsi1_usbdrd_p, CLK_CON_MUX_MUX_CLK_HSI1_USBDRD, 4, 1), +}; + +static const struct samsung_cmu_info hsi1_cmu_info __initconst = { + .mux_clks = hsi1_mux_clks, + .nr_mux_clks = ARRAY_SIZE(hsi1_mux_clks), + .nr_clk_ids = CLKS_NR_HSI1, + .clk_regs = hsi1_clk_regs, + .nr_clk_regs = ARRAY_SIZE(hsi1_clk_regs), + .clk_name = "noc", +}; + static int __init exynosautov920_cmu_probe(struct platform_device *pdev) { const struct samsung_cmu_info *info; @@ -1154,6 +1431,19 @@ static const struct of_device_id exynosautov920_cmu_of_match[] = { { .compatible = "samsung,exynosautov920-cmu-peric0", .data = &peric0_cmu_info, + }, { + .compatible = "samsung,exynosautov920-cmu-peric1", + .data = &peric1_cmu_info, + }, { + .compatible = "samsung,exynosautov920-cmu-misc", + .data = &misc_cmu_info, + }, { + .compatible = "samsung,exynosautov920-cmu-hsi0", + .data = &hsi0_cmu_info, + }, { + .compatible = "samsung,exynosautov920-cmu-hsi1", + .data = &hsi1_cmu_info, + }, { }, { } }; From patchwork Mon Oct 7 07:18:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunyeal Hong X-Patchwork-Id: 13824249 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7D4B183CBE for ; Mon, 7 Oct 2024 07:18:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728285520; cv=none; b=TpSeNVXLqVDuNY86B23NxakhgKn0CNV0a+QJkYoB+BvX/PJPBEKLw0Oy8Y4bmj4jnGVbBR/osTsfUPT2wGLVVimbUPblg1LQ5DBtqBbP0QRhBg76YLa+6h7KTuHKc3+QhcwPl13YKwKjpbNLzMNFv7JjfIOQy1gli5d1tzR5mFI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728285520; c=relaxed/simple; bh=WRqjubW+I7cN3Hd71LqTLIqW6XSd4ucEaJXbUbMu5Ro=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:MIME-Version: Content-Type:References; b=aB8dJZYFKUlh5nGi7AoxEi7uxO8M22gk0ayPieaOzN/inXS83hu/Pykmjp7iKLuj2WWvyTpk6ijcXODFV+t/GTorNerkYkadqtqiDIgspFFjSQFgY6b6B8mIKJaQSRz969zMa2cpDt1okZNbxspSgL59vppo5LBcOHOBEebnmWU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=lMox+tOV; arc=none smtp.client-ip=203.254.224.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="lMox+tOV" Received: from epcas2p4.samsung.com (unknown [182.195.41.56]) by mailout3.samsung.com (KnoxPortal) with ESMTP id 20241007071836epoutp03cdb0d40c661b057b7c911f034ac6905e~8GoUclERn2393123931epoutp03L for ; Mon, 7 Oct 2024 07:18:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout3.samsung.com 20241007071836epoutp03cdb0d40c661b057b7c911f034ac6905e~8GoUclERn2393123931epoutp03L DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1728285516; bh=ssRExWKD5A07LgoUhNw/tWVunYPb56F3kIxoBfoq3pA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lMox+tOV7L/LS0ZdwufUGpZ+ItE33eT9ZiZVrzw9VZBwtIadcXoWcJ3LaOe6JtLKG WNlZQXM8AC77kobMx7HQh0qdXZDlpgR5cw0fSp2qZUMxcip3OzRFGKvPRstzD71yXC Mu/reNVJqWN6+8MSq0t9K983RsafIX12yY2b1gJE= Received: from epsnrtp3.localdomain (unknown [182.195.42.164]) by epcas2p3.samsung.com (KnoxPortal) with ESMTP id 20241007071835epcas2p38edebef7fa47916681d3b005df8555ef~8GoT7JpT-2967729677epcas2p3Q; Mon, 7 Oct 2024 07:18:35 +0000 (GMT) Received: from epsmges2p3.samsung.com (unknown [182.195.36.97]) by epsnrtp3.localdomain (Postfix) with ESMTP id 4XMVqt5tWZz4x9Q2; Mon, 7 Oct 2024 07:18:34 +0000 (GMT) Received: from epcas2p4.samsung.com ( [182.195.41.56]) by epsmges2p3.samsung.com (Symantec Messaging Gateway) with SMTP id 8B.89.09776.A4B83076; Mon, 7 Oct 2024 16:18:34 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas2p3.samsung.com (KnoxPortal) with ESMTPA id 20241007071834epcas2p34166194efb512b6346d0f6d47188859b~8GoS0ddTJ2967629676epcas2p3O; Mon, 7 Oct 2024 07:18:34 +0000 (GMT) Received: from epsmgms1p2new.samsung.com (unknown [182.195.42.42]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20241007071834epsmtrp1efb6e7aa1c9288cbf976c80cc5c47ecf~8GoSzh4rh1654816548epsmtrp18; Mon, 7 Oct 2024 07:18:34 +0000 (GMT) X-AuditID: b6c32a47-d53fa70000002630-ec-67038b4a5683 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p2new.samsung.com (Symantec Messaging Gateway) with SMTP id 81.A8.08227.A4B83076; Mon, 7 Oct 2024 16:18:34 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.60]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20241007071834epsmtip10785b4c3baf1ba1657391c520bd3c04c~8GoSl7FvG0992509925epsmtip1s; Mon, 7 Oct 2024 07:18:34 +0000 (GMT) From: Sunyeal Hong To: Krzysztof Kozlowski , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley Cc: linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sunyeal Hong Subject: [PATCH v2 3/3] arm64: dts: exynosautov920: add peric1, misc and hsi0/1 clock DT nodes Date: Mon, 7 Oct 2024 16:18:29 +0900 Message-ID: <20241007071829.3042094-4-sunyeal.hong@samsung.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241007071829.3042094-1-sunyeal.hong@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrPJsWRmVeSWpSXmKPExsWy7bCmha5XN3O6wZJz2hYP5m1js1iz9xyT xfUvz1kt5h85x2px/vwGdotNj6+xWnzsucdqcXnXHDaLGef3MVlcPOVq8X/PDnaLw2/aWS3+ XdvIYtG0bD2TA5/H+xut7B6bVnWyeWxeUu/Rt2UVo8fnTXIBrFHZNhmpiSmpRQqpecn5KZl5 6bZK3sHxzvGmZgaGuoaWFuZKCnmJuam2Si4+AbpumTlAdyoplCXmlAKFAhKLi5X07WyK8ktL UhUy8otLbJVSC1JyCswL9IoTc4tL89L18lJLrAwNDIxMgQoTsjOmfHzOWHBWtGLOoTssDYyv BLoYOTkkBEwkuh/NYe9i5OIQEtjBKLF3VycLhPOJUeJzew8ThPONUeLvy1ZWmJb2OZvZIBJ7 GSW2rWiFcj4ySux+cARoGAcHm4CuxJ9/DiBxEYE9TBJbzi8BG8UscJZR4u6cBewgo4QFEiQO ND1hBLFZBFQlvt44AbaCV8Be4suRKcwQ6+Qlrj8+ygRicwo4SNy98ZERokZQ4uTMJywgNjNQ TfPW2cwgCyQEFnJIfP0Ech9Is4vEvPlHoe4Wlnh1fAs7hC0l8bK/DcrOl5h8/S0TRHMDo8S1 f91Qm+0lFp35CfYOs4CmxPpd+iCmhICyxJFbUHv5JDoO/2WHCPNKdLQJQTSqSXy6chlqiIzE sRPPoGwPibc/rkPDdzKjxOYzr9kmMCrMQvLOLCTvzEJYvICReRWjWGpBcW56arFRgTE8jpPz czcxglOulvsOxhlvP+gdYmTiYDzEKMHBrCTCG7GGMV2INyWxsiq1KD++qDQntfgQoykwsCcy S4km5wOTfl5JvKGJpYGJmZmhuZGpgbmSOO+91rkpQgLpiSWp2ampBalFMH1MHJxSDUzhwsx7 Dug6e2Z+quFrT3z+OO9R9Mv3UU4/7jAsfHZcUmLpf63fSzXjBTtvKx+Sr617FPLi17NHng8l swtub5j0t2tRXkjJk9XsDP6HbUp8LPYHMIv8LWZvquqcrf/uuWNU6b8v08SrC7Zs2OvwLP1B 098eK1G9S4l73y9xZzjc9n73zff7vt4UW+epZXnFLXQnl+icZqWMw89bLf/FvrtR+eNV9eeF q/+kiScyZT98Ms3l7MfjgmJzVpbP5A84wqDZuMpcJPTa37STF8ydrZsV7HTepCsI+U8+dX3D /WM/WL5fjZX+80tqxe3ang9Rh/P7zlX5L8r9z9el/UNMJv23yv9d59iudM/pkBft+f1NiaU4 I9FQi7moOBEAxCUBuUIEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrJLMWRmVeSWpSXmKPExsWy7bCSnK5XN3O6wZPpXBYP5m1js1iz9xyT xfUvz1kt5h85x2px/vwGdotNj6+xWnzsucdqcXnXHDaLGef3MVlcPOVq8X/PDnaLw2/aWS3+ XdvIYtG0bD2TA5/H+xut7B6bVnWyeWxeUu/Rt2UVo8fnTXIBrFFcNimpOZllqUX6dglcGVM+ PmcsOCtaMefQHZYGxlcCXYycHBICJhLtczazdTFycQgJ7GaUmNW3lwkiISOxseE/O4QtLHG/ 5QgrRNF7Ron/V5cwdjFycLAJ6Er8+ecAEhcROMQkMfHzUxYQh1ngMqPEsbuTmUG6hQXiJA5t PcQKYrMIqEp8vXECzOYVsJf4cmQKM8QGeYnrj4+CbeYUcJC4e+MjI4gtBFTz4ux7Roh6QYmT M5+wgNjMQPXNW2czT2AUmIUkNQtJagEj0ypGydSC4tz03GLDAqO81HK94sTc4tK8dL3k/NxN jODY0NLawbhn1Qe9Q4xMHIyHGCU4mJVEeCPWMKYL8aYkVlalFuXHF5XmpBYfYpTmYFES5/32 ujdFSCA9sSQ1OzW1ILUIJsvEwSnVwGQ/o1nF02hj7UJu59AHgYue6J7KX2+iIz178vqv4d2t YS2uN4Tryj7+2DLtBntR1OYLaT+c4i/NcXcWn3xsTS9ficH2j3ol0dL7fldELVPuvin2o93P 4m/j/1vfnq2qdHdK/BXz9X2uWPzxplP/QhuMF2r6/Zkq/cLk7aGiz458m0pudU807hJaunHp V+PMA0x7zW+VvuEyeXz4DGfDyqoO1/17y/WuuBb+/vD/OO+VdSy/H0gWBZrvSeplYtnVlcOm OdGxOFo3vfmwrXrbjiSdA4e2B/FrTcr0fXvp9d49FpMl/JYfSr/wjeFPniizzZ4K264NlyO+ PT5TcEPjTuqZ9AB2jUBuRp8Fn22fvFZiKc5INNRiLipOBAAzxJ95/AIAAA== X-CMS-MailID: 20241007071834epcas2p34166194efb512b6346d0f6d47188859b X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20241007071834epcas2p34166194efb512b6346d0f6d47188859b References: <20241007071829.3042094-1-sunyeal.hong@samsung.com> Add cmu_peric1 for USI, I2C and I3C clocks respectively. Add cmu_misc for MISC, GIC and OTP clocks respectively. Add cmu_hsi0 for PCIE clocks respectively. Add cmu_hsi1 for USB and MMC clocks respectively. Signed-off-by: Sunyeal Hong --- .../arm64/boot/dts/exynos/exynosautov920.dtsi | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi index 91882b37fdb3..c759134c909e 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -172,6 +172,17 @@ chipid@10000000 { reg = <0x10000000 0x24>; }; + cmu_misc: clock-controller@10020000 { + compatible = "samsung,exynosautov920-cmu-misc"; + reg = <0x10020000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_MISC_NOC>; + clock-names = "oscclk", + "noc"; + }; + gic: interrupt-controller@10400000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; @@ -247,6 +258,19 @@ pwm: pwm@109b0000 { status = "disabled"; }; + cmu_peric1: clock-controller@10c00000 { + compatible = "samsung,exynosautov920-cmu-peric1"; + reg = <0x10c00000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_PERIC1_NOC>, + <&cmu_top DOUT_CLKCMU_PERIC1_IP>; + clock-names = "oscclk", + "noc", + "ip"; + }; + syscon_peric1: syscon@10c20000 { compatible = "samsung,exynosautov920-peric1-sysreg", "syscon"; @@ -283,12 +307,38 @@ pmu_system_controller: system-controller@11860000 { reg = <0x11860000 0x10000>; }; + cmu_hsi0: clock-controller@16000000 { + compatible = "samsung,exynosautov920-cmu-hsi0"; + reg = <0x16000000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_HSI0_NOC>; + clock-names = "oscclk", + "noc"; + }; + pinctrl_hsi0: pinctrl@16040000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x16040000 0x10000>; interrupts = ; }; + cmu_hsi1: clock-controller@16400000 { + compatible = "samsung,exynosautov920-cmu-hsi1"; + reg = <0x16400000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_HSI1_NOC>, + <&cmu_top DOUT_CLKCMU_HSI1_USBDRD>, + <&cmu_top DOUT_CLKCMU_HSI1_MMC_CARD>; + clock-names = "oscclk", + "noc", + "usbdrd", + "mmc_card"; + }; + pinctrl_hsi1: pinctrl@16450000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x16450000 0x10000>;