From patchwork Mon Oct 7 13:27:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gatien CHEVALLIER X-Patchwork-Id: 13824699 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1AD97CFB441 for ; Mon, 7 Oct 2024 13:45:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Kb/Wv4RQ9boMDu8e4FgyKdarjG40Bi/qBXrF2ODld5E=; b=FwfL4nqa/ovAebOSpyyB4Oo2ij tSj1QlskavQRw0c2uOReNDjSJE7yifuXQacTkFa+vKuclN9GjHrYbyUwUuL8mFajsWncsMqqBkWfY kYEqyN2syOKacQ8fQ/UrDFaQVUPGzzPBSifE0knHBO6D427mp97FSaFTsaL/PdOOYfnHXtd7P2uOZ Ubh5TXGTemWKJZiL3ybOadf35L2VxUloacec5Q1jcHT38PRkeaDBOfbcF6/nDKE2cnm2MzisMrQTZ KCs8J5JoITOEKV8NFunBv1jT+xcxRreYPiqaP883FHmFyy3u/UbUwjJ1uM9UpF3fVkxpb7eiRvbmR UiFR8xqA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1sxo3M-00000002Z5E-241r; Mon, 07 Oct 2024 13:45:36 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1sxnql-00000002WfY-2Byq for linux-arm-kernel@lists.infradead.org; Mon, 07 Oct 2024 13:32:37 +0000 Received: from pps.filterd (m0369458.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 497B4G5b021715; Mon, 7 Oct 2024 15:32:15 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= Kb/Wv4RQ9boMDu8e4FgyKdarjG40Bi/qBXrF2ODld5E=; b=dBsatN6yjAkVg+uC enJ5nDH/TG9y4/QizZ/vCg4mIWhDfmxOqQ9R/gapsLMNFWla8t80cck+RHqogTQZ QYsiurOdR63xCB8FpftVy/JrOA+JKNxCMBcWCyfnaVWQguQOC4EjBf9sMvm//UW7 rxw0IxuLDBWToP3+bZKg6RqlCPkc6DI6GbETwpGEihCEsyu8oVn3g1xmwtnpHlNq rGaQLpDnhBGKMidXFycC24GMXdXTOqSZWbdFYea1ec3NMSCKgVcDF0moeHkq0usz ncm5s7iNRBtGI/wUoJtULxjhSg7mqt8u5jGKdH1mcJCafY+6NRyAxpXsTxsZA76T bkdvyA== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 423f10pdkh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 07 Oct 2024 15:32:14 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id AEDD44004B; Mon, 7 Oct 2024 15:30:37 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 3C338279E8C; Mon, 7 Oct 2024 15:27:46 +0200 (CEST) Received: from localhost (10.48.86.225) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Mon, 7 Oct 2024 15:27:45 +0200 From: Gatien Chevallier To: Olivia Mackall , Herbert Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Marek Vasut CC: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lionel Debieve , , , , , , Yang Yingliang , Gatien Chevallier Subject: [PATCH 1/4] dt-bindings: rng: add st,stm32mp25-rng support Date: Mon, 7 Oct 2024 15:27:18 +0200 Message-ID: <20241007132721.168428-2-gatien.chevallier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241007132721.168428-1-gatien.chevallier@foss.st.com> References: <20241007132721.168428-1-gatien.chevallier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.86.225] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241007_063235_930958_76EDA224 X-CRM114-Status: GOOD ( 10.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add RNG STM32MP25x platforms compatible. Update the clock properties management to support all versions. Signed-off-by: Gatien Chevallier --- .../devicetree/bindings/rng/st,stm32-rng.yaml | 41 +++++++++++++++++-- 1 file changed, 38 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml b/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml index 340d01d481d1..c92ce92b6ac9 100644 --- a/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml +++ b/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml @@ -18,12 +18,19 @@ properties: enum: - st,stm32-rng - st,stm32mp13-rng + - st,stm32mp25-rng reg: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 + + clock-names: + items: + - const: rng_clk + - const: rng_hclk resets: maxItems: 1 @@ -57,15 +64,43 @@ allOf: properties: st,rng-lock-conf: false + - if: + properties: + compatible: + contains: + enum: + - st,stm32mp25-rng + then: + properties: + clocks: + description: > + RNG bus clock must be named "rng_hclk". The RNG kernel clock + must be named "rng_clk". + maxItems: 2 + required: + - clock-names + else: + properties: + clocks: + maxItems: 1 + additionalProperties: false examples: - | - #include rng@54003000 { compatible = "st,stm32-rng"; reg = <0x54003000 0x400>; - clocks = <&rcc RNG1_K>; + clocks = <&rcc 124>; }; + - | + rng: rng@42020000 { + compatible = "st,stm32mp25-rng"; + reg = <0x42020000 0x400>; + clocks = <&clk_rcbsec>, <&rcc 110>; + clock-names = "rng_clk", "rng_hclk"; + resets = <&rcc 97>; + access-controllers = <&rifsc 92>; + }; ... From patchwork Mon Oct 7 13:27:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gatien CHEVALLIER X-Patchwork-Id: 13824700 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DBDA5CFB43F for ; Mon, 7 Oct 2024 13:47:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xzgG93BdkVXodGzAxOX10I0SBb7Z83WcOcVhqPTWIHE=; b=xnRN+NAY3bYhyzhYOoqAGyrVrl 5TyJG19SkuGkpAVS6+XC1snmLhaz1ZDQcMbARVGfSgU6k0tzre9oJ0b028hXgfoz76d74eVxpjtqB 9u9xQSZSUObzl4R4BesISIcnWqciGZmEt90iq1L5Y39+N4b7ZFXohIaZ7eLYQ0clg2E6zcXAyq4/H cTz9n1Pz2ZyciuIT3Byn7WOSdwKmoZuLT0OgSFiazDZgmDM5afyjQRtajtnLaMFv1immpOBjSuPLl azNr6MqSHJfgrJYoPXcuAi5Cf5Vq85pA0rznbho4Eo/7LgjmI+slxB/9HXqq7BcA9CF1L3BmflJIU FOEO2l7Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1sxo4c-00000002ZIX-08KH; Mon, 07 Oct 2024 13:46:54 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1sxnql-00000002WfX-2NzO for linux-arm-kernel@lists.infradead.org; Mon, 07 Oct 2024 13:32:38 +0000 Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 497B0qho010445; Mon, 7 Oct 2024 15:32:15 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= xzgG93BdkVXodGzAxOX10I0SBb7Z83WcOcVhqPTWIHE=; b=ZXVL4KuFhWR3yupw CNjhIwgP8Q3aD3J+k0px/gGdvsFugHTNI46LA21cydUeRgTT1WozPObWTez4CRKm visnFCF64fKT2mIT2kXah951ZhouDRH0iBvmv5cGnh6MvIrPyU3OF/wR4/9BnZBC OxAgeEsyEnSmsyVUbPcdfPHWZ959dD23NXP5UqCR53yQmmnAInv3XbpPQMK9edAv GpNdsyHR8IAOF7Ex0e34i8q15xAfVUE8gxOxhZkDm41ILHUR9T4VvHvzdQ2/9HyO y2jG9yG4GPeSy6YReUMidQJq77SzSDXslbzN5JCxjdKcM73vWRTtBMUjOXzuhryb KXESWA== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 422xv714xm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 07 Oct 2024 15:32:14 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id AFE744004C; Mon, 7 Oct 2024 15:30:37 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 0329F279E99; Mon, 7 Oct 2024 15:27:47 +0200 (CEST) Received: from localhost (10.48.86.225) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Mon, 7 Oct 2024 15:27:46 +0200 From: Gatien Chevallier To: Olivia Mackall , Herbert Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Marek Vasut CC: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lionel Debieve , , , , , , Yang Yingliang , Gatien Chevallier Subject: [PATCH 2/4] hwrng: stm32 - implement support for STM32MP25x platforms Date: Mon, 7 Oct 2024 15:27:19 +0200 Message-ID: <20241007132721.168428-3-gatien.chevallier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241007132721.168428-1-gatien.chevallier@foss.st.com> References: <20241007132721.168428-1-gatien.chevallier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.86.225] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241007_063236_000869_CF246CCD X-CRM114-Status: GOOD ( 19.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Implement the support for STM32MP25x platforms. On this platform, a security clock is shared between some hardware blocks. For the RNG, it is the RNG kernel clock. Therefore, the gate is no more shared between the RNG bus and kernel clocks as on STM32MP1x platforms and the bus clock has to be managed on its own. Signed-off-by: Gatien Chevallier --- drivers/char/hw_random/stm32-rng.c | 81 ++++++++++++++++++++++++++++-- 1 file changed, 77 insertions(+), 4 deletions(-) diff --git a/drivers/char/hw_random/stm32-rng.c b/drivers/char/hw_random/stm32-rng.c index 9d041a67c295..e7051005768d 100644 --- a/drivers/char/hw_random/stm32-rng.c +++ b/drivers/char/hw_random/stm32-rng.c @@ -49,6 +49,7 @@ struct stm32_rng_data { uint max_clock_rate; + uint nb_clock; u32 cr; u32 nscr; u32 htcr; @@ -73,6 +74,7 @@ struct stm32_rng_private { struct device *dev; void __iomem *base; struct clk *clk; + struct clk *bus_clk; struct reset_control *rst; struct stm32_rng_config pm_conf; const struct stm32_rng_data *data; @@ -292,6 +294,14 @@ static int stm32_rng_init(struct hwrng *rng) if (err) return err; + if (priv->bus_clk) { + err = clk_prepare_enable(priv->bus_clk); + if (err) { + clk_disable_unprepare(priv->clk); + return err; + } + } + /* clear error indicators */ writel_relaxed(0, priv->base + RNG_SR); @@ -329,6 +339,8 @@ static int stm32_rng_init(struct hwrng *rng) 10, 50000); if (err) { clk_disable_unprepare(priv->clk); + if (priv->bus_clk) + clk_disable_unprepare(priv->bus_clk); dev_err(priv->dev, "%s: timeout %x!\n", __func__, reg); return -EINVAL; } @@ -356,8 +368,11 @@ static int stm32_rng_init(struct hwrng *rng) reg & RNG_SR_DRDY, 10, 100000); if (err || (reg & ~RNG_SR_DRDY)) { + if (priv->bus_clk) + clk_disable_unprepare(priv->bus_clk); clk_disable_unprepare(priv->clk); dev_err(priv->dev, "%s: timeout:%x SR: %x!\n", __func__, err, reg); + return -EINVAL; } @@ -379,6 +394,9 @@ static int __maybe_unused stm32_rng_runtime_suspend(struct device *dev) reg = readl_relaxed(priv->base + RNG_CR); reg &= ~RNG_CR_RNGEN; writel_relaxed(reg, priv->base + RNG_CR); + + if (priv->bus_clk) + clk_disable_unprepare(priv->bus_clk); clk_disable_unprepare(priv->clk); return 0; @@ -393,6 +411,14 @@ static int __maybe_unused stm32_rng_suspend(struct device *dev) if (err) return err; + if (priv->bus_clk) { + err = clk_prepare_enable(priv->bus_clk); + if (err) { + clk_disable_unprepare(priv->clk); + return err; + } + } + if (priv->data->has_cond_reset) { priv->pm_conf.nscr = readl_relaxed(priv->base + RNG_NSCR); priv->pm_conf.htcr = readl_relaxed(priv->base + RNG_HTCR); @@ -403,6 +429,8 @@ static int __maybe_unused stm32_rng_suspend(struct device *dev) writel_relaxed(priv->pm_conf.cr, priv->base + RNG_CR); + if (priv->bus_clk) + clk_disable_unprepare(priv->bus_clk); clk_disable_unprepare(priv->clk); return 0; @@ -418,6 +446,14 @@ static int __maybe_unused stm32_rng_runtime_resume(struct device *dev) if (err) return err; + if (priv->bus_clk) { + err = clk_prepare_enable(priv->bus_clk); + if (err) { + clk_disable_unprepare(priv->clk); + return err; + } + } + /* Clean error indications */ writel_relaxed(0, priv->base + RNG_SR); @@ -438,6 +474,14 @@ static int __maybe_unused stm32_rng_resume(struct device *dev) if (err) return err; + if (priv->bus_clk) { + err = clk_prepare_enable(priv->bus_clk); + if (err) { + clk_disable_unprepare(priv->clk); + return err; + } + } + /* Clean error indications */ writel_relaxed(0, priv->base + RNG_SR); @@ -462,6 +506,8 @@ static int __maybe_unused stm32_rng_resume(struct device *dev) reg & ~RNG_CR_CONDRST, 10, 100000); if (err) { + if (priv->bus_clk) + clk_disable_unprepare(priv->bus_clk); clk_disable_unprepare(priv->clk); dev_err(priv->dev, "%s: timeout:%x CR: %x!\n", __func__, err, reg); return -EINVAL; @@ -473,6 +519,8 @@ static int __maybe_unused stm32_rng_resume(struct device *dev) } clk_disable_unprepare(priv->clk); + if (priv->bus_clk) + clk_disable_unprepare(priv->bus_clk); return 0; } @@ -484,9 +532,19 @@ static const struct dev_pm_ops __maybe_unused stm32_rng_pm_ops = { stm32_rng_resume) }; +static const struct stm32_rng_data stm32mp25_rng_data = { + .has_cond_reset = true, + .max_clock_rate = 48000000, + .nb_clock = 2, + .cr = 0x00F00D00, + .nscr = 0x2B5BB, + .htcr = 0x969D, +}; + static const struct stm32_rng_data stm32mp13_rng_data = { .has_cond_reset = true, .max_clock_rate = 48000000, + .nb_clock = 1, .cr = 0x00F00D00, .nscr = 0x2B5BB, .htcr = 0x969D, @@ -495,9 +553,14 @@ static const struct stm32_rng_data stm32mp13_rng_data = { static const struct stm32_rng_data stm32_rng_data = { .has_cond_reset = false, .max_clock_rate = 3000000, + .nb_clock = 1, }; static const struct of_device_id stm32_rng_match[] = { + { + .compatible = "st,stm32mp25-rng", + .data = &stm32mp25_rng_data, + }, { .compatible = "st,stm32mp13-rng", .data = &stm32mp13_rng_data, @@ -525,10 +588,6 @@ static int stm32_rng_probe(struct platform_device *ofdev) if (IS_ERR(priv->base)) return PTR_ERR(priv->base); - priv->clk = devm_clk_get(&ofdev->dev, NULL); - if (IS_ERR(priv->clk)) - return PTR_ERR(priv->clk); - priv->rst = devm_reset_control_get(&ofdev->dev, NULL); if (!IS_ERR(priv->rst)) { reset_control_assert(priv->rst); @@ -551,6 +610,20 @@ static int stm32_rng_probe(struct platform_device *ofdev) priv->rng.read = stm32_rng_read; priv->rng.quality = 900; + if (priv->data->nb_clock > 1) { + priv->clk = devm_clk_get(&ofdev->dev, "rng_clk"); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); + + priv->bus_clk = devm_clk_get(&ofdev->dev, "rng_hclk"); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->bus_clk); + } else { + priv->clk = devm_clk_get(&ofdev->dev, NULL); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); + } + pm_runtime_set_autosuspend_delay(dev, 100); pm_runtime_use_autosuspend(dev); pm_runtime_enable(dev); From patchwork Mon Oct 7 13:27:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gatien CHEVALLIER X-Patchwork-Id: 13824698 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0B5ECCFB441 for ; Mon, 7 Oct 2024 13:44:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=u7NukRJuVqIxIvFeEgDqcmResbhaXgq3ShhJIAUsN48=; b=PKQ6ddGsAHWeMcvn+byg07f+4B 3+h7BSC4rt2WTICXHJlOAAP/1eYLdCg2VIhaYici5enUS/ZTsTJceHDd93Vg0i8gvjPQvP1l4LRRq iFa0ZvZTtbsvltflAWUrDCc53RRLpdRo8arlIxCB04xws7oljoI901wU3HlroSoa9oZtWP5x/+Pmn Qs5wY0RS2BM1P0syvK9TCLWd4dZ+kQS8wGtdxE+OzRFG+6k06eEV4We+Vfb5u+dm483ZfGTBZAfO9 WK54RnUAMY0hE02wKWWsiHbjtJt1J9uKiEw1+pB2fLOzll2LwDDYiUfQsDgNjhTKb/on/LToDEDAW 9AJYEGPw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1sxo26-00000002Yqk-2mdS; Mon, 07 Oct 2024 13:44:18 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1sxnql-00000002WfO-0mbm for linux-arm-kernel@lists.infradead.org; Mon, 07 Oct 2024 13:32:36 +0000 Received: from pps.filterd (m0369458.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4978wkwM023351; Mon, 7 Oct 2024 15:32:15 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= u7NukRJuVqIxIvFeEgDqcmResbhaXgq3ShhJIAUsN48=; b=fPo4Im+RjVokk4oZ zMvdHlchU1YMM27ZiFUUvs5Nf88vBIqCdqu05km05i4eCFzGs4zH2GbbiywjsI9v +I5U5c0jxa3e9JOiCdD2ZG/52GY5njGnJaYCxF7TYhiqRFFynfoiHP0tguE5Geo0 mEDiIDYcSVSHj9OD2Vnnh+XZLs/3T3ZdPiRCbSdjjd7xHe01ATlJp3PJxKo/xBRG kBiQ9qG26W+0D0V35qftGWNuoLWXCQqxpEOY9zr7aYWGCuvUi05gliMxxbe4+Sfh aDNiV13zUuARL8TjCGCkA0+dp+ZKcJpbswW1sB6v9x4icaZiXlMjV4cGAsWVE9Au zbat+w== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 423f10pdkj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 07 Oct 2024 15:32:15 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id AFEE34004D; Mon, 7 Oct 2024 15:30:37 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B32A027A507; Mon, 7 Oct 2024 15:27:47 +0200 (CEST) Received: from localhost (10.48.86.225) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Mon, 7 Oct 2024 15:27:47 +0200 From: Gatien Chevallier To: Olivia Mackall , Herbert Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Marek Vasut CC: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lionel Debieve , , , , , , Yang Yingliang , Gatien Chevallier Subject: [PATCH 3/4] hwrng: stm32 - update STM32MP15 RNG max clock frequency Date: Mon, 7 Oct 2024 15:27:20 +0200 Message-ID: <20241007132721.168428-4-gatien.chevallier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241007132721.168428-1-gatien.chevallier@foss.st.com> References: <20241007132721.168428-1-gatien.chevallier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.86.225] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241007_063235_700895_E3A521FC X-CRM114-Status: GOOD ( 12.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RNG max clock frequency can be updated to 48MHz for stm32mp1x platforms according to the latest specifications. Signed-off-by: Gatien Chevallier --- drivers/char/hw_random/stm32-rng.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/char/hw_random/stm32-rng.c b/drivers/char/hw_random/stm32-rng.c index e7051005768d..9f1c95218a5b 100644 --- a/drivers/char/hw_random/stm32-rng.c +++ b/drivers/char/hw_random/stm32-rng.c @@ -552,7 +552,7 @@ static const struct stm32_rng_data stm32mp13_rng_data = { static const struct stm32_rng_data stm32_rng_data = { .has_cond_reset = false, - .max_clock_rate = 3000000, + .max_clock_rate = 48000000, .nb_clock = 1, }; From patchwork Mon Oct 7 13:27:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gatien CHEVALLIER X-Patchwork-Id: 13824702 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CFDD3CFB43F for ; Mon, 7 Oct 2024 13:49:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xKQ8+KejSv5zCIILbnJcVY8vIedW2kPb2Uj4ri0BLZw=; b=uPWkEAZiSDCBgmk1z4fqIIaGL1 NXz8NoCnA/iRmtnibOGSbF831UOiK6NJhK2Uw2N4VuH13ZcvQIfMmIQjRwP7lUca2mRfqFVmt/LDz PdbN7lnQKYWnxrT4fhjw/7ra9fN/38lgX4N7TEtLWcGJAeXPKJ8iTcsxCp1oJ3hjU6YkL0rZ6eHTR 3ft95B2LJxsca0LJORfqkXB8MR4hQsRwTLyJ72HBdpxrvzmxraqWWmCSQ7M4NEObPBhRP3Z4kj1UX 9sdNBC0ImIz0KhvqEtHDIIaJ6e3qmwc25yIsLc0fVjaJ3EwigveZBOSOFfjB99A2yCS64B61DHZdE nxhUf6TQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1sxo78-00000002ZjU-1ofo; Mon, 07 Oct 2024 13:49:30 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1sxnqn-00000002Wfi-1HxA for linux-arm-kernel@lists.infradead.org; Mon, 07 Oct 2024 13:32:39 +0000 Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 497Agrgm006897; Mon, 7 Oct 2024 15:32:15 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= xKQ8+KejSv5zCIILbnJcVY8vIedW2kPb2Uj4ri0BLZw=; b=zUfwjcCQPqf3zzuR MCzRCe5YqHcqJx4NgSCSNpHDULO/w5wPZqhHAkuGJOV1zIgjA0PKdqlW6+nIM/XT Fb4ECgIP9HSU/NHWOHS8ZzQp5SvoTQpH9vmiIaxbbIlbNQYR7RlpMVhhFLieR+aF d7oPYeqzJV8/Rmo2DX6HMN2Ra1O7G2NQWXYtndS7x8ABbseJnWtAeLfmOLTcL29e Ena9I5Lsz6z1wncncHelgc59dXQiiRRrEEegAXxD/mVyeEElCvkv+5HcXfczJ3N8 vp6hYV8otfTyr43sGZSEjbX+I1eAt5ROh0HVoqGIFGiX8uoXJD4IKbCKgKALjvKK fRKV1g== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 422xv714xp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 07 Oct 2024 15:32:15 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 7D9E24004F; Mon, 7 Oct 2024 15:30:40 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 78F7527E2A2; Mon, 7 Oct 2024 15:28:58 +0200 (CEST) Received: from localhost (10.48.86.225) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Mon, 7 Oct 2024 15:28:58 +0200 From: Gatien Chevallier To: Olivia Mackall , Herbert Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Marek Vasut CC: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lionel Debieve , , , , , , Yang Yingliang , Gatien Chevallier Subject: [PATCH 4/4] arm64: dts: st: add RNG node on stm32mp251 Date: Mon, 7 Oct 2024 15:27:21 +0200 Message-ID: <20241007132721.168428-5-gatien.chevallier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241007132721.168428-1-gatien.chevallier@foss.st.com> References: <20241007132721.168428-1-gatien.chevallier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.86.225] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241007_063237_704484_E57BA7F5 X-CRM114-Status: GOOD ( 10.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update the device-tree stm32mp251.dtsi by adding the Random Number Generator(RNG) node. Signed-off-by: Gatien Chevallier --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 1167cf63d7e8..40b96353a803 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -493,6 +493,16 @@ uart8: serial@40380000 { status = "disabled"; }; + rng: rng@42020000 { + compatible = "st,stm32mp25-rng"; + reg = <0x42020000 0x400>; + clocks = <&clk_rcbsec>, <&rcc CK_BUS_RNG>; + clock-names = "rng_clk", "rng_hclk"; + resets = <&rcc RNG_R>; + access-controllers = <&rifsc 92>; + status = "disabled"; + }; + spi8: spi@46020000 { #address-cells = <1>; #size-cells = <0>;