From patchwork Tue Oct 8 08:20:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 13825960 Received: from mail-lj1-f177.google.com (mail-lj1-f177.google.com [209.85.208.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E28C17BEC8 for ; Tue, 8 Oct 2024 08:21:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728375672; cv=none; b=UBEFbdl+sufdHi4NLBFoqMexQj/G32E2AfzFhgqc+OoVRgh72EUIEfDf0ZQHWPoxMlr6HVkwHJ0jiq461dJ4K4CKYbSZ7Qa3g2ZPRuos+hSiJison2dKvplT9Q8e2bXxXmJAgn6coxVg5T9YVC5mTMGUp2K4EYAVzECdKjbnoSo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728375672; c=relaxed/simple; bh=Vmf+xo4EPlclr1GOySuBC9cVmg1k3w0bFE3c3z/7Ga8=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=B4FDZzMJBzvhDAnzJ2c7JQ/RSWmk9XEfBCMTTZzy5TNr0KThRwLl7hi1/vHUA4kv80sy/EYHb2q+iaiaTCt/0JmHfJoZINmaCTmeoDLFAetgvAs5PWC3f9JMJrP96bFqTrgMhM+qlYX+BHZV1g55zdJwPsGGtqKUIuuuVXgY+FM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=USxXkugi; arc=none smtp.client-ip=209.85.208.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="USxXkugi" Received: by mail-lj1-f177.google.com with SMTP id 38308e7fff4ca-2fac3f1287bso57186811fa.1 for ; Tue, 08 Oct 2024 01:21:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1728375668; x=1728980468; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=b7ihgprzGUdeCuQ+MS3SxlAgTfH1Bl/IAOciBoUsZ7E=; b=USxXkugiVRdGXu3JtF/znJo8lO8I3md1/Bu5zMHzlrWVCYxgVnuTModu6ZAT1CnXJK dbGFbmZOQl1GUtoP/vzhA7hknUcS8/4PnqO9QzjOxPEV2S9aV7PYiK1mSdH1ObLVjEYI lk2tLlFQkghY3P05uXN/6qBLdthCFwzYDLNmswwocV7oh+8NKBj0k4V5Y8TiSbaFtfFM oFad6/HndlaiG5ksH6Y5IW8xsVtFFs56ctMNCME6h1aOb7kzDJaTJR62yFXlyVV7nGLK QBBz9Rcxpk5FT9JPp7j8iQ2muiSstLisjrzPRqaC+mEsuQs9KIX2yjho/UnOO97pqWnP F8uQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728375668; x=1728980468; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=b7ihgprzGUdeCuQ+MS3SxlAgTfH1Bl/IAOciBoUsZ7E=; b=VjOnT6DxhLchYniwSaoyMjGMIpQjTHtqEpZd7M1pDzQQLruljLHq4ntMqs1QLGoL/G vXTYU85KHZCzW6X3+ISsZiBcCLlz3IotJ6ZMuNh7ujqB2OzLbRwi8Sp9A7UNxw9/B5DL aEkOSKQMOOxjoV5NoX0d/Ebp1KRhYe1kfxzUkx7GT9sbw/v5n4KKMPXAq+u8Pc8HDBHZ PuZCz6cbuBT+Dxu0BnAqK9NWwYxHRUTUpkVIFjfpNQwB8rtKk1qjOEpjP/CCiSATpg9n HC5RVs/XuX9f9incxdVK9fn7teNcy/Zz7vI3Dp1sa441ir0+XO3kHcWkGo+G5AZ7GO6B YZNw== X-Gm-Message-State: AOJu0YxP4Kc8GbYj7ZMWFZF2xKH8ZKPa2rS6aPTnYwz9ayAMAM3bQoNt GmpBwCW1zfA/t9VeJ7h5B0w82/CcYCt3wkCZUcs7RbnWb2hepdqSi01lEUKx X-Google-Smtp-Source: AGHT+IHzG2jHmxPsUNMHyIMe6oCa6AfdcB8BUhjGQ4P2XLwQqaJoYBkr8szHLpLpD1oyqCehk3Zkdw== X-Received: by 2002:a05:651c:502:b0:2f7:543a:3b1a with SMTP id 38308e7fff4ca-2faf3c01f4emr63688091fa.7.1728375667717; Tue, 08 Oct 2024 01:21:07 -0700 (PDT) Received: from localhost.localdomain ([188.243.23.53]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2faf9ac440asm11022941fa.46.2024.10.08.01.21.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Oct 2024 01:21:06 -0700 (PDT) From: Alexander Shiyan To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexander Shiyan Subject: [PATCH v2 1/3] media: i2c: ds90ub960: Convert IC specific variables to enums Date: Tue, 8 Oct 2024 11:20:47 +0300 Message-Id: <20241008082049.18483-1-eagle.alexander923@gmail.com> X-Mailer: git-send-email 2.39.1 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This patch converts chip-specific variables into chip enums that can be used to easily add support for other chip types. --- v2: Use family enumeration instead of flags to indicate FPD3/FPD4 difference. Signed-off-by: Alexander Shiyan --- drivers/media/i2c/ds90ub960.c | 83 ++++++++++++++++++++++++----------- 1 file changed, 58 insertions(+), 25 deletions(-) diff --git a/drivers/media/i2c/ds90ub960.c b/drivers/media/i2c/ds90ub960.c index ffe5f25f8647..d71920677a0a 100644 --- a/drivers/media/i2c/ds90ub960.c +++ b/drivers/media/i2c/ds90ub960.c @@ -402,12 +402,21 @@ #define UB960_MAX_EQ_LEVEL 14 #define UB960_NUM_EQ_LEVELS (UB960_MAX_EQ_LEVEL - UB960_MIN_EQ_LEVEL + 1) +enum chip_type { + UB960, + UB9702, +}; + +enum chip_family { + FAMILY_FPD3, + FAMILY_FPD4, +}; + struct ub960_hw_data { - const char *model; + enum chip_type chip_type; + enum chip_family chip_family; u8 num_rxports; u8 num_txports; - bool is_ub9702; - bool is_fpdlink4; }; enum ub960_rxport_mode { @@ -1654,10 +1663,15 @@ static int ub960_rxport_add_serializer(struct ub960_data *priv, u8 nport) ser_pdata->port = nport; ser_pdata->atr = priv->atr; - if (priv->hw_data->is_ub9702) + + switch (priv->hw_data->chip_type) { + case UB9702: ser_pdata->bc_rate = ub960_calc_bc_clk_rate_ub9702(priv, rxport); - else + break; + default: ser_pdata->bc_rate = ub960_calc_bc_clk_rate_ub960(priv, rxport); + break; + } /* * The serializer is added under the same i2c adapter as the @@ -1785,7 +1799,7 @@ static int ub960_init_tx_ports(struct ub960_data *priv) ub960_write(priv, UB960_SR_CSI_PLL_CTL, speed_select); - if (priv->hw_data->is_ub9702) { + if (priv->hw_data->chip_type == UB9702) { ub960_write(priv, UB960_SR_CSI_PLL_DIV, pll_div); switch (priv->tx_data_rate) { @@ -2140,10 +2154,14 @@ static int ub960_init_rx_ports(struct ub960_data *priv) if (!rxport) continue; - if (priv->hw_data->is_ub9702) + switch (priv->hw_data->chip_type) { + case UB9702: ub960_init_rx_port_ub9702(priv, rxport); - else + break; + default: ub960_init_rx_port_ub960(priv, rxport); + break; + } } return 0; @@ -2486,6 +2504,7 @@ static int ub960_configure_ports_for_streaming(struct ub960_data *priv, for (nport = 0; nport < priv->hw_data->num_rxports; nport++) { struct ub960_rxport *rxport = priv->rxports[nport]; u8 vc = vc_map[nport]; + unsigned int i; if (rx_data[nport].num_streams == 0) continue; @@ -2509,21 +2528,22 @@ static int ub960_configure_ports_for_streaming(struct ub960_data *priv, case RXPORT_MODE_CSI2_SYNC: case RXPORT_MODE_CSI2_NONSYNC: - if (!priv->hw_data->is_ub9702) { + switch (priv->hw_data->chip_type) { + case UB9702: + /* Map all VCs from this port to VC(nport) */ + for (i = 0; i < 8; i++) + ub960_rxport_write(priv, nport, + UB960_RR_VC_ID_MAP(i), + nport); + break; + default: /* Map all VCs from this port to the same VC */ ub960_rxport_write(priv, nport, UB960_RR_CSI_VC_MAP, (vc << UB960_RR_CSI_VC_MAP_SHIFT(3)) | (vc << UB960_RR_CSI_VC_MAP_SHIFT(2)) | (vc << UB960_RR_CSI_VC_MAP_SHIFT(1)) | (vc << UB960_RR_CSI_VC_MAP_SHIFT(0))); - } else { - unsigned int i; - - /* Map all VCs from this port to VC(nport) */ - for (i = 0; i < 8; i++) - ub960_rxport_write(priv, nport, - UB960_RR_VC_ID_MAP(i), - nport); + break; } break; @@ -3217,7 +3237,8 @@ ub960_parse_dt_rxport_link_properties(struct ub960_data *priv, return -EINVAL; } - if (!priv->hw_data->is_fpdlink4 && cdr_mode == RXPORT_CDR_FPD4) { + if ((priv->hw_data->chip_family != FAMILY_FPD4) && + (cdr_mode == RXPORT_CDR_FPD4)) { dev_err(dev, "rx%u: FPD-Link 4 CDR not supported\n", nport); return -EINVAL; } @@ -3796,6 +3817,7 @@ static int ub960_get_hw_resources(struct ub960_data *priv) static int ub960_enable_core_hw(struct ub960_data *priv) { struct device *dev = &priv->client->dev; + const char *model; u8 rev_mask; int ret; u8 dev_sts; @@ -3830,8 +3852,19 @@ static int ub960_enable_core_hw(struct ub960_data *priv) goto err_pd_gpio; } - dev_dbg(dev, "Found %s (rev/mask %#04x)\n", priv->hw_data->model, - rev_mask); + switch (priv->hw_data->chip_type) { + case UB960: + model = "UB960"; + break; + case UB9702: + model = "UB9702"; + break; + default: + model = "Unknown"; + break; + }; + + dev_info(dev, "Found %s (rev/mask %#04x)\n", model, rev_mask); ret = ub960_read(priv, UB960_SR_DEVICE_STS, &dev_sts); if (ret) @@ -3851,7 +3884,7 @@ static int ub960_enable_core_hw(struct ub960_data *priv) goto err_pd_gpio; /* release GPIO lock */ - if (priv->hw_data->is_ub9702) { + if (priv->hw_data->chip_type == UB9702) { ret = ub960_update_bits(priv, UB960_SR_RESET, UB960_SR_RESET_GPIO_LOCK_RELEASE, UB960_SR_RESET_GPIO_LOCK_RELEASE); @@ -4013,17 +4046,17 @@ static void ub960_remove(struct i2c_client *client) } static const struct ub960_hw_data ds90ub960_hw = { - .model = "ub960", + .chip_type = UB960, + .chip_family = FAMILY_FPD3, .num_rxports = 4, .num_txports = 2, }; static const struct ub960_hw_data ds90ub9702_hw = { - .model = "ub9702", + .chip_type = UB9702, + .chip_family = FAMILY_FPD4, .num_rxports = 4, .num_txports = 2, - .is_ub9702 = true, - .is_fpdlink4 = true, }; static const struct i2c_device_id ub960_id[] = { From patchwork Tue Oct 8 08:20:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 13825961 Received: from mail-lj1-f178.google.com (mail-lj1-f178.google.com [209.85.208.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8AF8F17BEC8 for ; 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Tue, 08 Oct 2024 01:21:10 -0700 (PDT) Received: from localhost.localdomain ([188.243.23.53]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2faf9ac440asm11022941fa.46.2024.10.08.01.21.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Oct 2024 01:21:10 -0700 (PDT) From: Alexander Shiyan To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexander Shiyan Subject: [PATCH v2 2/3] media: i2c: ds90ub960: Add DS90UB954 support Date: Tue, 8 Oct 2024 11:20:48 +0300 Message-Id: <20241008082049.18483-2-eagle.alexander923@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20241008082049.18483-1-eagle.alexander923@gmail.com> References: <20241008082049.18483-1-eagle.alexander923@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support for TI DS90UB954 FPD-Link III Deserializer. --- v2: Avoid potentially infinite loop when checking chip frequency. Move chip specific checks to appropriate functions. Signed-off-by: Alexander Shiyan --- drivers/media/i2c/Kconfig | 4 +-- drivers/media/i2c/ds90ub960.c | 58 ++++++++++++++++++++++++++++++++--- 2 files changed, 56 insertions(+), 6 deletions(-) diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 8ba096b8ebca..91fd2c3eb8bb 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -1604,8 +1604,8 @@ config VIDEO_DS90UB960 select V4L2_FWNODE select VIDEO_V4L2_SUBDEV_API help - Device driver for the Texas Instruments DS90UB960 - FPD-Link III Deserializer and DS90UB9702 FPD-Link IV Deserializer. + Device driver for the Texas Instruments DS90UB954/DS90UB960 + FPD-Link III Deserializers and DS90UB9702 FPD-Link IV Deserializer. config VIDEO_MAX96714 tristate "Maxim MAX96714 GMSL2 deserializer" diff --git a/drivers/media/i2c/ds90ub960.c b/drivers/media/i2c/ds90ub960.c index d71920677a0a..78f228c62d8a 100644 --- a/drivers/media/i2c/ds90ub960.c +++ b/drivers/media/i2c/ds90ub960.c @@ -403,6 +403,7 @@ #define UB960_NUM_EQ_LEVELS (UB960_MAX_EQ_LEVEL - UB960_MIN_EQ_LEVEL + 1) enum chip_type { + UB954, UB960, UB9702, }; @@ -815,6 +816,10 @@ static int ub960_txport_select(struct ub960_data *priv, u8 nport) lockdep_assert_held(&priv->reg_lock); + /* TX port registers is shared for UB954 */ + if (priv->hw_data->chip_type == UB954) + return 0; + if (priv->reg_current.txport == nport) return 0; @@ -1157,10 +1162,18 @@ static int ub960_parse_dt_txport(struct ub960_data *priv, priv->tx_link_freq[0] = vep.link_frequencies[0]; priv->tx_data_rate = priv->tx_link_freq[0] * 2; - if (priv->tx_data_rate != MHZ(1600) && - priv->tx_data_rate != MHZ(1200) && - priv->tx_data_rate != MHZ(800) && - priv->tx_data_rate != MHZ(400)) { + switch (priv->tx_data_rate) { + case MHZ(1600): + case MHZ(800): + case MHZ(400): + break; + case MHZ(1200): + /* UB954 does not support 1.2 Gbps */ + if ((priv->hw_data->chip_type == UB960) || + (priv->hw_data->chip_type == UB9702)) + break; + fallthrough; + default: dev_err(dev, "tx%u: invalid 'link-frequencies' value\n", nport); ret = -EINVAL; goto err_free_vep; @@ -1311,6 +1324,10 @@ static void ub960_rxport_set_strobe_pos(struct ub960_data *priv, { u8 clk_delay, data_delay; + /* FIXME: After writing to this area the UB954 chip no longer responds */ + if (priv->hw_data->chip_type == UB954) + return; + clk_delay = UB960_IR_RX_ANA_STROBE_SET_CLK_NO_EXTRA_DELAY; data_delay = UB960_IR_RX_ANA_STROBE_SET_DATA_NO_EXTRA_DELAY; @@ -3853,6 +3870,9 @@ static int ub960_enable_core_hw(struct ub960_data *priv) } switch (priv->hw_data->chip_type) { + case UB954: + model = "UB954"; + break; case UB960: model = "UB960"; break; @@ -3874,6 +3894,27 @@ static int ub960_enable_core_hw(struct ub960_data *priv) if (ret) goto err_pd_gpio; + if (priv->hw_data->chip_type == UB954) { + /* From DS90UB954-Q1 datasheet: + * "REFCLK_FREQ measurement is not synchronized. Value in this + * register should read twice and only considered valid if + * REFCLK_FREQ is unchanged between reads." + */ + unsigned long timeout = jiffies + msecs_to_jiffies(100); + + do { + u8 refclk_new; + + ret = ub960_read(priv, UB960_XR_REFCLK_FREQ, &refclk_new); + if (ret) + goto err_pd_gpio; + + if (refclk_new == refclk_freq) + break; + refclk_freq = refclk_new; + } while (time_before(jiffies, timeout)); + } + dev_dbg(dev, "refclk valid %u freq %u MHz (clk fw freq %lu MHz)\n", !!(dev_sts & BIT(4)), refclk_freq, clk_get_rate(priv->refclk) / 1000000); @@ -4045,6 +4086,13 @@ static void ub960_remove(struct i2c_client *client) mutex_destroy(&priv->reg_lock); } +static const struct ub960_hw_data ds90ub954_hw = { + .chip_type = UB954, + .chip_family = FAMILY_FPD3, + .num_rxports = 2, + .num_txports = 1, +}; + static const struct ub960_hw_data ds90ub960_hw = { .chip_type = UB960, .chip_family = FAMILY_FPD3, @@ -4060,6 +4108,7 @@ static const struct ub960_hw_data ds90ub9702_hw = { }; static const struct i2c_device_id ub960_id[] = { + { "ds90ub954-q1", (kernel_ulong_t)&ds90ub954_hw }, { "ds90ub960-q1", (kernel_ulong_t)&ds90ub960_hw }, { "ds90ub9702-q1", (kernel_ulong_t)&ds90ub9702_hw }, {} @@ -4067,6 +4116,7 @@ static const struct i2c_device_id ub960_id[] = { MODULE_DEVICE_TABLE(i2c, ub960_id); static const struct of_device_id ub960_dt_ids[] = { + { .compatible = "ti,ds90ub954-q1", .data = &ds90ub954_hw }, { .compatible = "ti,ds90ub960-q1", .data = &ds90ub960_hw }, { .compatible = "ti,ds90ub9702-q1", .data = &ds90ub9702_hw }, {} From patchwork Tue Oct 8 08:20:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 13825962 Received: from mail-lj1-f182.google.com (mail-lj1-f182.google.com [209.85.208.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D264D1DEFF6 for ; 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Tue, 08 Oct 2024 01:21:15 -0700 (PDT) Received: from localhost.localdomain ([188.243.23.53]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2faf9ac440asm11022941fa.46.2024.10.08.01.21.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Oct 2024 01:21:13 -0700 (PDT) From: Alexander Shiyan To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexander Shiyan , Conor Dooley Subject: [PATCH v2 3/3] media: dt-bindings: i2c: ds90ub960: Add DS90UB954 chip to DS90UB960 bindings Date: Tue, 8 Oct 2024 11:20:49 +0300 Message-Id: <20241008082049.18483-3-eagle.alexander923@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20241008082049.18483-1-eagle.alexander923@gmail.com> References: <20241008082049.18483-1-eagle.alexander923@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The ds90ub960 driver can now be used for the DS90UB954 chip as it has a similar register set and configuration. Let's add an additional compatibility line to the bindings. --- v2: No changes Acked-by: Conor Dooley Signed-off-by: Alexander Shiyan --- Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml b/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml index 0b71e6f911a8..86d43d949dd3 100644 --- a/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml +++ b/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml @@ -19,6 +19,7 @@ allOf: properties: compatible: enum: + - ti,ds90ub954-q1 - ti,ds90ub960-q1 - ti,ds90ub9702-q1